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Fri, 29 Sep 2023 03:57:59 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778371558536993515 X-GMAIL-MSGID: 1778371558536993515 System-level platform management layer (do_fw_call()) has support for maximum of 5 arguments as of now (1 EEMI API ID + 4 command arguments). In order to support new EEMI PM_IOCTL IDs (Secure Read/Write), this support must be extended to support one additional argument, which results in a configuration of - 1 EEMI API ID + 5 command arguments. Update zynqmp_pm_invoke_fn() and do_fw_call() with this new definition containing additional argument. As a result, update all the references to pm invoke function with the updated definition. Co-developed-by: Izhar Ameer Shaikh Signed-off-by: Izhar Ameer Shaikh Signed-off-by: Jay Buddhabhatti --- drivers/firmware/xilinx/zynqmp.c | 155 +++++++++++++----------- drivers/soc/xilinx/xlnx_event_manager.c | 2 +- drivers/soc/xilinx/zynqmp_power.c | 2 +- include/linux/firmware/xlnx-zynqmp.h | 2 +- 4 files changed, 87 insertions(+), 74 deletions(-) diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 4cc1ac7f76ed..d102619fd6f4 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -106,7 +106,7 @@ static int zynqmp_pm_ret_code(u32 ret_status) } } -static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2, +static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2, u64 arg3, u32 *ret_payload) { return -ENODEV; @@ -116,25 +116,26 @@ static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2, * PM function call wrapper * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration */ -static int (*do_fw_call)(u64, u64, u64, u32 *ret_payload) = do_fw_call_fail; +static int (*do_fw_call)(u64, u64, u64, u64, u32 *ret_payload) = do_fw_call_fail; /** * do_fw_call_smc() - Call system-level platform management layer (SMC) * @arg0: Argument 0 to SMC call * @arg1: Argument 1 to SMC call * @arg2: Argument 2 to SMC call + * @arg3: Argument 3 to SMC call * @ret_payload: Returned value array * * Invoke platform management function via SMC call (no hypervisor present). * * Return: Returns status, either success or error+reason */ -static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2, +static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2, u64 arg3, u32 *ret_payload) { struct arm_smccc_res res; - arm_smccc_smc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res); + arm_smccc_smc(arg0, arg1, arg2, arg3, 0, 0, 0, 0, &res); if (ret_payload) { ret_payload[0] = lower_32_bits(res.a0); @@ -151,6 +152,7 @@ static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2, * @arg0: Argument 0 to HVC call * @arg1: Argument 1 to HVC call * @arg2: Argument 2 to HVC call + * @arg3: Argument 3 to HVC call * @ret_payload: Returned value array * * Invoke platform management function via HVC @@ -159,12 +161,12 @@ static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2, * * Return: Returns status, either success or error+reason */ -static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2, +static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2, u64 arg3, u32 *ret_payload) { struct arm_smccc_res res; - arm_smccc_hvc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res); + arm_smccc_hvc(arg0, arg1, arg2, arg3, 0, 0, 0, 0, &res); if (ret_payload) { ret_payload[0] = lower_32_bits(res.a0); @@ -184,7 +186,7 @@ static int __do_feature_check_call(const u32 api_id, u32 *ret_payload) smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK; smc_arg[1] = api_id; - ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload); + ret = do_fw_call(smc_arg[0], smc_arg[1], 0, 0, ret_payload); if (ret) ret = -EOPNOTSUPP; else @@ -299,6 +301,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_is_function_supported); * @arg1: Argument 1 to requested PM-API call * @arg2: Argument 2 to requested PM-API call * @arg3: Argument 3 to requested PM-API call + * @arg4: Argument 4 to requested PM-API call * @ret_payload: Returned value array * * Invoke platform management function for SMC or HVC call, depending on @@ -317,7 +320,8 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_is_function_supported); * Return: Returns status, either success or error+reason */ int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, - u32 arg2, u32 arg3, u32 *ret_payload) + u32 arg2, u32 arg3, u32 arg4, + u32 *ret_payload) { /* * Added SIP service call Function Identifier @@ -334,8 +338,10 @@ int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, smc_arg[0] = PM_SIP_SVC | pm_api_id; smc_arg[1] = ((u64)arg1 << 32) | arg0; smc_arg[2] = ((u64)arg3 << 32) | arg2; + smc_arg[3] = ((u64)arg4); - return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], ret_payload); + return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], smc_arg[3], + ret_payload); } static u32 pm_api_version; @@ -348,13 +354,13 @@ int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset) int ret; ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, sgi_num, reset, 0, 0, - NULL); + 0, NULL); if (!ret) return ret; /* try old implementation as fallback strategy if above fails */ return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_REGISTER_SGI, sgi_num, - reset, NULL); + reset, 0, NULL); } /** @@ -376,7 +382,7 @@ int zynqmp_pm_get_api_version(u32 *version) *version = pm_api_version; return 0; } - ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, ret_payload); + ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, 0, ret_payload); *version = ret_payload[1]; return ret; @@ -399,7 +405,7 @@ int zynqmp_pm_get_chipid(u32 *idcode, u32 *version) if (!idcode || !version) return -EINVAL; - ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload); + ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, 0, ret_payload); *idcode = ret_payload[1]; *version = ret_payload[2]; @@ -427,7 +433,7 @@ static int zynqmp_pm_get_family_info(u32 *family, u32 *subfamily) return 0; } - ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload); + ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, 0, ret_payload); if (ret < 0) return ret; @@ -460,7 +466,7 @@ static int zynqmp_pm_get_trustzone_version(u32 *version) return 0; } ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, 0, 0, - 0, 0, ret_payload); + 0, 0, 0, ret_payload); *version = ret_payload[1]; return ret; @@ -508,7 +514,7 @@ int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out) int ret; ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, qdata.qid, qdata.arg1, - qdata.arg2, qdata.arg3, out); + qdata.arg2, qdata.arg3, 0, out); /* * For clock name query, all bytes in SMC response are clock name @@ -530,7 +536,8 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_query_data); */ int zynqmp_pm_clock_enable(u32 clock_id) { - return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL); + return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, 0, + NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable); @@ -545,7 +552,8 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable); */ int zynqmp_pm_clock_disable(u32 clock_id) { - return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL); + return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, 0, + NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable); @@ -565,7 +573,7 @@ int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state) int ret; ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, clock_id, 0, - 0, 0, ret_payload); + 0, 0, 0, ret_payload); *state = ret_payload[1]; return ret; @@ -585,7 +593,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate); int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider) { return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider, - 0, 0, NULL); + 0, 0, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider); @@ -605,7 +613,7 @@ int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider) int ret; ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, clock_id, 0, - 0, 0, ret_payload); + 0, 0, 0, ret_payload); *divider = ret_payload[1]; return ret; @@ -626,7 +634,7 @@ int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate) return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id, lower_32_bits(rate), upper_32_bits(rate), - 0, NULL); + 0, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate); @@ -646,7 +654,7 @@ int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate) int ret; ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETRATE, clock_id, 0, - 0, 0, ret_payload); + 0, 0, 0, ret_payload); *rate = ((u64)ret_payload[2] << 32) | ret_payload[1]; return ret; @@ -665,7 +673,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate); int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) { return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id, - parent_id, 0, 0, NULL); + parent_id, 0, 0, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent); @@ -685,7 +693,7 @@ int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) int ret; ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, clock_id, 0, - 0, 0, ret_payload); + 0, 0, 0, ret_payload); *parent_id = ret_payload[1]; return ret; @@ -705,7 +713,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent); int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode) { return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_MODE, - clk_id, mode, NULL); + clk_id, mode, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode); @@ -722,7 +730,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode); int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode) { return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_MODE, - clk_id, 0, mode); + clk_id, 0, 0, mode); } EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode); @@ -740,7 +748,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode); int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data) { return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_DATA, - clk_id, data, NULL); + clk_id, data, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data); @@ -757,7 +765,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data); int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data) { return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_DATA, - clk_id, 0, data); + clk_id, 0, 0, data); } EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data); @@ -780,7 +788,7 @@ int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value) if (value) { return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY, - type, value, NULL); + type, value, 0, NULL); } /* @@ -798,7 +806,7 @@ int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value) * Use PM_MMIO_READ/PM_MMIO_WRITE to re-implement the missing counter * part of IOCTL_SET_SD_TAPDELAY which clears SDx_ITAPDLYENA bits. */ - return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, reg, mask, 0, 0, NULL); + return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, reg, mask, 0, 0, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay); @@ -815,7 +823,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay); int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type) { return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET, - type, 0, NULL); + type, 0, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset); @@ -832,7 +840,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset); int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select) { return zynqmp_pm_invoke_fn(PM_IOCTL, dev_id, IOCTL_OSPI_MUX_SELECT, - select, 0, NULL); + select, 0, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select); @@ -848,7 +856,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select); int zynqmp_pm_write_ggs(u32 index, u32 value) { return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_GGS, - index, value, NULL); + index, value, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs); @@ -864,7 +872,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs); int zynqmp_pm_read_ggs(u32 index, u32 *value) { return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_GGS, - index, 0, value); + index, 0, 0, value); } EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs); @@ -881,7 +889,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs); int zynqmp_pm_write_pggs(u32 index, u32 value) { return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_PGGS, index, value, - NULL); + 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs); @@ -898,14 +906,14 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs); int zynqmp_pm_read_pggs(u32 index, u32 *value) { return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_PGGS, index, 0, - value); + 0, value); } EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs); int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value) { return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_TAPDELAY_BYPASS, - index, value, NULL); + index, value, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass); @@ -921,7 +929,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass); int zynqmp_pm_set_boot_health_status(u32 value) { return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_BOOT_HEALTH_STATUS, - value, 0, NULL); + value, 0, 0, NULL); } /** @@ -936,7 +944,7 @@ int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset, const enum zynqmp_pm_reset_action assert_flag) { return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, reset, assert_flag, - 0, 0, NULL); + 0, 0, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert); @@ -956,7 +964,7 @@ int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status) return -EINVAL; ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, reset, 0, - 0, 0, ret_payload); + 0, 0, 0, ret_payload); *status = ret_payload[1]; return ret; @@ -982,7 +990,7 @@ int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags) int ret; ret = zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address), - upper_32_bits(address), size, flags, + upper_32_bits(address), size, flags, 0, ret_payload); if (ret_payload[0]) return -ret_payload[0]; @@ -1008,7 +1016,8 @@ int zynqmp_pm_fpga_get_status(u32 *value) if (!value) return -EINVAL; - ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload); + ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, 0, + ret_payload); *value = ret_payload[1]; return ret; @@ -1039,7 +1048,7 @@ int zynqmp_pm_fpga_get_config_status(u32 *value) ret = zynqmp_pm_invoke_fn(PM_FPGA_READ, XILINX_ZYNQMP_PM_FPGA_CONFIG_STAT_OFFSET, lower_addr, upper_addr, - XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG, + XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG, 0, ret_payload); *value = ret_payload[1]; @@ -1058,7 +1067,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_config_status); */ int zynqmp_pm_pinctrl_request(const u32 pin) { - return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, pin, 0, 0, 0, NULL); + return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, pin, 0, 0, 0, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request); @@ -1072,7 +1081,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request); */ int zynqmp_pm_pinctrl_release(const u32 pin) { - return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, pin, 0, 0, 0, NULL); + return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, pin, 0, 0, 0, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release); @@ -1094,7 +1103,7 @@ int zynqmp_pm_pinctrl_get_function(const u32 pin, u32 *id) return -EINVAL; ret = zynqmp_pm_invoke_fn(PM_PINCTRL_GET_FUNCTION, pin, 0, - 0, 0, ret_payload); + 0, 0, 0, ret_payload); *id = ret_payload[1]; return ret; @@ -1113,7 +1122,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_function); int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id) { return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, pin, id, - 0, 0, NULL); + 0, 0, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function); @@ -1137,7 +1146,7 @@ int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param, return -EINVAL; ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, pin, param, - 0, 0, ret_payload); + 0, 0, 0, ret_payload); *value = ret_payload[1]; return ret; @@ -1167,7 +1176,7 @@ int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param, } return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, pin, - param, value, 0, NULL); + param, value, 0, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config); @@ -1186,7 +1195,7 @@ unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode) u32 ret_payload[PAYLOAD_ARG_CNT]; ret = zynqmp_pm_invoke_fn(PM_MMIO_READ, CRL_APB_BOOT_PIN_CTRL, 0, - 0, 0, ret_payload); + 0, 0, 0, ret_payload); *ps_mode = ret_payload[1]; @@ -1206,7 +1215,8 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_read); int zynqmp_pm_bootmode_write(u32 ps_mode) { return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, CRL_APB_BOOT_PIN_CTRL, - CRL_APB_BOOTPIN_CTRL_MASK, ps_mode, 0, NULL); + CRL_APB_BOOTPIN_CTRL_MASK, ps_mode, 0, + 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write); @@ -1221,7 +1231,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write); */ int zynqmp_pm_init_finalize(void) { - return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, NULL); + return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize); @@ -1235,7 +1245,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize); */ int zynqmp_pm_set_suspend_mode(u32 mode) { - return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, NULL); + return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode); @@ -1255,7 +1265,7 @@ int zynqmp_pm_request_node(const u32 node, const u32 capabilities, const u32 qos, const enum zynqmp_pm_request_ack ack) { return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, node, capabilities, - qos, ack, NULL); + qos, ack, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_request_node); @@ -1271,7 +1281,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_request_node); */ int zynqmp_pm_release_node(const u32 node) { - return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, NULL); + return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_release_node); @@ -1291,7 +1301,8 @@ int zynqmp_pm_get_rpu_mode(u32 node_id, enum rpu_oper_mode *rpu_mode) int ret; ret = zynqmp_pm_invoke_fn(PM_IOCTL, node_id, - IOCTL_GET_RPU_OPER_MODE, 0, 0, ret_payload); + IOCTL_GET_RPU_OPER_MODE, 0, 0, 0, + ret_payload); /* only set rpu_mode if no error */ if (ret == XST_PM_SUCCESS) @@ -1315,7 +1326,7 @@ int zynqmp_pm_set_rpu_mode(u32 node_id, enum rpu_oper_mode rpu_mode) { return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SET_RPU_OPER_MODE, (u32)rpu_mode, - 0, NULL); + 0, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_set_rpu_mode); @@ -1333,7 +1344,7 @@ int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode) { return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_TCM_COMB_CONFIG, (u32)tcm_mode, 0, - NULL); + 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_set_tcm_config); @@ -1348,7 +1359,8 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_set_tcm_config); int zynqmp_pm_force_pwrdwn(const u32 node, const enum zynqmp_pm_request_ack ack) { - return zynqmp_pm_invoke_fn(PM_FORCE_POWERDOWN, node, ack, 0, 0, NULL); + return zynqmp_pm_invoke_fn(PM_FORCE_POWERDOWN, node, ack, 0, 0, 0, + NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_force_pwrdwn); @@ -1368,7 +1380,7 @@ int zynqmp_pm_request_wake(const u32 node, { /* set_addr flag is encoded into 1st bit of address */ return zynqmp_pm_invoke_fn(PM_REQUEST_WAKEUP, node, address | set_addr, - address >> 32, ack, NULL); + address >> 32, ack, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_request_wake); @@ -1389,7 +1401,7 @@ int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, const enum zynqmp_pm_request_ack ack) { return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities, - qos, ack, NULL); + qos, ack, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement); @@ -1406,7 +1418,8 @@ int zynqmp_pm_load_pdi(const u32 src, const u64 address) { return zynqmp_pm_invoke_fn(PM_LOAD_PDI, src, lower_32_bits(address), - upper_32_bits(address), 0, NULL); + upper_32_bits(address), 0, + 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi); @@ -1428,7 +1441,7 @@ int zynqmp_pm_aes_engine(const u64 address, u32 *out) ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address), lower_32_bits(address), - 0, 0, ret_payload); + 0, 0, 0, ret_payload); *out = ret_payload[1]; return ret; @@ -1457,7 +1470,7 @@ int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags) u32 upper_addr = upper_32_bits(address); return zynqmp_pm_invoke_fn(PM_SECURE_SHA, upper_addr, lower_addr, - size, flags, NULL); + size, flags, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash); @@ -1480,7 +1493,7 @@ int zynqmp_pm_register_notifier(const u32 node, const u32 event, const u32 wake, const u32 enable) { return zynqmp_pm_invoke_fn(PM_REGISTER_NOTIFIER, node, event, - wake, enable, NULL); + wake, enable, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_register_notifier); @@ -1494,7 +1507,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_register_notifier); int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype) { return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, type, subtype, - 0, 0, NULL); + 0, 0, 0, NULL); } /** @@ -1507,7 +1520,7 @@ int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype) int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value) { return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_FEATURE_CONFIG, - id, value, NULL); + id, value, 0, NULL); } /** @@ -1521,7 +1534,7 @@ int zynqmp_pm_get_feature_config(enum pm_feature_config_id id, u32 *payload) { return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_FEATURE_CONFIG, - id, 0, payload); + id, 0, 0, payload); } /** @@ -1535,7 +1548,7 @@ int zynqmp_pm_get_feature_config(enum pm_feature_config_id id, int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value) { return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_SD_CONFIG, - config, value, NULL); + config, value, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_config); @@ -1551,7 +1564,7 @@ int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config, u32 value) { return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_GEM_CONFIG, - config, value, NULL); + config, value, 0, NULL); } EXPORT_SYMBOL_GPL(zynqmp_pm_set_gem_config); diff --git a/drivers/soc/xilinx/xlnx_event_manager.c b/drivers/soc/xilinx/xlnx_event_manager.c index 86a048a10a13..38cfc161a713 100644 --- a/drivers/soc/xilinx/xlnx_event_manager.c +++ b/drivers/soc/xilinx/xlnx_event_manager.c @@ -483,7 +483,7 @@ static void xlnx_call_notify_cb_handler(const u32 *payload) static void xlnx_get_event_callback_data(u32 *buf) { - zynqmp_pm_invoke_fn(GET_CALLBACK_DATA, 0, 0, 0, 0, buf); + zynqmp_pm_invoke_fn(GET_CALLBACK_DATA, 0, 0, 0, 0, 0, buf); } static irqreturn_t xlnx_event_handler(int irq, void *dev_id) diff --git a/drivers/soc/xilinx/zynqmp_power.c b/drivers/soc/xilinx/zynqmp_power.c index c2c819701eec..52a868a09106 100644 --- a/drivers/soc/xilinx/zynqmp_power.c +++ b/drivers/soc/xilinx/zynqmp_power.c @@ -51,7 +51,7 @@ static enum pm_suspend_mode suspend_mode = PM_SUSPEND_MODE_STD; static void zynqmp_pm_get_callback_data(u32 *buf) { - zynqmp_pm_invoke_fn(GET_CALLBACK_DATA, 0, 0, 0, 0, buf); + zynqmp_pm_invoke_fn(GET_CALLBACK_DATA, 0, 0, 0, 0, 0, buf); } static void suspend_event_callback(const u32 *payload, void *data) diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index e8b12ec8b060..9e2d8e02d9e6 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -498,7 +498,7 @@ struct zynqmp_pm_query_data { }; int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, - u32 arg2, u32 arg3, u32 *ret_payload); + u32 arg2, u32 arg3, u32 arg4, u32 *ret_payload); #if IS_REACHABLE(CONFIG_ZYNQMP_FIRMWARE) int zynqmp_pm_get_api_version(u32 *version); From patchwork Fri Sep 29 10:55:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Buddhabhatti, Jay" X-Patchwork-Id: 146747 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:6359:6f87:b0:13f:353d:d1ed with SMTP id tl7csp3526082rwb; Fri, 29 Sep 2023 12:55:15 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFSIwonJvJ0N6KOGLjmlHbgWUNNXvK54smzHhSQCPqKh2fzdMvOTsgSZ3WdsiCzPtq4ZQYM X-Received: by 2002:a17:903:22ce:b0:1c3:cee1:cc8e with SMTP id y14-20020a17090322ce00b001c3cee1cc8emr5301614plg.68.1696017315015; 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Fri, 29 Sep 2023 05:57:24 -0500 Received: from xsjarunbala50.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Fri, 29 Sep 2023 05:57:23 -0500 From: Jay Buddhabhatti To: , , , , , , , , , , , , CC: , , Jay Buddhabhatti , Saeed Nowshadi Subject: [PATCH 2/7] firmware: xilinx: Expand feature check to support all PLM modules Date: Fri, 29 Sep 2023 03:55:53 -0700 Message-ID: <20230929105558.11893-3-jay.buddhabhatti@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230929105558.11893-1-jay.buddhabhatti@amd.com> References: <20230929105558.11893-1-jay.buddhabhatti@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D9:EE_|IA0PR12MB7627:EE_ X-MS-Office365-Filtering-Correlation-Id: e6511b4c-1adf-401c-a130-08dbc0dadd3c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: VOjYrKuZvbzimiL6gmQICdmWM8Js/edNDpvCVSbdiVoeJHT06pUAjYr7AEjtPOnrXm57vhjKkskJsTyegmKA/SeCqjJvnZWLtfFEREMdCWtDsXNeDBAPGwo9WNdMrkusj1oODy7yRthADBdykcRAy2GTxHkQ/ia4CRlJpoT9pftWMGEkuCpdxgbpAFxqtq6kudZ/66HeMJfcBqnRLluIOFAhbgrostZDKqr7b0mLAStfdG3aNx4WxnDZtuHUpXu/mPSxx+cD7c34CJdSrjR0CI1mAk/GIn7Z9OA+n/cSXDWxMqxHNPLFx48XTv9VXxyOvw4Hb98d9YYNet2VSpUFNv1hfLkJds0SWkZ4MKvbnq5ZvJ56hcgY2dqfFH/uCEN4e8ccHn1FoSBwiFzSp+bMU/YWzS1RrEGw1qPvx4y+7bAcQUmWC3JYzFvdoWAyctPohRHeRMqFUdvuzZyV4pjjHxshgJj08mUzTaLzP31tc8pEqNs61Oer9NeJcwjyDZBiWRUONtlTC2qRt2tbC7anZcN2RrE6dmxZeSKAkzVl18fwYU95eYFMo7DHIpiLSFNKGI+10OHvIaMDYW48pgthnvbH3AMmkp70f8a8m9jzjJP5R7zgIRRvrstlQNBHmOSE5tEfI31bBDTDEZoWQy8k7kW/VENtJdgwiCC3qsJV77apLII73TxGWhJRsfQl+qSGtOgNskjC6dsCsyjqCAuPemtdztbmy9aUG6LCSPkcAqgHa3Eexz9jBUwpKSc8V3V2S9+gAoC/8mOZjimwsVvPGeyoArnIQggSyXgU86oDz6M= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(346002)(396003)(376002)(136003)(39860400002)(230922051799003)(1800799009)(451199024)(82310400011)(64100799003)(186009)(36840700001)(46966006)(40470700004)(2906002)(40460700003)(6666004)(1076003)(36860700001)(478600001)(70206006)(70586007)(86362001)(426003)(83380400001)(47076005)(81166007)(26005)(356005)(54906003)(921005)(336012)(82740400003)(316002)(8676002)(5660300002)(110136005)(44832011)(36756003)(40480700001)(4326008)(41300700001)(8936002)(2616005)(36900700001);DIR:OUT;SFP:1101; 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Fri, 29 Sep 2023 03:58:30 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778403052219840418 X-GMAIL-MSGID: 1778403052219840418 To support feature check for all modules, append the module id of the API that is being checked to the feature check API so it could be routed to the target module for processing. There is no need to check compatible string becuase the board information is taken via firmware interface. Co-developed-by: Saeed Nowshadi Signed-off-by: Saeed Nowshadi Signed-off-by: Jay Buddhabhatti --- drivers/firmware/xilinx/zynqmp.c | 45 +++++++++++++++++----------- include/linux/firmware/xlnx-zynqmp.h | 11 +++++++ 2 files changed, 39 insertions(+), 17 deletions(-) diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index d102619fd6f4..5f40288f69a9 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -182,9 +182,33 @@ static int __do_feature_check_call(const u32 api_id, u32 *ret_payload) { int ret; u64 smc_arg[2]; + u32 module_id; + u32 feature_check_api_id; - smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK; - smc_arg[1] = api_id; + module_id = FIELD_GET(MODULE_ID_MASK, api_id); + + /* + * Feature check of APIs belonging to PM, XSEM, and TF-A are + * handled by calling PM_FEATURE_CHECK API. For other modules, + * call PM_API_FEATURES API. + */ + if (module_id == PM_MODULE_ID || module_id == XSEM_MODULE_ID || + module_id == TF_A_MODULE_ID) + feature_check_api_id = PM_FEATURE_CHECK; + else + feature_check_api_id = PM_API_FEATURES; + + /* + * Feature check of TF-A APIs is done in the TF-A layer + * and it expects for MODULE_ID_MASK bits of SMC's arg[0] to + * be the same as PM_MODULE_ID. + */ + if (module_id == TF_A_MODULE_ID) + module_id = PM_MODULE_ID; + + smc_arg[0] = PM_SIP_SVC | FIELD_PREP(MODULE_ID_MASK, module_id) | + feature_check_api_id; + smc_arg[1] = (api_id & API_ID_MASK); ret = do_fw_call(smc_arg[0], smc_arg[1], 0, 0, ret_payload); if (ret) @@ -1937,22 +1961,9 @@ static int zynqmp_firmware_probe(struct platform_device *pdev) if (ret) return ret; - np = of_find_compatible_node(NULL, NULL, "xlnx,zynqmp"); - if (!np) { - np = of_find_compatible_node(NULL, NULL, "xlnx,versal"); - if (!np) - return 0; - + ret = do_feature_check_call(PM_FEATURE_CHECK); + if (ret >= 0 && ((ret & FIRMWARE_VERSION_MASK) >= PM_API_VERSION_1)) feature_check_enabled = true; - } - - if (!feature_check_enabled) { - ret = do_feature_check_call(PM_FEATURE_CHECK); - if (ret >= 0) - feature_check_enabled = true; - } - - of_node_put(np); devinfo = devm_kzalloc(dev, sizeof(*devinfo), GFP_KERNEL); if (!devinfo) diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 9e2d8e02d9e6..86fb73269d95 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -32,6 +32,7 @@ #define PM_SIP_SVC 0xC2000000 /* PM API versions */ +#define PM_API_VERSION_1 1 #define PM_API_VERSION_2 2 #define PM_PINCTRL_PARAM_SET_VERSION 2 @@ -47,6 +48,9 @@ #define FAMILY_CODE_MASK GENMASK(27, 21) #define SUB_FAMILY_CODE_MASK GENMASK(20, 19) +#define API_ID_MASK GENMASK(7, 0) +#define MODULE_ID_MASK GENMASK(11, 8) + /* ATF only commands */ #define TF_A_PM_REGISTER_SGI 0xa04 #define PM_GET_TRUSTZONE_VERSION 0xa03 @@ -100,6 +104,12 @@ #define SD_ITAPDLY 0xFF180314 #define SD_OTAPDLYSEL 0xFF180318 +enum pm_module_id { + PM_MODULE_ID = 0x0, + XSEM_MODULE_ID = 0x3, + TF_A_MODULE_ID = 0xa, +}; + enum pm_api_cb_id { PM_INIT_SUSPEND_CB = 30, PM_ACKNOWLEDGE_CB = 31, @@ -107,6 +117,7 @@ enum pm_api_cb_id { }; enum pm_api_id { + PM_API_FEATURES = 0, PM_GET_API_VERSION = 1, PM_REGISTER_NOTIFIER = 5, PM_FORCE_POWERDOWN = 8, From patchwork Fri Sep 29 10:55:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Buddhabhatti, Jay" X-Patchwork-Id: 146596 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:cae8:0:b0:403:3b70:6f57 with SMTP id r8csp4098789vqu; Fri, 29 Sep 2023 08:03:09 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE+LTeFkZJAs4GSyGdpV2oCUsCuVumCDlknG2I8t9zjaRvFfckp7w5xEpCr4Fr2YMHaARBO X-Received: by 2002:a05:6a20:914e:b0:154:c836:9ed5 with SMTP id x14-20020a056a20914e00b00154c8369ed5mr5164730pzc.17.1695999788973; Fri, 29 Sep 2023 08:03:08 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1695999788; cv=pass; d=google.com; s=arc-20160816; b=IAr6yUPhn95aJGOBxuu5feOhybS/ZUNB+ZZoYUy5Y4H1QNMKa2JnBORF/tQ7XllXwM rEs+56L2WwCUnvLL0UTUbo7oKzUw/k2rhZF6HZX9R6C88V8uaCdmG9htZXzvA9zEhdj3 AO4R3fwVnO5HePPaBbhel2+os5gfSDqpOWmvq6fh2jeY1hqIWUtsBPRxWTIb85JNtX3o leE1IvcqThtWkh5xewgHoL+mO1vPNurWlNheEY4JsNGXAIo53fJs+J0X38dVMQPKquw1 V5wTFvFhC2csVJChBx9dVmEaIjTUuXcxogihXVToisOiN0VerSkNifNS2k07sNrNUu/3 kOKw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=N9ijAXVR29mxT2R3fWiYdJrGfSARSmoF4NBa17I6rEQ=; fh=y9gG4UvuY0mG2Ec7RJzYfn3H5r1gUezGtbqzzrVyzi8=; b=l6jKKkx0CSK/TKH0/koWVaE5NEgV9MQ3Ir7uzam4q6S4SF7mZubbmiprS+aoWc649L CW/H9kbpgclbqcdLmwbAGeL5ujEJivlKM49+zDDJoBJM4RoFtBYK0VtMH4dRpOrpju1W N9RmIk18WFYGv62ahMQfojV0VCg9UKp1THiu00AEV2SaUNTzDtQ0IZvKHFfBMvgDVb3P L9+8lgcIjFv0f+tFlpljpV1kmmNLKhLa78yx1YhoWNb1pQ4UyjBtK04alduoLD5iRc18 jsn0psrQlKpM6oiePQC+ljx2q7HRoMxFADAfc1YEd3bk2jN1i1XrKYGrptLV/BQGs3EA VEjA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=0oBWxuq4; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from snail.vger.email (snail.vger.email. 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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000E9D9.mail.protection.outlook.com (10.167.241.77) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6838.14 via Frontend Transport; Fri, 29 Sep 2023 10:57:26 +0000 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Fri, 29 Sep 2023 05:57:25 -0500 Received: from xsjarunbala50.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Fri, 29 Sep 2023 05:57:24 -0500 From: Jay Buddhabhatti To: , , , , , , , , , , , , CC: , , Jay Buddhabhatti Subject: [PATCH 3/7] drivers: soc: xilinx: add check for platform Date: Fri, 29 Sep 2023 03:55:54 -0700 Message-ID: <20230929105558.11893-4-jay.buddhabhatti@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230929105558.11893-1-jay.buddhabhatti@amd.com> References: <20230929105558.11893-1-jay.buddhabhatti@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D9:EE_|MN0PR12MB6343:EE_ X-MS-Office365-Filtering-Correlation-Id: 33242744-3415-421f-a8b0-08dbc0dade47 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Fri, 29 Sep 2023 03:58:02 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778384674652336050 X-GMAIL-MSGID: 1778384674652336050 Some error event IDs for Versal and Versal NET are different. Both the platforms should access their respective error event IDs so use sub_family_code to check for platform and check error IDs for respective platforms. The family code is passed via platform data to avoid platform detection again. Platform data is setup when even driver is registered. Signed-off-by: Jay Buddhabhatti --- drivers/firmware/xilinx/zynqmp.c | 2 +- drivers/soc/xilinx/xlnx_event_manager.c | 25 ++++++++++++++++++++----- include/linux/firmware/xlnx-zynqmp.h | 16 ++++++++++++---- 3 files changed, 33 insertions(+), 10 deletions(-) diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 5f40288f69a9..6583efa9ac48 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -2019,7 +2019,7 @@ static int zynqmp_firmware_probe(struct platform_device *pdev) np = of_find_compatible_node(NULL, NULL, "xlnx,versal"); if (np) { em_dev = platform_device_register_data(&pdev->dev, "xlnx_event_manager", - -1, NULL, 0); + -1, &pm_sub_family_code, 4); if (IS_ERR(em_dev)) dev_err_probe(&pdev->dev, PTR_ERR(em_dev), "EM register fail with error\n"); } diff --git a/drivers/soc/xilinx/xlnx_event_manager.c b/drivers/soc/xilinx/xlnx_event_manager.c index 38cfc161a713..8074ded7b39c 100644 --- a/drivers/soc/xilinx/xlnx_event_manager.c +++ b/drivers/soc/xilinx/xlnx_event_manager.c @@ -23,6 +23,7 @@ static DEFINE_PER_CPU_READ_MOSTLY(int, cpu_number1); static int virq_sgi; static int event_manager_availability = -EACCES; +static u32 pm_sub_family_code; /* SGI number used for Event management driver */ #define XLNX_EVENT_SGI_NUM (15) @@ -77,11 +78,22 @@ struct registered_event_data { static bool xlnx_is_error_event(const u32 node_id) { - if (node_id == EVENT_ERROR_PMC_ERR1 || - node_id == EVENT_ERROR_PMC_ERR2 || - node_id == EVENT_ERROR_PSM_ERR1 || - node_id == EVENT_ERROR_PSM_ERR2) - return true; + if (pm_sub_family_code == VERSAL_SUB_FAMILY_CODE) { + if (node_id == VERSAL_EVENT_ERROR_PMC_ERR1 || + node_id == VERSAL_EVENT_ERROR_PMC_ERR2 || + node_id == VERSAL_EVENT_ERROR_PSM_ERR1 || + node_id == VERSAL_EVENT_ERROR_PSM_ERR2) + return true; + } else { + if (node_id == VERSAL_NET_EVENT_ERROR_PMC_ERR1 || + node_id == VERSAL_NET_EVENT_ERROR_PMC_ERR2 || + node_id == VERSAL_NET_EVENT_ERROR_PMC_ERR3 || + node_id == VERSAL_NET_EVENT_ERROR_PSM_ERR1 || + node_id == VERSAL_NET_EVENT_ERROR_PSM_ERR2 || + node_id == VERSAL_NET_EVENT_ERROR_PSM_ERR3 || + node_id == VERSAL_NET_EVENT_ERROR_PSM_ERR4) + return true; + } return false; } @@ -625,6 +637,7 @@ static void xlnx_event_cleanup_sgi(struct platform_device *pdev) static int xlnx_event_manager_probe(struct platform_device *pdev) { int ret; + u32 *platform_data; ret = zynqmp_pm_feature(PM_REGISTER_NOTIFIER); if (ret < 0) { @@ -659,6 +672,8 @@ static int xlnx_event_manager_probe(struct platform_device *pdev) } event_manager_availability = 0; + platform_data = (u32 *)dev_get_platdata((const struct device *)&pdev->dev); + pm_sub_family_code = *platform_data; dev_info(&pdev->dev, "SGI %d Registered over TF-A\n", sgi_num); dev_info(&pdev->dev, "Xilinx Event Management driver probed\n"); diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 86fb73269d95..5d4c81790091 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -95,10 +95,18 @@ /* * Node IDs for the Error Events. */ -#define EVENT_ERROR_PMC_ERR1 (0x28100000U) -#define EVENT_ERROR_PMC_ERR2 (0x28104000U) -#define EVENT_ERROR_PSM_ERR1 (0x28108000U) -#define EVENT_ERROR_PSM_ERR2 (0x2810C000U) +#define VERSAL_EVENT_ERROR_PMC_ERR1 (0x28100000U) +#define VERSAL_EVENT_ERROR_PMC_ERR2 (0x28104000U) +#define VERSAL_EVENT_ERROR_PSM_ERR1 (0x28108000U) +#define VERSAL_EVENT_ERROR_PSM_ERR2 (0x2810C000U) + +#define VERSAL_NET_EVENT_ERROR_PMC_ERR1 (0x28100000U) +#define VERSAL_NET_EVENT_ERROR_PMC_ERR2 (0x28104000U) +#define VERSAL_NET_EVENT_ERROR_PMC_ERR3 (0x28108000U) +#define VERSAL_NET_EVENT_ERROR_PSM_ERR1 (0x2810C000U) +#define VERSAL_NET_EVENT_ERROR_PSM_ERR2 (0x28110000U) +#define VERSAL_NET_EVENT_ERROR_PSM_ERR3 (0x28114000U) +#define VERSAL_NET_EVENT_ERROR_PSM_ERR4 (0x28118000U) /* ZynqMP SD tap delay tuning */ #define SD_ITAPDLY 0xFF180314 From patchwork Fri Sep 29 10:55:55 2023 Content-Type: text/plain; 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Fri, 29 Sep 2023 03:57:50 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778374772691931456 X-GMAIL-MSGID: 1778374772691931456 Use family code in order to register event manager driver for Versal and Versal NET platforms, instead of using compatible string. Signed-off-by: Jay Buddhabhatti --- drivers/firmware/xilinx/zynqmp.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 6583efa9ac48..c504702fe9c7 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -1953,7 +1953,6 @@ ATTRIBUTE_GROUPS(zynqmp_firmware); static int zynqmp_firmware_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct device_node *np; struct zynqmp_devinfo *devinfo; int ret; @@ -2016,14 +2015,12 @@ static int zynqmp_firmware_probe(struct platform_device *pdev) zynqmp_pm_api_debugfs_init(); - np = of_find_compatible_node(NULL, NULL, "xlnx,versal"); - if (np) { + if (pm_family_code == VERSAL_FAMILY_CODE) { em_dev = platform_device_register_data(&pdev->dev, "xlnx_event_manager", -1, &pm_sub_family_code, 4); if (IS_ERR(em_dev)) dev_err_probe(&pdev->dev, PTR_ERR(em_dev), "EM register fail with error\n"); } - of_node_put(np); return of_platform_populate(dev->of_node, NULL, NULL, dev); } From patchwork Fri Sep 29 10:55:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Buddhabhatti, Jay" X-Patchwork-Id: 146727 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:cae8:0:b0:403:3b70:6f57 with SMTP id r8csp4248448vqu; Fri, 29 Sep 2023 12:04:47 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFV5kq8DodSTMYEvdoDGZu+D4sXZQ8qrcuk1hfF3vwnvmoIqu6B6Z/bue/vi44PaueaKn3e X-Received: by 2002:a05:6a20:7343:b0:153:b16e:8db1 with SMTP id v3-20020a056a20734300b00153b16e8db1mr5578700pzc.10.1696014287649; Fri, 29 Sep 2023 12:04:47 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1696014287; cv=pass; d=google.com; s=arc-20160816; b=PBSwRlPGf560Gm9ak3W6QePYPRQIMy1f5tOqVL9oNgvc1DU0YR8+rzTwrN1QJzQM2H SkNUx7Fc1h9lMRH1fkc1azuFXHuU0NB61FRdjiJQbAuWw2p/IlKKPqzz3ZVEuijKzaeX GAIxvZSy0Rr56Rlxec4DmIyFtGenVanXenAAVzfDii36KOJDxomoKwmjaGbYxNn3d6c0 oc561pZYcefrGxqIM/pUje9FWFJMG6FhLtD/9GfkZzsEsozK648xSbpi141RjWCcNMhM Gu9ZLnT/oP6B4tVhLv8rjJCFzHgo7O97VqA/zgizZNRTK4yhGpnmUOrfCWkwxv4NkGED px0A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=Xtn0iEdqRcsSuVAqIoTm1ZWEuN9iklKCGyYbgtvOmEA=; fh=y9gG4UvuY0mG2Ec7RJzYfn3H5r1gUezGtbqzzrVyzi8=; b=sNzhfVxKehbgj/BKV6FjMI4JwuITLwLqs/R1L8JnUnjsvgZzoroJBo9a3n2hRuaUb2 YgSWA8nsXRD7pntb7Pdnm9JFHnpVXJXxIhZLBHRL9Fx2aeZHiRkB48z6x/4elXEeq6EA BHxFJd0aSFsoJrDUGxjm42wjpA0E7tpXUt70B3PeZsUI5Rnl8HodeVxVo/10mqMJnTNr rMvje5R6eFKDhxwdDj10mm4eoD92j3gKRlKjKJUYkJauIdHfvuf2z0GAyXw5npG1E+qE cZcQ8/LTRsaIGBjGr9Y44n/5LS2gMPs4z44Mt5p1xyKt1uu8y+aFIuD9NISD+KoR2MvC Mz/w== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=sTRaTv4I; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from lipwig.vger.email (lipwig.vger.email. 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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000E9D5.mail.protection.outlook.com (10.167.241.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6838.14 via Frontend Transport; Fri, 29 Sep 2023 10:57:29 +0000 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Fri, 29 Sep 2023 05:57:28 -0500 Received: from xsjarunbala50.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Fri, 29 Sep 2023 05:57:27 -0500 From: Jay Buddhabhatti To: , , , , , , , , , , , , CC: , , Jay Buddhabhatti Subject: [PATCH 5/7] drivers: soc: xilinx: Fix error message on SGI registration failure Date: Fri, 29 Sep 2023 03:55:56 -0700 Message-ID: <20230929105558.11893-6-jay.buddhabhatti@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230929105558.11893-1-jay.buddhabhatti@amd.com> References: <20230929105558.11893-1-jay.buddhabhatti@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D5:EE_|SA1PR12MB5671:EE_ X-MS-Office365-Filtering-Correlation-Id: e437002d-4ded-407a-41df-08dbc0dadfca X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Fri, 29 Sep 2023 03:58:27 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778399877721477628 X-GMAIL-MSGID: 1778399877721477628 Failure to register SGI for firmware event notification is non-fatal error when feature is not supported by other modules such as Xen and TF-A. Add _info level log message for such special case. Also add XST_PM_INVALID_VERSION error code and map it to -EOPNOSUPP Linux kernel error code. If feature is not supported or EEMI API version is mismatch, firmware can return XST_PM_INVALID_VERSION = 4 or XST_PM_NO_FEATURE = 19 error code. Co-developed-by: Tanmay Shah Signed-off-by: Tanmay Shah Signed-off-by: Jay Buddhabhatti --- drivers/firmware/xilinx/zynqmp.c | 4 +++- drivers/soc/xilinx/xlnx_event_manager.c | 7 ++++++- include/linux/firmware/xlnx-zynqmp.h | 1 + 3 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index c504702fe9c7..0316db03fa51 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -92,6 +92,8 @@ static int zynqmp_pm_ret_code(u32 ret_status) return 0; case XST_PM_NO_FEATURE: return -ENOTSUPP; + case XST_PM_INVALID_VERSION: + return -EOPNOTSUPP; case XST_PM_NO_ACCESS: return -EACCES; case XST_PM_ABORT_SUSPEND: @@ -379,7 +381,7 @@ int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset) ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, sgi_num, reset, 0, 0, 0, NULL); - if (!ret) + if (ret != -EOPNOTSUPP && !ret) return ret; /* try old implementation as fallback strategy if above fails */ diff --git a/drivers/soc/xilinx/xlnx_event_manager.c b/drivers/soc/xilinx/xlnx_event_manager.c index 8074ded7b39c..5b6fb336da29 100644 --- a/drivers/soc/xilinx/xlnx_event_manager.c +++ b/drivers/soc/xilinx/xlnx_event_manager.c @@ -666,7 +666,12 @@ static int xlnx_event_manager_probe(struct platform_device *pdev) ret = zynqmp_pm_register_sgi(sgi_num, 0); if (ret) { - dev_err(&pdev->dev, "SGI %d Registration over TF-A failed with %d\n", sgi_num, ret); + if (ret == -EOPNOTSUPP) + dev_info(&pdev->dev, "PM firmware event notification not supported\n"); + else + dev_err(&pdev->dev, "SGI %d registration failed, err %d\n", + sgi_num, ret); + xlnx_event_cleanup_sgi(pdev); return ret; } diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 5d4c81790091..880c3b17571b 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -168,6 +168,7 @@ enum pm_api_id { /* PMU-FW return status codes */ enum pm_ret_status { XST_PM_SUCCESS = 0, + XST_PM_INVALID_VERSION = 4, XST_PM_NO_FEATURE = 19, XST_PM_INTERNAL = 2000, XST_PM_CONFLICT = 2001, From patchwork Fri Sep 29 10:55:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Buddhabhatti, Jay" X-Patchwork-Id: 146519 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:cae8:0:b0:403:3b70:6f57 with SMTP id r8csp3982249vqu; Fri, 29 Sep 2023 05:18:41 -0700 (PDT) X-Google-Smtp-Source: AGHT+IF70SDon63j6jriOKsoWc3xTZIUmNaArpn9v5P4uywHvLvZvmkxHyK9D9rm6DDBLPHX+EoQ X-Received: by 2002:a17:90b:50d:b0:273:83ac:5eb9 with SMTP id r13-20020a17090b050d00b0027383ac5eb9mr6514083pjz.4.1695989920992; Fri, 29 Sep 2023 05:18:40 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1695989920; cv=pass; d=google.com; s=arc-20160816; b=gZSxaGIq+90XCxO4+qa0Bc2L/QYWUPJWI5y/pXfpln+TJ4sAQHfJEbU1mUN10gFeue VaJsjN93seKP84jydiIONBE3v9Khuae7ahEUNt7QXkyT0/rihamWqXjtwlhki2DlZNl6 0vZwgkcLX/O461ekoV9w0JQt41zUXRrf8drmLq3icfPBQZrnOaB/hiXxkeonBZ+Zr6ED W7cTkBtqmzD3EuIDcbHzMDUE7NOq+xxLRsN5VNLJyCqKRUdI5P16qvxd4wZwt41J8HPp zloJ6R40Lf1affkfyaYbJkSmxIKHppJFOPTRYFu7VnUW9tvyDv0/mTuWAjfwSXJxPwiI Wpyg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=/KyZeer0+O9IJCYIfYBm2aTpBVbpw6pEzNjZY9ptrM0=; fh=K64Gs6w/dUY5eJJCnul+TLyTCQYUdAoEFvTRboRIq6Y=; b=0ZB7EGSY09u9FDl7BsmaCztzFPDw/HsjdvFTy41S1zjHmXn3jmKYu7Y3b7U+5eCuqQ POmuPRUPIubYeZ4meoxW8qWiTfuRD3C3huJVyp6UCUoaBxBw8lPBy3CIjVcCkGwYPxTv 2eCGbOIi3g15ZKQp7q0ZGegnNOBh+6uq6TwEEHLuMOBLmR2clh6++iKVl6VfoMtPSiYY z9XjTvTFlCvsoEc7cigEjBF8VUc+ktIVBngh7wWrT4E9YGQn5a1uH+Nkk4TOKhmBNJay 5a9r0c2XfZryRXj1Dqj9wLU6zS7T3J+obPJHi+xRLVbRmtr4abHiWt0Qww/WIxFRcmNV +NBw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=tXDJOczf; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from snail.vger.email (snail.vger.email. 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Fri, 29 Sep 2023 05:57:28 -0500 From: Jay Buddhabhatti To: , , , , , , , , , , , , CC: , , Jay Buddhabhatti , Naman Trivedi Manojbhai Subject: [PATCH 6/7] firmware: zynqmp: Add support to handle IPI CRC failure Date: Fri, 29 Sep 2023 03:55:57 -0700 Message-ID: <20230929105558.11893-7-jay.buddhabhatti@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230929105558.11893-1-jay.buddhabhatti@amd.com> References: <20230929105558.11893-1-jay.buddhabhatti@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D5:EE_|PH7PR12MB5733:EE_ X-MS-Office365-Filtering-Correlation-Id: cc97f218-2ea4-4b37-68aa-08dbc0dae196 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: bwS9aEKb0fG3ZafKfI9q9FnzbUsAnKa6wBuNA4waxC55RkbCechs3GUTBYTdvvSaNOieD9hg/pdwnnMAfNL8MjTzRgPFVYENWuDMAPRcEaP89XRGp/Ssy6KppCtev0iqgQn+OfmJHU9nHfjX5RDPpBlOzGIGZYiXFsl9cSZK9CesNgwRlvkUj3l43rArm27IYLxp+ak5jHxp5lFVZ94s0KMYrSYT9lHxtJM5urlLyuWtFbthLRz4iRgnhTchnfOrmTdPxsTsxtLVVFX/C14QuRuCyVYCQRfH0aliD/l0qwlsWbkkD5W2OA2NA/GmXRDyuBejhyFf5f8LFbBO83v0kPggnMhBDCGhskjUUEfXR+wVsRGvQ+4C80rmbwzrfkgoPzVNqnmWrc0tfkBsjX5q7IfHdcdG0E/0mYhPuOZd0oINH43SdztvuOGHfDG1cy6BXR4ErfE9y0ImnaBPox6DaJS7oMKhyy43Bi5AZJJwd6uI+z16Csk0727r6/8uESB9Dp56qPNFR3kDFIf2oAWqW9OfpH4WF74KXYX98ESl+vdTtB0kuma+f5uEs+AtIy1saLAkDtFiGtaeDY/ogBkWOXEo0aYmYh2uevkNkawkDbtxExR7pAx73NG1ViyPzWsJ3YKxzE9tkXp+cLsE7EnAh7PXPyapWUh4jqyDy/1z68D9fyfTYiRbQkdN2k0Y8AWxRuSpCxXg9JrGpn0IWoR2wQJXqGILN2q6rsPQzNC1UxuLJrYWT89j+HunVd7wA6AyFWcVcZbyNB3/l3LZNYUrFFWeS6dOAR5M2khyt8gCFik= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(346002)(376002)(136003)(396003)(230922051799003)(1800799009)(64100799003)(186009)(82310400011)(451199024)(40470700004)(46966006)(36840700001)(40460700003)(6666004)(83380400001)(356005)(82740400003)(86362001)(81166007)(921005)(47076005)(36860700001)(1076003)(36756003)(2616005)(40480700001)(26005)(2906002)(336012)(426003)(5660300002)(478600001)(8676002)(8936002)(44832011)(41300700001)(70206006)(110136005)(316002)(4326008)(54906003)(70586007)(36900700001);DIR:OUT;SFP:1101; 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Fri, 29 Sep 2023 03:58:33 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778374327480712045 X-GMAIL-MSGID: 1778374327480712045 Added new PM error code XST_PM_INVALID_CRC to handle CRC validation failure during IPI communication. Co-developed-by: Naman Trivedi Manojbhai Signed-off-by: Naman Trivedi Manojbhai Signed-off-by: Jay Buddhabhatti --- drivers/firmware/xilinx/zynqmp.c | 1 + include/linux/firmware/xlnx-zynqmp.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 0316db03fa51..5e497a8ea7e8 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -103,6 +103,7 @@ static int zynqmp_pm_ret_code(u32 ret_status) case XST_PM_INTERNAL: case XST_PM_CONFLICT: case XST_PM_INVALID_NODE: + case XST_PM_INVALID_CRC: default: return -EINVAL; } diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 880c3b17571b..1aadcd2dc34c 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -170,6 +170,7 @@ enum pm_ret_status { XST_PM_SUCCESS = 0, XST_PM_INVALID_VERSION = 4, XST_PM_NO_FEATURE = 19, + XST_PM_INVALID_CRC = 301, XST_PM_INTERNAL = 2000, XST_PM_CONFLICT = 2001, XST_PM_NO_ACCESS = 2002, From patchwork Fri Sep 29 10:55:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Buddhabhatti, Jay" X-Patchwork-Id: 146734 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:6359:6f87:b0:13f:353d:d1ed with SMTP id tl7csp3513922rwb; Fri, 29 Sep 2023 12:21:17 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHi962WA+obOthh9Xg4CVQQNpRPBgHyD+LP0GL7/F4H6t5ZNOAkqj3OPqrUX/23EA2Cfc3e X-Received: by 2002:a17:902:d2cb:b0:1c4:fae:bf28 with SMTP id n11-20020a170902d2cb00b001c40faebf28mr5947128plc.32.1696015277570; Fri, 29 Sep 2023 12:21:17 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1696015277; cv=pass; d=google.com; s=arc-20160816; b=bvCSgHBjFpdz7vw2detbDEmCA11hpJo2oIEhOywvP3KYIVKAJe4pLeKjbvtl6VvhYs 6iTfLuR00VHN5R0AaUJXA3eBRr7TgezGhHa5PynPWLy3NVMy8Yb7hEfcaexx5B6AAuGU CaihSNJ2wcycS0Bm6TkS5wlIvNt0p09bfOX6bPOwmLEqXeNh0KSR+BA6aH5j94cwZ0+p ojJBA95dZvkuyuz9W9eLrTvhx06Q/L7bsIlXKp+6kVmibQcC0KpLRBW0hRzIdbRcj4YS 4xgORb3TSsJLbFYbX4uMpNc7o9NywU0gvlM5SdLbhp8KvYHr0jSbychuwwWk9zovnhtB qwlw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=OfOPOjylN1iizpfHZSAe5fGp2m35jhpuBws/iFw1LYQ=; fh=y9gG4UvuY0mG2Ec7RJzYfn3H5r1gUezGtbqzzrVyzi8=; b=Ji7DwSM/yHPeiw++KY84tixnD1LG6hbix8IU2M4vi+eOFGGmTHSqKZEzkkPQztARq8 5V6sc0oNbXU/m1FBJ0yhicnC8r5/Ej+kPIc7USlR20HxbVIVtaKeiRtoGivgu+R1cx/g kVULa0a8jJYTvcqaDjOWPDGV7mwtDLyT6FvmAGUi4TyclSbvcpyezlHeTmP5PJ/xgm03 B0e1QGMdBs8gVz7dUxt0QhLuXPev1h339fkeWw5irwXFWnyc+uEGQnM2IG2UImZikwS4 /lDo9JQLnPgB9ehVkdjd2s9CEgnKs/7E24POOBH062RGiWQplw6gye3qF8HkwL0n7Y3c rn3w== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=hr4TFGuj; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from snail.vger.email (snail.vger.email. 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Fri, 29 Sep 2023 03:58:14 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778400915571272621 X-GMAIL-MSGID: 1778400915571272621 Added Michal as a maintainer of event manager driver as Abhyuday is no longer in AMD-Xilinx. Signed-off-by: Jay Buddhabhatti Acked-by: Michal Simek --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index b19995690904..8da1ef5f80f7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -23671,7 +23671,7 @@ F: Documentation/devicetree/bindings/net/can/xilinx,can.yaml F: drivers/net/can/xilinx_can.c XILINX EVENT MANAGEMENT DRIVER -M: Abhyuday Godhasara +M: Simek, Michal S: Maintained F: drivers/soc/xilinx/xlnx_event_manager.c F: include/linux/firmware/xlnx-event-manager.h