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[88.207.99.57]) by smtp.googlemail.com with ESMTPSA id o5-20020a50c905000000b0053448f23b33sm2933324edh.93.2023.09.28.14.16.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Sep 2023 14:16:22 -0700 (PDT) From: Robert Marko To: andersson@kernel.org, agross@kernel.org, konrad.dybcio@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, quic_tdas@quicinc.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Robert Marko Subject: [PATCH 1/2] dt-bindings: clocks: qcom,gcc-ipq8074: allow QMP PCI PHY PIPE clocks Date: Thu, 28 Sep 2023 23:15:20 +0200 Message-ID: <20230928211620.1278054-1-robimarko@gmail.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Thu, 28 Sep 2023 14:16:56 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778344063412246030 X-GMAIL-MSGID: 1778344063412246030 Allow passing QMP PCI PHY PIPE clocks to the IPQ8074 GCC to avoid having to do a global matching by name. Signed-off-by: Robert Marko --- Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml index 52e7831a8d6d..2d44ddc45aab 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml @@ -27,11 +27,15 @@ properties: items: - description: board XO clock - description: sleep clock + - description: Gen3 QMP PCIe PHY PIPE clock + - description: Gen2 QMP PCIe PHY PIPE clock clock-names: items: - const: xo - const: sleep_clk + - const: pcie0_pipe + - const: pcie1_pipe required: - compatible From patchwork Thu Sep 28 21:15:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 146382 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:cae8:0:b0:403:3b70:6f57 with SMTP id r8csp3700518vqu; Thu, 28 Sep 2023 17:56:26 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFqMzAV3eiIMeQpITNdGwKTUecdwIG6cnFxoi1KkLtkGQA/4YVhh/bbiUqf7g2eqJz+JmaU X-Received: by 2002:a05:6358:4406:b0:134:c37f:4b64 with SMTP id z6-20020a056358440600b00134c37f4b64mr3026167rwc.30.1695948986434; Thu, 28 Sep 2023 17:56:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695948986; cv=none; d=google.com; s=arc-20160816; b=RWmxZOIbcgkWu2TZ21W08xRj1eSF/c94VgAUgmbhWPReSRVoIuyCf7yefHL2dAM8Nw w6g6HWqJk4Ci/GXd5eccIV/Gd+9Mut0CVJIDfUz8wjvvrY1RZ83asb1WNsJZztwRd8R7 JNmdnsdHtrA3qlHttDzPWEAbhXzUJRgJkR9Z4z0YfbaRirxxF6thgpQQW45AKoaFXQ1R QJ9E2zFWoIuHVooIsRq8+dIHVhS317gROzHqIAoORX/pd+JtpfJVEgeTuP07If9e1SjT gMgcXYtNcEH8gV5xYSVJnbum7ZP/w7CcrAIvkZtfbrlaNVEO6P+7pSwWaBm7y1x1/Gq8 Q34Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=5XZTix1Mf7XTs+tXTEEd3SF8eZQ4E+jmYLihpcH3rUo=; fh=hWuJbgpYlb+/3s+7NRsS5bsQpl22kTvOc2X0e0Sixg0=; b=K5i6pk/0ni9DH8wGFS7nhSqQ69TMY3TUUEcRAxUoyUpNco4qkUBSvdf41Pj7Wkitrw nV75Zy++hKHPbbMxAQcbfNeaa912b1vzHc8tRy/AvTpq/BAf2DNellIz56YniPBCn4hm 0ZRapUv3D3BxxSRCib08pADx6nDYTkUSUHI9SQSUYYzl7yaDv/mfDzhxDUJEgZeMl07Y cCO81me6qpkV51tWDUY3WfY/sOZkjJkN8uldCcjjwG96L7DDn0T2/kUnwERMS4pE+JCy sByy3IByQJmFAMmAmQJ+OUX8tLgG1GyxoXbrxtb1DTYUu4FpbZJxa7ektI3eb23r73Fg XdIw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=GUdDkMll; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from groat.vger.email (groat.vger.email. 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[88.207.99.57]) by smtp.googlemail.com with ESMTPSA id o5-20020a50c905000000b0053448f23b33sm2933324edh.93.2023.09.28.14.16.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Sep 2023 14:16:23 -0700 (PDT) From: Robert Marko To: andersson@kernel.org, agross@kernel.org, konrad.dybcio@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, quic_tdas@quicinc.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Robert Marko Subject: [PATCH 2/2] arm64: dts: qcom: ipq8074: pass QMP PCI PHY PIPE clocks to GCC Date: Thu, 28 Sep 2023 23:15:21 +0200 Message-ID: <20230928211620.1278054-2-robimarko@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230928211620.1278054-1-robimarko@gmail.com> References: <20230928211620.1278054-1-robimarko@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Thu, 28 Sep 2023 14:19:40 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778331404777995256 X-GMAIL-MSGID: 1778331404777995256 Pass QMP PCI PHY PIPE clocks to the GCC controller so it does not have to find them by matching globaly by name. If not passed directly, driver maintains backwards compatibility by then falling back to global lookup. Signed-off-by: Robert Marko --- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index 643b586c0dec..1f108ee2e8ba 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -407,8 +407,8 @@ qpic_pins: qpic-state { gcc: gcc@1800000 { compatible = "qcom,gcc-ipq8074"; reg = <0x01800000 0x80000>; - clocks = <&xo>, <&sleep_clk>; - clock-names = "xo", "sleep_clk"; + clocks = <&xo>, <&sleep_clk>, <&pcie_qmp0>, <&pcie_qmp1>; + clock-names = "xo", "sleep_clk", "pcie0_pipe", "pcie1_pipe"; #clock-cells = <1>; #power-domain-cells = <1>; #reset-cells = <1>;