From patchwork Tue Sep 26 04:34:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 144962 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:cae8:0:b0:403:3b70:6f57 with SMTP id r8csp2022062vqu; Tue, 26 Sep 2023 09:02:12 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE/v4Fu/TJPtsqjRVSXdS+I1C9FCToxj5v1o76EZFyevp7R1UkxenkNVpCQaUM5Fh7GxpL9 X-Received: by 2002:a05:6a00:2401:b0:68a:3ba3:e249 with SMTP id z1-20020a056a00240100b0068a3ba3e249mr10966630pfh.16.1695744132166; Tue, 26 Sep 2023 09:02:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695744132; cv=none; d=google.com; s=arc-20160816; b=T99o7mBDPMZj3oUhSPsD1WT2Hbnz+d5kMdqbChQV5yi31+6HBgfIPPW604q+4zerA7 CH9e+w4LyACogISgvxIVNel585QPR5Kc3blXyXJsAHetjhGW4PzZiUQjZ0dM8Ng6i3Hn 6VxSuR4c3t7xHBH3L4N96hWEuohrJfacO6e91PEkKswbf+n4TLe7k4N2YfWZrv6cRxhZ 4tcbNvR/3D7xZlKGAns0fURRbPRGVQYB2meNmpMusjCJiV4c78cyI21msifLfE0KIeWz 8cV2b69kP/YPqmsblYwdVixbbkg7R3a/FO8H4f8ziSx4R5no1STI4zfdpRCpZIjCBENq bBAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=KeCQHNN67pQ7pJgPPlVJkQB5FjS2X6XolXrY+Dloy10=; fh=lklYjgijOL6CeE7m9oCVOkBh64K0ft6FjGJcUtwfsgw=; b=cchzmLV6SKoxUTmW2kA9fNWhNu5iCZaeNmUct0FlAn7lJ6O3SA0hdOnWvweseViX/y Trc8ZwcX7DE7o2U5u4JYvlwMUmyngeN8aP6BHmtvqsUFNSsC5tGYFNcqwvuzPKTMmy5j xkLxFnIj8edXR6LnLBj3ydOLjfwMq9xAPQzpOLCMvRactImfINr9WHDHTRPD20uvZIYh jvN3c8YOSJ6JN9CTkZ5Lp+zEhMyCp+9iOae+/3d8mqmqAOs72BWMWJ9Q7I/9NXhsDfNM 0WTK/B1iGtkqBeokNOh1zT1HdLJRkpPBZF7AQQBor+lb+srzw/1j1QrjgS6dv3lqyt0g 2m1A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=E9YBVuxJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id t184-20020a6381c1000000b00578af1e2f3esi12400916pgd.687.2023.09.26.09.02.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Sep 2023 09:02:12 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=E9YBVuxJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 84F798029249; Mon, 25 Sep 2023 21:40:20 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233635AbjIZEkV (ORCPT + 27 others); Tue, 26 Sep 2023 00:40:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233599AbjIZEkT (ORCPT ); Tue, 26 Sep 2023 00:40:19 -0400 Received: from mail-oi1-x22e.google.com (mail-oi1-x22e.google.com [IPv6:2607:f8b0:4864:20::22e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2C09997 for ; Mon, 25 Sep 2023 21:40:13 -0700 (PDT) Received: by mail-oi1-x22e.google.com with SMTP id 5614622812f47-3adcec86a8cso4665308b6e.3 for ; Mon, 25 Sep 2023 21:40:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1695703212; x=1696308012; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KeCQHNN67pQ7pJgPPlVJkQB5FjS2X6XolXrY+Dloy10=; b=E9YBVuxJbWHllTVwcaeoClQ6tBw0GPK6czAdtOvYjq9i/nekACITS2iFdN0/GEd2TC qfsANRa0RaH/yCQqmO8RPDwcDCYsGwz4PTfJ6SNX4FkZsMIehVD0qjIP10vjmt5844Qw DUhmW/cV0JYwBr/sGl0r/wUMdJ6VeaRAW8w3I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695703212; x=1696308012; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KeCQHNN67pQ7pJgPPlVJkQB5FjS2X6XolXrY+Dloy10=; b=hR5MSta4WThF3bsu0rHAAbG2S4TNTo0S7dSYGjkpS4W7LZmFxex2ngOKfnlG41Jy3Z uC7cfSQ/68gdpD7aFUlfvk77IL7GrJcGq9ahWXgLqHP9yo8bECZpxys/mwkYSeKHzXY9 uYGmGyd0HwXXz1Gb+bCCiB4sRk77vcFnIEqCNnqaIXI1SQwekYoWKiUFbtuFiaO0kEZy 3oA0FGHzp69eUacUBrhxRztF7txkA8lFSD8MqV6uElqCsB5S+jHSAY0TpcD9EEjzTOAH QC9/QSOsbDcda583jgNf9C4s0qH5KCLQI2WVhm+oRW00JVLx4l6B6+4bSrKVp9LNE67a DKqg== X-Gm-Message-State: AOJu0YynT8up7aksNIgzXzZwmDBLcgAR6A3OtmXkl3C0sriDAIs7iq/K u0MgT6wDxQSFQ+J+bTsnYewM1Q== X-Received: by 2002:a05:6870:340d:b0:1dc:797a:daf4 with SMTP id g13-20020a056870340d00b001dc797adaf4mr9384807oah.7.1695703212418; Mon, 25 Sep 2023 21:40:12 -0700 (PDT) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:ba86:87c4:df1a:be60]) by smtp.gmail.com with ESMTPSA id p11-20020a63ab0b000000b00563590be25esm8667210pgf.29.2023.09.25.21.40.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Sep 2023 21:40:11 -0700 (PDT) From: Chen-Yu Tsai To: Mark Brown Cc: Chen-Yu Tsai , Lee Jones , Matthias Brugger , AngeloGioacchino Del Regno , Zhiyong Tao , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH RESEND v3 1/3] regulator: mt6358: Fail probe on unknown chip ID Date: Tue, 26 Sep 2023 12:34:46 +0800 Message-ID: <20230926043450.2353320-2-wenst@chromium.org> X-Mailer: git-send-email 2.42.0.515.g380fc7ccd1-goog In-Reply-To: <20230926043450.2353320-1-wenst@chromium.org> References: <20230926043450.2353320-1-wenst@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Mon, 25 Sep 2023 21:40:20 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778116599309770192 X-GMAIL-MSGID: 1778116599309770192 The MT6358 and MT6366 PMICs, and likely many others from MediaTek, have a chip ID register, making the chip semi-discoverable. The driver currently supports two PMICs and expects to be probed on one or the other. It does not account for incorrect mfd driver entries or device trees. While these should not happen, if they do, it could be catastrophic for the device. The driver should be sure the hardware is what it expects. Make the driver fail to probe if the chip ID presented is not a known one. Suggested-by: AngeloGioacchino Del Regno Fixes: f0e3c6261af1 ("regulator: mt6366: Add support for MT6366 regulator") Signed-off-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- drivers/regulator/mt6358-regulator.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/regulator/mt6358-regulator.c b/drivers/regulator/mt6358-regulator.c index 65fbd95f1dbb..4ca8fbf4b3e2 100644 --- a/drivers/regulator/mt6358-regulator.c +++ b/drivers/regulator/mt6358-regulator.c @@ -688,12 +688,18 @@ static int mt6358_regulator_probe(struct platform_device *pdev) const struct mt6358_regulator_info *mt6358_info; int i, max_regulator, ret; - if (mt6397->chip_id == MT6366_CHIP_ID) { - max_regulator = MT6366_MAX_REGULATOR; - mt6358_info = mt6366_regulators; - } else { + switch (mt6397->chip_id) { + case MT6358_CHIP_ID: max_regulator = MT6358_MAX_REGULATOR; mt6358_info = mt6358_regulators; + break; + case MT6366_CHIP_ID: + max_regulator = MT6366_MAX_REGULATOR; + mt6358_info = mt6366_regulators; + break; + default: + dev_err(&pdev->dev, "unsupported chip ID: %d\n", mt6397->chip_id); + return -EINVAL; } ret = mt6358_sync_vcn33_setting(&pdev->dev); From patchwork Tue Sep 26 04:34:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 144714 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:cae8:0:b0:403:3b70:6f57 with SMTP id r8csp1671926vqu; Mon, 25 Sep 2023 21:52:46 -0700 (PDT) X-Google-Smtp-Source: AGHT+IF+OAES9v8tw3kOpd87+eOAamRpJ5++BFasqli5KKK1YvZYhVAnLbKfSDEgSbxsjiRbSbpb X-Received: by 2002:a17:902:d4c1:b0:1c6:1a26:ef56 with SMTP id o1-20020a170902d4c100b001c61a26ef56mr3954008plg.48.1695703965926; Mon, 25 Sep 2023 21:52:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695703965; cv=none; d=google.com; s=arc-20160816; b=rSP3EPI5XuKJol/IoOqr97qkE0FvAAiUp9OATO0u7xV3DhscR9CaPquV38dJBGq1R1 wWYscaxP472JAkEsiPRtBH3FFuwVx5+Lh2NzU3LhbBwruDlmjJS/W6hidfsqZOTCuWna dhODnEj07zlXjPp63mCZYcbKXr5KoMA/l9/JwhN+46gJUtx0pawT/0A2ppCC0/6FV5Tv aptfaLfL+RZk7vMRDywjuBLeDyeZ/4uWMItl8gKCnPH96YvuGnGpzApUQOtNTHuqX5i1 zQBhq/4qd4h1fDp0NDJS/h/+uPoeCQ6AKr45jmjLEhNUq3DAxMW5gyAYht1VPftCGxkH ldTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=EQhU1RkcH7MjgUWyE/kqZPIAnN+PPGh4wt2Rdh5pkv0=; fh=lklYjgijOL6CeE7m9oCVOkBh64K0ft6FjGJcUtwfsgw=; b=rrZPDdlBDX4jDkgX0lv6PLM04cnuPSElfYl7qoXdBi9LrMhAgpNH+gWLv/FWmB/b+F I/ngrYH0K7frGzqDAHfUGCZ1B+6ZLK4NiflgTKMFLBt8XOvmuhW3GEul24fG+5SzvdNA ofDKNkiRb+ARi3veQnPrTpTweQ1cn2+nXygP3d64T8SPKm5AEBM98YDLQOiD6ih9cruu rr0tVB8ZgRW1h5NOymzVMaPCvp2aszgdHtuETeQ9m+BKV5oR344aBiPhUARyK83IxQa5 /2Q6Vh4YraDfM2IoJhr31sVHonZEd6RUjgqf5eKzV5VzvpyhDHXYUK7X0SCTX863r1KI UcVA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=K8QfU4Kh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from howler.vger.email (howler.vger.email. [2620:137:e000::3:4]) by mx.google.com with ESMTPS id m2-20020a170902c44200b001c60de17b5esi5140269plm.118.2023.09.25.21.52.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Sep 2023 21:52:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) client-ip=2620:137:e000::3:4; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=K8QfU4Kh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by howler.vger.email (Postfix) with ESMTP id 858E48348235; Mon, 25 Sep 2023 21:40:27 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at howler.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233641AbjIZEk1 (ORCPT + 27 others); Tue, 26 Sep 2023 00:40:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58928 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233637AbjIZEkV (ORCPT ); Tue, 26 Sep 2023 00:40:21 -0400 Received: from mail-oo1-xc35.google.com (mail-oo1-xc35.google.com [IPv6:2607:f8b0:4864:20::c35]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 60240B3 for ; Mon, 25 Sep 2023 21:40:15 -0700 (PDT) Received: by mail-oo1-xc35.google.com with SMTP id 006d021491bc7-57bab4e9e1aso2561376eaf.3 for ; Mon, 25 Sep 2023 21:40:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1695703214; x=1696308014; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EQhU1RkcH7MjgUWyE/kqZPIAnN+PPGh4wt2Rdh5pkv0=; b=K8QfU4KhRgNakiAdKwmfrWjPvYqSw3nu9DfoFwAgEA7GIuLeRzvPMLSr6wE1p+j1et PwIFle+QFXDL0Be9StgCe/zgKJr93LAXoibhbtNX5Oihk/Ub8udAxmED7jP2Asd2vajK CP97vvcTrcPCllrxl1FvhP2piMtM7mlZVAq+k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695703214; x=1696308014; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EQhU1RkcH7MjgUWyE/kqZPIAnN+PPGh4wt2Rdh5pkv0=; b=fEhhVyNRf5DCQR8X4z2hsO9DB72/2Kk4RsDxUyB5KNy9BIlP5OGilufJyDSvuTPD33 oyQa6w04S8XVW/mBe4bjWe52KtXGil8zPABQ4qL44LoTf+v666h6isuAEmSIsQYJpelX 3mz5qEsZAwNO7qNuHwu72K+pl/Odol5BwkL188Ss1ClD9F+dLL6VJypqf1bjq4ik0g3E Qse6007dxr5mBen96qV04QOwB5/aX5fgpeQnFuCi65fgl0/T6fkEBu5GHS/jXeq37/m4 2IXD9CTOd9UPjdukBa8+MLaP1vcLWjNGJOZ9alnf4hSTYNJzAvyQzcszLlUMxu8tvoUy axjw== X-Gm-Message-State: AOJu0YxwdykTW44fpAFTkyTz0CfjH6qqCEDjsB/bd2FoFtNkYmCMpaaG GeZDm8CSbPJBNW9Vf41n8vZ5Dg== X-Received: by 2002:a05:6870:17a7:b0:1bb:4606:5be with SMTP id r39-20020a05687017a700b001bb460605bemr11235714oae.9.1695703214656; Mon, 25 Sep 2023 21:40:14 -0700 (PDT) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:ba86:87c4:df1a:be60]) by smtp.gmail.com with ESMTPSA id p11-20020a63ab0b000000b00563590be25esm8667210pgf.29.2023.09.25.21.40.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Sep 2023 21:40:14 -0700 (PDT) From: Chen-Yu Tsai To: Mark Brown Cc: Chen-Yu Tsai , Lee Jones , Matthias Brugger , AngeloGioacchino Del Regno , Zhiyong Tao , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH RESEND v3 2/3] regulator: mt6358: Add output voltage fine tuning to fixed regulators Date: Tue, 26 Sep 2023 12:34:47 +0800 Message-ID: <20230926043450.2353320-3-wenst@chromium.org> X-Mailer: git-send-email 2.42.0.515.g380fc7ccd1-goog In-Reply-To: <20230926043450.2353320-1-wenst@chromium.org> References: <20230926043450.2353320-1-wenst@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Mon, 25 Sep 2023 21:40:27 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778074481585460303 X-GMAIL-MSGID: 1778074481585460303 The "fixed" LDO regulators found on the MT6358 and MT6366 PMICs have either no voltage selection register, or only one valid setting. However these do have a fine voltage calibration setting that can slightly boost the output voltage from 0 mV to 100 mV, in 10 mV increments. Add support for this by changing these into linear range regulators. Some register definitions that are missing are also added. Signed-off-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno Acked-by: Lee Jones --- drivers/regulator/mt6358-regulator.c | 15 +++++++++++++-- include/linux/mfd/mt6358/registers.h | 6 ++++++ 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/drivers/regulator/mt6358-regulator.c b/drivers/regulator/mt6358-regulator.c index 4ca8fbf4b3e2..f2eb0c14d1ed 100644 --- a/drivers/regulator/mt6358-regulator.c +++ b/drivers/regulator/mt6358-regulator.c @@ -123,10 +123,13 @@ struct mt6358_regulator_info { .type = REGULATOR_VOLTAGE, \ .id = MT6358_ID_##vreg, \ .owner = THIS_MODULE, \ - .n_voltages = 1, \ + .n_voltages = 11, \ + .vsel_reg = MT6358_##vreg##_ANA_CON0, \ + .vsel_mask = GENMASK(3, 0), \ .enable_reg = enreg, \ .enable_mask = BIT(enbit), \ .min_uV = volt, \ + .uV_step = 10000, \ }, \ .status_reg = MT6358_LDO_##vreg##_CON1, \ .qi = BIT(15), \ @@ -219,10 +222,13 @@ struct mt6358_regulator_info { .type = REGULATOR_VOLTAGE, \ .id = MT6366_ID_##vreg, \ .owner = THIS_MODULE, \ - .n_voltages = 1, \ + .n_voltages = 11, \ + .vsel_reg = MT6358_##vreg##_ANA_CON0, \ + .vsel_mask = GENMASK(3, 0), \ .enable_reg = enreg, \ .enable_mask = BIT(enbit), \ .min_uV = volt, \ + .uV_step = 10000, \ }, \ .status_reg = MT6358_LDO_##vreg##_CON1, \ .qi = BIT(15), \ @@ -488,8 +494,13 @@ static const struct regulator_ops mt6358_volt_table_ops = { .get_status = mt6358_get_status, }; +/* "Fixed" LDOs with output voltage calibration +0 ~ +10 mV */ static const struct regulator_ops mt6358_volt_fixed_ops = { .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = mt6358_get_buck_voltage_sel, + .set_voltage_time_sel = regulator_set_voltage_time_sel, .enable = regulator_enable_regmap, .disable = regulator_disable_regmap, .is_enabled = regulator_is_enabled_regmap, diff --git a/include/linux/mfd/mt6358/registers.h b/include/linux/mfd/mt6358/registers.h index 3d33517f178c..5ea2590be710 100644 --- a/include/linux/mfd/mt6358/registers.h +++ b/include/linux/mfd/mt6358/registers.h @@ -262,6 +262,12 @@ #define MT6358_LDO_VBIF28_CON3 0x1db0 #define MT6358_VCAMA1_ANA_CON0 0x1e08 #define MT6358_VCAMA2_ANA_CON0 0x1e0c +#define MT6358_VFE28_ANA_CON0 0x1e10 +#define MT6358_VCN28_ANA_CON0 0x1e14 +#define MT6358_VBIF28_ANA_CON0 0x1e18 +#define MT6358_VAUD28_ANA_CON0 0x1e1c +#define MT6358_VAUX18_ANA_CON0 0x1e20 +#define MT6358_VXO22_ANA_CON0 0x1e24 #define MT6358_VCN33_ANA_CON0 0x1e28 #define MT6358_VSIM1_ANA_CON0 0x1e2c #define MT6358_VSIM2_ANA_CON0 0x1e30 From patchwork Tue Sep 26 04:34:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 144713 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:cae8:0:b0:403:3b70:6f57 with SMTP id r8csp1671112vqu; Mon, 25 Sep 2023 21:49:39 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGcZ3WqpzBlIL2787XAB5yDXp67/R+rk3Zf2YOHYSMu5x2IjzUCFy0qnHAVsT3pEA862zkz X-Received: by 2002:a17:902:f7d1:b0:1bb:8931:ee94 with SMTP id h17-20020a170902f7d100b001bb8931ee94mr5034042plw.67.1695703779133; Mon, 25 Sep 2023 21:49:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695703779; cv=none; d=google.com; s=arc-20160816; b=vnZY885gmZMCjEn7OwNPlRLzGxLv0lFmynLnui42zcD6t53YzyFRQrFthoyQvYMst7 JNZXlablx7hB4mhQsndv/jQk7o1cfWPoMftcneWWWY7jPJOstep3L8xNtU19NxYCJX6Z TiYkRSvg8eY06RVm2Vo8bT+n6Iev7oa/EhvLqFdyO5RxyfIigYIAmhsSF3Vguvr4uZCg iAXSJLmd2WW5ysBb+yafjFKY0BknrV/x0hVh0MZTZscgYl+o+/0/e8fAPV9Ggu1HzZI3 mndSfXn7fwrAGmv5ahb3W8NiLs7I7ZbVYjFBiYPtXotlqaaZerKZxgu/emr5rCHGxvgL knqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=KsTEiGLEIoP2dw7+MHGjmKSR5eD5gS3NgglU4Z920oU=; fh=lklYjgijOL6CeE7m9oCVOkBh64K0ft6FjGJcUtwfsgw=; b=Z7BHUHijZ9WZ4SHWpae4jK9aOybqsE9G/i3UgeAkjvM+j+J034x10hPWXUVsNzPyUf 1RqaYae0KMT+KAE/kdHagzGj13aH6supXQcQN1Llx0vVLgHMbQRwftJIG5lc6pepxc3o NsvfkXt3T8O9QZtM7iavSCzbfKUEj706MxjJceLqI/j3v7kfMBtPPxhAVGa+dBMOUfSk 4/wRTx20OySfICrPpHgIm6jBcpJK8B+FnagUCohsCrviAhU/S7keBUbxgOdyRnFkVWkr 8ftwK5G+KnF6lJCPttpscWONg8KiTFmlP8ppFloCQk4SQlg9wPAdtPic1pJrHzDjyRh8 /1LQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=hJh5odHS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from snail.vger.email (snail.vger.email. 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While it works, it requires more code and an extra field to store the lookup table. These LDOs also have fine voltage calibration settings that can slightly boost the output voltage from 0 mV to 100 mV, in 10 mV increments. These combined could be modeled as a pickable set of linear ranges. The coarse voltage setting is modeled as the range selector, while each range has 11 selectors, starting from the range's base voltage, up to +100 mV, in 10mV increments. Signed-off-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- drivers/regulator/mt6358-regulator.c | 275 +++++++++++---------------- 1 file changed, 115 insertions(+), 160 deletions(-) diff --git a/drivers/regulator/mt6358-regulator.c b/drivers/regulator/mt6358-regulator.c index f2eb0c14d1ed..c4ecac5f3fc8 100644 --- a/drivers/regulator/mt6358-regulator.c +++ b/drivers/regulator/mt6358-regulator.c @@ -26,8 +26,6 @@ struct mt6358_regulator_info { struct regulator_desc desc; u32 status_reg; u32 qi; - const u32 *index_table; - unsigned int n_table; u32 da_vsel_reg; u32 da_vsel_mask; u32 modeset_reg; @@ -64,9 +62,7 @@ struct mt6358_regulator_info { .modeset_mask = BIT(_modeset_shift), \ } -#define MT6358_LDO(match, vreg, ldo_volt_table, \ - ldo_index_table, enreg, enbit, vosel, \ - vosel_mask) \ +#define MT6358_LDO(match, vreg, volt_ranges, enreg, enbit, vosel, vosel_mask) \ [MT6358_ID_##vreg] = { \ .desc = { \ .name = #vreg, \ @@ -75,17 +71,19 @@ struct mt6358_regulator_info { .type = REGULATOR_VOLTAGE, \ .id = MT6358_ID_##vreg, \ .owner = THIS_MODULE, \ - .n_voltages = ARRAY_SIZE(ldo_volt_table), \ - .volt_table = ldo_volt_table, \ - .vsel_reg = vosel, \ - .vsel_mask = vosel_mask, \ + .n_voltages = ARRAY_SIZE(volt_ranges##_ranges) * 11, \ + .linear_ranges = volt_ranges##_ranges, \ + .linear_range_selectors_bitfield = volt_ranges##_selectors, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges##_ranges), \ + .vsel_range_reg = vosel, \ + .vsel_range_mask = vosel_mask, \ + .vsel_reg = MT6358_##vreg##_ANA_CON0, \ + .vsel_mask = GENMASK(3, 0), \ .enable_reg = enreg, \ .enable_mask = BIT(enbit), \ }, \ .status_reg = MT6358_LDO_##vreg##_CON1, \ .qi = BIT(15), \ - .index_table = ldo_index_table, \ - .n_table = ARRAY_SIZE(ldo_index_table), \ } #define MT6358_LDO1(match, vreg, min, max, step, \ @@ -163,9 +161,7 @@ struct mt6358_regulator_info { .modeset_mask = BIT(_modeset_shift), \ } -#define MT6366_LDO(match, vreg, ldo_volt_table, \ - ldo_index_table, enreg, enbit, vosel, \ - vosel_mask) \ +#define MT6366_LDO(match, vreg, volt_ranges, enreg, enbit, vosel, vosel_mask) \ [MT6366_ID_##vreg] = { \ .desc = { \ .name = #vreg, \ @@ -174,17 +170,19 @@ struct mt6358_regulator_info { .type = REGULATOR_VOLTAGE, \ .id = MT6366_ID_##vreg, \ .owner = THIS_MODULE, \ - .n_voltages = ARRAY_SIZE(ldo_volt_table), \ - .volt_table = ldo_volt_table, \ - .vsel_reg = vosel, \ - .vsel_mask = vosel_mask, \ + .n_voltages = ARRAY_SIZE(volt_ranges##_ranges) * 11, \ + .linear_ranges = volt_ranges##_ranges, \ + .linear_range_selectors_bitfield = volt_ranges##_selectors, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges##_ranges), \ + .vsel_range_reg = vosel, \ + .vsel_range_mask = vosel_mask, \ + .vsel_reg = MT6358_##vreg##_ANA_CON0, \ + .vsel_mask = GENMASK(3, 0), \ .enable_reg = enreg, \ .enable_mask = BIT(enbit), \ }, \ .status_reg = MT6358_LDO_##vreg##_CON1, \ .qi = BIT(15), \ - .index_table = ldo_index_table, \ - .n_table = ARRAY_SIZE(ldo_index_table), \ } #define MT6366_LDO1(match, vreg, min, max, step, \ @@ -235,95 +233,95 @@ struct mt6358_regulator_info { } -static const unsigned int vdram2_voltages[] = { - 600000, 1800000, -}; - -static const unsigned int vsim_voltages[] = { - 1700000, 1800000, 2700000, 3000000, 3100000, -}; - -static const unsigned int vibr_voltages[] = { - 1200000, 1300000, 1500000, 1800000, - 2000000, 2800000, 3000000, 3300000, +/* VDRAM2 voltage selector not shown in datasheet */ +static const unsigned int vdram2_selectors[] = { 0, 12 }; +static const struct linear_range vdram2_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), }; -static const unsigned int vusb_voltages[] = { - 3000000, 3100000, +static const unsigned int vsim_selectors[] = { 3, 4, 8, 11, 12 }; +static const struct linear_range vsim_ranges[] = { + REGULATOR_LINEAR_RANGE(1700000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2700000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3100000, 0, 10, 10000), }; -static const unsigned int vcamd_voltages[] = { - 900000, 1000000, 1100000, 1200000, - 1300000, 1500000, 1800000, +static const unsigned int vibr_selectors[] = { 0, 1, 2, 4, 5, 9, 11, 13 }; +static const struct linear_range vibr_ranges[] = { + REGULATOR_LINEAR_RANGE(1200000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1300000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1500000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3300000, 0, 10, 10000), }; -static const unsigned int vefuse_voltages[] = { - 1700000, 1800000, 1900000, +/* VUSB voltage selector not shown in datasheet */ +static const unsigned int vusb_selectors[] = { 3, 4 }; +static const struct linear_range vusb_ranges[] = { + REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3100000, 0, 10, 10000), }; -static const unsigned int vmch_vemc_voltages[] = { - 2900000, 3000000, 3300000, +static const unsigned int vcamd_selectors[] = { 3, 4, 5, 6, 7, 9, 12 }; +static const struct linear_range vcamd_ranges[] = { + REGULATOR_LINEAR_RANGE(900000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1100000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1200000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1300000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1500000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), }; -static const unsigned int vcama_voltages[] = { - 1800000, 2500000, 2700000, - 2800000, 2900000, 3000000, +static const unsigned int vefuse_selectors[] = { 11, 12, 13 }; +static const struct linear_range vefuse_ranges[] = { + REGULATOR_LINEAR_RANGE(1700000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(1900000, 0, 10, 10000), }; -static const unsigned int vcn33_voltages[] = { - 3300000, 3400000, 3500000, +static const unsigned int vmch_vemc_selectors[] = { 2, 3, 5 }; +static const struct linear_range vmch_vemc_ranges[] = { + REGULATOR_LINEAR_RANGE(2900000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3300000, 0, 10, 10000), }; -static const unsigned int vmc_voltages[] = { - 1800000, 2900000, 3000000, 3300000, +static const unsigned int vcama_selectors[] = { 0, 7, 9, 10, 11, 12 }; +static const struct linear_range vcama_ranges[] = { + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2500000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2700000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2900000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), }; -static const unsigned int vldo28_voltages[] = { - 2800000, 3000000, +static const unsigned int vcn33_selectors[] = { 1, 2, 3 }; +static const struct linear_range vcn33_ranges[] = { + REGULATOR_LINEAR_RANGE(3300000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3400000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3500000, 0, 10, 10000), }; -static const u32 vdram2_idx[] = { - 0, 12, +static const unsigned int vmc_selectors[] = { 4, 10, 11, 13 }; +static const struct linear_range vmc_ranges[] = { + REGULATOR_LINEAR_RANGE(1800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(2900000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3300000, 0, 10, 10000), }; -static const u32 vsim_idx[] = { - 3, 4, 8, 11, 12, -}; - -static const u32 vibr_idx[] = { - 0, 1, 2, 4, 5, 9, 11, 13, -}; - -static const u32 vusb_idx[] = { - 3, 4, -}; - -static const u32 vcamd_idx[] = { - 3, 4, 5, 6, 7, 9, 12, -}; - -static const u32 vefuse_idx[] = { - 11, 12, 13, -}; - -static const u32 vmch_vemc_idx[] = { - 2, 3, 5, -}; - -static const u32 vcama_idx[] = { - 0, 7, 9, 10, 11, 12, -}; - -static const u32 vcn33_idx[] = { - 1, 2, 3, -}; - -static const u32 vmc_idx[] = { - 4, 10, 11, 13, -}; - -static const u32 vldo28_idx[] = { - 1, 3, +static const unsigned int vldo28_selectors[] = { 1, 3 }; +static const struct linear_range vldo28_ranges[] = { + REGULATOR_LINEAR_RANGE(2800000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(3000000, 0, 10, 10000), }; static unsigned int mt6358_map_mode(unsigned int mode) @@ -332,49 +330,6 @@ static unsigned int mt6358_map_mode(unsigned int mode) REGULATOR_MODE_NORMAL : REGULATOR_MODE_FAST; } -static int mt6358_set_voltage_sel(struct regulator_dev *rdev, - unsigned int selector) -{ - const struct mt6358_regulator_info *info = to_regulator_info(rdev->desc); - int idx, ret; - const u32 *pvol; - - pvol = info->index_table; - - idx = pvol[selector]; - idx <<= ffs(info->desc.vsel_mask) - 1; - ret = regmap_update_bits(rdev->regmap, info->desc.vsel_reg, - info->desc.vsel_mask, idx); - - return ret; -} - -static int mt6358_get_voltage_sel(struct regulator_dev *rdev) -{ - const struct mt6358_regulator_info *info = to_regulator_info(rdev->desc); - int idx, ret; - u32 selector; - const u32 *pvol; - - ret = regmap_read(rdev->regmap, info->desc.vsel_reg, &selector); - if (ret != 0) { - dev_info(&rdev->dev, - "Failed to get mt6358 %s vsel reg: %d\n", - info->desc.name, ret); - return ret; - } - - selector = (selector & info->desc.vsel_mask) >> - (ffs(info->desc.vsel_mask) - 1); - pvol = info->index_table; - for (idx = 0; idx < info->desc.n_voltages; idx++) { - if (pvol[idx] == selector) - return idx; - } - - return -EINVAL; -} - static int mt6358_get_buck_voltage_sel(struct regulator_dev *rdev) { const struct mt6358_regulator_info *info = to_regulator_info(rdev->desc); @@ -483,10 +438,10 @@ static const struct regulator_ops mt6358_volt_range_ops = { }; static const struct regulator_ops mt6358_volt_table_ops = { - .list_voltage = regulator_list_voltage_table, - .map_voltage = regulator_map_voltage_iterate, - .set_voltage_sel = mt6358_set_voltage_sel, - .get_voltage_sel = mt6358_get_voltage_sel, + .list_voltage = regulator_list_voltage_pickable_linear_range, + .map_voltage = regulator_map_voltage_pickable_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_pickable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_pickable_regmap, .set_voltage_time_sel = regulator_set_voltage_time_sel, .enable = regulator_enable_regmap, .disable = regulator_disable_regmap, @@ -546,34 +501,34 @@ static const struct mt6358_regulator_info mt6358_regulators[] = { MT6358_REG_FIXED("ldo_vrf18", VRF18, MT6358_LDO_VRF18_CON0, 0, 1800000), MT6358_REG_FIXED("ldo_vaud28", VAUD28, MT6358_LDO_VAUD28_CON0, 0, 2800000), - MT6358_LDO("ldo_vdram2", VDRAM2, vdram2_voltages, vdram2_idx, + MT6358_LDO("ldo_vdram2", VDRAM2, vdram2, MT6358_LDO_VDRAM2_CON0, 0, MT6358_LDO_VDRAM2_ELR0, 0xf), - MT6358_LDO("ldo_vsim1", VSIM1, vsim_voltages, vsim_idx, + MT6358_LDO("ldo_vsim1", VSIM1, vsim, MT6358_LDO_VSIM1_CON0, 0, MT6358_VSIM1_ANA_CON0, 0xf00), - MT6358_LDO("ldo_vibr", VIBR, vibr_voltages, vibr_idx, + MT6358_LDO("ldo_vibr", VIBR, vibr, MT6358_LDO_VIBR_CON0, 0, MT6358_VIBR_ANA_CON0, 0xf00), - MT6358_LDO("ldo_vusb", VUSB, vusb_voltages, vusb_idx, + MT6358_LDO("ldo_vusb", VUSB, vusb, MT6358_LDO_VUSB_CON0_0, 0, MT6358_VUSB_ANA_CON0, 0x700), - MT6358_LDO("ldo_vcamd", VCAMD, vcamd_voltages, vcamd_idx, + MT6358_LDO("ldo_vcamd", VCAMD, vcamd, MT6358_LDO_VCAMD_CON0, 0, MT6358_VCAMD_ANA_CON0, 0xf00), - MT6358_LDO("ldo_vefuse", VEFUSE, vefuse_voltages, vefuse_idx, + MT6358_LDO("ldo_vefuse", VEFUSE, vefuse, MT6358_LDO_VEFUSE_CON0, 0, MT6358_VEFUSE_ANA_CON0, 0xf00), - MT6358_LDO("ldo_vmch", VMCH, vmch_vemc_voltages, vmch_vemc_idx, + MT6358_LDO("ldo_vmch", VMCH, vmch_vemc, MT6358_LDO_VMCH_CON0, 0, MT6358_VMCH_ANA_CON0, 0x700), - MT6358_LDO("ldo_vcama1", VCAMA1, vcama_voltages, vcama_idx, + MT6358_LDO("ldo_vcama1", VCAMA1, vcama, MT6358_LDO_VCAMA1_CON0, 0, MT6358_VCAMA1_ANA_CON0, 0xf00), - MT6358_LDO("ldo_vemc", VEMC, vmch_vemc_voltages, vmch_vemc_idx, + MT6358_LDO("ldo_vemc", VEMC, vmch_vemc, MT6358_LDO_VEMC_CON0, 0, MT6358_VEMC_ANA_CON0, 0x700), - MT6358_LDO("ldo_vcn33", VCN33, vcn33_voltages, vcn33_idx, + MT6358_LDO("ldo_vcn33", VCN33, vcn33, MT6358_LDO_VCN33_CON0_0, 0, MT6358_VCN33_ANA_CON0, 0x300), - MT6358_LDO("ldo_vcama2", VCAMA2, vcama_voltages, vcama_idx, + MT6358_LDO("ldo_vcama2", VCAMA2, vcama, MT6358_LDO_VCAMA2_CON0, 0, MT6358_VCAMA2_ANA_CON0, 0xf00), - MT6358_LDO("ldo_vmc", VMC, vmc_voltages, vmc_idx, + MT6358_LDO("ldo_vmc", VMC, vmc, MT6358_LDO_VMC_CON0, 0, MT6358_VMC_ANA_CON0, 0xf00), - MT6358_LDO("ldo_vldo28", VLDO28, vldo28_voltages, vldo28_idx, + MT6358_LDO("ldo_vldo28", VLDO28, vldo28, MT6358_LDO_VLDO28_CON0_0, 0, MT6358_VLDO28_ANA_CON0, 0x300), - MT6358_LDO("ldo_vsim2", VSIM2, vsim_voltages, vsim_idx, + MT6358_LDO("ldo_vsim2", VSIM2, vsim, MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00), MT6358_LDO1("ldo_vsram_proc11", VSRAM_PROC11, 500000, 1293750, 6250, MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON0, 0x7f), @@ -622,25 +577,25 @@ static const struct mt6358_regulator_info mt6366_regulators[] = { MT6366_REG_FIXED("ldo_vrf18", VRF18, MT6358_LDO_VRF18_CON0, 0, 1800000), MT6366_REG_FIXED("ldo_vaud28", VAUD28, MT6358_LDO_VAUD28_CON0, 0, 2800000), - MT6366_LDO("ldo_vdram2", VDRAM2, vdram2_voltages, vdram2_idx, + MT6366_LDO("ldo_vdram2", VDRAM2, vdram2, MT6358_LDO_VDRAM2_CON0, 0, MT6358_LDO_VDRAM2_ELR0, 0x10), - MT6366_LDO("ldo_vsim1", VSIM1, vsim_voltages, vsim_idx, + MT6366_LDO("ldo_vsim1", VSIM1, vsim, MT6358_LDO_VSIM1_CON0, 0, MT6358_VSIM1_ANA_CON0, 0xf00), - MT6366_LDO("ldo_vibr", VIBR, vibr_voltages, vibr_idx, + MT6366_LDO("ldo_vibr", VIBR, vibr, MT6358_LDO_VIBR_CON0, 0, MT6358_VIBR_ANA_CON0, 0xf00), - MT6366_LDO("ldo_vusb", VUSB, vusb_voltages, vusb_idx, + MT6366_LDO("ldo_vusb", VUSB, vusb, MT6358_LDO_VUSB_CON0_0, 0, MT6358_VUSB_ANA_CON0, 0x700), - MT6366_LDO("ldo_vefuse", VEFUSE, vefuse_voltages, vefuse_idx, + MT6366_LDO("ldo_vefuse", VEFUSE, vefuse, MT6358_LDO_VEFUSE_CON0, 0, MT6358_VEFUSE_ANA_CON0, 0xf00), - MT6366_LDO("ldo_vmch", VMCH, vmch_vemc_voltages, vmch_vemc_idx, + MT6366_LDO("ldo_vmch", VMCH, vmch_vemc, MT6358_LDO_VMCH_CON0, 0, MT6358_VMCH_ANA_CON0, 0x700), - MT6366_LDO("ldo_vemc", VEMC, vmch_vemc_voltages, vmch_vemc_idx, + MT6366_LDO("ldo_vemc", VEMC, vmch_vemc, MT6358_LDO_VEMC_CON0, 0, MT6358_VEMC_ANA_CON0, 0x700), - MT6366_LDO("ldo_vcn33", VCN33, vcn33_voltages, vcn33_idx, + MT6366_LDO("ldo_vcn33", VCN33, vcn33, MT6358_LDO_VCN33_CON0_0, 0, MT6358_VCN33_ANA_CON0, 0x300), - MT6366_LDO("ldo_vmc", VMC, vmc_voltages, vmc_idx, + MT6366_LDO("ldo_vmc", VMC, vmc, MT6358_LDO_VMC_CON0, 0, MT6358_VMC_ANA_CON0, 0xf00), - MT6366_LDO("ldo_vsim2", VSIM2, vsim_voltages, vsim_idx, + MT6366_LDO("ldo_vsim2", VSIM2, vsim, MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00), MT6366_LDO1("ldo_vsram_proc11", VSRAM_PROC11, 500000, 1293750, 6250, MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON0, 0x7f),