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Fri, 22 Sep 2023 08:38:27 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 38M8cQFv005348 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 22 Sep 2023 08:38:26 GMT Received: from fenglinw2-gv.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Fri, 22 Sep 2023 01:38:21 -0700 From: Fenglin Wu To: , , , , , , , Konrad Dybcio , Dmitry Torokhov , CC: , , , , Subject: [RESEND PATCH v6 1/3] input: pm8xxx-vib: refactor to easily support new SPMI vibrator Date: Fri, 22 Sep 2023 16:37:59 +0800 Message-ID: <20230922083801.3056724-2-quic_fenglinw@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230922083801.3056724-1-quic_fenglinw@quicinc.com> References: <20230922083801.3056724-1-quic_fenglinw@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: VoRhcX1QJRMcMV2j9H2E6mZv1QO_HxuZ X-Proofpoint-GUID: VoRhcX1QJRMcMV2j9H2E6mZv1QO_HxuZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-09-22_06,2023-09-21_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 spamscore=0 phishscore=0 impostorscore=0 malwarescore=0 adultscore=0 bulkscore=0 clxscore=1011 suspectscore=0 lowpriorityscore=0 priorityscore=1501 mlxlogscore=983 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2309220071 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Fri, 22 Sep 2023 01:38:42 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1777747033797498094 X-GMAIL-MSGID: 1777747033797498094 Currently, all vibrator control register addresses are hard coded, including the base address and the offset, it's not flexible to support new SPMI vibrator module which is usually included in different PMICs with different base address. Refactor this by defining register offset with HW type combination, and register base address which is defined in 'reg' property is added for SPMI vibrators. Signed-off-by: Fenglin Wu --- drivers/input/misc/pm8xxx-vibrator.c | 122 ++++++++++++++++----------- 1 file changed, 73 insertions(+), 49 deletions(-) diff --git a/drivers/input/misc/pm8xxx-vibrator.c b/drivers/input/misc/pm8xxx-vibrator.c index 04cb87efd799..d6b468324c77 100644 --- a/drivers/input/misc/pm8xxx-vibrator.c +++ b/drivers/input/misc/pm8xxx-vibrator.c @@ -12,36 +12,44 @@ #include #include +#define SSBL_VIB_DRV_REG 0x4A +#define SSBI_VIB_DRV_EN_MANUAL_MASK GENMASK(7, 2) +#define SSBI_VIB_DRV_LEVEL_MASK GENMASK(7, 3) +#define SSBI_VIB_DRV_SHIFT 3 + +#define SPMI_VIB_DRV_REG 0x41 +#define SPMI_VIB_DRV_LEVEL_MASK GENMASK(4, 0) +#define SPMI_VIB_DRV_SHIFT 0 + +#define SPMI_VIB_EN_REG 0x46 +#define SPMI_VIB_EN_BIT BIT(7) + #define VIB_MAX_LEVEL_mV (3100) #define VIB_MIN_LEVEL_mV (1200) #define VIB_MAX_LEVELS (VIB_MAX_LEVEL_mV - VIB_MIN_LEVEL_mV) #define MAX_FF_SPEED 0xff -struct pm8xxx_regs { - unsigned int enable_addr; - unsigned int enable_mask; +enum vib_hw_type { + SSBI_VIB, + SPMI_VIB, +}; - unsigned int drv_addr; - unsigned int drv_mask; - unsigned int drv_shift; - unsigned int drv_en_manual_mask; +struct pm8xxx_vib_data { + enum vib_hw_type hw_type; + unsigned int enable_addr; + unsigned int drv_addr; }; -static const struct pm8xxx_regs pm8058_regs = { - .drv_addr = 0x4A, - .drv_mask = 0xf8, - .drv_shift = 3, - .drv_en_manual_mask = 0xfc, +static const struct pm8xxx_vib_data ssbi_vib_data = { + .hw_type = SSBI_VIB, + .drv_addr = SSBL_VIB_DRV_REG, }; -static struct pm8xxx_regs pm8916_regs = { - .enable_addr = 0xc046, - .enable_mask = BIT(7), - .drv_addr = 0xc041, - .drv_mask = 0x1F, - .drv_shift = 0, - .drv_en_manual_mask = 0, +static const struct pm8xxx_vib_data spmi_vib_data = { + .hw_type = SPMI_VIB, + .enable_addr = SPMI_VIB_EN_REG, + .drv_addr = SPMI_VIB_DRV_REG, }; /** @@ -49,7 +57,8 @@ static struct pm8xxx_regs pm8916_regs = { * @vib_input_dev: input device supporting force feedback * @work: work structure to set the vibration parameters * @regmap: regmap for register read/write - * @regs: registers' info + * @data: vibrator HW info + * @reg_base: the register base of the module * @speed: speed of vibration set from userland * @active: state of vibrator * @level: level of vibration to set in the chip @@ -59,7 +68,8 @@ struct pm8xxx_vib { struct input_dev *vib_input_dev; struct work_struct work; struct regmap *regmap; - const struct pm8xxx_regs *regs; + const struct pm8xxx_vib_data *data; + unsigned int reg_base; int speed; int level; bool active; @@ -75,24 +85,31 @@ static int pm8xxx_vib_set(struct pm8xxx_vib *vib, bool on) { int rc; unsigned int val = vib->reg_vib_drv; - const struct pm8xxx_regs *regs = vib->regs; + u32 mask = SPMI_VIB_DRV_LEVEL_MASK; + u32 shift = SPMI_VIB_DRV_SHIFT; + + if (vib->data->hw_type == SSBI_VIB) { + mask = SSBI_VIB_DRV_LEVEL_MASK; + shift = SSBI_VIB_DRV_SHIFT; + } if (on) - val |= (vib->level << regs->drv_shift) & regs->drv_mask; + val |= (vib->level << shift) & mask; else - val &= ~regs->drv_mask; + val &= ~mask; - rc = regmap_write(vib->regmap, regs->drv_addr, val); + rc = regmap_update_bits(vib->regmap, vib->reg_base + vib->data->drv_addr, mask, val); if (rc < 0) return rc; vib->reg_vib_drv = val; - if (regs->enable_mask) - rc = regmap_update_bits(vib->regmap, regs->enable_addr, - regs->enable_mask, on ? ~0 : 0); + if (vib->data->hw_type == SSBI_VIB) + return 0; - return rc; + mask = SPMI_VIB_EN_BIT; + val = on ? SPMI_VIB_EN_BIT : 0; + return regmap_update_bits(vib->regmap, vib->reg_base + vib->data->enable_addr, mask, val); } /** @@ -102,13 +119,6 @@ static int pm8xxx_vib_set(struct pm8xxx_vib *vib, bool on) static void pm8xxx_work_handler(struct work_struct *work) { struct pm8xxx_vib *vib = container_of(work, struct pm8xxx_vib, work); - const struct pm8xxx_regs *regs = vib->regs; - int rc; - unsigned int val; - - rc = regmap_read(vib->regmap, regs->drv_addr, &val); - if (rc < 0) - return; /* * pmic vibrator supports voltage ranges from 1.2 to 3.1V, so @@ -168,9 +178,9 @@ static int pm8xxx_vib_probe(struct platform_device *pdev) { struct pm8xxx_vib *vib; struct input_dev *input_dev; + const struct pm8xxx_vib_data *data; int error; - unsigned int val; - const struct pm8xxx_regs *regs; + unsigned int val, reg_base; vib = devm_kzalloc(&pdev->dev, sizeof(*vib), GFP_KERNEL); if (!vib) @@ -187,19 +197,33 @@ static int pm8xxx_vib_probe(struct platform_device *pdev) INIT_WORK(&vib->work, pm8xxx_work_handler); vib->vib_input_dev = input_dev; - regs = of_device_get_match_data(&pdev->dev); + data = of_device_get_match_data(&pdev->dev); + if (!data) + return -EINVAL; - /* operate in manual mode */ - error = regmap_read(vib->regmap, regs->drv_addr, &val); - if (error < 0) - return error; + if (data->hw_type != SSBI_VIB) { + error = fwnode_property_read_u32(pdev->dev.fwnode, "reg", ®_base); + if (error < 0) { + dev_err(&pdev->dev, "Failed to read reg address, rc=%d\n", error); + return error; + } + + vib->reg_base += reg_base; + } - val &= regs->drv_en_manual_mask; - error = regmap_write(vib->regmap, regs->drv_addr, val); + error = regmap_read(vib->regmap, vib->reg_base + data->drv_addr, &val); if (error < 0) return error; - vib->regs = regs; + /* operate in manual mode */ + if (data->hw_type == SSBI_VIB) { + val &= SSBI_VIB_DRV_EN_MANUAL_MASK; + error = regmap_write(vib->regmap, vib->reg_base + data->drv_addr, val); + if (error < 0) + return error; + } + + vib->data = data; vib->reg_vib_drv = val; input_dev->name = "pm8xxx_vib_ffmemless"; @@ -239,9 +263,9 @@ static int pm8xxx_vib_suspend(struct device *dev) static DEFINE_SIMPLE_DEV_PM_OPS(pm8xxx_vib_pm_ops, pm8xxx_vib_suspend, NULL); static const struct of_device_id pm8xxx_vib_id_table[] = { - { .compatible = "qcom,pm8058-vib", .data = &pm8058_regs }, - { .compatible = "qcom,pm8921-vib", .data = &pm8058_regs }, - { .compatible = "qcom,pm8916-vib", .data = &pm8916_regs }, + { .compatible = "qcom,pm8058-vib", .data = &ssbi_vib_data }, + { .compatible = "qcom,pm8921-vib", .data = &ssbi_vib_data }, + { .compatible = "qcom,pm8916-vib", .data = &spmi_vib_data }, { } }; MODULE_DEVICE_TABLE(of, pm8xxx_vib_id_table); From patchwork Fri Sep 22 08:38:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenglin Wu X-Patchwork-Id: 143325 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:172:b0:3f2:4152:657d with SMTP id h50csp5452826vqi; Fri, 22 Sep 2023 03:13:43 -0700 (PDT) X-Google-Smtp-Source: AGHT+IErXP95Go0/mk6yFI/YFSDIRpBUVltRjj5BxaZjjR2dfwGe5F+vw87UdzZFZQRg8k3EkqRc X-Received: by 2002:a05:6358:27aa:b0:134:ea45:53d7 with SMTP id l42-20020a05635827aa00b00134ea4553d7mr8992862rwb.26.1695377623422; Fri, 22 Sep 2023 03:13:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695377623; cv=none; d=google.com; s=arc-20160816; b=wa9+AlfK2An8XZwkHLuzSpt75N3KnZV3VVDDY/AX8s1U5XLsq0PmOwldzdZhmH05Fh kn0gNcbFOzIvw3Mr3FZZvS2yRvq/Fw5F9F47kjTCxv6GIcwK0Fklq/6D/qAphs4cneoK N6UrAa6VqAeDIi+D3Hazzr/OzI+vrIdPlJslKhCt2P6/als4R7S+sKW5u+Vojym5ma6j 1tkUPnEZ0OOVJ0ljgSpM7XYhHlQaptDzdLOxZQrYQTD1Vvw246xC8Hs3hzxSLmLcPeRL XJzPtOt2S+Ya4sSkw6tUoMqw54cBod/7trL2JkGFtfUJu3UhU8ZxfjObB5k7gvOFp/UT 5ekw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=s9Kovk+BnjK/I6wqtsgOJff8ovcXOsNxGByUdzFMebU=; fh=2J4j8gYYwITiD5eCqgaakSze+Oio7XttlpITfnv0IZA=; b=N3mDtvBmKjsVZcTU4my3Bjcl0BXBmA+7LnAxHN6gzSa5EmHwbW12S1O2yH5UP23l+9 3YUgxnA0ydTlJWkqQ++Fw7gxLmSQpApEVEU8Oiqayv/bmGA30K4i5zZK/3c/lsYcO959 vLdO3NRRJpfZ7Q/dE+mm1rg9DJB6IJ10DG2HKIbTyUOO5dHlv6zq07fJaGTgxvt3zCi+ EEgX7uQmE2KaWKeFEI3/kyjgRND0HvxGhxPHUj3rXTe20RI2gv7eRZ4ozusw8sX0Zw3U 0NUnWXd4JC3pD4+JEh5joNYrgEWZg7e3y2IJAsKcYXlkwDgHbRX++8lY6+n+k3XEFap9 MkSQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=NUa0PUwd; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from howler.vger.email (howler.vger.email. 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Fri, 22 Sep 2023 08:38:31 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 38M8cUEB020199 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 22 Sep 2023 08:38:30 GMT Received: from fenglinw2-gv.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Fri, 22 Sep 2023 01:38:26 -0700 From: Fenglin Wu To: , , , , , , , Konrad Dybcio , Dmitry Torokhov , , CC: , , , , , Krzysztof Kozlowski Subject: [RESEND PATCH v6 2/3] dt-bindings: input: qcom,pm8xxx-vib: add new SPMI vibrator module Date: Fri, 22 Sep 2023 16:38:00 +0800 Message-ID: <20230922083801.3056724-3-quic_fenglinw@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230922083801.3056724-1-quic_fenglinw@quicinc.com> References: <20230922083801.3056724-1-quic_fenglinw@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: kc250rdtyQ_Zc-v0uQmVZX1o3vZCnVOp X-Proofpoint-ORIG-GUID: kc250rdtyQ_Zc-v0uQmVZX1o3vZCnVOp X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-09-22_07,2023-09-21_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 mlxlogscore=999 priorityscore=1501 lowpriorityscore=0 spamscore=0 suspectscore=0 clxscore=1011 malwarescore=0 mlxscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2309220071 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Fri, 22 Sep 2023 01:38:45 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1777732286715481438 X-GMAIL-MSGID: 1777732286715481438 Add compatible strings to support vibrator module inside PMI632, PMI7250B, PM7325B, PM7550BA. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Fenglin Wu --- .../bindings/input/qcom,pm8xxx-vib.yaml | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml b/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml index c8832cd0d7da..2025d6a5423e 100644 --- a/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml +++ b/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml @@ -11,10 +11,18 @@ maintainers: properties: compatible: - enum: - - qcom,pm8058-vib - - qcom,pm8916-vib - - qcom,pm8921-vib + oneOf: + - enum: + - qcom,pm8058-vib + - qcom,pm8916-vib + - qcom,pm8921-vib + - qcom,pmi632-vib + - items: + - enum: + - qcom,pm7250b-vib + - qcom,pm7325b-vib + - qcom,pm7550ba-vib + - const: qcom,pmi632-vib reg: maxItems: 1 From patchwork Fri Sep 22 08:38:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenglin Wu X-Patchwork-Id: 143459 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:172:b0:3f2:4152:657d with SMTP id h50csp5605743vqi; Fri, 22 Sep 2023 07:10:10 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHLqBhqAEwgKE/Ao9TZKLblZ36w0Sl2PR9UJVOkd/Kr+rNcNUYjpl21b8/TX4RbJHikg+i3 X-Received: by 2002:a17:90b:4b86:b0:273:83ac:5eb9 with SMTP id lr6-20020a17090b4b8600b0027383ac5eb9mr4072935pjb.4.1695391810610; Fri, 22 Sep 2023 07:10:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695391810; cv=none; d=google.com; s=arc-20160816; b=gfa3kM2KSzUe1CRoW7tJY5zLlxdFLgVF4VQ9HaS4tbL582fxyuQli5IXKPrlM53aHp rbNeiqYeQzoUyca4h/FAoMABpigsMJjMrM8l5f6EVk6O+i3Cp4zwwBbcLR2a5wmaSDAm 3xsFP57p7Ocn/bFx/5NmekmNObk2V27UvXBBkG4TiRTWNrNxeTCDBGEJKsI3UfVtCY5J 2lzGCo+EptiM5va9MJwAM3V2Z7xUA907aHSsQ7sxhMWvmOEBKrl70ouzQ27brzrxrkfP ppKf/Zgz94Q/NS4+xH0V7CPR3WdFs8N5BNF3nW/WIOsrotmBTv2VqC3lkQraTcpAV+YA V5Qg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=W1ZndHb06o1CqBfEMHAQs0xKzsPqR8W26l51gDxt9tE=; fh=6zuP401AQ41/qhBion2zHjX/vs1BGL+EBw6f1x6HvFM=; b=kJBST5rp1v2NdRcXCrsuz86YRjyshuDK6ePATg5vAVyKMYjCfoJRUCiwg2P3S7QAK/ rU93ZNlyUK8/wf6sDPpQcKuafw66Q81MoCv2Auj0nJ1ezS7iHz31UsrK913NmdaVaHqw st+NqmuX62LwFYJ8XT9G7TsZ2oAkraUlFju8U8xx8R3T/XA5f0BvUqyro4wwV490t3js fhl7Y6S1+AwBkF/udlVL7rNSuGNObeq9fH8c9acUfx4oD8W/LEDXsSCAk5hoxmR/k/TP qr7WHHFpHBK/bfQIMlZHdZ2mItZS5PsFC1G5mijWNCwIY+HZfC7gCo6Ahy0COg+1tSOc 1mkQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=NC1filEZ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from fry.vger.email (fry.vger.email. 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Fri, 22 Sep 2023 01:39:18 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1777747163565211090 X-GMAIL-MSGID: 1777747163565211090 Add new SPMI vibrator module which is very similar to the SPMI vibrator module inside PM8916 but just has a finer drive voltage step (1mV vs 100mV) hence its drive level control is expanded to across 2 registers. The vibrator module can be found in Qualcomm PMIC PMI632, then following PM7250B, PM7325B, PM7550BA PMICs. Signed-off-by: Fenglin Wu Tested-by: Luca Weiss # sdm632-fairphone-fp3 (pmi632) --- drivers/input/misc/pm8xxx-vibrator.c | 55 +++++++++++++++++++++++++--- 1 file changed, 50 insertions(+), 5 deletions(-) diff --git a/drivers/input/misc/pm8xxx-vibrator.c b/drivers/input/misc/pm8xxx-vibrator.c index d6b468324c77..990e8a9ac018 100644 --- a/drivers/input/misc/pm8xxx-vibrator.c +++ b/drivers/input/misc/pm8xxx-vibrator.c @@ -21,6 +21,13 @@ #define SPMI_VIB_DRV_LEVEL_MASK GENMASK(4, 0) #define SPMI_VIB_DRV_SHIFT 0 +#define SPMI_VIB_GEN2_DRV_REG 0x40 +#define SPMI_VIB_GEN2_DRV_MASK GENMASK(7, 0) +#define SPMI_VIB_GEN2_DRV_SHIFT 0 +#define SPMI_VIB_GEN2_DRV2_REG 0x41 +#define SPMI_VIB_GEN2_DRV2_MASK GENMASK(3, 0) +#define SPMI_VIB_GEN2_DRV2_SHIFT 8 + #define SPMI_VIB_EN_REG 0x46 #define SPMI_VIB_EN_BIT BIT(7) @@ -33,12 +40,14 @@ enum vib_hw_type { SSBI_VIB, SPMI_VIB, + SPMI_VIB_GEN2 }; struct pm8xxx_vib_data { enum vib_hw_type hw_type; unsigned int enable_addr; unsigned int drv_addr; + unsigned int drv2_addr; }; static const struct pm8xxx_vib_data ssbi_vib_data = { @@ -52,6 +61,13 @@ static const struct pm8xxx_vib_data spmi_vib_data = { .drv_addr = SPMI_VIB_DRV_REG, }; +static const struct pm8xxx_vib_data spmi_vib_gen2_data = { + .hw_type = SPMI_VIB_GEN2, + .enable_addr = SPMI_VIB_EN_REG, + .drv_addr = SPMI_VIB_GEN2_DRV_REG, + .drv2_addr = SPMI_VIB_GEN2_DRV2_REG, +}; + /** * struct pm8xxx_vib - structure to hold vibrator data * @vib_input_dev: input device supporting force feedback @@ -85,12 +101,24 @@ static int pm8xxx_vib_set(struct pm8xxx_vib *vib, bool on) { int rc; unsigned int val = vib->reg_vib_drv; - u32 mask = SPMI_VIB_DRV_LEVEL_MASK; - u32 shift = SPMI_VIB_DRV_SHIFT; + u32 mask, shift; - if (vib->data->hw_type == SSBI_VIB) { + + switch (vib->data->hw_type) { + case SSBI_VIB: mask = SSBI_VIB_DRV_LEVEL_MASK; shift = SSBI_VIB_DRV_SHIFT; + break; + case SPMI_VIB: + mask = SPMI_VIB_DRV_LEVEL_MASK; + shift = SPMI_VIB_DRV_SHIFT; + break; + case SPMI_VIB_GEN2: + mask = SPMI_VIB_GEN2_DRV_MASK; + shift = SPMI_VIB_GEN2_DRV_SHIFT; + break; + default: + return -EINVAL; } if (on) @@ -104,6 +132,19 @@ static int pm8xxx_vib_set(struct pm8xxx_vib *vib, bool on) vib->reg_vib_drv = val; + if (vib->data->hw_type == SPMI_VIB_GEN2) { + mask = SPMI_VIB_GEN2_DRV2_MASK; + shift = SPMI_VIB_GEN2_DRV2_SHIFT; + if (on) + val = (vib->level >> shift) & mask; + else + val = 0; + rc = regmap_update_bits(vib->regmap, + vib->reg_base + vib->data->drv2_addr, mask, val); + if (rc < 0) + return rc; + } + if (vib->data->hw_type == SSBI_VIB) return 0; @@ -128,10 +169,13 @@ static void pm8xxx_work_handler(struct work_struct *work) vib->active = true; vib->level = ((VIB_MAX_LEVELS * vib->speed) / MAX_FF_SPEED) + VIB_MIN_LEVEL_mV; - vib->level /= 100; + if (vib->data->hw_type != SPMI_VIB_GEN2) + vib->level /= 100; } else { vib->active = false; - vib->level = VIB_MIN_LEVEL_mV / 100; + vib->level = VIB_MIN_LEVEL_mV; + if (vib->data->hw_type != SPMI_VIB_GEN2) + vib->level /= 100; } pm8xxx_vib_set(vib, vib->active); @@ -266,6 +310,7 @@ static const struct of_device_id pm8xxx_vib_id_table[] = { { .compatible = "qcom,pm8058-vib", .data = &ssbi_vib_data }, { .compatible = "qcom,pm8921-vib", .data = &ssbi_vib_data }, { .compatible = "qcom,pm8916-vib", .data = &spmi_vib_data }, + { .compatible = "qcom,pmi632-vib", .data = &spmi_vib_gen2_data }, { } }; MODULE_DEVICE_TABLE(of, pm8xxx_vib_id_table);