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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id kg28-20020a17090776fc00b0099b6e6c095csi2596453ejc.698.2023.09.21.18.14.18 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Sep 2023 18:14:18 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=ZSFxtd69; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id B1CD0385772B for ; Fri, 22 Sep 2023 01:14:15 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.88]) by sourceware.org (Postfix) with ESMTPS id 0B2853858C36 for ; Fri, 22 Sep 2023 01:13:37 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0B2853858C36 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695345218; x=1726881218; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=KN2aUNM+QkZoUaNa7K4fDh2F2OVKpIKUnYcior4vuUo=; b=ZSFxtd69hroiqrkWrNf7VHt5K/YLCyyn9I+Jub2Pz/qSILa2jPgq6zRG gBf8W8fkUwS1a3b7CiNykkc49mAVyWTZUruToptQgbHfDdZVjyxSettmR jCD0mKcKGalbczB3fm7jpsC966VK9YRl1FqKAupyFkskwEGuJYNT2M0xu ev00mxm74tBr6kpdMbbvjoiVd9i5CE3CDRgSgbkeTF+KSFUDZVpW3cuOG nzVrrcvY+Ik7nbQ675rv1p9yDYxv1Rx2UF6FbQzdPMYWe3kHlAFBCf5K0 eFD+z4KXEb1LT//Pao9q9Hqf9i3FPaxde9rRO3L9Y/czT1Oglhn5Dc8sZ A==; X-IronPort-AV: E=McAfee;i="6600,9927,10840"; a="411649503" X-IronPort-AV: E=Sophos;i="6.03,167,1694761200"; d="scan'208";a="411649503" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Sep 2023 18:13:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10840"; a="890617804" X-IronPort-AV: E=Sophos;i="6.03,167,1694761200"; d="scan'208";a="890617804" Received: from shvmail02.sh.intel.com ([10.239.244.9]) by fmsmga001.fm.intel.com with ESMTP; 21 Sep 2023 18:12:01 -0700 Received: from pli-ubuntu.sh.intel.com (pli-ubuntu.sh.intel.com [10.239.159.47]) by shvmail02.sh.intel.com (Postfix) with ESMTP id 301D110056BA; Fri, 22 Sep 2023 09:12:52 +0800 (CST) From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, pan2.li@intel.com, yanzhang.wang@intel.com, kito.cheng@gmail.com Subject: [PATCH v1] RISC-V: Leverage __builtin_xx instead of math.h for test Date: Fri, 22 Sep 2023 09:12:51 +0800 Message-Id: <20230922011251.335382-1-pan2.li@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1777698349603578737 X-GMAIL-MSGID: 1777698349603578737 From: Pan Li The math.h may have problems in some environment, take __builtin__xx instead for testing. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c: Remove reference to math.h. * gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c: Ditto. * gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-2.c: Ditto. Signed-off-by: Pan Li Signed-off-by: Pan Li --- .../rvv/autovec/vls/floating-point-max-5.c | 43 +++++++++---------- .../rvv/autovec/vls/floating-point-min-5.c | 43 +++++++++---------- .../rvv/autovec/vls/floating-point-sgnjx-2.c | 43 +++++++++---------- 3 files changed, 63 insertions(+), 66 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c index 775ddb1d25e..dd163682396 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c @@ -2,30 +2,29 @@ /* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */ #include "def.h" -#include "math.h" -DEF_CALL_VV (max, 1, float, fmaxf) -DEF_CALL_VV (max, 2, float, fmaxf) -DEF_CALL_VV (max, 4, float, fmaxf) -DEF_CALL_VV (max, 8, float, fmaxf) -DEF_CALL_VV (max, 16, float, fmaxf) -DEF_CALL_VV (max, 32, float, fmaxf) -DEF_CALL_VV (max, 64, float, fmaxf) -DEF_CALL_VV (max, 128, float, fmaxf) -DEF_CALL_VV (max, 256, float, fmaxf) -DEF_CALL_VV (max, 512, float, fmaxf) -DEF_CALL_VV (max, 1024, float, fmaxf) +DEF_CALL_VV (max, 1, float, __builtin_fmaxf) +DEF_CALL_VV (max, 2, float, __builtin_fmaxf) +DEF_CALL_VV (max, 4, float, __builtin_fmaxf) +DEF_CALL_VV (max, 8, float, __builtin_fmaxf) +DEF_CALL_VV (max, 16, float, __builtin_fmaxf) +DEF_CALL_VV (max, 32, float, __builtin_fmaxf) +DEF_CALL_VV (max, 64, float, __builtin_fmaxf) +DEF_CALL_VV (max, 128, float, __builtin_fmaxf) +DEF_CALL_VV (max, 256, float, __builtin_fmaxf) +DEF_CALL_VV (max, 512, float, __builtin_fmaxf) +DEF_CALL_VV (max, 1024, float, __builtin_fmaxf) -DEF_CALL_VV (max, 1, double, fmax) -DEF_CALL_VV (max, 2, double, fmax) -DEF_CALL_VV (max, 4, double, fmax) -DEF_CALL_VV (max, 8, double, fmax) -DEF_CALL_VV (max, 16, double, fmax) -DEF_CALL_VV (max, 32, double, fmax) -DEF_CALL_VV (max, 64, double, fmax) -DEF_CALL_VV (max, 128, double, fmax) -DEF_CALL_VV (max, 256, double, fmax) -DEF_CALL_VV (max, 512, double, fmax) +DEF_CALL_VV (max, 1, double, __builtin_fmax) +DEF_CALL_VV (max, 2, double, __builtin_fmax) +DEF_CALL_VV (max, 4, double, __builtin_fmax) +DEF_CALL_VV (max, 8, double, __builtin_fmax) +DEF_CALL_VV (max, 16, double, __builtin_fmax) +DEF_CALL_VV (max, 32, double, __builtin_fmax) +DEF_CALL_VV (max, 64, double, __builtin_fmax) +DEF_CALL_VV (max, 128, double, __builtin_fmax) +DEF_CALL_VV (max, 256, double, __builtin_fmax) +DEF_CALL_VV (max, 512, double, __builtin_fmax) /* { dg-final { scan-assembler-times {vfmax\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 19 } } */ /* { dg-final { scan-assembler-not {csrr} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c index 1e9ff7d5054..0e3cbf2acec 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c @@ -2,30 +2,29 @@ /* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */ #include "def.h" -#include "math.h" -DEF_CALL_VV (min, 1, float, fminf) -DEF_CALL_VV (min, 2, float, fminf) -DEF_CALL_VV (min, 4, float, fminf) -DEF_CALL_VV (min, 8, float, fminf) -DEF_CALL_VV (min, 16, float, fminf) -DEF_CALL_VV (min, 32, float, fminf) -DEF_CALL_VV (min, 64, float, fminf) -DEF_CALL_VV (min, 128, float, fminf) -DEF_CALL_VV (min, 256, float, fminf) -DEF_CALL_VV (min, 512, float, fminf) -DEF_CALL_VV (min, 1024, float, fminf) +DEF_CALL_VV (min, 1, float, __builtin_fminf) +DEF_CALL_VV (min, 2, float, __builtin_fminf) +DEF_CALL_VV (min, 4, float, __builtin_fminf) +DEF_CALL_VV (min, 8, float, __builtin_fminf) +DEF_CALL_VV (min, 16, float, __builtin_fminf) +DEF_CALL_VV (min, 32, float, __builtin_fminf) +DEF_CALL_VV (min, 64, float, __builtin_fminf) +DEF_CALL_VV (min, 128, float, __builtin_fminf) +DEF_CALL_VV (min, 256, float, __builtin_fminf) +DEF_CALL_VV (min, 512, float, __builtin_fminf) +DEF_CALL_VV (min, 1024, float, __builtin_fminf) -DEF_CALL_VV (min, 1, double, fmin) -DEF_CALL_VV (min, 2, double, fmin) -DEF_CALL_VV (min, 4, double, fmin) -DEF_CALL_VV (min, 8, double, fmin) -DEF_CALL_VV (min, 16, double, fmin) -DEF_CALL_VV (min, 32, double, fmin) -DEF_CALL_VV (min, 64, double, fmin) -DEF_CALL_VV (min, 128, double, fmin) -DEF_CALL_VV (min, 256, double, fmin) -DEF_CALL_VV (min, 512, double, fmin) +DEF_CALL_VV (min, 1, double, __builtin_fmin) +DEF_CALL_VV (min, 2, double, __builtin_fmin) +DEF_CALL_VV (min, 4, double, __builtin_fmin) +DEF_CALL_VV (min, 8, double, __builtin_fmin) +DEF_CALL_VV (min, 16, double, __builtin_fmin) +DEF_CALL_VV (min, 32, double, __builtin_fmin) +DEF_CALL_VV (min, 64, double, __builtin_fmin) +DEF_CALL_VV (min, 128, double, __builtin_fmin) +DEF_CALL_VV (min, 256, double, __builtin_fmin) +DEF_CALL_VV (min, 512, double, __builtin_fmin) /* { dg-final { scan-assembler-times {vfmin\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 19 } } */ /* { dg-final { scan-assembler-not {csrr} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-2.c index 7e017de6a25..ec9001f8ee4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-2.c @@ -2,30 +2,29 @@ /* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */ #include "def.h" -#include -DEF_SGNJX_VV (sgnj, 1, float, copysignf) -DEF_SGNJX_VV (sgnj, 2, float, copysignf) -DEF_SGNJX_VV (sgnj, 4, float, copysignf) -DEF_SGNJX_VV (sgnj, 8, float, copysignf) -DEF_SGNJX_VV (sgnj, 16, float, copysignf) -DEF_SGNJX_VV (sgnj, 32, float, copysignf) -DEF_SGNJX_VV (sgnj, 64, float, copysignf) -DEF_SGNJX_VV (sgnj, 128, float, copysignf) -DEF_SGNJX_VV (sgnj, 256, float, copysignf) -DEF_SGNJX_VV (sgnj, 512, float, copysignf) -DEF_SGNJX_VV (sgnj, 1024, float, copysignf) +DEF_SGNJX_VV (sgnj, 1, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 2, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 4, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 8, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 16, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 32, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 64, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 128, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 256, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 512, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 1024, float, __builtin_copysignf) -DEF_SGNJX_VV (sgnj, 1, double, copysign) -DEF_SGNJX_VV (sgnj, 2, double, copysign) -DEF_SGNJX_VV (sgnj, 4, double, copysign) -DEF_SGNJX_VV (sgnj, 8, double, copysign) -DEF_SGNJX_VV (sgnj, 16, double, copysign) -DEF_SGNJX_VV (sgnj, 32, double, copysign) -DEF_SGNJX_VV (sgnj, 64, double, copysign) -DEF_SGNJX_VV (sgnj, 128, double, copysign) -DEF_SGNJX_VV (sgnj, 256, double, copysign) -DEF_SGNJX_VV (sgnj, 512, double, copysign) +DEF_SGNJX_VV (sgnj, 1, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 2, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 4, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 8, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 16, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 32, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 64, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 128, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 256, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 512, double, __builtin_copysign) /* { dg-final { scan-assembler-times {vfsgnjx\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 19 } } */ /* { dg-final { scan-assembler-not {csrr} } } */