From patchwork Tue Sep 19 16:45:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Wolsieffer X-Patchwork-Id: 142148 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:172:b0:3f2:4152:657d with SMTP id h50csp3784609vqi; Tue, 19 Sep 2023 17:50:44 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHXO1h0jlW86BvJlce16yMTgQPFqD/7RhbeSTFcPACe0JWrjne5pSnWCNGM7Jp91CD1x3zD X-Received: by 2002:a05:6808:1203:b0:3a8:43c6:3cf with SMTP id a3-20020a056808120300b003a843c603cfmr893786oil.57.1695171044667; Tue, 19 Sep 2023 17:50:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695171044; cv=none; d=google.com; s=arc-20160816; b=creUJq4MoGFvdLQbeQ6169aD2xM9Q74FOW6nBOhf+ALiwnYKNngEwOeZ4/32eGDv9R NsjpMb+R3ncB8+5Q6ep0/Fa56hPQYE7Ck41Po8mk7bFkmpQzOzH1UDWqW5adF2BnV6u3 tuD+XDMkrwHD1S0eSf6R2AUqlSuGE96GD3ZmM3FKRQSiZVyZB6MZldjvJ9jlK9091Ala SKlO9ACbgnPnnjxEpUe3UL2MZ9O6aExnhYRLZ+lM/qmkrUsXQfenKnkvdIIU8ribhA2c QbTG7F/Ynnye97lzZIIqXqCRgnWB7F4yzpJZfImoHQU33EwC5WMANEqCt055I/0xjYVq PO4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Tnm2Moa364NnFvHBWbJW5Miitr7z3kjIIDJjJlIthFQ=; fh=f9safSkw/SQVr0kEtPvUiqQf5kZ6gbwV4tr+WhykmK8=; b=t07eIwkeAHEidwkR1o6RwRvMQgXpy6mzBqzxzRk53rNKjDEygaeLoe716A1sARK86Q XqpYDbjHbTDhETjVXMEDZPUckrB2B6EHIVxfOkz1ZbkokOVB56NX9GX9S8ARMI0UBD9t 06groUmzI3BCiz9zOMlVS7cSbH9v1E75fnmIxRWD+GXeLPNVRBBuN6zzUfdmu5R3TSQO sRpq0W7BsqZtYTWzyZewFeslyEbUtrmtqhdOJ/KqVMBJ4Lta8c4X6j/c+HuyEHcAdril wNarfxqMsny+w9N6+SeqeqareAWlvWYJ3VlyB2sConSy0o7s0Ccm6vmVc/OcK11Omh67 gP1w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@hefring-com.20230601.gappssmtp.com header.s=20230601 header.b=jqd1UVw6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from morse.vger.email (morse.vger.email. [2620:137:e000::3:1]) by mx.google.com with ESMTPS id bt10-20020a056a00438a00b0068e4358d041si10498753pfb.175.2023.09.19.17.50.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Sep 2023 17:50:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) client-ip=2620:137:e000::3:1; Authentication-Results: mx.google.com; dkim=pass header.i=@hefring-com.20230601.gappssmtp.com header.s=20230601 header.b=jqd1UVw6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id 033EB807E413; Tue, 19 Sep 2023 12:20:22 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232734AbjISTUK (ORCPT + 26 others); Tue, 19 Sep 2023 15:20:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34082 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232549AbjISTUI (ORCPT ); Tue, 19 Sep 2023 15:20:08 -0400 Received: from mail-qk1-x741.google.com (mail-qk1-x741.google.com [IPv6:2607:f8b0:4864:20::741]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B61B4E6 for ; Tue, 19 Sep 2023 12:20:02 -0700 (PDT) Received: by mail-qk1-x741.google.com with SMTP id af79cd13be357-773ae5d2b1fso320956885a.2 for ; Tue, 19 Sep 2023 12:20:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=hefring-com.20230601.gappssmtp.com; s=20230601; t=1695151202; x=1695756002; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Tnm2Moa364NnFvHBWbJW5Miitr7z3kjIIDJjJlIthFQ=; b=jqd1UVw6vBz3BQwmehiHhdpaAtVrMwEIx/ar5/0g9Wx3/m7Ea565CyZjxQ/+h9vZK9 KElcGoOJkimanqMoZrDGWQSghxPLpQ2nSX8Z5WIdLuqylb+0Ya57sQ558zPHcH+bzmGR SFxf7HOG9cWUV5bjWxacXbjmqNq6pPty72H/rMR/MGbXzmAii+4IkCIjl8O6F21tU4PO TZWYZ4AJ5bPChs3TQ62JZaNStG6gVxdmKqQFDhVBKbEIJ6h/n3C9OkhdtAE08IJeg2gn RCRZ00Ou1CdfXBoXKuDoMcOlch6zXH4vWB2hd/1HVmq/9YcEuXCrv/6UiYnDQhGnGm9J YYeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695151202; x=1695756002; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Tnm2Moa364NnFvHBWbJW5Miitr7z3kjIIDJjJlIthFQ=; b=iADR6tfO3cwtorN8rGvxuV1TJiws0Sf/rh3cu2MkyTzygHraJpc7deRwjl4I6HcCvO IAKeUhxWH1didNffrL+q59zTzBl0i7SA2pZReB4EO4o8533gdjuL9FKAEZu+pB/dbWy+ kwNlV4FvaFlRoHF6moyzJeIa3kicXbjNUaRvELU3C55TtN7HKmQI90OBRt+dEi/8gM7s B5TplLpwcT4PGh0nALn8Gpov17JVawuI2nWBgMPj6WgpsFTCuwjSi8InZuJ4v7EUQiE0 iVF5V8+7EmVREjt0dVi3aI8EuwVhpMjrLgYqruRZf6a3RgSKLyLESt7zmQK/my/feOiY dxgA== X-Gm-Message-State: AOJu0Yx+fbuZF3UUe6ZnKNKn2hGC4gYFGMYgBskT2wbmv0MCQST1dJCU GL2ENy9SBbdY1EWSjfp2NX3vuQ== X-Received: by 2002:a05:620a:288e:b0:76c:d958:d549 with SMTP id j14-20020a05620a288e00b0076cd958d549mr784459qkp.11.1695151201770; Tue, 19 Sep 2023 12:20:01 -0700 (PDT) Received: from dell-precision-5540.lan ([2601:18c:8002:3d40:df77:9915:c17e:79]) by smtp.gmail.com with ESMTPSA id x12-20020ae9f80c000000b0076c60b95b87sm4179704qkh.96.2023.09.19.12.20.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Sep 2023 12:20:01 -0700 (PDT) From: Ben Wolsieffer To: linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Alexandre Torgue , Jose Abreu , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Christophe Roullier , Ben Wolsieffer Subject: [PATCH 1/2] net: stmmac: dwmac-stm32: fix resume on STM32 MCU Date: Tue, 19 Sep 2023 12:45:35 -0400 Message-ID: <20230919164535.128125-3-ben.wolsieffer@hefring.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230919164535.128125-2-ben.wolsieffer@hefring.com> References: <20230919164535.128125-2-ben.wolsieffer@hefring.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Tue, 19 Sep 2023 12:20:22 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1777515673222998608 X-GMAIL-MSGID: 1777515673222998608 The STM32MP1 keeps clk_rx enabled during suspend, and therefore the driver does not enable the clock in stm32_dwmac_init() if the device was suspended. The problem is that this same code runs on STM32 MCUs, which do disable clk_rx during suspend, causing the clock to never be re-enabled on resume. This patch adds a variant flag to indicate that clk_rx remains enabled during suspend, and uses this to decide whether to enable the clock in stm32_dwmac_init() if the device was suspended. Fixes: 6528e02cc9ff ("net: ethernet: stmmac: add adaptation for stm32mp157c.") Signed-off-by: Ben Wolsieffer --- drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c index 26ea8c687881..a0e276783e65 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c @@ -104,6 +104,7 @@ struct stm32_ops { int (*parse_data)(struct stm32_dwmac *dwmac, struct device *dev); u32 syscfg_eth_mask; + bool clk_rx_enable_in_suspend; }; static int stm32_dwmac_init(struct plat_stmmacenet_data *plat_dat) @@ -121,7 +122,8 @@ static int stm32_dwmac_init(struct plat_stmmacenet_data *plat_dat) if (ret) return ret; - if (!dwmac->dev->power.is_suspended) { + if (!dwmac->ops->clk_rx_enable_in_suspend || + !dwmac->dev->power.is_suspended) { ret = clk_prepare_enable(dwmac->clk_rx); if (ret) { clk_disable_unprepare(dwmac->clk_tx); @@ -513,7 +515,8 @@ static struct stm32_ops stm32mp1_dwmac_data = { .suspend = stm32mp1_suspend, .resume = stm32mp1_resume, .parse_data = stm32mp1_parse_data, - .syscfg_eth_mask = SYSCFG_MP1_ETH_MASK + .syscfg_eth_mask = SYSCFG_MP1_ETH_MASK, + .clk_rx_enable_in_suspend = true }; static const struct of_device_id stm32_dwmac_match[] = { From patchwork Tue Sep 19 16:45:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Wolsieffer X-Patchwork-Id: 142151 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:172:b0:3f2:4152:657d with SMTP id h50csp3792876vqi; Tue, 19 Sep 2023 18:07:46 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEwmTxRsA4wg8BiX7O4GN5Oj1PqvwYsQ51DeunZ7MiBO7wWr07yrM1zO9FwXvFscj+gyGyi X-Received: by 2002:a05:6358:7250:b0:134:c37f:4b5c with SMTP id i16-20020a056358725000b00134c37f4b5cmr1837851rwa.22.1695172065826; Tue, 19 Sep 2023 18:07:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695172065; cv=none; d=google.com; s=arc-20160816; b=N6vA7ulN6KVc8nBzLccKnmQ/CYxGEaKugvGIu0gxoTuG4Dx7eZQQTAexerVJT7HvBM IxxBzXUj76oXRN3Sxdbr9fMP55MS/RN/WZ651uC/1p4DAXQK5R8cg5gj3TlgUnYASl/K POAX8LNfat47XVakf4/uSSBcmwo4hQGXRK97fwFkxW8Ff783u/gJF5FEjbw3QVk4RrXX 757sXpLw1MHlq4wCPVKLW3vQawZdXG6E6x6WGap594D5vDRT7IakEhRR6eUbLh05aPNw RrUjgsckndMl5Jw8O0plOI2x5vTrohQTtyr65LsQ+VtI/3DvwSpNVkcALRcHxnNe4xIc IpsA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=fCY81i+nseXrrFOhCCMbEZ9jSIB5L2BqWxrjnhtX0k0=; fh=f9safSkw/SQVr0kEtPvUiqQf5kZ6gbwV4tr+WhykmK8=; b=pEQ8VCHp6qKbo3Ec1hwoYs1nUSpHEmvcQphEoPITVFfvWvnn+q1hIdWEDjn3Nk2lA8 72dbNLzuO2GtgAvz1+tiWELdwMvz1zQhcUJCT9gLGF56Bc3kBsOCyBaT1sIxq8B3jieD YTolUj8PzLTot8e2lFONOZUDuqyBoRqkui1OgH5INS1pqP/xHZhOg2KDxx8Tn6oa2Ghq qX/7dwCJV2oDZErv6KyHz6AKOy6JXQKL7nyliZcNbkxO0k/o/R7BIP2qpWkhqr0LGe/z 1iZlFBpJ8xnAJn2d4m19ktq+1s1hhhOCUuZMlJ0UI8sj+YBRsqdOMabhM+esY8zo57HJ 0XbQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@hefring-com.20230601.gappssmtp.com header.s=20230601 header.b=krSms9Rb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from agentk.vger.email (agentk.vger.email. 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Christophe Roullier , Ben Wolsieffer Subject: [PATCH 2/2] net: stmmac: dwmac-stm32: refactor clock config Date: Tue, 19 Sep 2023 12:45:36 -0400 Message-ID: <20230919164535.128125-4-ben.wolsieffer@hefring.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230919164535.128125-2-ben.wolsieffer@hefring.com> References: <20230919164535.128125-2-ben.wolsieffer@hefring.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Tue, 19 Sep 2023 12:20:38 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1777516743603969517 X-GMAIL-MSGID: 1777516743603969517 Currently, clock configuration is spread throughout the driver and partially duplicated for the STM32MP1 and STM32 MCU variants. This makes it difficult to keep track of which clocks need to be enabled or disabled in various scenarios. This patch adds symmetric stm32_dwmac_clk_enable/disable() functions that handle all clock configuration, including quirks required while suspending or resuming. syscfg_clk and clk_eth_ck are not present on STM32 MCUs, but it is fine to try to configure them anyway since NULL clocks are ignored. Signed-off-by: Ben Wolsieffer --- .../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 113 +++++++----------- 1 file changed, 45 insertions(+), 68 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c index a0e276783e65..e53ca4111cbe 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c @@ -98,7 +98,6 @@ struct stm32_dwmac { struct stm32_ops { int (*set_mode)(struct plat_stmmacenet_data *plat_dat); - int (*clk_prepare)(struct stm32_dwmac *dwmac, bool prepare); int (*suspend)(struct stm32_dwmac *dwmac); void (*resume)(struct stm32_dwmac *dwmac); int (*parse_data)(struct stm32_dwmac *dwmac, @@ -107,62 +106,55 @@ struct stm32_ops { bool clk_rx_enable_in_suspend; }; -static int stm32_dwmac_init(struct plat_stmmacenet_data *plat_dat) +static int stm32_dwmac_clk_enable(struct stm32_dwmac *dwmac, bool resume) { - struct stm32_dwmac *dwmac = plat_dat->bsp_priv; int ret; - if (dwmac->ops->set_mode) { - ret = dwmac->ops->set_mode(plat_dat); - if (ret) - return ret; - } - ret = clk_prepare_enable(dwmac->clk_tx); if (ret) - return ret; + goto err_clk_tx; - if (!dwmac->ops->clk_rx_enable_in_suspend || - !dwmac->dev->power.is_suspended) { + if (!dwmac->ops->clk_rx_enable_in_suspend || !resume) { ret = clk_prepare_enable(dwmac->clk_rx); - if (ret) { - clk_disable_unprepare(dwmac->clk_tx); - return ret; - } + if (ret) + goto err_clk_rx; } - if (dwmac->ops->clk_prepare) { - ret = dwmac->ops->clk_prepare(dwmac, true); - if (ret) { - clk_disable_unprepare(dwmac->clk_rx); - clk_disable_unprepare(dwmac->clk_tx); - } + ret = clk_prepare_enable(dwmac->syscfg_clk); + if (ret) + goto err_syscfg_clk; + + if (dwmac->enable_eth_ck) { + ret = clk_prepare_enable(dwmac->clk_eth_ck); + if (ret) + goto err_clk_eth_ck; } return ret; + +err_clk_eth_ck: + clk_disable_unprepare(dwmac->syscfg_clk); +err_syscfg_clk: + if (!dwmac->ops->clk_rx_enable_in_suspend || !resume) + clk_disable_unprepare(dwmac->clk_rx); +err_clk_rx: + clk_disable_unprepare(dwmac->clk_tx); +err_clk_tx: + return ret; } -static int stm32mp1_clk_prepare(struct stm32_dwmac *dwmac, bool prepare) +static int stm32_dwmac_init(struct plat_stmmacenet_data *plat_dat, bool resume) { - int ret = 0; + struct stm32_dwmac *dwmac = plat_dat->bsp_priv; + int ret; - if (prepare) { - ret = clk_prepare_enable(dwmac->syscfg_clk); + if (dwmac->ops->set_mode) { + ret = dwmac->ops->set_mode(plat_dat); if (ret) return ret; - if (dwmac->enable_eth_ck) { - ret = clk_prepare_enable(dwmac->clk_eth_ck); - if (ret) { - clk_disable_unprepare(dwmac->syscfg_clk); - return ret; - } - } - } else { - clk_disable_unprepare(dwmac->syscfg_clk); - if (dwmac->enable_eth_ck) - clk_disable_unprepare(dwmac->clk_eth_ck); } - return ret; + + return stm32_dwmac_clk_enable(dwmac, resume); } static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat) @@ -252,13 +244,15 @@ static int stm32mcu_set_mode(struct plat_stmmacenet_data *plat_dat) dwmac->ops->syscfg_eth_mask, val << 23); } -static void stm32_dwmac_clk_disable(struct stm32_dwmac *dwmac) +static void stm32_dwmac_clk_disable(struct stm32_dwmac *dwmac, bool suspend) { clk_disable_unprepare(dwmac->clk_tx); - clk_disable_unprepare(dwmac->clk_rx); + if (!dwmac->ops->clk_rx_enable_in_suspend || !suspend) + clk_disable_unprepare(dwmac->clk_rx); - if (dwmac->ops->clk_prepare) - dwmac->ops->clk_prepare(dwmac, false); + clk_disable_unprepare(dwmac->syscfg_clk); + if (dwmac->enable_eth_ck) + clk_disable_unprepare(dwmac->clk_eth_ck); } static int stm32_dwmac_parse_data(struct stm32_dwmac *dwmac, @@ -400,7 +394,7 @@ static int stm32_dwmac_probe(struct platform_device *pdev) plat_dat->bsp_priv = dwmac; - ret = stm32_dwmac_init(plat_dat); + ret = stm32_dwmac_init(plat_dat, false); if (ret) goto err_remove_config_dt; @@ -411,7 +405,7 @@ static int stm32_dwmac_probe(struct platform_device *pdev) return 0; err_clk_disable: - stm32_dwmac_clk_disable(dwmac); + stm32_dwmac_clk_disable(dwmac, false); err_remove_config_dt: stmmac_remove_config_dt(pdev, plat_dat); @@ -426,7 +420,7 @@ static void stm32_dwmac_remove(struct platform_device *pdev) stmmac_dvr_remove(&pdev->dev); - stm32_dwmac_clk_disable(priv->plat->bsp_priv); + stm32_dwmac_clk_disable(dwmac, false); if (dwmac->irq_pwr_wakeup >= 0) { dev_pm_clear_wake_irq(&pdev->dev); @@ -436,18 +430,7 @@ static void stm32_dwmac_remove(struct platform_device *pdev) static int stm32mp1_suspend(struct stm32_dwmac *dwmac) { - int ret = 0; - - ret = clk_prepare_enable(dwmac->clk_ethstp); - if (ret) - return ret; - - clk_disable_unprepare(dwmac->clk_tx); - clk_disable_unprepare(dwmac->syscfg_clk); - if (dwmac->enable_eth_ck) - clk_disable_unprepare(dwmac->clk_eth_ck); - - return ret; + return clk_prepare_enable(dwmac->clk_ethstp); } static void stm32mp1_resume(struct stm32_dwmac *dwmac) @@ -455,14 +438,6 @@ static void stm32mp1_resume(struct stm32_dwmac *dwmac) clk_disable_unprepare(dwmac->clk_ethstp); } -static int stm32mcu_suspend(struct stm32_dwmac *dwmac) -{ - clk_disable_unprepare(dwmac->clk_tx); - clk_disable_unprepare(dwmac->clk_rx); - - return 0; -} - #ifdef CONFIG_PM_SLEEP static int stm32_dwmac_suspend(struct device *dev) { @@ -473,6 +448,10 @@ static int stm32_dwmac_suspend(struct device *dev) int ret; ret = stmmac_suspend(dev); + if (ret) + return ret; + + stm32_dwmac_clk_disable(dwmac, true); if (dwmac->ops->suspend) ret = dwmac->ops->suspend(dwmac); @@ -490,7 +469,7 @@ static int stm32_dwmac_resume(struct device *dev) if (dwmac->ops->resume) dwmac->ops->resume(dwmac); - ret = stm32_dwmac_init(priv->plat); + ret = stm32_dwmac_init(priv->plat, true); if (ret) return ret; @@ -505,13 +484,11 @@ static SIMPLE_DEV_PM_OPS(stm32_dwmac_pm_ops, static struct stm32_ops stm32mcu_dwmac_data = { .set_mode = stm32mcu_set_mode, - .suspend = stm32mcu_suspend, .syscfg_eth_mask = SYSCFG_MCU_ETH_MASK }; static struct stm32_ops stm32mp1_dwmac_data = { .set_mode = stm32mp1_set_mode, - .clk_prepare = stm32mp1_clk_prepare, .suspend = stm32mp1_suspend, .resume = stm32mp1_resume, .parse_data = stm32mp1_parse_data,