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The PV lock structure of the guest is allocated by user space. A hypercall interface is provided for the guest to interrogate the location of the shared memory structures. Signed-off-by: Zengruan Ye Signed-off-by: Usama Arif --- Documentation/virt/kvm/arm/index.rst | 1 + Documentation/virt/kvm/arm/pvlock.rst | 52 +++++++++++++++++++++++++ Documentation/virt/kvm/devices/vcpu.rst | 25 ++++++++++++ 3 files changed, 78 insertions(+) create mode 100644 Documentation/virt/kvm/arm/pvlock.rst diff --git a/Documentation/virt/kvm/arm/index.rst b/Documentation/virt/kvm/arm/index.rst index e84848432158..b8499dc00a6a 100644 --- a/Documentation/virt/kvm/arm/index.rst +++ b/Documentation/virt/kvm/arm/index.rst @@ -10,4 +10,5 @@ ARM hyp-abi hypercalls pvtime + pvlock ptp_kvm diff --git a/Documentation/virt/kvm/arm/pvlock.rst b/Documentation/virt/kvm/arm/pvlock.rst new file mode 100644 index 000000000000..d3c391b16d36 --- /dev/null +++ b/Documentation/virt/kvm/arm/pvlock.rst @@ -0,0 +1,52 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Paravirtualized lock support for arm64 +====================================== + +KVM/arm64 provides a hypervisor service call for paravirtualized guests to +determine whether a VCPU is currently running or not. + +A new SMCCC compatible hypercall is defined: + +* ARM_SMCCC_VENDOR_HYP_KVM_PV_LOCK_FUNC_ID: 0xC6000002 + +ARM_SMCCC_VENDOR_HYP_KVM_PV_LOCK_FUNC_ID + + ============= ======== ========================================== + Function ID: (uint32) 0xC6000002 + Return value: (int64) IPA of the pv lock data structure for this + VCPU. On failure: + NOT_SUPPORTED (-1) + ============= ======== ========================================== + +The IPA returned by PV_LOCK_PREEMPTED should be mapped by the guest as normal +memory with inner and outer write back caching attributes, in the inner +shareable domain. + +PV_LOCK_PREEMPTED returns the structure for the calling VCPU. + +PV lock state +------------- + +The structure pointed to by the PV_LOCK_PREEMPTED hypercall is as follows: + ++-----------+-------------+-------------+---------------------------------+ +| Field | Byte Length | Byte Offset | Description | ++===========+=============+=============+=================================+ +| preempted | 8 | 0 | Indicate if the VCPU that owns | +| | | | this struct is running or not. | +| | | | Non-zero values mean the VCPU | +| | | | has been preempted. Zero means | +| | | | the VCPU is not preempted. | ++-----------+-------------+-------------+---------------------------------+ + +The preempted field will be updated to 1 by the hypervisor prior to scheduling +a VCPU. When the VCPU is scheduled out, the preempted field will be updated +to 0 by the hypervisor. + +The structure will be present within a reserved region of the normal memory +given to the guest. The guest should not attempt to write into this memory. +There is a structure per VCPU of the guest. + +For the user space interface see +:ref:`Documentation/virt/kvm/devices/vcpu.rst `. \ No newline at end of file diff --git a/Documentation/virt/kvm/devices/vcpu.rst b/Documentation/virt/kvm/devices/vcpu.rst index 716aa3edae14..ea81b98f0e19 100644 --- a/Documentation/virt/kvm/devices/vcpu.rst +++ b/Documentation/virt/kvm/devices/vcpu.rst @@ -263,3 +263,28 @@ From the destination VMM process: 7. Write the KVM_VCPU_TSC_OFFSET attribute for every vCPU with the respective value derived in the previous step. + +.. _kvm_arm_vcpu_pvlock_ctrl: + +5. GROUP: KVM_ARM_VCPU_PVLOCK_CTRL +================================== + +:Architectures: ARM64 + +5.1 ATTRIBUTE: KVM_ARM_VCPU_PVLOCK_IPA +-------------------------------------- + +:Parameters: 64-bit base address + +Returns: + + ======= ====================================== + -ENXIO PV lock not implemented + -EEXIST Base address already set for this VCPU + -EINVAL Base address not 64 byte aligned + ======= ====================================== + +Specifies the base address of the pv lock structure for this VCPU. The +base address must be 64 byte aligned and exist within a valid guest memory +region. See Documentation/virt/kvm/arm/pvlock.rst for more information +including the layout of the pv lock structure. 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Signed-off-by: Zengruan Ye Signed-off-by: Usama Arif --- arch/arm64/include/asm/pvlock-abi.h | 17 +++++++++++++++++ include/linux/arm-smccc.h | 8 ++++++++ tools/include/linux/arm-smccc.h | 8 ++++++++ 3 files changed, 33 insertions(+) create mode 100644 arch/arm64/include/asm/pvlock-abi.h diff --git a/arch/arm64/include/asm/pvlock-abi.h b/arch/arm64/include/asm/pvlock-abi.h new file mode 100644 index 000000000000..3f4574071679 --- /dev/null +++ b/arch/arm64/include/asm/pvlock-abi.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright(c) 2019 Huawei Technologies Co., Ltd + * Author: Zengruan Ye + * Usama Arif + */ + +#ifndef __ASM_PVLOCK_ABI_H +#define __ASM_PVLOCK_ABI_H + +struct pvlock_vcpu_state { + __le64 preempted; + /* Structure must be 64 byte aligned, pad to that size */ + u8 padding[56]; +} __packed; + +#endif diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index 220c8c60e021..104c10035b10 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -112,6 +112,7 @@ /* KVM "vendor specific" services */ #define ARM_SMCCC_KVM_FUNC_FEATURES 0 #define ARM_SMCCC_KVM_FUNC_PTP 1 +#define ARM_SMCCC_KVM_FUNC_PV_LOCK 2 #define ARM_SMCCC_KVM_FUNC_FEATURES_2 127 #define ARM_SMCCC_KVM_NUM_FUNCS 128 @@ -151,6 +152,13 @@ ARM_SMCCC_OWNER_STANDARD_HYP, \ 0x21) +/* Paravirtualised lock calls */ +#define ARM_SMCCC_VENDOR_HYP_KVM_PV_LOCK_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_64, \ + ARM_SMCCC_OWNER_VENDOR_HYP, \ + ARM_SMCCC_KVM_FUNC_PV_LOCK) + /* TRNG entropy source calls (defined by ARM DEN0098) */ #define ARM_SMCCC_TRNG_VERSION \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ diff --git a/tools/include/linux/arm-smccc.h b/tools/include/linux/arm-smccc.h index 63ce9bebccd3..c21e539c0228 100644 --- a/tools/include/linux/arm-smccc.h +++ b/tools/include/linux/arm-smccc.h @@ -111,6 +111,7 @@ /* KVM "vendor specific" services */ #define ARM_SMCCC_KVM_FUNC_FEATURES 0 #define ARM_SMCCC_KVM_FUNC_PTP 1 +#define ARM_SMCCC_KVM_FUNC_PV_LOCK 2 #define ARM_SMCCC_KVM_FUNC_FEATURES_2 127 #define ARM_SMCCC_KVM_NUM_FUNCS 128 @@ -150,6 +151,13 @@ ARM_SMCCC_OWNER_STANDARD_HYP, \ 0x21) +/* Paravirtualised lock calls */ +#define ARM_SMCCC_VENDOR_HYP_KVM_PV_LOCK_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_64, \ + ARM_SMCCC_OWNER_VENDOR_HYP, \ + ARM_SMCCC_KVM_FUNC_PV_LOCK) + /* TRNG entropy source calls (defined by ARM DEN0098) */ #define ARM_SMCCC_TRNG_VERSION \ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ From patchwork Fri Nov 4 06:21:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Usama Arif X-Patchwork-Id: 15376 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp202105wru; Thu, 3 Nov 2022 23:22:32 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4xkfsKg85Gl9hLRZsyWdL5OsMfU8r6ELlH4AsfXlqlOGLjI8EpKszPpEPePoWuY0cHn57k X-Received: by 2002:a17:902:f68d:b0:187:282d:6d25 with SMTP id l13-20020a170902f68d00b00187282d6d25mr22891924plg.98.1667542952107; Thu, 03 Nov 2022 23:22:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1667542952; cv=none; d=google.com; s=arc-20160816; b=ttwM6Eqg5cc1hTQLjVg281v++aG3HJaiQTbS+BmqNaQqtFX8+3bN4/YqMoNVsDBlW6 PgV8OyABbqxDQ7Iqa9LvPB8Il8O4PpUoA0FtxnsmBNyKdARys5/Jr8PytvqFD8OZCIYx Di9J98bik6ZAxF81ZCYPkI6baaodURdOtSCUvpV0ZEgZhVTWi02YoN3Ya4+4ELyIa8GY Yzw9SffMAFMgppI4XU2Sl20vbuj0zFdOs7Sa6Lqv8OTdnjQeO7NdjLnNDqib4coA+bvO 8a2ku6O+0PxWJ9HXnHZEgqpSH71n7oy+QHGylixe+GNB7Rnl3FcOr/EF3FBzRfVmKxxE aFAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=wHZXYM04ZGQ9OHStAmI9lRcnUZ9NDhKkDvLjK3ObtzA=; b=xmzsndD8ziteghoglJGprI/7M4f3//52PxUKMZzydC0sUZFTfpvKTINivI/ZbgRoCr /YrwwLKKKB/cukSEiE60To+k8ameLm0ufiy9tMRJQ3k3J4XSK0HE7EJyhetha98JTEoY SycQvZhHHCDNh5EF1pJ0vKpqst49QBcP8SVQIRl9LdF2+RZzx83zaD0xruvxmsOOUsIh /0NDcBAYH+W7mVHnL3eqqssUwDxdwmi1fHuCciB9omo1okM7ewdjvnunFGAfOqtAox4u m46PYYPKnKkxdQPQH64/r/SOfUdBAbLbkGRHvdWFr3bcJ13oIOeVe4bAxnRLC3Q+2wQH 2Wmw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@bytedance-com.20210112.gappssmtp.com header.s=20210112 header.b="3QT/xQub"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=bytedance.com Received: from out1.vger.email (out1.vger.email. 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The preempted field is zero if the VCPU is not preempted. Any other value means the VCPU has been preempted. Signed-off-by: Zengruan Ye Signed-off-by: Usama Arif --- Documentation/virt/kvm/arm/hypercalls.rst | 3 ++ arch/arm64/include/asm/kvm_host.h | 18 ++++++++++ arch/arm64/include/uapi/asm/kvm.h | 1 + arch/arm64/kvm/Makefile | 2 +- arch/arm64/kvm/arm.c | 8 +++++ arch/arm64/kvm/hypercalls.c | 8 +++++ arch/arm64/kvm/pvlock.c | 43 +++++++++++++++++++++++ tools/arch/arm64/include/uapi/asm/kvm.h | 1 + 8 files changed, 83 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/kvm/pvlock.c diff --git a/Documentation/virt/kvm/arm/hypercalls.rst b/Documentation/virt/kvm/arm/hypercalls.rst index 3e23084644ba..872a16226ace 100644 --- a/Documentation/virt/kvm/arm/hypercalls.rst +++ b/Documentation/virt/kvm/arm/hypercalls.rst @@ -127,6 +127,9 @@ The pseudo-firmware bitmap register are as follows: Bit-1: KVM_REG_ARM_VENDOR_HYP_BIT_PTP: The bit represents the Precision Time Protocol KVM service. + Bit-2: KVM_REG_ARM_VENDOR_HYP_BIT_PV_LOCK: + The bit represents the Paravirtualized lock service. + Errors: ======= ============================================================= diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 45e2136322ba..18303b30b7e9 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -417,6 +417,11 @@ struct kvm_vcpu_arch { u64 last_steal; gpa_t base; } steal; + + /* Guest PV lock state */ + struct { + gpa_t base; + } pv; }; /* @@ -840,6 +845,19 @@ static inline bool kvm_arm_is_pvtime_enabled(struct kvm_vcpu_arch *vcpu_arch) return (vcpu_arch->steal.base != GPA_INVALID); } +static inline void kvm_arm_pvlock_preempted_init(struct kvm_vcpu_arch *vcpu_arch) +{ + vcpu_arch->pv.base = GPA_INVALID; +} + +static inline bool kvm_arm_is_pvlock_preempted_ready(struct kvm_vcpu_arch *vcpu_arch) +{ + return (vcpu_arch->pv.base != GPA_INVALID); +} + +gpa_t kvm_init_pvlock(struct kvm_vcpu *vcpu); +void kvm_update_pvlock_preempted(struct kvm_vcpu *vcpu, u64 preempted); + void kvm_set_sei_esr(struct kvm_vcpu *vcpu, u64 syndrome); struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr); diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h index 316917b98707..bd05ece5c590 100644 --- a/arch/arm64/include/uapi/asm/kvm.h +++ b/arch/arm64/include/uapi/asm/kvm.h @@ -365,6 +365,7 @@ enum { enum { KVM_REG_ARM_VENDOR_HYP_BIT_FUNC_FEAT = 0, KVM_REG_ARM_VENDOR_HYP_BIT_PTP = 1, + KVM_REG_ARM_VENDOR_HYP_BIT_PV_LOCK = 2, #ifdef __KERNEL__ KVM_REG_ARM_VENDOR_HYP_BMAP_BIT_COUNT, #endif diff --git a/arch/arm64/kvm/Makefile b/arch/arm64/kvm/Makefile index 5e33c2d4645a..e1f711885916 100644 --- a/arch/arm64/kvm/Makefile +++ b/arch/arm64/kvm/Makefile @@ -10,7 +10,7 @@ include $(srctree)/virt/kvm/Makefile.kvm obj-$(CONFIG_KVM) += kvm.o obj-$(CONFIG_KVM) += hyp/ -kvm-y += arm.o mmu.o mmio.o psci.o hypercalls.o pvtime.o \ +kvm-y += arm.o mmu.o mmio.o psci.o hypercalls.o pvtime.o pvlock.o \ inject_fault.o va_layout.o handle_exit.o \ guest.o debug.o reset.o sys_regs.o stacktrace.o \ vgic-sys-reg-v3.o fpsimd.o pkvm.o \ diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c index 94d33e296e10..73da4ac859fd 100644 --- a/arch/arm64/kvm/arm.c +++ b/arch/arm64/kvm/arm.c @@ -345,6 +345,8 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu) kvm_arm_pvtime_vcpu_init(&vcpu->arch); + kvm_arm_pvlock_preempted_init(&vcpu->arch); + vcpu->arch.hw_mmu = &vcpu->kvm->arch.mmu; err = kvm_vgic_vcpu_init(vcpu); @@ -420,6 +422,10 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) if (vcpu_has_ptrauth(vcpu)) vcpu_ptrauth_disable(vcpu); + + if (kvm_arm_is_pvlock_preempted_ready(&vcpu->arch)) + kvm_update_pvlock_preempted(vcpu, 0); + kvm_arch_vcpu_load_debug_state_flags(vcpu); if (!cpumask_test_cpu(smp_processor_id(), vcpu->kvm->arch.supported_cpus)) @@ -433,6 +439,8 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) if (has_vhe()) kvm_vcpu_put_sysregs_vhe(vcpu); kvm_timer_vcpu_put(vcpu); + if (kvm_arm_is_pvlock_preempted_ready(&vcpu->arch)) + kvm_update_pvlock_preempted(vcpu, 1); kvm_vgic_put(vcpu); kvm_vcpu_pmu_restore_host(vcpu); kvm_arm_vmid_clear_active(); diff --git a/arch/arm64/kvm/hypercalls.c b/arch/arm64/kvm/hypercalls.c index c9f401fa01a9..ec85b4b2a272 100644 --- a/arch/arm64/kvm/hypercalls.c +++ b/arch/arm64/kvm/hypercalls.c @@ -116,6 +116,9 @@ static bool kvm_hvc_call_allowed(struct kvm_vcpu *vcpu, u32 func_id) case ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID: return test_bit(KVM_REG_ARM_VENDOR_HYP_BIT_PTP, &smccc_feat->vendor_hyp_bmap); + case ARM_SMCCC_VENDOR_HYP_KVM_PV_LOCK_FUNC_ID: + return test_bit(KVM_REG_ARM_VENDOR_HYP_BIT_PV_LOCK, + &smccc_feat->vendor_hyp_bmap); default: return kvm_hvc_call_default_allowed(func_id); } @@ -201,6 +204,11 @@ int kvm_hvc_call_handler(struct kvm_vcpu *vcpu) if (gpa != GPA_INVALID) val[0] = gpa; break; + case ARM_SMCCC_VENDOR_HYP_KVM_PV_LOCK_FUNC_ID: + gpa = kvm_init_pvlock(vcpu); + if (gpa != GPA_INVALID) + val[0] = gpa; + break; case ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID: val[0] = ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_0; val[1] = ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_1; diff --git a/arch/arm64/kvm/pvlock.c b/arch/arm64/kvm/pvlock.c new file mode 100644 index 000000000000..3eb35ab31481 --- /dev/null +++ b/arch/arm64/kvm/pvlock.c @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright(c) 2019 Huawei Technologies Co., Ltd + * Author: Zengruan Ye + * Usama Arif + */ + +#include +#include + +#include + +#include + +gpa_t kvm_init_pvlock(struct kvm_vcpu *vcpu) +{ + struct pvlock_vcpu_state init_values = {}; + struct kvm *kvm = vcpu->kvm; + u64 base = vcpu->arch.pv.base; + int idx; + + if (base == GPA_INVALID) + return base; + + idx = srcu_read_lock(&kvm->srcu); + kvm_write_guest(kvm, base, &init_values, sizeof(init_values)); + srcu_read_unlock(&kvm->srcu, idx); + + return base; +} + +void kvm_update_pvlock_preempted(struct kvm_vcpu *vcpu, u64 preempted) +{ + int idx; + u64 offset; + struct kvm *kvm = vcpu->kvm; + u64 base = vcpu->arch.pv.base; + + idx = srcu_read_lock(&kvm->srcu); + offset = offsetof(struct pvlock_vcpu_state, preempted); + kvm_put_guest(kvm, base + offset, cpu_to_le64(preempted)); + srcu_read_unlock(&kvm->srcu, idx); +} diff --git a/tools/arch/arm64/include/uapi/asm/kvm.h b/tools/arch/arm64/include/uapi/asm/kvm.h index 316917b98707..bd05ece5c590 100644 --- a/tools/arch/arm64/include/uapi/asm/kvm.h +++ b/tools/arch/arm64/include/uapi/asm/kvm.h @@ -365,6 +365,7 @@ enum { enum { KVM_REG_ARM_VENDOR_HYP_BIT_FUNC_FEAT = 0, KVM_REG_ARM_VENDOR_HYP_BIT_PTP = 1, + KVM_REG_ARM_VENDOR_HYP_BIT_PV_LOCK = 2, #ifdef __KERNEL__ KVM_REG_ARM_VENDOR_HYP_BMAP_BIT_COUNT, #endif From patchwork Fri Nov 4 06:21:03 2022 Content-Type: text/plain; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id jo13-20020a170903054d00b001867db1d29csi2866847plb.60.2022.11.03.23.22.33; Thu, 03 Nov 2022 23:22:46 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@bytedance-com.20210112.gappssmtp.com header.s=20210112 header.b=RpQOXNrO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=bytedance.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231515AbiKDGVt (ORCPT + 99 others); Fri, 4 Nov 2022 02:21:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50374 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231328AbiKDGVW (ORCPT ); Fri, 4 Nov 2022 02:21:22 -0400 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BD9722A730 for ; Thu, 3 Nov 2022 23:21:19 -0700 (PDT) Received: by mail-wm1-x32c.google.com with SMTP id 5so2445249wmo.1 for ; Thu, 03 Nov 2022 23:21:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bytedance-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+NFek8SyKiRWYHjHtbk8OGDRsRGEQRPyliekwb3dBs0=; b=RpQOXNrO20ME0kIdNBKVxPKf0Z3AKFuxtXg7Kpowlf6wGtNyM1z81ylwdCFeriDUJc siE/bB07/fvJHdC7zDA5R65FrlXN/uEtFtMYUfetI9PpJFMmD8a51QQpxpAkv2pUKmTJ 5GBwq9ilxXBUFckUoyIQf2axWInAGcyLaHI5p50yhdy6hYkdQhErNcZcPDf8MOYrh4IN 8SUZLJQInHIoCzin7R5P3GsIhUS2H+s2CpmdACF2OdTGNTgJSN//kbzhs3Y3NxDfBziW f+pwo3nFiKizpA3oKXUEo6epZdyJ8PUwa6nCUW6+k0GnEVNmo5ysmY6Y7LuIu8paZerB H/mQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+NFek8SyKiRWYHjHtbk8OGDRsRGEQRPyliekwb3dBs0=; b=WyE3Mu0A6cxHibXeSe7yhCS4vG1BwFlXTIvFBNuOZxzQocJjFVUtsvLlIpLcURlK+Z b2XgffEu9X6jNhu7/JWYK6ckgN+xzM5QcUh1ktGOo5rmPwr2zcwifaLBldA49JkQ8pvx jvdu0lD1muRZE8oJmS++Ue1Ba33eSOo7m/cnl104JWez4Pb5SLc2Pgf0yH4wceQ3TLKN E0MUo+W76MTvu3SvLy8QlylhS/1uA8OPtqQmnSykSZms9zM6yBudi7gbS1JiaOdqU3Lm QoQzAsGQ4shlIrHLZnCai+wY/YQMg5VMXlILsMLn9rRmmNdWk/mN6jk+oIV8MDZTWIn2 HEwQ== X-Gm-Message-State: ACrzQf1+X05NPM6krlMyuxa3mhzKBlCOcI/Nx8eEfnx86cHQXRKwB2bg ZQgnSaIr42Pkf16D4dPNii+Alqq3EFi0MA== X-Received: by 2002:a05:600c:468f:b0:3c6:f85c:25a1 with SMTP id p15-20020a05600c468f00b003c6f85c25a1mr21947258wmo.60.1667542877688; Thu, 03 Nov 2022 23:21:17 -0700 (PDT) Received: from usaari01.cust.communityfibre.co.uk ([2a02:6b6a:b4d7:0:c7c:f931:dd4c:1ea6]) by smtp.gmail.com with ESMTPSA id w11-20020a5d608b000000b002366f9bd717sm3099924wrt.45.2022.11.03.23.21.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 23:21:17 -0700 (PDT) From: Usama Arif To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-doc@vger.kernel.org, virtualization@lists.linux-foundation.org, linux@armlinux.org.uk, yezengruan@huawei.com, catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, steven.price@arm.com, mark.rutland@arm.com, bagasdotme@gmail.com Cc: fam.zheng@bytedance.com, liangma@liangbit.com, punit.agrawal@bytedance.com, Usama Arif Subject: [v2 4/6] KVM: arm64: Provide VCPU attributes for PV lock Date: Fri, 4 Nov 2022 06:21:03 +0000 Message-Id: <20221104062105.4119003-5-usama.arif@bytedance.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221104062105.4119003-1-usama.arif@bytedance.com> References: <20221104062105.4119003-1-usama.arif@bytedance.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748545533282776583?= X-GMAIL-MSGID: =?utf-8?q?1748545533282776583?= Allow user space to inform the KVM host where in the physical memory map the paravirtualized lock structures should be located. User space can set an attribute on the VCPU providing the IPA base address of the PV lock structure for that VCPU. This must be repeated for every VCPU in the VM. The address is given in terms of the physical address visible to the guest and must be 64 byte aligned. The guest will discover the address via a hypercall. Signed-off-by: Zengruan Ye Signed-off-by: Usama Arif --- arch/arm64/include/asm/kvm_host.h | 7 ++++ arch/arm64/include/uapi/asm/kvm.h | 2 ++ arch/arm64/kvm/guest.c | 9 +++++ arch/arm64/kvm/pvlock.c | 57 +++++++++++++++++++++++++++++++ include/uapi/linux/kvm.h | 2 ++ 5 files changed, 77 insertions(+) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 18303b30b7e9..86aeca8a4393 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -829,6 +829,13 @@ int kvm_arm_pvtime_get_attr(struct kvm_vcpu *vcpu, int kvm_arm_pvtime_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); +int kvm_arm_pvlock_set_attr(struct kvm_vcpu *vcpu, + struct kvm_device_attr *attr); +int kvm_arm_pvlock_get_attr(struct kvm_vcpu *vcpu, + struct kvm_device_attr *attr); +int kvm_arm_pvlock_has_attr(struct kvm_vcpu *vcpu, + struct kvm_device_attr *attr); + extern unsigned int kvm_arm_vmid_bits; int kvm_arm_vmid_alloc_init(void); void kvm_arm_vmid_alloc_free(void); diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h index bd05ece5c590..71010bacaaab 100644 --- a/arch/arm64/include/uapi/asm/kvm.h +++ b/arch/arm64/include/uapi/asm/kvm.h @@ -412,6 +412,8 @@ enum { #define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1 #define KVM_ARM_VCPU_PVTIME_CTRL 2 #define KVM_ARM_VCPU_PVTIME_IPA 0 +#define KVM_ARM_VCPU_PVLOCK_CTRL 3 +#define KVM_ARM_VCPU_PVLOCK_IPA 0 /* KVM_IRQ_LINE irq field index values */ #define KVM_ARM_IRQ_VCPU2_SHIFT 28 diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c index 2ff13a3f8479..7e765e3256ef 100644 --- a/arch/arm64/kvm/guest.c +++ b/arch/arm64/kvm/guest.c @@ -959,6 +959,9 @@ int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu, case KVM_ARM_VCPU_PVTIME_CTRL: ret = kvm_arm_pvtime_set_attr(vcpu, attr); break; + case KVM_ARM_VCPU_PVLOCK_CTRL: + ret = kvm_arm_pvlock_set_attr(vcpu, attr); + break; default: ret = -ENXIO; break; @@ -982,6 +985,9 @@ int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu, case KVM_ARM_VCPU_PVTIME_CTRL: ret = kvm_arm_pvtime_get_attr(vcpu, attr); break; + case KVM_ARM_VCPU_PVLOCK_CTRL: + ret = kvm_arm_pvlock_get_attr(vcpu, attr); + break; default: ret = -ENXIO; break; @@ -1005,6 +1011,9 @@ int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu, case KVM_ARM_VCPU_PVTIME_CTRL: ret = kvm_arm_pvtime_has_attr(vcpu, attr); break; + case KVM_ARM_VCPU_PVLOCK_CTRL: + ret = kvm_arm_pvlock_has_attr(vcpu, attr); + break; default: ret = -ENXIO; break; diff --git a/arch/arm64/kvm/pvlock.c b/arch/arm64/kvm/pvlock.c index 3eb35ab31481..b08a287a4811 100644 --- a/arch/arm64/kvm/pvlock.c +++ b/arch/arm64/kvm/pvlock.c @@ -41,3 +41,60 @@ void kvm_update_pvlock_preempted(struct kvm_vcpu *vcpu, u64 preempted) kvm_put_guest(kvm, base + offset, cpu_to_le64(preempted)); srcu_read_unlock(&kvm->srcu, idx); } + +int kvm_arm_pvlock_set_attr(struct kvm_vcpu *vcpu, + struct kvm_device_attr *attr) +{ + u64 __user *user = (u64 __user *)attr->addr; + struct kvm *kvm = vcpu->kvm; + u64 ipa; + int ret = 0; + int idx; + + if (attr->attr != KVM_ARM_VCPU_PVLOCK_IPA) + return -ENXIO; + + if (get_user(ipa, user)) + return -EFAULT; + if (!IS_ALIGNED(ipa, 64)) + return -EINVAL; + if (vcpu->arch.pv.base != GPA_INVALID) + return -EEXIST; + + /* Check the address is in a valid memslot */ + idx = srcu_read_lock(&kvm->srcu); + if (kvm_is_error_hva(gfn_to_hva(kvm, ipa >> PAGE_SHIFT))) + ret = -EINVAL; + srcu_read_unlock(&kvm->srcu, idx); + + if (!ret) + vcpu->arch.pv.base = ipa; + + return ret; +} + +int kvm_arm_pvlock_get_attr(struct kvm_vcpu *vcpu, + struct kvm_device_attr *attr) +{ + u64 __user *user = (u64 __user *)attr->addr; + u64 ipa; + + if (attr->attr != KVM_ARM_VCPU_PVLOCK_IPA) + return -ENXIO; + + ipa = vcpu->arch.pv.base; + + if (put_user(ipa, user)) + return -EFAULT; + return 0; +} + +int kvm_arm_pvlock_has_attr(struct kvm_vcpu *vcpu, + struct kvm_device_attr *attr) +{ + switch (attr->attr) { + case KVM_ARM_VCPU_PVLOCK_IPA: + return 0; + } + return -ENXIO; +} \ No newline at end of file diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h index 0d5d4419139a..1fe3cce5c84a 100644 --- a/include/uapi/linux/kvm.h +++ b/include/uapi/linux/kvm.h @@ -1429,6 +1429,8 @@ enum kvm_device_type { #define KVM_DEV_TYPE_XIVE KVM_DEV_TYPE_XIVE KVM_DEV_TYPE_ARM_PV_TIME, #define KVM_DEV_TYPE_ARM_PV_TIME KVM_DEV_TYPE_ARM_PV_TIME + KVM_DEV_TYPE_ARM_PV_LOCK, +#define KVM_DEV_TYPE_ARM_PV_LOCK KVM_DEV_TYPE_ARM_PV_LOCK KVM_DEV_TYPE_MAX, }; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id k2-20020a056a00168200b00562b7ed6bc3si3921484pfc.373.2022.11.03.23.22.41; Thu, 03 Nov 2022 23:22:53 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@bytedance-com.20210112.gappssmtp.com header.s=20210112 header.b=imUXex4A; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=bytedance.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231530AbiKDGVx (ORCPT + 99 others); Fri, 4 Nov 2022 02:21:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50394 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231379AbiKDGVW (ORCPT ); Fri, 4 Nov 2022 02:21:22 -0400 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [IPv6:2a00:1450:4864:20::434]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 323002A725 for ; Thu, 3 Nov 2022 23:21:20 -0700 (PDT) Received: by mail-wr1-x434.google.com with SMTP id w14so5665212wru.8 for ; Thu, 03 Nov 2022 23:21:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bytedance-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xbUgkqdqlP0TXRThV9fNUb23PL+ZSNiv2lV8h+vDI6o=; b=imUXex4ARPKocmDM9ipkZFuRSOQjZGPCh8xCGhXhPFszelxiFFYyzabJtWVOBqRsOn UrXbYxEOedDge+aDjd+JMoQe74wgIAE/Ea0AiiaSAafhUiDs9eWNbgHHUNAec+UGqoZA nabhdH6HPcmnkSxd0xsffa/wZa7MwXCnhRPfhv/6a/wPALBI7yBrUQHYJdQoHPQkMMF6 5jxd2vhLH9BwfRoCPodbrVlU7ta4IP5DRxrtw+n3eG5FOS4e3zgirCjShSh1jjHA3X9I o6uvV9ccxY/7c0V/5qZYHfV68GVxUBXiWyXYjvSoOkoEtKZEYMqWxQsRNuxbJJb6H3n4 vpKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xbUgkqdqlP0TXRThV9fNUb23PL+ZSNiv2lV8h+vDI6o=; b=Hv5pTLzjimZ4+sQU28rPH2FHdkbUO97wpCfB6XIv4agIeeb2GXx4d08AFFggSJtsBa Xe8Rw3JB1xq/iN2cCKdJJw8lxvzsvWdi62AJYBXhH6IZHkxYUHMKLsfGfKaYeXQP/zJ9 bX5UauViCR+YjIKRdFcx+is4Agpv7579lS8S+A6TToaKz4ba/7KPfMzWmmfHVpVVEoJ6 s/u6DV+0nXjuKf/W+or4W8eypmTunDtYVnoUeZF5zXBK4Qr/zPkWaESThIH/JgO2P+IV qNmy4SH0nNInoKhHGFOgG/lupRmS1C5fxg5JMrvPoq3+r9KNwPd3wQiwLaHk2IS03LIh rf/A== X-Gm-Message-State: ACrzQf1c4w/EhvKLeXglR1SCh9B4RiRgoRaOF09/o0zM/t8+8Mj4f9PF LBvXlv1MNOWB7roDZflqjVt9SEOXyNDpOQ== X-Received: by 2002:a05:6000:1201:b0:236:61f4:b384 with SMTP id e1-20020a056000120100b0023661f4b384mr20419434wrx.505.1667542878791; Thu, 03 Nov 2022 23:21:18 -0700 (PDT) Received: from usaari01.cust.communityfibre.co.uk ([2a02:6b6a:b4d7:0:c7c:f931:dd4c:1ea6]) by smtp.gmail.com with ESMTPSA id w11-20020a5d608b000000b002366f9bd717sm3099924wrt.45.2022.11.03.23.21.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 23:21:18 -0700 (PDT) From: Usama Arif To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-doc@vger.kernel.org, virtualization@lists.linux-foundation.org, linux@armlinux.org.uk, yezengruan@huawei.com, catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, steven.price@arm.com, mark.rutland@arm.com, bagasdotme@gmail.com Cc: fam.zheng@bytedance.com, liangma@liangbit.com, punit.agrawal@bytedance.com, Usama Arif Subject: [v2 5/6] KVM: arm64: Support the VCPU preemption check Date: Fri, 4 Nov 2022 06:21:04 +0000 Message-Id: <20221104062105.4119003-6-usama.arif@bytedance.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221104062105.4119003-1-usama.arif@bytedance.com> References: <20221104062105.4119003-1-usama.arif@bytedance.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748545540739040334?= X-GMAIL-MSGID: =?utf-8?q?1748545540739040334?= Support the vcpu_is_preempted() functionality under KVM/arm64. This will enhance lock performance on overcommitted hosts (more runnable VCPUs than physical CPUs in the system) as doing busy waits for preempted VCPUs will hurt system performance far worse than early yielding. Signed-off-by: Zengruan Ye Signed-off-by: Usama Arif --- arch/arm64/include/asm/paravirt.h | 2 + arch/arm64/include/asm/spinlock.h | 16 ++++- arch/arm64/kernel/paravirt.c | 112 ++++++++++++++++++++++++++++++ arch/arm64/kernel/setup.c | 3 + include/linux/cpuhotplug.h | 1 + 5 files changed, 133 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/paravirt.h b/arch/arm64/include/asm/paravirt.h index 9aa193e0e8f2..4ccb4356c56b 100644 --- a/arch/arm64/include/asm/paravirt.h +++ b/arch/arm64/include/asm/paravirt.h @@ -19,10 +19,12 @@ static inline u64 paravirt_steal_clock(int cpu) } int __init pv_time_init(void); +int __init pv_lock_init(void); #else #define pv_time_init() do {} while (0) +#define pv_lock_init() do {} while (0) #endif // CONFIG_PARAVIRT diff --git a/arch/arm64/include/asm/spinlock.h b/arch/arm64/include/asm/spinlock.h index 0525c0b089ed..7023efa4de96 100644 --- a/arch/arm64/include/asm/spinlock.h +++ b/arch/arm64/include/asm/spinlock.h @@ -10,7 +10,20 @@ /* See include/linux/spinlock.h */ #define smp_mb__after_spinlock() smp_mb() +#define vcpu_is_preempted vcpu_is_preempted + +#ifdef CONFIG_PARAVIRT +#include + +bool dummy_vcpu_is_preempted(int cpu); +DECLARE_STATIC_CALL(pv_vcpu_is_preempted, dummy_vcpu_is_preempted); +static inline bool vcpu_is_preempted(int cpu) +{ + return static_call(pv_vcpu_is_preempted)(cpu); +} + +#else /* * Changing this will break osq_lock() thanks to the call inside * smp_cond_load_relaxed(). @@ -18,10 +31,11 @@ * See: * https://lore.kernel.org/lkml/20200110100612.GC2827@hirez.programming.kicks-ass.net */ -#define vcpu_is_preempted vcpu_is_preempted static inline bool vcpu_is_preempted(int cpu) { return false; } +#endif /* CONFIG_PARAVIRT */ + #endif /* __ASM_SPINLOCK_H */ diff --git a/arch/arm64/kernel/paravirt.c b/arch/arm64/kernel/paravirt.c index 57c7c211f8c7..a340f5f4327f 100644 --- a/arch/arm64/kernel/paravirt.c +++ b/arch/arm64/kernel/paravirt.c @@ -20,8 +20,10 @@ #include #include +#include #include #include +#include #include struct static_key paravirt_steal_enabled; @@ -38,7 +40,12 @@ struct pv_time_stolen_time_region { struct pvclock_vcpu_stolen_time __rcu *kaddr; }; +struct pv_lock_state_region { + struct pvlock_vcpu_state __rcu *kaddr; +}; + static DEFINE_PER_CPU(struct pv_time_stolen_time_region, stolen_time_region); +static DEFINE_PER_CPU(struct pv_lock_state_region, lock_state_region); static bool steal_acc = true; static int __init parse_no_stealacc(char *arg) @@ -178,3 +185,108 @@ int __init pv_time_init(void) return 0; } + +static bool native_vcpu_is_preempted(int cpu) +{ + return false; +} + +DEFINE_STATIC_CALL(pv_vcpu_is_preempted, native_vcpu_is_preempted); + +static bool para_vcpu_is_preempted(int cpu) +{ + struct pv_lock_state_region *reg; + __le64 preempted_le; + + reg = per_cpu_ptr(&lock_state_region, cpu); + if (!reg->kaddr) { + pr_warn_once("PV lock enabled but not configured for cpu %d\n", + cpu); + return false; + } + + preempted_le = le64_to_cpu(READ_ONCE(reg->kaddr->preempted)); + + return !!(preempted_le); +} + +static int pvlock_vcpu_state_dying_cpu(unsigned int cpu) +{ + struct pv_lock_state_region *reg; + + reg = this_cpu_ptr(&lock_state_region); + if (!reg->kaddr) + return 0; + + memunmap(reg->kaddr); + memset(reg, 0, sizeof(*reg)); + + return 0; +} + +static int init_pvlock_vcpu_state(unsigned int cpu) +{ + struct pv_lock_state_region *reg; + struct arm_smccc_res res; + + reg = this_cpu_ptr(&lock_state_region); + + arm_smccc_1_1_invoke(ARM_SMCCC_VENDOR_HYP_KVM_PV_LOCK_FUNC_ID, &res); + + if (res.a0 == SMCCC_RET_NOT_SUPPORTED) { + pr_warn("Failed to init PV lock data structure\n"); + return -EINVAL; + } + + reg->kaddr = memremap(res.a0, + sizeof(struct pvlock_vcpu_state), + MEMREMAP_WB); + + if (!reg->kaddr) { + pr_warn("Failed to map PV lock data structure\n"); + return -ENOMEM; + } + + return 0; +} + +static int kvm_arm_init_pvlock(void) +{ + int ret; + + ret = cpuhp_setup_state(CPUHP_AP_ARM_KVM_PVLOCK_STARTING, + "hypervisor/arm/pvlock:starting", + init_pvlock_vcpu_state, + pvlock_vcpu_state_dying_cpu); + if (ret < 0) { + pr_warn("PV-lock init failed\n"); + return ret; + } + + return 0; +} + +static bool has_kvm_pvlock(void) +{ + return kvm_arm_hyp_service_available(ARM_SMCCC_KVM_FUNC_PV_LOCK); +} + +int __init pv_lock_init(void) +{ + int ret; + + if (is_hyp_mode_available()) + return 0; + + if (!has_kvm_pvlock()) + return 0; + + ret = kvm_arm_init_pvlock(); + if (ret) + return ret; + + static_call_update(pv_vcpu_is_preempted, para_vcpu_is_preempted); + pr_info("using PV-lock preempted\n"); + + return 0; +} \ No newline at end of file diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index fea3223704b6..05ca07ac5800 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -42,6 +42,7 @@ #include #include #include +#include #include #include #include @@ -360,6 +361,8 @@ void __init __no_sanitize_address setup_arch(char **cmdline_p) smp_init_cpus(); smp_build_mpidr_hash(); + pv_lock_init(); + /* Init percpu seeds for random tags after cpus are set up. */ kasan_init_sw_tags(); diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h index f61447913db9..c0ee11855c73 100644 --- a/include/linux/cpuhotplug.h +++ b/include/linux/cpuhotplug.h @@ -192,6 +192,7 @@ enum cpuhp_state { /* Must be the last timer callback */ CPUHP_AP_DUMMY_TIMER_STARTING, CPUHP_AP_ARM_XEN_STARTING, + CPUHP_AP_ARM_KVM_PVLOCK_STARTING, CPUHP_AP_ARM_CORESIGHT_STARTING, CPUHP_AP_ARM_CORESIGHT_CTI_STARTING, CPUHP_AP_ARM64_ISNDEP_STARTING, From patchwork Fri Nov 4 06:21:05 2022 Content-Type: text/plain; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id v3-20020a170902ca8300b001869cf73143si2730063pld.314.2022.11.03.23.23.07; Thu, 03 Nov 2022 23:23:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@bytedance-com.20210112.gappssmtp.com header.s=20210112 header.b=zcl272fo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=bytedance.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231539AbiKDGV4 (ORCPT + 99 others); Fri, 4 Nov 2022 02:21:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50548 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231253AbiKDGVa (ORCPT ); Fri, 4 Nov 2022 02:21:30 -0400 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D76012A72D for ; Thu, 3 Nov 2022 23:21:21 -0700 (PDT) Received: by mail-wr1-x431.google.com with SMTP id g12so5636257wrs.10 for ; Thu, 03 Nov 2022 23:21:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bytedance-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lCXwZ5vfNe4SOPsgVDOzi3k6ifSwUdOjW1NH0sg+5rM=; b=zcl272foHL4KaayQq1kq5oJeQSUrmBhZUd7b4kRoVJiQ5379j2ZkkOfI1EwRxRzFbE 8rvWRUY2sP15++X3oRb2vdl6yJGi0+bKBKI6aS3gNmHmrJjKoyDsAQoHcPv8kv5lLrhr +CVusvt/P6/aSZM3mL5e9GYEj9TX3cZIG10RgXGN4aOK1aQZbxs/VQrNJ6Yh01d4SJmw 2j6WPlHvWC98Hi8oBUVjYV06h3Z9xVvnI+/Wk8kTNMg904MfJ9BgQg5j8lew/yNY7m77 M59jT/uKm3xEaphlt/qItM9WVOx7TqB7BRo8gJGkU7ZHLJnEvNi8hmUfQIdffryUu+y6 F4Rg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lCXwZ5vfNe4SOPsgVDOzi3k6ifSwUdOjW1NH0sg+5rM=; b=YVyH32v5NHCuu7V1CIrxhcHpIIkvvibwtBaK0bTF3aqnazCQ0ZPCsDkflyuwaHp3xz +kf+dnwiKxCxVhRJFgVrpnRFuqm5mwP68cewIBBhp5oeOvTB1z2YOZmeK2Z4vfY50mYb 4OAm2IwOognjRkyfoMc4PSWwLF66rNicFWrroMgfcgm5g1SSjLbs9uEV2dcqN+wzb4yy 07NIRSGsLNzPD/lxPaJSYLk3MJFO6AYLlw+oj7XwjUqtgjXKo+/RfLD/gwhH/yU2RnzV pKiv30xmM3mD1xasXsMpR1Dl9y9aApVit0QhggR2F8HNgVdoifg+5Tzj3GkPxv+pq6as xi0Q== X-Gm-Message-State: ACrzQf1hu1ETZMrpFUPaaVbqZBx/Q7b/6SpNoVnanVI73SQV4voVvSfW sSYEqOjy2l4vvS7KyzWkNWOtDVWTp8NogQ== X-Received: by 2002:adf:fe8e:0:b0:236:6860:e55a with SMTP id l14-20020adffe8e000000b002366860e55amr20229508wrr.105.1667542879959; Thu, 03 Nov 2022 23:21:19 -0700 (PDT) Received: from usaari01.cust.communityfibre.co.uk ([2a02:6b6a:b4d7:0:c7c:f931:dd4c:1ea6]) by smtp.gmail.com with ESMTPSA id w11-20020a5d608b000000b002366f9bd717sm3099924wrt.45.2022.11.03.23.21.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 23:21:19 -0700 (PDT) From: Usama Arif To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-doc@vger.kernel.org, virtualization@lists.linux-foundation.org, linux@armlinux.org.uk, yezengruan@huawei.com, catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, steven.price@arm.com, mark.rutland@arm.com, bagasdotme@gmail.com Cc: fam.zheng@bytedance.com, liangma@liangbit.com, punit.agrawal@bytedance.com, Usama Arif Subject: [v2 6/6] KVM: selftests: add tests for PV time specific hypercall Date: Fri, 4 Nov 2022 06:21:05 +0000 Message-Id: <20221104062105.4119003-7-usama.arif@bytedance.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221104062105.4119003-1-usama.arif@bytedance.com> References: <20221104062105.4119003-1-usama.arif@bytedance.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748545569830658405?= X-GMAIL-MSGID: =?utf-8?q?1748545569830658405?= This is a vendor specific hypercall. Signed-off-by: Usama Arif --- tools/testing/selftests/kvm/aarch64/hypercalls.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tools/testing/selftests/kvm/aarch64/hypercalls.c b/tools/testing/selftests/kvm/aarch64/hypercalls.c index a39da3fe4952..c5c304e886a5 100644 --- a/tools/testing/selftests/kvm/aarch64/hypercalls.c +++ b/tools/testing/selftests/kvm/aarch64/hypercalls.c @@ -78,6 +78,8 @@ static const struct test_hvc_info hvc_info[] = { TEST_HVC_INFO(ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID, ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID), TEST_HVC_INFO(ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID, 0), + TEST_HVC_INFO(ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID, + ARM_SMCCC_VENDOR_HYP_KVM_PV_LOCK_FUNC_ID), TEST_HVC_INFO(ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID, KVM_PTP_VIRT_COUNTER), };