From patchwork Mon Sep 18 12:33:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 141409 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:172:b0:3f2:4152:657d with SMTP id h50csp2632080vqi; Mon, 18 Sep 2023 05:51:58 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHqIzKpNPuvjjOwNO00U4tbIsr81HHZd+ouWtmJH/e9zwjfopR9BjPyktsWHrvwkL+EG68u X-Received: by 2002:a17:902:6806:b0:1c3:bc7b:8805 with SMTP id h6-20020a170902680600b001c3bc7b8805mr8233021plk.52.1695041517861; Mon, 18 Sep 2023 05:51:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695041517; cv=none; d=google.com; s=arc-20160816; b=DiSh63xXaQl7y7WbT4LhPxQLYz4kKnLoIs/8DbOqkln0ghNJB20AfS94swQBFXPHOG enpS8SkU+oAz0S8FxlHNVkVnQgltbnFzvj94HSAesdlJWH5+HFUlj3RzLsbM9qKI0MWZ 6xthPh4ZABQNlHrkmgHdOSWfW9xhf56sBAitw+d72SCoSPI/kyEZZWgTLRIB8ZYRH6Uq aY9+lH8mPEV1PZ0zC7Uxc47xdDikJT3QaX6q+1qOL5i94sCIh7GjUlTv+0ZfXoIZPuEs vlFc3rHcuD+7OJi9+N7GTqAojkUix7b8CYZPxI4JEB7RXxCV9jrQ9vaiJJzOpaEInWRQ 00Wg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=DbysLQZwnNazA0BrL/i+qSYFjrcNMe0RpmPtljzV13s=; fh=oXM0czg5SoYo10QBFe6o6qkfMZH0o1pTeg/E2Uw/9D8=; b=QFHdC50MfCP7Cw7UYxpTp9bE6++a+z5ZsN+JEQFPxXFuSbY9JDynvhv5x5PL+8428L ZzNBaNvbFVpNDmESrlxXsstHyUn2tOFgiRgSwwTz87zhh4bYzyFbs/eldZ/IvjtADzCw xnzxHeAxOOX+CotFKY+0Tm+zTWRFII7UI+3HjVE/njegVrIVfVRN7YtdqeV8Rv96ed5n dLlJqod/6kyXxmxyyCZ8K6ABJkvwzzipKLw3OEgA1mb0/jBIDThtUv3QNj+611345z6a +ziEPB1+iNaM+XC75Q1TMSBSZL6fZmSa8nPdWv1LfYinEg0YpbvwIX05RNFbumX1GEy3 N+YA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=renesas.com Received: from lipwig.vger.email (lipwig.vger.email. [2620:137:e000::3:3]) by mx.google.com with ESMTPS id f6-20020a170902684600b001bbb175a81asi6047642pln.263.2023.09.18.05.51.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Sep 2023 05:51:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) client-ip=2620:137:e000::3:3; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=renesas.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id 618DF8082A54; Mon, 18 Sep 2023 05:35:30 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241470AbjIRMe5 (ORCPT + 27 others); Mon, 18 Sep 2023 08:34:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39832 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241517AbjIRMep (ORCPT ); Mon, 18 Sep 2023 08:34:45 -0400 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id D5272E4C; Mon, 18 Sep 2023 05:34:06 -0700 (PDT) X-IronPort-AV: E=Sophos;i="6.02,156,1688396400"; d="scan'208";a="176398360" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 18 Sep 2023 21:34:06 +0900 Received: from localhost.localdomain (unknown [10.226.92.107]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id E14174005E22; Mon, 18 Sep 2023 21:34:02 +0900 (JST) From: Biju Das To: Linus Walleij Cc: Biju Das , Geert Uytterhoeven , Claudiu Beznea , Lad Prabhakar , Marc Zyngier , linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Biju Das Subject: [PATCH 1/2] pinctrl: renesas: rzg2l: Make reverse order of enable() for disable() Date: Mon, 18 Sep 2023 13:33:54 +0100 Message-Id: <20230918123355.262115-2-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230918123355.262115-1-biju.das.jz@bp.renesas.com> References: <20230918123355.262115-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Mon, 18 Sep 2023 05:35:30 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1777379854682208022 X-GMAIL-MSGID: 1777379854682208022 We usually do reverse order of enable() for disable(). Currently, the ordering of irq_chip_disable_parent() is not correct in rzg2l_gpio_irq_disable(). Fix the incorrect order. Fixes: db2e5f21a48e ("pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt") Signed-off-by: Biju Das Tested-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven --- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index 37cdfe4b04f9..2ea6ef99cc70 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -1175,6 +1175,8 @@ static void rzg2l_gpio_irq_disable(struct irq_data *d) u32 port; u8 bit; + irq_chip_disable_parent(d); + port = RZG2L_PIN_ID_TO_PORT(hwirq); bit = RZG2L_PIN_ID_TO_PIN(hwirq); @@ -1189,7 +1191,6 @@ static void rzg2l_gpio_irq_disable(struct irq_data *d) spin_unlock_irqrestore(&pctrl->lock, flags); gpiochip_disable_irq(gc, hwirq); - irq_chip_disable_parent(d); } static void rzg2l_gpio_irq_enable(struct irq_data *d) From patchwork Mon Sep 18 12:33:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 141408 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:172:b0:3f2:4152:657d with SMTP id h50csp2632074vqi; Mon, 18 Sep 2023 05:51:57 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG+XHYivza7ifuG+w91xV6kKLqLO7nm4ZGE3uMr6Pgf+aXizcoqHfDAsxauvC/4f0SlsxSZ X-Received: by 2002:a17:90b:34a:b0:274:8951:b5ed with SMTP id fh10-20020a17090b034a00b002748951b5edmr11586432pjb.20.1695041517058; Mon, 18 Sep 2023 05:51:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695041517; cv=none; d=google.com; s=arc-20160816; b=V0PcodSzXAxHD+HeWXUyKxDoBBo4gFv0nld7J1Ky5WYiCpxTEM8/vGw1UBJJVYwsSM E8MGBN/1trLYq/76LkOy3QGOYVWrA7g+R2KajcWBI7Jo6C/f3xo/AwWxDwpqYn1o8/5Q qbWqC8ozrhZZj+hqStBn6SUKsUy3Y6KRyr9S83kELOAfZLeLceHfCXF0IuW5uZFTab4w aQretkL/08tf3kxhBGvMYckpTVU+vYVE3gn/VSpdaDTn45gaHNmT7eMKOT03/TIqOzzL CJStk4AAo+N8dJVm0PMW2q0oPZzmUzreMAy5IG20UDGdOLska8G7k3zO3hUnSolm17dC qhdg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=gOZQOreO4hID22+O6Y7i2ZqzMaN8GVUEUUGh21X8zb0=; fh=oXM0czg5SoYo10QBFe6o6qkfMZH0o1pTeg/E2Uw/9D8=; b=Ev1nq6TI8sRooKvqcduA9C+q9tNA8qqD2/O2VJdjXauTR68cktq/7lCwmkxNaoK9JS yM0J8utLzS4ToT7JLfFCZmoApxHn/R+IDjC2et99JA6blTOtSx066DzuBRGmzqZIf+U3 N9xhe7fgZ8L64srAsa8C5LcTeRXyJhytXgjeAeMiaARCYkxXWq9x6oeuEq7HEllatQGY A6WoyZsA/pPRMS5pyJbtKEdxyUv0susUkUWhaGXNki4m9Pxr9xegsKP8XHbk2aNIq0RV /13ktbYtMd90rGSKt4TFSQLFr5N7wyGHvCjA7lMnA/ScSYXc64ExzqN+IruSYhFhWigN 6H0g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=renesas.com Received: from lipwig.vger.email (lipwig.vger.email. [23.128.96.33]) by mx.google.com with ESMTPS id s9-20020a17090aad8900b00268414272d1si8126333pjq.156.2023.09.18.05.51.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Sep 2023 05:51:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) client-ip=23.128.96.33; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=renesas.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id CEEF6808A40D; Mon, 18 Sep 2023 05:35:29 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241490AbjIRMe7 (ORCPT + 27 others); Mon, 18 Sep 2023 08:34:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40054 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241618AbjIRMew (ORCPT ); Mon, 18 Sep 2023 08:34:52 -0400 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 6B608DE; Mon, 18 Sep 2023 05:34:10 -0700 (PDT) X-IronPort-AV: E=Sophos;i="6.02,156,1688396400"; d="scan'208";a="176398365" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 18 Sep 2023 21:34:09 +0900 Received: from localhost.localdomain (unknown [10.226.92.107]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 9F6E84005E22; Mon, 18 Sep 2023 21:34:06 +0900 (JST) From: Biju Das To: Linus Walleij Cc: Biju Das , Geert Uytterhoeven , Claudiu Beznea , Lad Prabhakar , Marc Zyngier , linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Biju Das Subject: [PATCH 2/2] pinctrl: renesas: rzg2l: Enable noise filter for GPIO interrupt input Date: Mon, 18 Sep 2023 13:33:55 +0100 Message-Id: <20230918123355.262115-3-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230918123355.262115-1-biju.das.jz@bp.renesas.com> References: <20230918123355.262115-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Mon, 18 Sep 2023 05:35:29 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1777379853418598909 X-GMAIL-MSGID: 1777379853418598909 As per RZ/G2L hardware manual Rev.1.30 section 8.7.3 GPIO Interrupt (TINT) and 41.4.1 Operation for GPIO function, we need to set digital noise filter for GPIO interrupt. This patch enables noise filter for GPIO interrupt in rzg2l_gpio_irq_enable() and disable it in rzg2l_gpio_irq_disable(). Fixes: db2e5f21a48e ("pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt") Signed-off-by: Biju Das Tested-by: Claudiu Beznea --- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index 2ea6ef99cc70..6d3fa962ac97 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -96,6 +96,7 @@ #define PIN(n) (0x0800 + 0x10 + (n)) #define IOLH(n) (0x1000 + (n) * 8) #define IEN(n) (0x1800 + (n) * 8) +#define FILONOFF(n) (0x2080 + (n) * 8) #define ISEL(n) (0x2c80 + (n) * 8) #define PWPR (0x3014) #define SD_CH(n) (0x3000 + (n) * 4) @@ -1169,9 +1170,9 @@ static void rzg2l_gpio_irq_disable(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct rzg2l_pinctrl *pctrl = container_of(gc, struct rzg2l_pinctrl, gpio_chip); + void __iomem *addr, *noise_filter_addr; unsigned int hwirq = irqd_to_hwirq(d); unsigned long flags; - void __iomem *addr; u32 port; u8 bit; @@ -1181,12 +1182,15 @@ static void rzg2l_gpio_irq_disable(struct irq_data *d) bit = RZG2L_PIN_ID_TO_PIN(hwirq); addr = pctrl->base + ISEL(port); + noise_filter_addr = pctrl->base + FILONOFF(port); if (bit >= 4) { bit -= 4; addr += 4; + noise_filter_addr += 4; } spin_lock_irqsave(&pctrl->lock, flags); + writel(readl(noise_filter_addr) & ~BIT(bit * 8), noise_filter_addr); writel(readl(addr) & ~BIT(bit * 8), addr); spin_unlock_irqrestore(&pctrl->lock, flags); @@ -1197,9 +1201,9 @@ static void rzg2l_gpio_irq_enable(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct rzg2l_pinctrl *pctrl = container_of(gc, struct rzg2l_pinctrl, gpio_chip); + void __iomem *addr, *noise_filter_addr; unsigned int hwirq = irqd_to_hwirq(d); unsigned long flags; - void __iomem *addr; u32 port; u8 bit; @@ -1209,13 +1213,16 @@ static void rzg2l_gpio_irq_enable(struct irq_data *d) bit = RZG2L_PIN_ID_TO_PIN(hwirq); addr = pctrl->base + ISEL(port); + noise_filter_addr = pctrl->base + FILONOFF(port); if (bit >= 4) { bit -= 4; addr += 4; + noise_filter_addr += 4; } spin_lock_irqsave(&pctrl->lock, flags); writel(readl(addr) | BIT(bit * 8), addr); + writel(readl(noise_filter_addr) | BIT(bit * 8), noise_filter_addr); spin_unlock_irqrestore(&pctrl->lock, flags); irq_chip_enable_parent(d);