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[78.94.0.51]) by smtp.gmail.com with ESMTPSA id h11-20020a170906854b00b0099ccee57ac2sm875119ejy.194.2023.09.14.04.34.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Sep 2023 04:34:20 -0700 (PDT) From: Naresh Solanki To: Peter Rosin , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Laurent Pinchart Cc: Patrick Rudolph , Naresh Solanki , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/2] dt-bindings: i2c: pca954x: Add custom properties for MAX7357/MAX7358 Date: Thu, 14 Sep 2023 13:34:14 +0200 Message-ID: <20230914113416.1285518-1-naresh.solanki@9elements.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 14 Sep 2023 04:34:33 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1777027230035400682 X-GMAIL-MSGID: 1777055161725597333 From: Patrick Rudolph Both chips have a configuration register to enable additional features. These features aren't enabled by default & its up to board designer to enable the same as it may have unexpected side effects. These should be validated for proper functioning & detection of devices in secondary bus as sometimes it can cause secondary bus being disabled. Add booleans for: - maxim,isolate-stuck-channel - maxim,send-flush-out-sequence - maxim,preconnection-wiggle-test-enable Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki --- Changes in V3: - Update commit message Changes in V2: - Update properties. --- .../bindings/i2c/i2c-mux-pca954x.yaml | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) base-commit: 637f33a4fe864ac8636e22766d67210e801fcd0d diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml index 2d7bb998b0e9..fa73eadfdf7b 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml @@ -71,6 +71,23 @@ properties: description: A voltage regulator supplying power to the chip. On PCA9846 the regulator supplies power to VDD2 (core logic) and optionally to VDD1. + maxim,isolate-stuck-channel: + type: boolean + description: Allows to use non faulty channels while a stuck channel is + isolated from the upstream bus. If not set all channels are isolated from + the upstream bus until the fault is cleared. + + maxim,send-flush-out-sequence: + type: boolean + description: Send a flush-out sequence to stuck auxiliary buses + automatically after a stuck channel is being detected. + + maxim,preconnection-wiggle-test-enable: + type: boolean + description: Send a STOP condition to the auxiliary buses when the switch + register activates a channel to detect a stuck high fault. On fault the + channel is isolated from the upstream bus. + required: - compatible - reg @@ -95,6 +112,20 @@ allOf: "#interrupt-cells": false interrupt-controller: false + - if: + not: + properties: + compatible: + contains: + enum: + - maxim,max7357 + - maxim,max7358 + then: + properties: + maxim,isolate-stuck-channel: false + maxim,send-flush-out-sequence: false + maxim,preconnection-wiggle-test-enable: false + unevaluatedProperties: false examples: From patchwork Thu Sep 14 11:34:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naresh Solanki X-Patchwork-Id: 139849 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:172:b0:3f2:4152:657d with SMTP id h50csp635070vqi; Thu, 14 Sep 2023 14:26:45 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFeigIPH5Qf7YuAGKq4YIQQjhWImvR00XvmEIrXNO+gbvlFPs2kZV2oe/jSlzY14CO7qQdp X-Received: by 2002:a17:902:d512:b0:1c0:bf60:ba4f with SMTP id b18-20020a170902d51200b001c0bf60ba4fmr7347071plg.4.1694726805792; Thu, 14 Sep 2023 14:26:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1694726805; cv=none; d=google.com; s=arc-20160816; b=GMZKMa+3qO6CiXz5rWULJGZUUF0WUKMFJsZGDv7mHK7nqFUJg0Oq4sEXwzd8rsMVVD 2ENwrwR0+6BjiPHYytMJ/Sey5bGc9RZLf0cEsrQ/tXCVWNL3gAaTQYDUaLHIibIJt4WW gf4G1Hd1MCDhRs/bWneHOlqETG0uZup1AE+WgHWFqqhUCGh6EZ1BJ9GcdU+uJc+sSkoF Pgu1am3cL56TLSJeB9vOn9tyKv8BNs41989Tf4u7gbXsoOYF3+x5RW8iNR5LWu4Boj47 f8qBy9A3OqpP64uKISKAB9YmBJoknooFynaMK9VDivIA2TiMM+69HJT/POhNqsEKaa2b RxAg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=lV1vLMgIGx4rvSnOJBSF85XJaepjxLerEmm9st1yuuc=; fh=dziCoGOK45IxncPyCEt5KIp8QEF+WH1/OwO8MRo89q4=; b=Nrf4SPQuvBrsVwEshz+rCFAZYCoI/nMa9axfZhtJOIqxIuNWjqBSr0wAFE7uR05YtQ UqNL3ab/VNaMw31BVolIFX2BkzL7aJP0fbAWE6eqSbUQ9I+10auq1U/voaa0e4tjmqvo SpiHPsjQiGXkBV8DfIcl9gVOFs95Igl5YOASQP11npmqfFQY+s6kHM3uGVIaeyTfrqkQ 2NRP2KxE4H4Sb2m0tmFQD/pvK2SX4W5PzWvNS6LcsI1OriwBtSPImRjBcWitpw/6dz1C mRx/UHVdEtU/ZINbJWESYmkZaoWchMdOuVgDXm/Hhh7ZGOg44gWwHIxNQO0FCp9EYZg/ Olzg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@9elements.com header.s=google header.b=M8jdaMwp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=9elements.com Received: from snail.vger.email (snail.vger.email. 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[78.94.0.51]) by smtp.gmail.com with ESMTPSA id h11-20020a170906854b00b0099ccee57ac2sm875119ejy.194.2023.09.14.04.34.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Sep 2023 04:34:21 -0700 (PDT) From: Naresh Solanki To: Peter Rosin Cc: Patrick Rudolph , Naresh Solanki , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/2] i2c: muxes: pca954x: Enable features on MAX7357/MAX7358 Date: Thu, 14 Sep 2023 13:34:15 +0200 Message-ID: <20230914113416.1285518-2-naresh.solanki@9elements.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230914113416.1285518-1-naresh.solanki@9elements.com> References: <20230914113416.1285518-1-naresh.solanki@9elements.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 14 Sep 2023 04:34:31 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1777049855297912337 X-GMAIL-MSGID: 1777049855297912337 From: Patrick Rudolph Detect that max7357 is being used and run custom init sequence. Enable additional features based on DT settings and unconditionally release the shared interrupt pin after 1.6 seconds and allow to use it as reset. These features aren't enabled by default & its up to board designer to enable the same as it may have unexpected side effects. These should be validated for proper functioning & detection of devices in secondary bus as sometimes it can cause secondary bus being disabled. The init sequence is not run for max7358 that needs to be unlocked first, but that would need the unimplemented function i2c_probe_func_quick_write(). Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki --- Changes in V3: - Delete unused #define - Update pca954x_init - Update commit message Changes in V2: - Update comments - Update check for DT properties --- drivers/i2c/muxes/i2c-mux-pca954x.c | 38 ++++++++++++++++++++++++++++- 1 file changed, 37 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c b/drivers/i2c/muxes/i2c-mux-pca954x.c index 2219062104fb..91c7c1d13c89 100644 --- a/drivers/i2c/muxes/i2c-mux-pca954x.c +++ b/drivers/i2c/muxes/i2c-mux-pca954x.c @@ -57,6 +57,20 @@ #define PCA954X_IRQ_OFFSET 4 +/* + * MAX7357's configuration register is writeable after POR, but + * can be locked by setting the basic mode bit. MAX7358 configuration + * register is locked by default and needs to be unlocked first. + * The configuration register holds the following settings: + */ +#define MAX7357_CONF_INT_ENABLE BIT(0) +#define MAX7357_CONF_FLUSH_OUT BIT(1) +#define MAX7357_CONF_RELEASE_INT BIT(2) +#define MAX7357_CONF_DISCON_SINGLE_CHAN BIT(4) +#define MAX7357_CONF_PRECONNECT_TEST BIT(7) + +#define MAX7357_POR_DEFAULT_CONF BIT(0) + enum pca_type { max_7356, max_7357, @@ -463,6 +477,7 @@ static void pca954x_cleanup(struct i2c_mux_core *muxc) static int pca954x_init(struct i2c_client *client, struct pca954x *data) { + u8 conf = MAX7357_POR_DEFAULT_CONF; int ret; if (data->idle_state >= 0) @@ -470,7 +485,28 @@ static int pca954x_init(struct i2c_client *client, struct pca954x *data) else data->last_chan = 0; /* Disconnect multiplexer */ - ret = i2c_smbus_write_byte(client, data->last_chan); + if (device_is_compatible(&client->dev, "maxim,max7357") && + i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + /* + * The interrupt signal is shared with the reset pin. Release the + * interrupt after 1.6 seconds to allow using the pin as reset. + * The interrupt isn't serviced yet. + */ + conf |= MAX7357_CONF_RELEASE_INT; + + if (device_property_read_bool(&client->dev, "maxim,isolate-stuck-channel")) + conf |= MAX7357_CONF_DISCON_SINGLE_CHAN; + if (device_property_read_bool(&client->dev, "maxim,send-flush-out-sequence")) + conf |= MAX7357_CONF_FLUSH_OUT; + if (device_property_read_bool(&client->dev, + "maxim,preconnection-wiggle-test-enable")) + conf |= MAX7357_CONF_PRECONNECT_TEST; + + ret = i2c_smbus_write_byte_data(client, data->last_chan, conf); + } else { + ret = i2c_smbus_write_byte(client, data->last_chan); + } + if (ret < 0) data->last_chan = 0;