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[93.42.71.18]) by smtp.googlemail.com with ESMTPSA id bt12-20020a056000080c00b00236576c8eddsm957414wrb.12.2022.11.03.06.50.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 06:50:04 -0700 (PDT) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH v2 1/4] clk: qcom: gcc-ipq6018: drop redundant F define Date: Thu, 3 Nov 2022 14:49:41 +0100 Message-Id: <20221103134944.23275-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221103134944.23275-1-ansuelsmth@gmail.com> References: <20221103134944.23275-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748483292175038889?= X-GMAIL-MSGID: =?utf-8?q?1748483292175038889?= The same exact F frequency table entry is defined in clk-rcg.h Drop the redundant define to cleanup code. Signed-off-by: Christian Marangi --- drivers/clk/qcom/gcc-ipq6018.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/clk/qcom/gcc-ipq6018.c b/drivers/clk/qcom/gcc-ipq6018.c index 3f9c2f61a5d9..350ead66914c 100644 --- a/drivers/clk/qcom/gcc-ipq6018.c +++ b/drivers/clk/qcom/gcc-ipq6018.c @@ -26,8 +26,6 @@ #include "clk-regmap-mux.h" #include "reset.h" -#define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } - enum { P_XO, P_BIAS_PLL, From patchwork Thu Nov 3 13:49:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 14889 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp544370wru; Thu, 3 Nov 2022 06:53:23 -0700 (PDT) X-Google-Smtp-Source: AMsMyM42EG5Sm2+GrwuQ/xHUr4rrYgKWTPVI5rKthNg4OydvoKcLnsgHBQixWWf7SbEu522duqEh X-Received: by 2002:a17:906:8a7c:b0:7ad:ad3a:b206 with SMTP id hy28-20020a1709068a7c00b007adad3ab206mr28638226ejc.345.1667483603133; Thu, 03 Nov 2022 06:53:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1667483603; cv=none; d=google.com; s=arc-20160816; b=QMZsRY1CIRmRWDSfO0CcnObI7uhhYk40kJB/8Ipu23koZNC22sAIb5BLeK3Pt/xT3j M1wmisjdL4wf6BB6WW8BLr9HM6i5pYDzWZSokBLYtRCPsNXHsIFpy9LnlDsaCvW7p0pn 6px7wyEkudn17fyVzO68upCPqxCVBFQus/2qjRZuRCwss5Mbp1/AAiGn2vhUxDj9V1yR ZwxHOVpWC0LRK0/l3sB/PJBfZ77IBpuOofDsO2xnP4D6/Ceh+jLa+7UBYH6WGu/nN7Hq qi9puUsVCZrmG2VpyFqPJG0WphFzWobWKH6T5DT1FsrfMqyzXTBo1DmL3QWjVAE6ktgT uEEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=THbX1EhgVaNh83+sx5ydTUKPbkRpoGl3oIFhFRQm/vs=; b=h/O1tK9B1ZIrpQuQH+lwEGiYW9bq0PBYGXvn+4jEm3YaGnQDJYi+wbzPjA3PPA383O rrHdJYnVUlWPBgIkYlgm8oeBc0DYyXXzafwpLrYG6Jww7yaf8bK5FbWQ6AcD22YkxghY v5sm7+YoLHyENKgUjgsnCmn3mAh7b63Ghu+y15jfxtZrLbj/r7PFqiREyt+8uVQhbTXX OGnHrq1smBU49KU6fd2861Zk1LwJZ6N02bad+b/GM/bDjgyJwAJtWZv7fCLAlthiTt5v f0Dw29RY9zTys97mKzqSbSXrhtt01zdwCfAtIGAOC1ch+DgQWZ/t7sNeivhNOJ0LZzCf RlBQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=ajsjzDRC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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[93.42.71.18]) by smtp.googlemail.com with ESMTPSA id bt12-20020a056000080c00b00236576c8eddsm957414wrb.12.2022.11.03.06.50.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 06:50:05 -0700 (PDT) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH v2 2/4] clk: qcom: gcc-sdm660: drop redundant F define Date: Thu, 3 Nov 2022 14:49:42 +0100 Message-Id: <20221103134944.23275-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221103134944.23275-1-ansuelsmth@gmail.com> References: <20221103134944.23275-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748483286910073230?= X-GMAIL-MSGID: =?utf-8?q?1748483286910073230?= The same exact F frequency table entry is defined in clk-rcg.h Drop the redundant define to cleanup code. Signed-off-by: Christian Marangi --- drivers/clk/qcom/gcc-sdm660.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/clk/qcom/gcc-sdm660.c b/drivers/clk/qcom/gcc-sdm660.c index db918c92a522..6afce8e42ede 100644 --- a/drivers/clk/qcom/gcc-sdm660.c +++ b/drivers/clk/qcom/gcc-sdm660.c @@ -25,8 +25,6 @@ #include "reset.h" #include "gdsc.h" -#define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } - enum { P_XO, P_SLEEP_CLK, From patchwork Thu Nov 3 13:49:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 14891 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp544622wru; Thu, 3 Nov 2022 06:53:50 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4SZlajJzDQ61jTDoL7cDjGWrKiHpM0TZ8nf6WRsVBOju1KOUJtmiXbF1Ihn7+XDDoKWKG0 X-Received: by 2002:a17:906:eb09:b0:7ad:d271:e5aa with SMTP id mb9-20020a170906eb0900b007add271e5aamr21427805ejb.182.1667483629965; Thu, 03 Nov 2022 06:53:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1667483629; cv=none; d=google.com; s=arc-20160816; b=h9Avk62TqrTbmwFvsYDAMpfz98yu7cMV2QsPA6W/NbHg3emycIKiBp95EcL4DUxlyH OqTgxjuUmOJEGs8pNnaca079jryLbBF4I+TpJAx8U/EiIwQFiMCCgxtuUWjNVvXBlziL DfOMtLpot76qtP6VO3+ikQiBEsczpYIiZ+fR+84pSWhlCAZlp/vfR1x3Kv+tNbnuyX15 Ri3+qWlWPQcFMdXsE/CoMz2zO58nUoxt4nP4dhvc4PYvsAXLFjlAW6wjoGoxk5IncVBb X0dL7BovPtYYL+5oZhKewtwkU1ZN/5BBIYCz71AZr5nfBW30PWUKhhROof6iAJ/S3EL+ 59Vg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=CyBu08uMqErM+zzJyPRDJRWX5ryfOT/RoKB9om6pnjA=; b=ro5rH4D25B070Hlq+8a+1pjao0n9VpbIbFYq7zF/6csu/ssVnQhLvc5tFGjuRlrukB cEXcOupKQnQFdYTGFFyE95xPppo/1FB9oqTz6kFD0/nRYX5LIaXi0GfOFmGInyYuztQ5 lDpZtNubPTNORrdLMUQZ5kR/q07MhmccRn+xrG9sLdLx3Mx2ZBdNJObZnu6hNMk0rh5L s1dkPXh8U5HZKPFjpCqFFjoNY/X/sbOc6RPTATcni2bgu8b6Im0jwhG0kaAPgtbQ+86p nPH4KYpB5Xsx9j1/rRSLbtyuUqekseAwaz3ZoJMoF0DOkrILV0g23RIHl5idjA7Jgkwq TIug== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=awoHeQm7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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[93.42.71.18]) by smtp.googlemail.com with ESMTPSA id bt12-20020a056000080c00b00236576c8eddsm957414wrb.12.2022.11.03.06.50.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 06:50:06 -0700 (PDT) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi , Robert Marko Subject: [PATCH v2 3/4] clk: qcom: clk-rcg2: introduce support for multiple conf for same freq Date: Thu, 3 Nov 2022 14:49:43 +0100 Message-Id: <20221103134944.23275-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221103134944.23275-1-ansuelsmth@gmail.com> References: <20221103134944.23275-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748483283978446867?= X-GMAIL-MSGID: =?utf-8?q?1748483314384331696?= Some RCG frequency can be reached by multiple configuration. We currently declare multiple configuration for the same frequency but that is not supported and always the first configuration will be taken. These multiple configuration are needed as based on the current parent configuration, it may be needed to use a different configuration to reach the same frequency. To handle this introduce 2 new macro, FM and C. - FM is used to declare an empty freq_tbl with just the frequency and an array of confs to insert all the config for the provided frequency. - C is used to declare a fre_conf where src, pre_div, m and n are provided. The driver is changed to handle this special freq_tbl and select the correct config by calculating the final rate and deciding based on the one that is less different than the requested one. Tested-by: Robert Marko Signed-off-by: Christian Marangi --- drivers/clk/qcom/clk-rcg.h | 14 ++++++- drivers/clk/qcom/clk-rcg2.c | 84 +++++++++++++++++++++++++++++++++---- 2 files changed, 88 insertions(+), 10 deletions(-) diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h index 01581f4d2c39..18f4f7b59f36 100644 --- a/drivers/clk/qcom/clk-rcg.h +++ b/drivers/clk/qcom/clk-rcg.h @@ -7,7 +7,17 @@ #include #include "clk-regmap.h" -#define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } +#define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n), 0, NULL } + +#define FM(_f, _confs) { .freq = (_f), .confs_num = ARRAY_SIZE(_confs), .confs = (_confs) } +#define C(s, h, m, n) { (s), (2 * (h) - 1), (m), (n) } + +struct freq_conf { + u8 src; + u8 pre_div; + u16 m; + u16 n; +}; struct freq_tbl { unsigned long freq; @@ -15,6 +25,8 @@ struct freq_tbl { u8 pre_div; u16 m; u16 n; + int confs_num; + const struct freq_conf *confs; }; /** diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c index 76551534f10d..7d3b59ec2b50 100644 --- a/drivers/clk/qcom/clk-rcg2.c +++ b/drivers/clk/qcom/clk-rcg2.c @@ -209,11 +209,60 @@ clk_rcg2_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) return __clk_rcg2_recalc_rate(hw, parent_rate, cfg); } +static void +clk_rcg2_select_conf(struct clk_hw *hw, struct freq_tbl *f_tbl, + const struct freq_tbl *f, unsigned long req_rate) +{ + unsigned long best_rate = 0, parent_rate, rate; + const struct freq_conf *conf, *best_conf; + struct clk_rcg2 *rcg = to_clk_rcg2(hw); + struct clk_hw *p; + int index, i; + + /* Search in each provided config the one that is near the wanted rate */ + for (i = 0, conf = f->confs; i < f->confs_num; i++, conf++) { + index = qcom_find_src_index(hw, rcg->parent_map, conf->src); + if (index < 0) + continue; + + p = clk_hw_get_parent_by_index(hw, index); + if (!p) + continue; + + parent_rate = clk_hw_get_rate(p); + rate = calc_rate(parent_rate, conf->n, conf->m, conf->n, conf->pre_div); + + if (rate == req_rate) { + best_conf = conf; + break; + } + + if (abs(req_rate - rate) < abs(best_rate - rate)) { + best_rate = rate; + best_conf = conf; + } + } + + /* + * Very unlikely. + * Force the first conf if we can't find a correct config. + */ + if (unlikely(i == f->confs_num)) + best_conf = f->confs; + + /* Apply the config */ + f_tbl->src = best_conf->src; + f_tbl->pre_div = best_conf->pre_div; + f_tbl->m = best_conf->m; + f_tbl->n = best_conf->n; +} + static int _freq_tbl_determine_rate(struct clk_hw *hw, const struct freq_tbl *f, struct clk_rate_request *req, enum freq_policy policy) { unsigned long clk_flags, rate = req->rate; + struct freq_tbl f_tbl; struct clk_hw *p; struct clk_rcg2 *rcg = to_clk_rcg2(hw); int index; @@ -232,7 +281,15 @@ static int _freq_tbl_determine_rate(struct clk_hw *hw, const struct freq_tbl *f, if (!f) return -EINVAL; - index = qcom_find_src_index(hw, rcg->parent_map, f->src); + f_tbl = *f; + /* + * A single freq may be reached by multiple configuration. + * Try to find the bast one if we have this kind of freq_table. + */ + if (f->confs) + clk_rcg2_select_conf(hw, &f_tbl, f, rate); + + index = qcom_find_src_index(hw, rcg->parent_map, f_tbl.src); if (index < 0) return index; @@ -242,18 +299,18 @@ static int _freq_tbl_determine_rate(struct clk_hw *hw, const struct freq_tbl *f, return -EINVAL; if (clk_flags & CLK_SET_RATE_PARENT) { - rate = f->freq; - if (f->pre_div) { + rate = f_tbl.freq; + if (f_tbl.pre_div) { if (!rate) rate = req->rate; rate /= 2; - rate *= f->pre_div + 1; + rate *= f_tbl.pre_div + 1; } - if (f->n) { + if (f_tbl.n) { u64 tmp = rate; - tmp = tmp * f->n; - do_div(tmp, f->m); + tmp = tmp * f_tbl.n; + do_div(tmp, f_tbl.m); rate = tmp; } } else { @@ -261,7 +318,7 @@ static int _freq_tbl_determine_rate(struct clk_hw *hw, const struct freq_tbl *f, } req->best_parent_hw = p; req->best_parent_rate = rate; - req->rate = f->freq; + req->rate = f_tbl.freq; return 0; } @@ -357,6 +414,7 @@ static int __clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate, { struct clk_rcg2 *rcg = to_clk_rcg2(hw); const struct freq_tbl *f; + struct freq_tbl f_tbl; switch (policy) { case FLOOR: @@ -372,7 +430,15 @@ static int __clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate, if (!f) return -EINVAL; - return clk_rcg2_configure(rcg, f); + f_tbl = *f; + /* + * A single freq may be reached by multiple configuration. + * Try to find the best one if we have this kind of freq_table. + */ + if (f->confs) + clk_rcg2_select_conf(hw, &f_tbl, f, rate); + + return clk_rcg2_configure(rcg, &f_tbl); } static int clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate, From patchwork Thu Nov 3 13:49:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 14892 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp544650wru; Thu, 3 Nov 2022 06:53:53 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7LeTPwpzhS+np3kDO1Isj6aazEt0h8Ln2XqBg6Rme5Qj0bdK4FXfRSa/5q2nFOs661LDNW X-Received: by 2002:a17:906:cc4d:b0:7ad:b598:9a53 with SMTP id mm13-20020a170906cc4d00b007adb5989a53mr27007012ejb.480.1667483633612; Thu, 03 Nov 2022 06:53:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1667483633; cv=none; d=google.com; s=arc-20160816; b=VaH7Q6dQyCLuuLklB3J6bmpJjp3OGXL1RFGvZ2LGGJmVM3fOA9CgOCDgzK+dypjemC bIJdgm3bOboLVrBgNl28IqtM5LwErxEfFyJE+Jk9M9oZoKxxxcXUbscY3OIm46Mzdjjd UBhWXUbmP2/Kr25QqoGft1IxAPzOn0M8/UNPvDMKHfha6ZSh1k0rxrCiP5ItPehHjwkQ M5CaZncyzdM+Cv//P0wzy4kH+FxR/LfjUOV7ukrxtS6j5MG5JK3pnX/4Wmiux9XYYnDm qgfBKQ4sAxmhdqIUO+VMSPM2eTeqHh5OMSHio9/coX+huV5faB89xlLwMAUUOg3Ye6Zy DeVA== ARC-Message-Signature: i=1; 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[93.42.71.18]) by smtp.googlemail.com with ESMTPSA id bt12-20020a056000080c00b00236576c8eddsm957414wrb.12.2022.11.03.06.50.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 06:50:07 -0700 (PDT) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi , Robert Marko Subject: [PATCH v2 4/4] clk: qcom: gcc-ipq8074: rework nss_port5/6 clock to multiple conf Date: Thu, 3 Nov 2022 14:49:44 +0100 Message-Id: <20221103134944.23275-5-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221103134944.23275-1-ansuelsmth@gmail.com> References: <20221103134944.23275-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748483318602010017?= X-GMAIL-MSGID: =?utf-8?q?1748483318602010017?= Rework nss_port5/6 to use the new multiple configuration implementation and correctly fix the clocks for these port under some corner case. This is particularly relevant for device that have 2.5G or 10G port connected to port5 or port 6 on ipq8074. As the parent are shared across multiple port it may be required to select the correct configuration to accomplish the desired clock. Without this patch such port doesn't work in some specific ethernet speed as the clock will be set to the wrong frequency as we just select the first configuration for the related frequency instead of selecting the best one. Tested-by: Robert Marko # ipq8074 Qnap QHora-301W Signed-off-by: Christian Marangi --- drivers/clk/qcom/gcc-ipq8074.c | 64 +++++++++++++++++++++++++--------- 1 file changed, 48 insertions(+), 16 deletions(-) diff --git a/drivers/clk/qcom/gcc-ipq8074.c b/drivers/clk/qcom/gcc-ipq8074.c index 42d185fe19c8..02d04a552b78 100644 --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c @@ -1787,13 +1787,21 @@ static struct clk_regmap_div nss_port4_tx_div_clk_src = { }, }; +static const struct freq_conf ftbl_nss_port5_rx_clk_src_25[] = { + C(P_UNIPHY1_RX, 12.5, 0, 0), + C(P_UNIPHY0_RX, 5, 0, 0), +}; + +static const struct freq_conf ftbl_nss_port5_rx_clk_src_125[] = { + C(P_UNIPHY1_RX, 2.5, 0, 0), + C(P_UNIPHY0_RX, 1, 0, 0), +}; + static const struct freq_tbl ftbl_nss_port5_rx_clk_src[] = { F(19200000, P_XO, 1, 0, 0), - F(25000000, P_UNIPHY1_RX, 12.5, 0, 0), - F(25000000, P_UNIPHY0_RX, 5, 0, 0), + FM(25000000, ftbl_nss_port5_rx_clk_src_25), F(78125000, P_UNIPHY1_RX, 4, 0, 0), - F(125000000, P_UNIPHY1_RX, 2.5, 0, 0), - F(125000000, P_UNIPHY0_RX, 1, 0, 0), + FM(125000000, ftbl_nss_port5_rx_clk_src_125), F(156250000, P_UNIPHY1_RX, 2, 0, 0), F(312500000, P_UNIPHY1_RX, 1, 0, 0), { } @@ -1829,13 +1837,21 @@ static struct clk_regmap_div nss_port5_rx_div_clk_src = { }, }; +static struct freq_conf ftbl_nss_port5_tx_clk_src_25[] = { + C(P_UNIPHY1_TX, 12.5, 0, 0), + C(P_UNIPHY0_TX, 5, 0, 0), +}; + +static struct freq_conf ftbl_nss_port5_tx_clk_src_125[] = { + C(P_UNIPHY1_TX, 2.5, 0, 0), + C(P_UNIPHY0_TX, 1, 0, 0), +}; + static const struct freq_tbl ftbl_nss_port5_tx_clk_src[] = { F(19200000, P_XO, 1, 0, 0), - F(25000000, P_UNIPHY1_TX, 12.5, 0, 0), - F(25000000, P_UNIPHY0_TX, 5, 0, 0), + FM(25000000, ftbl_nss_port5_tx_clk_src_25), F(78125000, P_UNIPHY1_TX, 4, 0, 0), - F(125000000, P_UNIPHY1_TX, 2.5, 0, 0), - F(125000000, P_UNIPHY0_TX, 1, 0, 0), + FM(125000000, ftbl_nss_port5_tx_clk_src_125), F(156250000, P_UNIPHY1_TX, 2, 0, 0), F(312500000, P_UNIPHY1_TX, 1, 0, 0), { } @@ -1871,13 +1887,21 @@ static struct clk_regmap_div nss_port5_tx_div_clk_src = { }, }; +static struct freq_conf ftbl_nss_port6_rx_clk_src_25[] = { + C(P_UNIPHY2_RX, 5, 0, 0), + C(P_UNIPHY2_RX, 12.5, 0, 0), +}; + +static struct freq_conf ftbl_nss_port6_rx_clk_src_125[] = { + C(P_UNIPHY2_RX, 1, 0, 0), + C(P_UNIPHY2_RX, 2.5, 0, 0), +}; + static const struct freq_tbl ftbl_nss_port6_rx_clk_src[] = { F(19200000, P_XO, 1, 0, 0), - F(25000000, P_UNIPHY2_RX, 5, 0, 0), - F(25000000, P_UNIPHY2_RX, 12.5, 0, 0), + FM(25000000, ftbl_nss_port6_rx_clk_src_25), F(78125000, P_UNIPHY2_RX, 4, 0, 0), - F(125000000, P_UNIPHY2_RX, 1, 0, 0), - F(125000000, P_UNIPHY2_RX, 2.5, 0, 0), + FM(125000000, ftbl_nss_port6_rx_clk_src_125), F(156250000, P_UNIPHY2_RX, 2, 0, 0), F(312500000, P_UNIPHY2_RX, 1, 0, 0), { } @@ -1913,13 +1937,21 @@ static struct clk_regmap_div nss_port6_rx_div_clk_src = { }, }; +static struct freq_conf ftbl_nss_port6_tx_clk_src_25[] = { + C(P_UNIPHY2_TX, 5, 0, 0), + C(P_UNIPHY2_TX, 12.5, 0, 0), +}; + +static struct freq_conf ftbl_nss_port6_tx_clk_src_125[] = { + C(P_UNIPHY2_TX, 1, 0, 0), + C(P_UNIPHY2_TX, 2.5, 0, 0), +}; + static const struct freq_tbl ftbl_nss_port6_tx_clk_src[] = { F(19200000, P_XO, 1, 0, 0), - F(25000000, P_UNIPHY2_TX, 5, 0, 0), - F(25000000, P_UNIPHY2_TX, 12.5, 0, 0), + FM(25000000, ftbl_nss_port6_tx_clk_src_25), F(78125000, P_UNIPHY2_TX, 4, 0, 0), - F(125000000, P_UNIPHY2_TX, 1, 0, 0), - F(125000000, P_UNIPHY2_TX, 2.5, 0, 0), + FM(125000000, ftbl_nss_port6_tx_clk_src_125), F(156250000, P_UNIPHY2_TX, 2, 0, 0), F(312500000, P_UNIPHY2_TX, 1, 0, 0), { }