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[8.43.85.97]) by mx.google.com with ESMTPS id oz9-20020a170906cd0900b0099caf6c083csi834438ejb.1044.2023.09.08.00.52.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Sep 2023 00:52:47 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C60ED3857713 for ; Fri, 8 Sep 2023 07:52:40 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbgbr2.qq.com (smtpbgbr2.qq.com [54.207.22.56]) by sourceware.org (Postfix) with ESMTPS id 04D6C3858D1E for ; Fri, 8 Sep 2023 07:52:14 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 04D6C3858D1E Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp80t1694159526tm27fux8 Received: from rios-cad121.hadoop.rioslab.org ( [58.60.1.9]) by bizesmtp.qq.com (ESMTP) with id ; Fri, 08 Sep 2023 15:52:05 +0800 (CST) X-QQ-SSF: 01400000000000G0V000000A0000000 X-QQ-GoodBg: 2 X-BIZMAIL-ID: 7027394372155287898 From: Juzhe-Zhong To: gcc-patches@gcc.gnu.org Subject: [PATCH] RISC-V: Fix incorrect nregs calculation for VLS modes Date: Fri, 8 Sep 2023 15:52:03 +0800 Message-Id: <20230908075203.2597443-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz7a-one-0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kito.cheng@sifive.com, kito.cheng@gmail.com, Juzhe-Zhong Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1776455062077857295 X-GMAIL-MSGID: 1776455062077857295 This patch fixes obvious bug: TARGET_MIN_VLEN is bitsize. All these following bugs are fixed with this patch: FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O0 (internal compiler error: in gen_reg_rtx, at emit-rtl.cc:1176) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O0 (test for excess errors) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O1 (internal compiler error: in gen_reg_rtx, at emit-rtl.cc:1176) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O1 (test for excess errors) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O2 (internal compiler error: in gen_reg_rtx, at emit-rtl.cc:1176) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O2 (test for excess errors) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O2 -flto -fno-use-linker-plugin -flto-partition=none (internal compiler error: in gen_reg_rtx, at emit-rtl.cc:1176) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O2 -flto -fno-use-linker-plugin -flto-partition=none (test for excess errors) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O2 -flto -fuse-linker-plugin -fno-fat-lto-objects (internal compiler error: in gen_reg_rtx, at emit-rtl.cc:1176) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O2 -flto -fuse-linker-plugin -fno-fat-lto-objects (test for excess errors) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O3 -g (internal compiler error: in gen_reg_rtx, at emit-rtl.cc:1176) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O3 -g (test for excess errors) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -Os (internal compiler error: in gen_reg_rtx, at emit-rtl.cc:1176) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -Os (test for excess errors) FAIL: gcc.target/riscv/rvv/base/mov-13.c (internal compiler error: in partial_subreg_p, at rtl.h:3186) FAIL: gcc.target/riscv/rvv/base/mov-13.c (test for excess errors) FAIL: gcc.target/riscv/rvv/base/spill-1.c (internal compiler error: in partial_subreg_p, at rtl.h:3186) FAIL: gcc.target/riscv/rvv/base/spill-1.c (test for excess errors) FAIL: gcc.target/riscv/rvv/base/spill-2.c (internal compiler error: in partial_subreg_p, at rtl.h:3186) FAIL: gcc.target/riscv/rvv/base/spill-2.c (test for excess errors) FAIL: gcc.target/riscv/rvv/base/spill-3.c (internal compiler error: in partial_subreg_p, at rtl.h:3186) FAIL: gcc.target/riscv/rvv/base/spill-3.c (test for excess errors) FAIL: gcc.target/riscv/rvv/base/spill-4.c (internal compiler error: in partial_subreg_p, at rtl.h:3186) FAIL: gcc.target/riscv/rvv/base/spill-4.c (test for excess errors) FAIL: gcc.target/riscv/rvv/base/spill-5.c (internal compiler error: in partial_subreg_p, at rtl.h:3186) FAIL: gcc.target/riscv/rvv/base/spill-5.c (test for excess errors) FAIL: gcc.target/riscv/rvv/base/spill-6.c (internal compiler error: in partial_subreg_p, at rtl.h:3186) FAIL: gcc.target/riscv/rvv/base/spill-6.c (test for excess errors) FAIL: gcc.target/riscv/rvv/base/spill-sp-adjust.c (internal compiler error: in partial_subreg_p, at rtl.h:3186) FAIL: gcc.target/riscv/rvv/base/spill-sp-adjust.c (test for excess errors) gcc/ChangeLog: * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug. --- gcc/config/riscv/riscv.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index c0c9c990a23..9f0c8bbe9ed 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -7548,7 +7548,7 @@ riscv_hard_regno_nregs (unsigned int regno, machine_mode mode) /* For VLS modes, we allocate registers according to TARGET_MIN_VLEN. */ if (riscv_v_ext_vls_mode_p (mode)) { - int size = GET_MODE_SIZE (mode).to_constant (); + int size = GET_MODE_BITSIZE (mode).to_constant (); if (size < TARGET_MIN_VLEN) return 1; else