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dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp63t1694095560te5kcemh Received: from rios-cad122.hadoop.rioslab.org ( [58.60.1.26]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 07 Sep 2023 22:05:59 +0800 (CST) X-QQ-SSF: 01400000000000G0V000000A0000000 X-QQ-FEAT: RrZlkntZBfknWcBA1NtJ3MaYiM+KlwCesp7hdQE1m/dZGvN85g5rlyXU7itd8 gRQzU5rNFT5lKUgryVCiepkKGTCSvnJpvaaOZuULV3BsUd74VYvPIEBMuzQGrYF7IHFKgi0 447cmtNjaP6NH1NcA/zt9tl2m7FcuYZs8zI/jOsVZ7LFam45oU3xXT9dKhDgn67dcmM4Nds S98wzZTw41oFlzqrYxxzT2YO/D42z0lRdCv1icjjnzM+BOAbHSjpVU5oh22HeicOoTrHgod y3qwj5qM4eZEZjijCYthW4Zmtf1XvLNEN0YNHwUmHMgGhbJx9oywKuLAy/p1Gecn4v6I5Ga bAKxyf34SkXRUSml/v1HdT3QDvdSK6ZySAECXEdXs3KChZnfLaaVMUe5TrjWO/oMyl2trPV EyCTg3lwS+Q= X-QQ-GoodBg: 2 X-BIZMAIL-ID: 8270783844786197553 From: Juzhe-Zhong To: gcc-patches@gcc.gnu.org Subject: [PATCH] RISC-V: Replace rtx REG for zero REGS operations Date: Thu, 7 Sep 2023 22:05:57 +0800 Message-Id: <20230907140557.3378043-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz7a-one-0 X-Spam-Status: No, score=-10.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_PASS, TXREP, T_SPF_HELO_TEMPERROR autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kito.cheng@sifive.com, kito.cheng@gmail.com, Juzhe-Zhong Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1776387991646893439 X-GMAIL-MSGID: 1776387991646893439 This patch fixes these following FAILs: FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O0 (internal compiler error: in gen_reg_rtx, at emit-rtl.cc:1176) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O0 (test for excess errors) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O1 (internal compiler error: in gen_reg_rtx, at emit-rtl.cc:1176) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O1 (test for excess errors) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O2 (internal compiler error: in gen_reg_rtx, at emit-rtl.cc:1176) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O2 (test for excess errors) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O2 -flto -fno-use-linker-plugin -flto-partition=none (internal compiler error: in gen_reg_rtx, at emit-rtl.cc:1176) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O2 -flto -fno-use-linker-plugin -flto-partition=none (test for excess errors) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O2 -flto -fuse-linker-plugin -fno-fat-lto-objects (internal compiler error: in gen_reg_rtx, at emit-rtl.cc:1176) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O2 -flto -fuse-linker-plugin -fno-fat-lto-objects (test for excess errors) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O3 -g (internal compiler error: in gen_reg_rtx, at emit-rtl.cc:1176) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -O3 -g (test for excess errors) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -Os (internal compiler error: in gen_reg_rtx, at emit-rtl.cc:1176) FAIL: gcc.target/riscv/zero-scratch-regs-3.c -Os (test for excess errors) These FAILs because regno_reg_rtx[regno] is VLS mode in some regno which is not VLMAX AVL gcc/ChangeLog: * config/riscv/riscv.cc (vector_zero_call_used_regs): Fix bug. --- gcc/config/riscv/riscv.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index a3d3389e7e2..c0c9c990a23 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -8998,7 +8998,7 @@ vector_zero_call_used_regs (HARD_REG_SET need_zeroed_hardregs) { if (TEST_HARD_REG_BIT (need_zeroed_hardregs, regno)) { - rtx target = regno_reg_rtx[regno]; + rtx target = gen_rtx_REG (RVVM1SImode, regno); machine_mode mode = GET_MODE (target); if (!emitted_vlmax_vsetvl)