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[8.43.85.97]) by mx.google.com with ESMTPS id d14-20020a056402516e00b0052376a808d2si5280411ede.85.2023.08.30.03.15.28 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Aug 2023 03:15:28 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=fail header.i=@vrull.eu header.s=google header.b=Myjnpc1G; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 2D2FB3857C43 for ; Wed, 30 Aug 2023 10:14:58 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by sourceware.org (Postfix) with ESMTPS id 4E1D03858C39 for ; Wed, 30 Aug 2023 10:14:25 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4E1D03858C39 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=vrull.eu Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=vrull.eu Received: by mail-lf1-x12e.google.com with SMTP id 2adb3069b0e04-500a398cda5so8621259e87.0 for ; Wed, 30 Aug 2023 03:14:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vrull.eu; s=google; t=1693390463; x=1693995263; darn=gcc.gnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VhckYUyuVVDE3glB/lB+PDOKLZuFHiqeALfsEidKqLo=; b=Myjnpc1GaEnsiqhUFbewzyKwgPgdS4GBICFB5G04qB7IqkvEwDBPTm/Cj+esKjvbF2 F4wFHJEG6UvXliY2WNSxftuwSpaMdad0mlQp0qjZPOyWbznGBQ1KBrJZqKCkli/gZmxU KrgSC5Fe4NEjPm/OTD/5R+zfwmWGTkWsjPea6wH4pU+VsRJtuuTiI2Xn+viFVN4Ci93D 5WC9zPLHHLt/JjQQQFQDbkbBdxf4ikcmspoXpPTXGlx20WnE3zmEqPpWWWgcKbAZxrd0 VHmzXPV4zTgUihLTWgzu25305duCc/uxv7HEowl366X0vMHrC3NXIlXLw+ggAv/b40Gc D4mQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1693390463; x=1693995263; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VhckYUyuVVDE3glB/lB+PDOKLZuFHiqeALfsEidKqLo=; b=BOWyRVxnu0mJZd5jjafth/0ezclca5klHYA5xftRCWXd1V8W+2MVpPOMm7nSOeSSRy 818PHcIZUGu3vHtXz5vSsmMxzF3rpfD/dAAwz7mipsCz2KwBf5bnS2aGnXdsp0gHbJl9 6EeghexbSDdHBCxxn4Xr30t2OYLXglgfCtK9167Ew4Ywtgxv8zQltsz7KJh1SW2IiwBd mQ3vH/2V7U5w9nnoKuxHxY0n+TN9GMFRu3+5/fBkHtnEew+MDfy2yuUyQhbD/7/Jbbjs L6nhpM8Msk6/gOE8u1/p5gQi+TIujZqDkwNDisPX7yA3dh1szO1G/No/UeQ0TRyVtGKB 1DJw== X-Gm-Message-State: AOJu0Yxud21gCSIt2SsvzOIwJv/XjVQdSDNllUMJhvZBHkgcqYxEO+pp nKq1xuu+iHl9A5RahlB12Yi4pnwzgtw9ch9fw+AK9w== X-Received: by 2002:ac2:4ec7:0:b0:4f8:631b:bf77 with SMTP id p7-20020ac24ec7000000b004f8631bbf77mr1087419lfr.22.1693390463331; Wed, 30 Aug 2023 03:14:23 -0700 (PDT) Received: from helsinki-03.engr ([2a01:4f9:6b:2a47::2]) by smtp.gmail.com with ESMTPSA id w7-20020a19c507000000b004fe36e673b8sm2327579lfe.178.2023.08.30.03.14.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Aug 2023 03:14:22 -0700 (PDT) From: Manolis Tsamis To: gcc-patches@gcc.gnu.org Subject: [PATCH v3 1/4] ifcvt: handle sequences that clobber flags in noce_convert_multiple_sets Date: Wed, 30 Aug 2023 12:13:57 +0200 Message-Id: <20230830101400.1539313-2-manolis.tsamis@vrull.eu> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230830101400.1539313-1-manolis.tsamis@vrull.eu> References: <20230830101400.1539313-1-manolis.tsamis@vrull.eu> MIME-Version: 1.0 X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, JMQ_SPF_NEUTRAL, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jakub Jelinek , Richard Sandiford Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1775648666983475928 X-GMAIL-MSGID: 1775648666983475928 This is an extension of what was done in PR106590. Currently if a sequence generated in noce_convert_multiple_sets clobbers the condition rtx (cc_cmp or rev_cc_cmp) then only seq1 is used afterwards (sequences that emit the comparison itself). Since this applies only from the next iteration it assumes that the sequences generated (in particular seq2) doesn't clobber the condition rtx itself before using it in the if_then_else, which is only true in specific cases (currently only register/subregister moves are allowed). This patch changes this so it also tests if seq2 clobbers cc_cmp/rev_cc_cmp in the current iteration. This makes it possible to include arithmetic operations in noce_convert_multiple_sets. gcc/ChangeLog: * ifcvt.cc (check_for_cc_cmp_clobbers): Use modified_in_p instead. (noce_convert_multiple_sets_1): Don't use seq2 if it clobbers cc_cmp. Signed-off-by: Manolis Tsamis --- (no changes since v1) gcc/ifcvt.cc | 49 +++++++++++++++++++------------------------------ 1 file changed, 19 insertions(+), 30 deletions(-) diff --git a/gcc/ifcvt.cc b/gcc/ifcvt.cc index a0af553b9ff..3273aeca125 100644 --- a/gcc/ifcvt.cc +++ b/gcc/ifcvt.cc @@ -3375,20 +3375,6 @@ noce_convert_multiple_sets (struct noce_if_info *if_info) return true; } -/* Helper function for noce_convert_multiple_sets_1. If store to - DEST can affect P[0] or P[1], clear P[0]. Called via note_stores. */ - -static void -check_for_cc_cmp_clobbers (rtx dest, const_rtx, void *p0) -{ - rtx *p = (rtx *) p0; - if (p[0] == NULL_RTX) - return; - if (reg_overlap_mentioned_p (dest, p[0]) - || (p[1] && reg_overlap_mentioned_p (dest, p[1]))) - p[0] = NULL_RTX; -} - /* This goes through all relevant insns of IF_INFO->then_bb and tries to create conditional moves. In case a simple move sufficis the insn should be listed in NEED_NO_CMOV. The rewired-src cases should be @@ -3552,9 +3538,17 @@ noce_convert_multiple_sets_1 (struct noce_if_info *if_info, creating an additional compare for each. If successful, costing is easier and this sequence is usually preferred. */ if (cc_cmp) - seq2 = try_emit_cmove_seq (if_info, temp, cond, - new_val, old_val, need_cmov, - &cost2, &temp_dest2, cc_cmp, rev_cc_cmp); + { + seq2 = try_emit_cmove_seq (if_info, temp, cond, + new_val, old_val, need_cmov, + &cost2, &temp_dest2, cc_cmp, rev_cc_cmp); + + /* The if_then_else in SEQ2 may be affected when cc_cmp/rev_cc_cmp is + clobbered. We can't safely use the sequence in this case. */ + if (seq2 && (modified_in_p (cc_cmp, seq2) + || (rev_cc_cmp && modified_in_p (rev_cc_cmp, seq2)))) + seq2 = NULL; + } /* The backend might have created a sequence that uses the condition. Check this. */ @@ -3609,21 +3603,16 @@ noce_convert_multiple_sets_1 (struct noce_if_info *if_info, return false; } - if (cc_cmp) + if (cc_cmp && seq == seq1) { - /* Check if SEQ can clobber registers mentioned in - cc_cmp and/or rev_cc_cmp. If yes, we need to use - only seq1 from that point on. */ - rtx cc_cmp_pair[2] = { cc_cmp, rev_cc_cmp }; - for (walk = seq; walk; walk = NEXT_INSN (walk)) + /* Check if SEQ can clobber registers mentioned in cc_cmp/rev_cc_cmp. + If yes, we need to use only seq1 from that point on. + Only check when we use seq1 since we have already tested seq2. */ + if (modified_in_p (cc_cmp, seq) + || (rev_cc_cmp && modified_in_p (rev_cc_cmp, seq))) { - note_stores (walk, check_for_cc_cmp_clobbers, cc_cmp_pair); - if (cc_cmp_pair[0] == NULL_RTX) - { - cc_cmp = NULL_RTX; - rev_cc_cmp = NULL_RTX; - break; - } + cc_cmp = NULL_RTX; + rev_cc_cmp = NULL_RTX; } } From patchwork Wed Aug 30 10:13:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manolis Tsamis X-Patchwork-Id: 137164 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a7d1:0:b0:3f2:4152:657d with SMTP id p17csp4441528vqm; Wed, 30 Aug 2023 03:16:08 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGB8F8osZ0N/4rS8PbIhQljVQu3JVvC/9zoxV4qeJcNWIhD6QK+hFLaHcdXBd6iySYkHue6 X-Received: by 2002:a17:906:73c4:b0:9a5:c79f:bed4 with SMTP id n4-20020a17090673c400b009a5c79fbed4mr1199528ejl.8.1693390567762; Wed, 30 Aug 2023 03:16:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1693390567; cv=none; d=google.com; s=arc-20160816; b=D9ApREo3vGnW7p9KJrK3+WNUP6tckZQBLxVnN3/yGwjB4TeXINkG7ftNBVugLrpIUM Ik1SdTXb2h51HkAtPzdF4cxFGyNwdsCI0FquIr0r9p1wGDo1aQBX8xJQAZcqbAEHRzcS FWXcK49XZBLQBsqPPJSEhn5LAqONTuDiKdWpaISGzDmMjDBOXfg+rgfIopEqJtuRK4ob 5Fc41B9qrdiY3jieCrAlggdySTKLy0XI7MBtiPGxa5sCPjOhlbA4wEHng1xVwWLUYnGE 7yXGOHkS3InmatWp+ZG/HBd6sykEfc2SvvdLP2ZAmb9FQ7NVZ2doejgTAIgr8BbZPH6R zXpw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature:dmarc-filter:delivered-to; bh=EdvjH/CPUEM+oqwsKsE4qN2wj4+iJ6OkD5HUkdlFZV0=; fh=woiY3K3H7Cf0yJyo65+kvTYqCFQ1uf3TZPnMDzMwLaw=; b=hz4Xfddy0flXU+/Yp4ik278bCYQHqtBti/kxQw3zfIYjq4m8ZVXRiPOatvGvyQyMql ggTUjIWmSBq20rWhnT3v57V0ydY+9QJyQgeHT6bLSgiHiT87veyRO4CzmCKx8SNZiGp7 YKTrbb9Aat8k/0HyelmXZExY8ahGATIbdZ1d9QMzZQvlS6UiSF6cWfmXabAEEob/7JZq 6l3ivbYTuvQwnE/VwLPvIB0XV7gsntTX/9ZL8djCIiyIcpUEf4UIICz3M9q8sChVfIPh WgHG/tIh/qMlnvVOeac40iUZBZ/YOLD+BNQddqkk9b3aU6Bb3tQRRQwFSUCsdT5Yatcn vc8A== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@vrull.eu header.s=google header.b=T8ZNb+qy; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (server2.sourceware.org. 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This commit allows more operations (arithmetic, compare, etc) to participate in if conversion. The target's profitability hook and ifcvt's costing is expected to reject sequences that are unprofitable. This is especially useful for targets which provide a rich selection of conditional instructions (like aarch64 which has cinc, csneg, csinv, ccmp, ...) which are currently not used in basic blocks with more than a single set. gcc/ChangeLog: * ifcvt.cc (try_emit_cmove_seq): Modify comments. (noce_convert_multiple_sets_1): Modify comments. (bb_ok_for_noce_convert_multiple_sets): Allow more operations. gcc/testsuite/ChangeLog: * gcc.target/aarch64/ifcvt_multiple_sets_arithm.c: New test. Signed-off-by: Manolis Tsamis --- Changes in v3: - Add SCALAR_INT_MODE_P check in bb_ok_for_noce_convert_multiple_sets. - Allow rewiring of multiple regs. - Refactor code with noce_multiple_sets_info. - Remove old code for subregs. gcc/ifcvt.cc | 63 ++++++++++----- .../aarch64/ifcvt_multiple_sets_arithm.c | 79 +++++++++++++++++++ 2 files changed, 123 insertions(+), 19 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_arithm.c diff --git a/gcc/ifcvt.cc b/gcc/ifcvt.cc index 3273aeca125..efe8ab1577a 100644 --- a/gcc/ifcvt.cc +++ b/gcc/ifcvt.cc @@ -3215,13 +3215,13 @@ try_emit_cmove_seq (struct noce_if_info *if_info, rtx temp, /* We have something like: if (x > y) - { i = a; j = b; k = c; } + { i = EXPR_A; j = EXPR_B; k = EXPR_C; } Make it: - tmp_i = (x > y) ? a : i; - tmp_j = (x > y) ? b : j; - tmp_k = (x > y) ? c : k; + tmp_i = (x > y) ? EXPR_A : i; + tmp_j = (x > y) ? EXPR_B : j; + tmp_k = (x > y) ? EXPR_C : k; i = tmp_i; j = tmp_j; k = tmp_k; @@ -3637,11 +3637,10 @@ noce_convert_multiple_sets_1 (struct noce_if_info *if_info, -/* Return true iff basic block TEST_BB is comprised of only - (SET (REG) (REG)) insns suitable for conversion to a series - of conditional moves. Also check that we have more than one set - (other routines can handle a single set better than we would), and - fewer than PARAM_MAX_RTL_IF_CONVERSION_INSNS sets. While going +/* Return true iff basic block TEST_BB is suitable for conversion to a + series of conditional moves. Also check that we have more than one + set (other routines can handle a single set better than we would), + and fewer than PARAM_MAX_RTL_IF_CONVERSION_INSNS sets. While going through the insns store the sum of their potential costs in COST. */ static bool @@ -3667,20 +3666,46 @@ bb_ok_for_noce_convert_multiple_sets (basic_block test_bb, unsigned *cost) rtx dest = SET_DEST (set); rtx src = SET_SRC (set); - /* We can possibly relax this, but for now only handle REG to REG - (including subreg) moves. This avoids any issues that might come - from introducing loads/stores that might violate data-race-freedom - guarantees. */ - if (!REG_P (dest)) + /* Do not handle anything involving memory loads/stores since it might + violate data-race-freedom guarantees. */ + if (!REG_P (dest) || contains_mem_rtx_p (src)) + return false; + + if (!SCALAR_INT_MODE_P (GET_MODE (src))) return false; - if (!((REG_P (src) || CONSTANT_P (src)) - || (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src)) - && subreg_lowpart_p (src)))) + /* Allow a wide range of operations and let the costing function decide + if the conversion is worth it later. */ + enum rtx_code code = GET_CODE (src); + if (!(CONSTANT_P (src) + || code == REG + || code == SUBREG + || code == ZERO_EXTEND + || code == SIGN_EXTEND + || code == NOT + || code == NEG + || code == PLUS + || code == MINUS + || code == AND + || code == IOR + || code == MULT + || code == ASHIFT + || code == ASHIFTRT + || code == NE + || code == EQ + || code == GE + || code == GT + || code == LE + || code == LT + || code == GEU + || code == GTU + || code == LEU + || code == LTU + || code == COMPARE)) return false; - /* Destination must be appropriate for a conditional write. */ - if (!noce_operand_ok (dest)) + /* Destination and source must be appropriate. */ + if (!noce_operand_ok (dest) || !noce_operand_ok (src)) return false; /* We must be able to conditionally move in this mode. */ diff --git a/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_arithm.c b/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_arithm.c new file mode 100644 index 00000000000..d977f4d62ec --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_arithm.c @@ -0,0 +1,79 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-rtl-ce1" } */ + +void sink2(int, int); +void sink3(int, int, int); + +void cond1(int cond, int x, int y) +{ + if (cond) + { + x = x << 4; + y = 1; + } + + sink2(x, y); +} + +void cond2(int cond, int x, int y) +{ + if (cond) + { + x++; + y++; + } + + sink2(x, y); +} + +void cond3(int cond, int x1, int x2, int x3) +{ + if (cond) + { + x1++; + x2++; + x3++; + } + + sink3(x1, x2, x3); +} + +void cond4(int cond, int x, int y) +{ + if (cond) + { + x += 2; + y += 3; + } + + sink2(x, y); +} + +void cond5(int cond, int x, int y, int r1, int r2) +{ + if (cond) + { + x = r1 + 2; + y = r2 - 34; + } + + sink2(x, y); +} + +void cond6(int cond, int x, int y) +{ + if (cond) + { + x = -x; + y = ~y; + } + + sink2(x, y); +} + +/* { dg-final { scan-assembler-times "cinc\t" 5 } } */ +/* { dg-final { scan-assembler-times "csneg\t" 1 } } */ +/* { dg-final { scan-assembler-times "csinv\t" 1 } } */ +/* { dg-final { scan-assembler "csel\t" } } */ + +/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_convert_multiple_sets" 6 "ce1" } } */ \ No newline at end of file From patchwork Wed Aug 30 10:13:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manolis Tsamis X-Patchwork-Id: 137166 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a7d1:0:b0:3f2:4152:657d with SMTP id p17csp4442102vqm; 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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id f6-20020a50ee86000000b005231db540d4si7691409edr.230.2023.08.30.03.17.22 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Aug 2023 03:17:22 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=fail header.i=@vrull.eu header.s=google header.b=T0qUc7CT; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 859613857BB2 for ; Wed, 30 Aug 2023 10:16:47 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) by sourceware.org (Postfix) with ESMTPS id 12F7C385840A for ; Wed, 30 Aug 2023 10:14:30 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 12F7C385840A Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=vrull.eu Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=vrull.eu Received: by mail-lf1-x132.google.com with SMTP id 2adb3069b0e04-500b66f8b27so5481848e87.3 for ; Wed, 30 Aug 2023 03:14:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vrull.eu; s=google; t=1693390467; x=1693995267; darn=gcc.gnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aGJ9I36+rOb41U1fBn0WlMvxiDnLPSAV/bsicCRMY8c=; b=T0qUc7CT3VvlyqNOYjV/V1GyTiqS2bGZ78E0PQhsFRoT5ODuxuOmEOv/ZFHYcaw0o3 5fHPiWczgiQQmx2wsb763T6hWsa5nhepS9qr70MkNrjnEnZ5JhGOmU4M5Y54BPSJifwm QiPrB2B+BF70kYsjFMjbB6JnX4Y3J9kfrEisLIgUp8ItoQ2YWKbBWMaYH9lRJODZQbAZ Us6mmtZP4zZHtdH3KrSr4h9QxxNitpOkOiiVB9f8LF2ohDpydenRRYsXGYmMLTKoercW 0g+bUjXEgIS2exxWqMY6qO24H1+gvdmt6oTL+8MLobrJ0a2lCWCRz0l28saqu3kDawK6 MH8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1693390467; x=1693995267; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aGJ9I36+rOb41U1fBn0WlMvxiDnLPSAV/bsicCRMY8c=; b=Ea6S8vnVFlKEtEZdU5IPs4WPkcpFscDsFihtDymS/U1AOrtM+QoELY+2suwL/7QRT/ Mc69rqNHOBbnXZDICkc/A9TosiyFqhXTxZCBLb9ERzHMo3MAtCeBXj5yvbCskKd5dpmN E7Yq8vOOFWIjQXsrJRetpE8gXSYYEwHccXBpC/pKz9j/HT6c0aM/RgxNUB047ICLfAk/ KpAKWyq7s8mTwFt3gLGdlc/iqvoHpad0yeUKejBzMbHoTjLuB4C0Z01fDDZQZqqAgogt pcoRMjC9unSTA6y9KLbiIyA/+hbx1vTYexZCbjBl1PbXXylh1i10INGT5B/w2+xrPm4k oyhg== X-Gm-Message-State: AOJu0YyqCX61AJhkVe6bNLf0ZXfpOjLhhg9xYoJB0vCtjVLuHiu6Bpij V1Q+qLy+BhMnLh5rK7t8FvpaIsYX6L8fRfUman5gJg== X-Received: by 2002:a19:f604:0:b0:500:8fe8:7e80 with SMTP id x4-20020a19f604000000b005008fe87e80mr1161107lfe.26.1693390467088; Wed, 30 Aug 2023 03:14:27 -0700 (PDT) Received: from helsinki-03.engr ([2a01:4f9:6b:2a47::2]) by smtp.gmail.com with ESMTPSA id w7-20020a19c507000000b004fe36e673b8sm2327579lfe.178.2023.08.30.03.14.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Aug 2023 03:14:26 -0700 (PDT) From: Manolis Tsamis To: gcc-patches@gcc.gnu.org Subject: [PATCH v3 3/4] ifcvt: Handle multiple rewired regs and refactor noce_convert_multiple_sets Date: Wed, 30 Aug 2023 12:13:59 +0200 Message-Id: <20230830101400.1539313-4-manolis.tsamis@vrull.eu> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230830101400.1539313-1-manolis.tsamis@vrull.eu> References: <20230830101400.1539313-1-manolis.tsamis@vrull.eu> MIME-Version: 1.0 X-Spam-Status: No, score=-11.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, JMQ_SPF_NEUTRAL, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jakub Jelinek , Richard Sandiford Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1775648786569675979 X-GMAIL-MSGID: 1775648786569675979 The existing implementation of need_cmov_or_rewire and noce_convert_multiple_sets_1 assumes that sets are either REG or SUBREG. This commit enchances them so they can handle/rewire arbitrary set statements. To do that a new helper struct noce_multiple_sets_info is introduced which is used by noce_convert_multiple_sets and its helper functions. This results in cleaner function signatures, improved efficientcy (a number of vecs and hash set/map are replaced with a single vec of struct) and simplicity. gcc/ChangeLog: * ifcvt.cc (need_cmov_or_rewire): Renamed init_noce_multiple_sets_info. (init_noce_multiple_sets_info): Initialize noce_multiple_sets_info. (noce_convert_multiple_sets_1): Use noce_multiple_sets_info and handle rewiring of multiple registers. (noce_convert_multiple_sets): Updated to use noce_multiple_sets_info. * ifcvt.h (struct noce_multiple_sets_info): Introduce new struct noce_multiple_sets_info to store info for noce_convert_multiple_sets. gcc/testsuite/ChangeLog: * gcc.target/aarch64/ifcvt_multiple_sets_rewire.c: New test. Signed-off-by: Manolis Tsamis --- (no changes since v1) gcc/ifcvt.cc | 255 ++++++++---------- gcc/ifcvt.h | 16 ++ .../aarch64/ifcvt_multiple_sets_rewire.c | 20 ++ 3 files changed, 149 insertions(+), 142 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_rewire.c diff --git a/gcc/ifcvt.cc b/gcc/ifcvt.cc index efe8ab1577a..ecc0cbabef9 100644 --- a/gcc/ifcvt.cc +++ b/gcc/ifcvt.cc @@ -98,14 +98,10 @@ static bool dead_or_predicable (basic_block, basic_block, basic_block, edge, bool); static void noce_emit_move_insn (rtx, rtx); static rtx_insn *block_has_only_trap (basic_block); -static void need_cmov_or_rewire (basic_block, hash_set *, - hash_map *); +static void init_noce_multiple_sets_info (basic_block, + auto_delete_vec &); static bool noce_convert_multiple_sets_1 (struct noce_if_info *, - hash_set *, - hash_map *, - auto_vec *, - auto_vec *, - auto_vec *, int *); + auto_delete_vec &, int *); /* Count the number of non-jump active insns in BB. */ @@ -3270,24 +3266,13 @@ noce_convert_multiple_sets (struct noce_if_info *if_info) rtx x = XEXP (cond, 0); rtx y = XEXP (cond, 1); - /* The true targets for a conditional move. */ - auto_vec targets; - /* The temporaries introduced to allow us to not consider register - overlap. */ - auto_vec temporaries; - /* The insns we've emitted. */ - auto_vec unmodified_insns; - - hash_set need_no_cmov; - hash_map rewired_src; - - need_cmov_or_rewire (then_bb, &need_no_cmov, &rewired_src); + auto_delete_vec insn_info; + init_noce_multiple_sets_info (then_bb, insn_info); int last_needs_comparison = -1; bool ok = noce_convert_multiple_sets_1 - (if_info, &need_no_cmov, &rewired_src, &targets, &temporaries, - &unmodified_insns, &last_needs_comparison); + (if_info, insn_info, &last_needs_comparison); if (!ok) return false; @@ -3302,8 +3287,7 @@ noce_convert_multiple_sets (struct noce_if_info *if_info) end_sequence (); start_sequence (); ok = noce_convert_multiple_sets_1 - (if_info, &need_no_cmov, &rewired_src, &targets, &temporaries, - &unmodified_insns, &last_needs_comparison); + (if_info, insn_info, &last_needs_comparison); /* Actually we should not fail anymore if we reached here, but better still check. */ if (!ok) @@ -3312,12 +3296,12 @@ noce_convert_multiple_sets (struct noce_if_info *if_info) /* We must have seen some sort of insn to insert, otherwise we were given an empty BB to convert, and we can't handle that. */ - gcc_assert (!unmodified_insns.is_empty ()); + gcc_assert (!insn_info.is_empty ()); /* Now fixup the assignments. */ - for (unsigned i = 0; i < targets.length (); i++) - if (targets[i] != temporaries[i]) - noce_emit_move_insn (targets[i], temporaries[i]); + for (unsigned i = 0; i < insn_info.length (); i++) + if (insn_info[i]->target != insn_info[i]->temporary) + noce_emit_move_insn (insn_info[i]->target, insn_info[i]->temporary); /* Actually emit the sequence if it isn't too expensive. */ rtx_insn *seq = get_insns (); @@ -3332,10 +3316,10 @@ noce_convert_multiple_sets (struct noce_if_info *if_info) set_used_flags (insn); /* Mark all our temporaries and targets as used. */ - for (unsigned i = 0; i < targets.length (); i++) + for (unsigned i = 0; i < insn_info.length (); i++) { - set_used_flags (temporaries[i]); - set_used_flags (targets[i]); + set_used_flags (insn_info[i]->temporary); + set_used_flags (insn_info[i]->target); } set_used_flags (cond); @@ -3354,7 +3338,7 @@ noce_convert_multiple_sets (struct noce_if_info *if_info) return false; emit_insn_before_setloc (seq, if_info->jump, - INSN_LOCATION (unmodified_insns.last ())); + INSN_LOCATION (insn_info.last ()->unmodified_insn)); /* Clean up THEN_BB and the edges in and out of it. */ remove_edge (find_edge (test_bb, join_bb)); @@ -3375,20 +3359,12 @@ noce_convert_multiple_sets (struct noce_if_info *if_info) return true; } -/* This goes through all relevant insns of IF_INFO->then_bb and tries to - create conditional moves. In case a simple move sufficis the insn - should be listed in NEED_NO_CMOV. The rewired-src cases should be - specified via REWIRED_SRC. TARGETS, TEMPORARIES and UNMODIFIED_INSNS - are specified and used in noce_convert_multiple_sets and should be passed - to this function.. */ +/* This goes through all relevant insns of IF_INFO->then_bb and tries to create + conditional moves. Information for the insns is kept in INSN_INFO. */ static bool noce_convert_multiple_sets_1 (struct noce_if_info *if_info, - hash_set *need_no_cmov, - hash_map *rewired_src, - auto_vec *targets, - auto_vec *temporaries, - auto_vec *unmodified_insns, + auto_delete_vec &insn_info, int *last_needs_comparison) { basic_block then_bb = if_info->then_bb; @@ -3407,11 +3383,6 @@ noce_convert_multiple_sets_1 (struct noce_if_info *if_info, rtx_insn *insn; int count = 0; - - targets->truncate (0); - temporaries->truncate (0); - unmodified_insns->truncate (0); - bool second_try = *last_needs_comparison != -1; FOR_BB_INSNS (then_bb, insn) @@ -3420,6 +3391,8 @@ noce_convert_multiple_sets_1 (struct noce_if_info *if_info, if (!active_insn_p (insn)) continue; + noce_multiple_sets_info *info = insn_info[count]; + rtx set = single_set (insn); gcc_checking_assert (set); @@ -3427,9 +3400,12 @@ noce_convert_multiple_sets_1 (struct noce_if_info *if_info, rtx temp; rtx new_val = SET_SRC (set); - if (int *ii = rewired_src->get (insn)) - new_val = simplify_replace_rtx (new_val, (*targets)[*ii], - (*temporaries)[*ii]); + + int i, ii; + FOR_EACH_VEC_ELT (info->rewired_src, i, ii) + new_val = simplify_replace_rtx (new_val, insn_info[ii]->target, + insn_info[ii]->temporary); + rtx old_val = target; /* As we are transforming @@ -3467,11 +3443,6 @@ noce_convert_multiple_sets_1 (struct noce_if_info *if_info, else temp = target; - /* We have identified swap-style idioms before. A normal - set will need to be a cmov while the first instruction of a swap-style - idiom can be a regular move. This helps with costing. */ - bool need_cmov = !need_no_cmov->contains (insn); - /* If we had a non-canonical conditional jump (i.e. one where the fallthrough is to the "else" case) we need to reverse the conditional select. */ @@ -3516,6 +3487,11 @@ noce_convert_multiple_sets_1 (struct noce_if_info *if_info, old_val = lowpart_subreg (dst_mode, old_val, src_mode); } + /* We have identified swap-style idioms before. A normal + set will need to be a cmov while the first instruction of a swap-style + idiom can be a regular move. This helps with costing. */ + bool need_cmov = info->need_cmov; + /* Try emitting a conditional move passing the backend the canonicalized comparison. The backend is then able to recognize expressions like @@ -3621,9 +3597,10 @@ noce_convert_multiple_sets_1 (struct noce_if_info *if_info, /* Bookkeeping. */ count++; - targets->safe_push (target); - temporaries->safe_push (temp_dest); - unmodified_insns->safe_push (insn); + + info->target = target; + info->temporary = temp_dest; + info->unmodified_insn = insn; } /* Even if we did not actually need the comparison, we want to make sure @@ -3631,11 +3608,88 @@ noce_convert_multiple_sets_1 (struct noce_if_info *if_info, if (*last_needs_comparison == -1) *last_needs_comparison = 0; - return true; } +/* Find local swap-style idioms in BB and mark the first insn (1) + that is only a temporary as not needing a conditional move as + it is going to be dead afterwards anyway. + + (1) int tmp = a; + a = b; + b = tmp; + ifcvt + --> + + tmp = a; + a = cond ? b : a_old; + b = cond ? tmp : b_old; + + Additionally, store the index of insns like (2) when a subsequent + SET reads from their destination. + + (2) int c = a; + int d = c; + + ifcvt + --> + + c = cond ? a : c_old; + d = cond ? d : c; // Need to use c rather than c_old here. +*/ + +static void +init_noce_multiple_sets_info (basic_block bb, + auto_delete_vec &insn_info) +{ + rtx_insn *insn; + int count = 0; + auto_vec dests; + + /* Iterate over all SETs, storing the destinations + in DEST. + - If we hit a SET that reads from a destination + that we have seen before and the corresponding register + is dead afterwards, the register does not need to be + moved conditionally. + - If we encounter a previously changed register, + rewire the read to the original source. */ + FOR_BB_INSNS (bb, insn) + { + if (!active_insn_p (insn)) + continue; + + noce_multiple_sets_info *info = new noce_multiple_sets_info; + info->target = NULL_RTX; + info->temporary = NULL_RTX; + info->unmodified_insn = NULL; + info->need_cmov = true; + insn_info.safe_push (info); + + rtx set = single_set (insn); + gcc_checking_assert (set); + + rtx src = SET_SRC (set); + rtx dest = SET_DEST (set); + + /* Check if the current SET's source is the same + as any previously seen destination. + This is quadratic but the number of insns in BB + is bounded by PARAM_MAX_RTL_IF_CONVERSION_INSNS. */ + for (int i = count - 1; i >= 0; --i) + if (reg_mentioned_p (dests[i], src)) + { + if (find_reg_note (insn, REG_DEAD, src) != NULL_RTX) + insn_info[i]->need_cmov = false; + else + insn_info[count]->rewired_src.safe_push (i); + } + + dests.safe_push (dest); + count++; + } +} /* Return true iff basic block TEST_BB is suitable for conversion to a series of conditional moves. Also check that we have more than one @@ -4135,89 +4189,6 @@ check_cond_move_block (basic_block bb, return true; } -/* Find local swap-style idioms in BB and mark the first insn (1) - that is only a temporary as not needing a conditional move as - it is going to be dead afterwards anyway. - - (1) int tmp = a; - a = b; - b = tmp; - - ifcvt - --> - - tmp = a; - a = cond ? b : a_old; - b = cond ? tmp : b_old; - - Additionally, store the index of insns like (2) when a subsequent - SET reads from their destination. - - (2) int c = a; - int d = c; - - ifcvt - --> - - c = cond ? a : c_old; - d = cond ? d : c; // Need to use c rather than c_old here. -*/ - -static void -need_cmov_or_rewire (basic_block bb, - hash_set *need_no_cmov, - hash_map *rewired_src) -{ - rtx_insn *insn; - int count = 0; - auto_vec insns; - auto_vec dests; - - /* Iterate over all SETs, storing the destinations - in DEST. - - If we hit a SET that reads from a destination - that we have seen before and the corresponding register - is dead afterwards, the register does not need to be - moved conditionally. - - If we encounter a previously changed register, - rewire the read to the original source. */ - FOR_BB_INSNS (bb, insn) - { - rtx set, src, dest; - - if (!active_insn_p (insn)) - continue; - - set = single_set (insn); - if (set == NULL_RTX) - continue; - - src = SET_SRC (set); - if (SUBREG_P (src)) - src = SUBREG_REG (src); - dest = SET_DEST (set); - - /* Check if the current SET's source is the same - as any previously seen destination. - This is quadratic but the number of insns in BB - is bounded by PARAM_MAX_RTL_IF_CONVERSION_INSNS. */ - if (REG_P (src)) - for (int i = count - 1; i >= 0; --i) - if (reg_overlap_mentioned_p (src, dests[i])) - { - if (find_reg_note (insn, REG_DEAD, src) != NULL_RTX) - need_no_cmov->add (insns[i]); - else - rewired_src->put (insn, i); - } - - insns.safe_push (insn); - dests.safe_push (dest); - - count++; - } -} - /* Given a basic block BB suitable for conditional move conversion, a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing the register values depending on COND, emit the insns in the block as diff --git a/gcc/ifcvt.h b/gcc/ifcvt.h index be1385aabe4..f953705f887 100644 --- a/gcc/ifcvt.h +++ b/gcc/ifcvt.h @@ -40,6 +40,22 @@ struct ce_if_block int pass; /* Pass number. */ }; +struct noce_multiple_sets_info +{ + /* A list of indices to instructions that we need to rewire into this + instruction when we replace them with temporary conditional moves. */ + auto_vec rewired_src; + /* The true targets for a conditional move. */ + rtx target; + /* The temporaries introduced to allow us to not consider register + overlap. */ + rtx temporary; + /* The insns we've emitted. */ + rtx_insn *unmodified_insn; + /* True if a simple move can be used instead of a conditional move. */ + bool need_cmov; +}; + /* Used by noce_process_if_block to communicate with its subroutines. The subroutines know that A and B may be evaluated freely. They diff --git a/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_rewire.c b/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_rewire.c new file mode 100644 index 00000000000..411874e96c2 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_rewire.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-rtl-ce1" } */ + +void sink2(int, int); + +void cond1(int cond, int x, int y, int z) +{ + if (x) + { + x = y + z; + y = z + x; + } + + sink2(x, y); +} + +/* { dg-final { scan-assembler-times "csel\tw0, w0, w1" 1 } } */ +/* { dg-final { scan-assembler-times "csel\tw1, w3, w2" 1 } } */ + +/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_convert_multiple_sets" 1 "ce1" } } */ \ No newline at end of file From patchwork Wed Aug 30 10:14:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manolis Tsamis X-Patchwork-Id: 137165 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a7d1:0:b0:3f2:4152:657d with SMTP id p17csp4441800vqm; Wed, 30 Aug 2023 03:16:42 -0700 (PDT) X-Google-Smtp-Source: AGHT+IExzjKznNmesKYSn0Sn9jnqqrrKU+/0e1v7+t2Y3F1JL/wp25dUSuw6PItFiM40jBuI1d77 X-Received: by 2002:a17:907:7da7:b0:9a5:b2d8:e925 with SMTP id oz39-20020a1709077da700b009a5b2d8e925mr5422543ejc.33.1693390601932; Wed, 30 Aug 2023 03:16:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1693390601; cv=none; d=google.com; s=arc-20160816; b=cQMtWSSajPeERK30/k5ksDJua0HcW+Oyc+9DNYw4SBWoLJK59/a3Bl0isFyic/dzJS k2HQDvBVy79bVZmTfJ7Ka7+TYSo8tk9++64HQ4ky+cwQDdT6IySV1RbUP25+sSvLBxM6 nKRVxk/Qzlf8TFAmyKkNkwHt7XAIZdDArYkqfiaHIUkvrU2Or/OYPKO2nkxFW5hV4r93 EV5oYcA9d2uQpvKCpsbX0pXxzmVsUAZ7/6JjIlo9BjZagQhpSxx013ePfp0CU0oa1iWv iaur1uhkNe+qGiYY9cVyyM4IdUSuEuNbVusbHdPX1HyMTBsyK+8J1A+Z59X1tCox9c0D RnWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature:dmarc-filter:delivered-to; bh=BQGoUBKhvF6DGQ4u91965zkf6FuSZATtu34C137ZOpw=; fh=woiY3K3H7Cf0yJyo65+kvTYqCFQ1uf3TZPnMDzMwLaw=; b=tsL1NTA4kUGCspD5jkilW0ozTNiH3dBvQKQjcEYRLmG7oOT+whVWiNAcMa1Z8Z+IjM FvGO8XQ0vA59GCVa7OV7fuBpqchuxFTqLEoVLiHxcpYZ9fe8Xn0UPd848h6Oqkuw7Z9F jRE6cik3lN94zkQ6JYYe1ZAS2pFLsbcswrd8amC9tN9BIZreSQlJUrw+E/m+gbyuT7Vl yE29cAIJo9wEplhqGWCRJDC0oDZHTElMbCwcKq4atSvJ10qFhOIzL4ct/MYWKdoRB66F N4aBRrm+e7MAsTKjqEwfDfDvC9rI2krXyaXKFMBLp5+Iov9KjRRU1PPa5OTVm063Y0cW 2QJA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@vrull.eu header.s=google header.b=qFTq+TjU; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (server2.sourceware.org. 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This should not be needed anymore as new_val has the correct mode and that should be preserved by simplify_replace_rtx. gcc/ChangeLog: * ifcvt.cc (noce_convert_multiple_sets_1): Remove old code. Signed-off-by: Manolis Tsamis --- (no changes since v1) gcc/ifcvt.cc | 38 -------------------------------------- 1 file changed, 38 deletions(-) diff --git a/gcc/ifcvt.cc b/gcc/ifcvt.cc index ecc0cbabef9..3b4b873612c 100644 --- a/gcc/ifcvt.cc +++ b/gcc/ifcvt.cc @@ -3449,44 +3449,6 @@ noce_convert_multiple_sets_1 (struct noce_if_info *if_info, if (if_info->then_else_reversed) std::swap (old_val, new_val); - - /* We allow simple lowpart register subreg SET sources in - bb_ok_for_noce_convert_multiple_sets. Be careful when processing - sequences like: - (set (reg:SI r1) (reg:SI r2)) - (set (reg:HI r3) (subreg:HI (r1))) - For the second insn new_val or old_val (r1 in this example) will be - taken from the temporaries and have the wider mode which will not - match with the mode of the other source of the conditional move, so - we'll end up trying to emit r4:HI = cond ? (r1:SI) : (r3:HI). - Wrap the two cmove operands into subregs if appropriate to prevent - that. */ - - if (!CONSTANT_P (new_val) - && GET_MODE (new_val) != GET_MODE (temp)) - { - machine_mode src_mode = GET_MODE (new_val); - machine_mode dst_mode = GET_MODE (temp); - if (!partial_subreg_p (dst_mode, src_mode)) - { - end_sequence (); - return false; - } - new_val = lowpart_subreg (dst_mode, new_val, src_mode); - } - if (!CONSTANT_P (old_val) - && GET_MODE (old_val) != GET_MODE (temp)) - { - machine_mode src_mode = GET_MODE (old_val); - machine_mode dst_mode = GET_MODE (temp); - if (!partial_subreg_p (dst_mode, src_mode)) - { - end_sequence (); - return false; - } - old_val = lowpart_subreg (dst_mode, old_val, src_mode); - } - /* We have identified swap-style idioms before. A normal set will need to be a cmov while the first instruction of a swap-style idiom can be a regular move. This helps with costing. */