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[2620:137:e000::1:20]) by mx.google.com with ESMTP id di21-20020a170906731500b00783ac0b4d32si80294ejc.941.2022.11.02.23.02.37; Wed, 02 Nov 2022 23:03:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=icdIz2Xu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230304AbiKCGAV (ORCPT + 99 others); Thu, 3 Nov 2022 02:00:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229935AbiKCGAT (ORCPT ); Thu, 3 Nov 2022 02:00:19 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0474011145 for ; Wed, 2 Nov 2022 23:00:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667455218; x=1698991218; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JboFRltoczbXP4x/urgFAYiKbX2mR+qR0k/5T6o9tzA=; b=icdIz2XuAtpL2Rj1cR+rBLAJtS/desmlTYNnrFeAAoYD1ousUOUnp4Mm aD6YpZuiyUsYhznHMpTxLePu2Wt/j/IpmxH17kjj8m/09EAPFlhSfKlMT JC4iiIdGW9gYEH9Z1hLC2mNhi7cTZc1pxXpf8G6OM5KrTIT8W4eRWQkB0 aCzFxyNTahPODYBY61FIoFb4/FOg2orOQ/dOA6Yc9hTUqK/Uk28GLEnHu x/ZZlX4Bd/9+VcUqWJqizGUAaqdfYJtzCqjCebb4nwm8sPfWzP9WGeVwQ 7sdnCWxyl8OSno+PK/bcGS88D0zuhXS7rlpSgZxbQkqm/0dq9Qq5JA2bV Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="311322481" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="311322481" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 23:00:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="723819282" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="723819282" Received: from allen-box.sh.intel.com ([10.239.159.48]) by FMSMGA003.fm.intel.com with ESMTP; 02 Nov 2022 23:00:15 -0700 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 1/7] iommu/vt-d: Allocate pasid table in device probe path Date: Thu, 3 Nov 2022 13:53:23 +0800 Message-Id: <20221103055329.633052-2-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221103055329.633052-1-baolu.lu@linux.intel.com> References: <20221103055329.633052-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-5.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748453694082540604?= X-GMAIL-MSGID: =?utf-8?q?1748453694082540604?= Whether or not a domain is attached to the device, the pasid table should always be valid as long as it has been probed. This moves the pasid table allocation from the domain attaching device path to device probe path and frees it in the device release path. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index a934a46bb9e6..e28faba1095f 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -2477,13 +2477,6 @@ static int domain_add_dev_info(struct dmar_domain *domain, struct device *dev) /* PASID table is mandatory for a PCI device in scalable mode. */ if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) { - ret = intel_pasid_alloc_table(dev); - if (ret) { - dev_err(dev, "PASID table allocation failed\n"); - dmar_remove_one_dev_info(dev); - return ret; - } - /* Setup the PASID entry for requests without PASID: */ if (hw_pass_through && domain_type_is_si(domain)) ret = intel_pasid_setup_pass_through(iommu, domain, @@ -4108,7 +4101,6 @@ static void dmar_remove_one_dev_info(struct device *dev) iommu_disable_dev_iotlb(info); domain_context_clear(info); - intel_pasid_free_table(info->dev); } spin_lock_irqsave(&domain->lock, flags); @@ -4470,6 +4462,7 @@ static struct iommu_device *intel_iommu_probe_device(struct device *dev) struct device_domain_info *info; struct intel_iommu *iommu; u8 bus, devfn; + int ret; iommu = device_to_iommu(dev, &bus, &devfn); if (!iommu || !iommu->iommu.ops) @@ -4513,6 +4506,16 @@ static struct iommu_device *intel_iommu_probe_device(struct device *dev) dev_iommu_priv_set(dev, info); + if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) { + ret = intel_pasid_alloc_table(dev); + if (ret) { + dev_err(dev, "PASID table allocation failed\n"); + dev_iommu_priv_set(dev, NULL); + kfree(info); + return ERR_PTR(ret); + } + } + return &iommu->iommu; } @@ -4521,6 +4524,7 @@ static void intel_iommu_release_device(struct device *dev) struct device_domain_info *info = dev_iommu_priv_get(dev); dmar_remove_one_dev_info(dev); + intel_pasid_free_table(dev); dev_iommu_priv_set(dev, NULL); kfree(info); set_dma_ops(dev, NULL); From patchwork Thu Nov 3 05:53:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 14668 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp342428wru; Wed, 2 Nov 2022 23:03:01 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6ZI9F/1Bfo3Ef6NsogXDOxneRxvzCDBj1un0vgSVscIsz91FnL/jlc7sfJI607ILA338aq X-Received: by 2002:a17:906:db03:b0:741:337e:3600 with SMTP id xj3-20020a170906db0300b00741337e3600mr27988498ejb.343.1667455381294; Wed, 02 Nov 2022 23:03:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1667455381; cv=none; d=google.com; s=arc-20160816; b=dNwaLWwrzQl405KCotJMAAMi9PPUXnfkcjH6guZOl7r4ZvjFA5JnMuzcELZAVG2jig 4IeByYbAnNRPX1LMN3jsBVMvn/AsTJhmJp9uyqa7xdmAy9iniF8+hMAFFpybicaxxs0f IzAkIgeL0S/EOypoiESWVUGpEWkCGEpcwG7wl1shqlxms+0L5hm6VI6TGBMXiOSbJ7GM ulYSqmAFZ7ymAyHXo/jgmaXi/rTugaJKIR+bk7djeDDI7ONjPwdmZR1NJji4qjB3gU/I Ych6NB7lRcMur4HVPRjqwzTbNEFJnetzfFtEU4M2iH9mgqLli75S9eqqex3AyNr0zHBS 5X9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=d1c/U69IngFxkR8T/Xo3iw/5qAUSCpmx5QQoKSwlyno=; b=GYB21gje+dljE4ah8W4j1jHU7IPEAnojNNIWwCFribSWSgc4DG2Ddzk4JlhPjjn8gE fCM1WJOM1sKYAZ4Svha4Pb7xUpogSe4ugLO0goVgiFWWG+14betdjWtDb2/cd3Lg+wfO pr3/aQtBzzkwyOuwVUSryeyMdoW5CVVR9AX6j05SKoVKFg3mnhzOYhIbRDq/Wl+5PTAZ 6z9LMiUMuvpqmQQowNFZ9XxDGLyxOw1lST2efTY+HLJ8DFBfPVIUi9gTxHiUNcjuGvL2 ep1roX4FDQZBvTVRzk82SkbDTzRL4ybrJRFMiWtpIZw0CyiwHvJFqLFWUP/UOMEuzUUY iptg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=QGpbTfMe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id hr26-20020a1709073f9a00b0078c8dadd4bbsi107790ejc.742.2022.11.02.23.02.37; Wed, 02 Nov 2022 23:03:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=QGpbTfMe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230496AbiKCGA1 (ORCPT + 99 others); Thu, 3 Nov 2022 02:00:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230348AbiKCGAV (ORCPT ); Thu, 3 Nov 2022 02:00:21 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 418AB1789D for ; Wed, 2 Nov 2022 23:00:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667455220; x=1698991220; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lAGSG0xkmW0fDJOPqIRiT6oxympP8oIZwjeDYfOHHo0=; b=QGpbTfMeHJ8vAniq9lZxGQrpQyxJSqdi0pqDT6v7XS+MaGCWNF3Ur0r8 WEFNpMSPb7SbiaYKsNMFOPKbT1DtdqwUBhnGOcqoOurBnVqQrTKJlT/s1 KTaQQmKMv1/q0XsDijloeLzVMQU59DtRiElLY13f0gyN4BOU97E4MSkPB hnZBrnrBfAEkqo+JurKFB3utHLDzu2PgUw4zBr1ZmAsbFSt85xvmtGXbR yUXSrh6IuvpLNd3olUJvjVBYnBRLhijiPCVf7DyShIRGPsPGbY4r6r6bv R0eE/HDlqoi+iqLKP5xwLz3+IPAnxAnxZNrvOpk7AwFRxJOYN2YAUSTYJ Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="311322491" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="311322491" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 23:00:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="723819300" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="723819300" Received: from allen-box.sh.intel.com ([10.239.159.48]) by FMSMGA003.fm.intel.com with ESMTP; 02 Nov 2022 23:00:17 -0700 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 2/7] iommu/vt-d: Add blocking domain support Date: Thu, 3 Nov 2022 13:53:24 +0800 Message-Id: <20221103055329.633052-3-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221103055329.633052-1-baolu.lu@linux.intel.com> References: <20221103055329.633052-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-5.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748453693797496684?= X-GMAIL-MSGID: =?utf-8?q?1748453693797496684?= The Intel IOMMU hardwares support blocking DMA transactions by clearing the translation table entries. This implements a real blocking domain to avoid using an empty UNMANAGED domain. The detach_dev callback of the domain ops is not used in any path. Remove it to avoid dead code as well. Signed-off-by: Lu Baolu --- drivers/iommu/intel/iommu.c | 56 +++++++++++++++++++++++++++++++------ 1 file changed, 48 insertions(+), 8 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index e28faba1095f..7374a03cbe27 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -278,6 +278,7 @@ static LIST_HEAD(dmar_satc_units); list_for_each_entry(rmrr, &dmar_rmrr_units, list) static void dmar_remove_one_dev_info(struct device *dev); +static void intel_iommu_domain_free(struct iommu_domain *domain); int dmar_disabled = !IS_ENABLED(CONFIG_INTEL_IOMMU_DEFAULT_ON); int intel_iommu_sm = IS_ENABLED(CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON); @@ -4132,12 +4133,58 @@ static int md_domain_init(struct dmar_domain *domain, int guest_width) return 0; } +/* + * Clear the page table pointer in context or pasid table entries so that + * all DMA requests without PASID from the device are blocked. If the page + * table has been set, clean up the data structures. + */ +static void device_block_translation(struct device *dev) +{ + struct device_domain_info *info = dev_iommu_priv_get(dev); + struct intel_iommu *iommu = info->iommu; + unsigned long flags; + + if (!dev_is_real_dma_subdevice(dev)) { + if (sm_supported(iommu)) + intel_pasid_tear_down_entry(iommu, dev, + PASID_RID2PASID, false); + else + domain_context_clear(info); + } + + if (!info->domain) + return; + + spin_lock_irqsave(&info->domain->lock, flags); + list_del(&info->link); + spin_unlock_irqrestore(&info->domain->lock, flags); + + domain_detach_iommu(info->domain, iommu); + info->domain = NULL; +} + +static int blocking_domain_attach_dev(struct iommu_domain *domain, + struct device *dev) +{ + device_block_translation(dev); + return 0; +} + +static struct iommu_domain blocking_domain = { + .ops = &(const struct iommu_domain_ops) { + .attach_dev = blocking_domain_attach_dev, + .free = intel_iommu_domain_free + } +}; + static struct iommu_domain *intel_iommu_domain_alloc(unsigned type) { struct dmar_domain *dmar_domain; struct iommu_domain *domain; switch (type) { + case IOMMU_DOMAIN_BLOCKED: + return &blocking_domain; case IOMMU_DOMAIN_DMA: case IOMMU_DOMAIN_DMA_FQ: case IOMMU_DOMAIN_UNMANAGED: @@ -4172,7 +4219,7 @@ static struct iommu_domain *intel_iommu_domain_alloc(unsigned type) static void intel_iommu_domain_free(struct iommu_domain *domain) { - if (domain != &si_domain->domain) + if (domain != &si_domain->domain && domain != &blocking_domain) domain_exit(to_dmar_domain(domain)); } @@ -4246,12 +4293,6 @@ static int intel_iommu_attach_device(struct iommu_domain *domain, return domain_add_dev_info(to_dmar_domain(domain), dev); } -static void intel_iommu_detach_device(struct iommu_domain *domain, - struct device *dev) -{ - dmar_remove_one_dev_info(dev); -} - static int intel_iommu_map(struct iommu_domain *domain, unsigned long iova, phys_addr_t hpa, size_t size, int iommu_prot, gfp_t gfp) @@ -4759,7 +4800,6 @@ const struct iommu_ops intel_iommu_ops = { #endif .default_domain_ops = &(const struct iommu_domain_ops) { .attach_dev = intel_iommu_attach_device, - .detach_dev = intel_iommu_detach_device, .map_pages = intel_iommu_map_pages, .unmap_pages = intel_iommu_unmap_pages, .iotlb_sync_map = intel_iommu_iotlb_sync_map, From patchwork Thu Nov 3 05:53:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 14664 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp341699wru; Wed, 2 Nov 2022 23:01:33 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5freQQ0vWJX5+zPhsCaXQP1ki5deroiqk//UrwcCjTSIe+ilIUOwtCf4Hy1exbELiucpP/ X-Received: by 2002:a17:907:703:b0:78e:25be:5455 with SMTP id xb3-20020a170907070300b0078e25be5455mr26257985ejb.630.1667455292823; Wed, 02 Nov 2022 23:01:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1667455292; cv=none; d=google.com; s=arc-20160816; b=h/1W5nZU0Q6IzNV41b1JIQMOXsxoJ6wVAGFZBqgSvDbm/D8cuzJs26bdZh4tBjB7yr il+Q7kZXRTvs0UwKSULBwpCOVzl0s4sdQkYLjeq3n5rfYNx8mlmZfGfJmsjgarX4BEVO VotlZWZtyeoak0qHMW82yuJz3AFolWI3DG6cASE1uu749Pevjib47F8yNzzB/BtZCPdK s7OniVYxpBYybD07ceaHP9X4gdasFfkbzSO7HJ6PtNeNMwPqV4g4dNHKitu2MrRjhoiM F8AU3lM39olujJhQxIdVC7fTNWDrGjeE8sq6zrRUd9+a3cUcjQkWXeRgVbBfZjTtoRaz 0YDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=22NQxNknCOBk8Gqgsf7HjGLc7MJJWusL1AM7MzrM83c=; b=zwalc1Q8QObm42mRRZkyk8aDpilGjI9Dv1wn5or7N0yIR6leP7+7Uo+pHn3sCGsdL7 aevmFP/jxLxrrYM8Ql6HPS+sUt/FVvf3ddLdFilig79kIU6QHxTEQQIYmWEtY2pspulf g9k5jwvzhLW7bISUzPhx9AG1fmsAsyJCa9a/vxHF4k3rw6E1OS2uHlyhpjva0jK2zFeR 0Kd7qFbX41wab4Uo74uz4ZgcqXqBSZuBL1WQ61gpVwiy9eCOBZ/SZtf99qJmQTnQC++o rbCduUgyupCpgKIUXoarHSaaDR7Vi3YJxQpreNtl+02NADyye2Fg5KKAaaks7dDVL9Ug HM7Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="Zm6jWa/r"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id sb21-20020a1709076d9500b0078d3b4510b5si99175ejc.854.2022.11.02.23.01.09; Wed, 02 Nov 2022 23:01:32 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="Zm6jWa/r"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229493AbiKCGAc (ORCPT + 99 others); Thu, 3 Nov 2022 02:00:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229866AbiKCGAY (ORCPT ); Thu, 3 Nov 2022 02:00:24 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CCE85193E6 for ; Wed, 2 Nov 2022 23:00:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667455222; x=1698991222; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=aM0hjyh9mfWlQ4E49BdI7O/4F+S//PSRVfW2yc2UlB0=; b=Zm6jWa/rfmz3M/Kf/dCQPwsvdu/WlskLHEguUJ/DnIhpFxGOXxcMtB+6 LVxKvD6gBAKAeGZFfxc3E1sVyq/ejdo2HcWCDWBE26rrYpg+FHaHY/iNO g9zadLvT5uuUw9ofOJl2B7bwMtl3hBfe2HLeIlSpCfAzKHYMd2fCBmR4y SDjCwDoJLbpMRvemAAanhM6kYTcKyiUE7+SqZQBXXi44n+aSpa19vsEtS 5rrXxTjmonsGvcD7GPCiYy1evkvo/cT2Mhh6Gs6Un48htsw+EeGYUz1Xp c/5x6FaWnFVk7oBJfZr2fTpWUaCKt25hYdPvpUQyKJ0M0FfLj3osQDJWV Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="311322498" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="311322498" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 23:00:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="723819305" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="723819305" Received: from allen-box.sh.intel.com ([10.239.159.48]) by FMSMGA003.fm.intel.com with ESMTP; 02 Nov 2022 23:00:20 -0700 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 3/7] iommu/vt-d: Use device_block_translation() in dev_attach error path Date: Thu, 3 Nov 2022 13:53:25 +0800 Message-Id: <20221103055329.633052-4-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221103055329.633052-1-baolu.lu@linux.intel.com> References: <20221103055329.633052-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-5.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748453600865589265?= X-GMAIL-MSGID: =?utf-8?q?1748453600865589265?= If domain attaching to device fails, the IOMMU driver should bring the device to blocking DMA state. The upper layer is expected to recover it by attaching a new domain. Use device_block_translation() in the error path of dev_attach to make the behavior specific. The difference between device_block_translation() and the previous dmar_remove_one_dev_info() is that the latter disables PCIe ATS and the related PCIe features. This is unnecessary as these features are not per domain capabilities, disabling them during domain switching is unnecessary. Signed-off-by: Lu Baolu --- drivers/iommu/intel/iommu.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 7374a03cbe27..b956c411f2bb 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -277,8 +277,8 @@ static LIST_HEAD(dmar_satc_units); #define for_each_rmrr_units(rmrr) \ list_for_each_entry(rmrr, &dmar_rmrr_units, list) -static void dmar_remove_one_dev_info(struct device *dev); static void intel_iommu_domain_free(struct iommu_domain *domain); +static void device_block_translation(struct device *dev); int dmar_disabled = !IS_ENABLED(CONFIG_INTEL_IOMMU_DEFAULT_ON); int intel_iommu_sm = IS_ENABLED(CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON); @@ -2490,7 +2490,7 @@ static int domain_add_dev_info(struct dmar_domain *domain, struct device *dev) dev, PASID_RID2PASID); if (ret) { dev_err(dev, "Setup RID2PASID failed\n"); - dmar_remove_one_dev_info(dev); + device_block_translation(dev); return ret; } } @@ -2498,7 +2498,7 @@ static int domain_add_dev_info(struct dmar_domain *domain, struct device *dev) ret = domain_context_mapping(domain, dev); if (ret) { dev_err(dev, "Domain context map failed\n"); - dmar_remove_one_dev_info(dev); + device_block_translation(dev); return ret; } @@ -4283,7 +4283,7 @@ static int intel_iommu_attach_device(struct iommu_domain *domain, struct device_domain_info *info = dev_iommu_priv_get(dev); if (info->domain) - dmar_remove_one_dev_info(dev); + device_block_translation(dev); } ret = prepare_domain_attach_device(domain, dev); From patchwork Thu Nov 3 05:53:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 14665 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp341851wru; Wed, 2 Nov 2022 23:01:53 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5OAETtFHwNniCFYID8Basw0qtYqVYXwoaoomUjOdt5acZ1LgMHEvl+ilpcpky/n6MxraOO X-Received: by 2002:aa7:db01:0:b0:461:4dc9:74e with SMTP id t1-20020aa7db01000000b004614dc9074emr28558939eds.139.1667455313543; Wed, 02 Nov 2022 23:01:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1667455313; cv=none; d=google.com; s=arc-20160816; b=TyTT779bzLfEuRmtyz2gES2ynRvBXWwpvlAbBmbURQ42X32GZd9ZPckHivg3ca++Kw 4roTg70vmqd8hZDlcfCeIHBnSh7LEbuAYuTpR0nOlYBs+GD7omx7OP1cXK59ZP2tWfg3 bYaDagnMjkO9mQDma7tc2KUerMkXn8FeRc4+DgVlAYUyu7anf+SifgTYl34wNrq89rXI 0OpTSGKsbqS/iSxetVp5gwGOcWHhINWw8lO5bU25dGXU1G3NIVB+hkluP80taaBoMQRn O8PzhwTTuIwNrkFoZdVuzSsRc3dyzvFqwZgg6CqAfgKF3KeoVTK8FUjkcBJR6mEZPsHl llQg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=QGpgW7TzI14B6ZPXPW0BwuhgRn8wMU60T2aUfwmEGsw=; b=UwaapqjSSX3ZcF7C/iDp0s6KuYfh2tt7dgWH5HpDoobR+jEpRKfGZnAHS6rPlTgxUZ /8h1aIe0l5daYHRfDl2scQZpfcrKrEK40X7h7JlFdI3i8ObgRUBZy8gmzdKXjHWiBDM4 Czc5NWCiO/WFhK6wEbV1TxorozpvJo61wnCxKG+0cj7PXLprJpT5RobaVvVqw1NryLQC xTrb4J0UuAAVGmqQJkAN4w+3qBk68OboRxarLdOv1vJvbUT4G7ZQdYLU+lZyCPf5sI+T fMxwRHMDvUsZoACDyl29iY3KcKdctlEDJuSBKC6NAJZFG5zMu7HVFUFhyyjDrLeA3BLp iKuw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=HITxvXhr; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id dt5-20020a170907728500b007a96e504c7esi113163ejc.753.2022.11.02.23.01.30; Wed, 02 Nov 2022 23:01:53 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=HITxvXhr; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231158AbiKCGAi (ORCPT + 99 others); Thu, 3 Nov 2022 02:00:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230521AbiKCGA3 (ORCPT ); Thu, 3 Nov 2022 02:00:29 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D1FE412635 for ; Wed, 2 Nov 2022 23:00:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667455225; x=1698991225; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NwQMgsKcZs/tlpXVoJMXkMuWIzP3I35y6H0OEip798w=; b=HITxvXhr2HeF3jwoNqK7Q3lyroYdPn7NSiKw1YJX7CPPGPS6qxXMNV4e m1Ro1udv3Ow3PCXtcWZSsvgL0fCuBMwje6jAsVlIKEbWLQ7unPdYvLyLg qK3aPu2zdp2IqXgpS0X9hmN4uUfxEbVqz0YApqO+A4tU+uW+p5CgV/kL2 kaU++mdozXfdNqtME9dn0L63lS95lloV9B3fdBO+LTGxgOBFP+J0jL78R +6K9TXUe/4/KCS1uBVQkj0rRoJJkcpjwq1Q8KQqDDCIZ3+OMldhH+uVEf qEc2hcex3Btjz3sBVIiR3kkwqUQ8hfEPnVVb+UQ6J8XrhODV3gifFoXsf w==; X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="311322509" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="311322509" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 23:00:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="723819311" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="723819311" Received: from allen-box.sh.intel.com ([10.239.159.48]) by FMSMGA003.fm.intel.com with ESMTP; 02 Nov 2022 23:00:22 -0700 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 4/7] iommu/vt-d: Fold dmar_remove_one_dev_info() into its caller Date: Thu, 3 Nov 2022 13:53:26 +0800 Message-Id: <20221103055329.633052-5-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221103055329.633052-1-baolu.lu@linux.intel.com> References: <20221103055329.633052-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-5.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748453623145069157?= X-GMAIL-MSGID: =?utf-8?q?1748453623145069157?= Fold dmar_remove_one_dev_info() into intel_iommu_release_device() which is its only caller. Replace most of the code with device_block_translation() to make the code neat and tidy. Rename iommu_disable_dev_iotlb() to iommu_disable_pci_caps() to pair with iommu_enable_pci_caps(). Signed-off-by: Lu Baolu --- drivers/iommu/intel/iommu.c | 31 +++++-------------------------- 1 file changed, 5 insertions(+), 26 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index b956c411f2bb..393e07ac4c21 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -1443,7 +1443,7 @@ static void iommu_enable_pci_caps(struct device_domain_info *info) } } -static void iommu_disable_dev_iotlb(struct device_domain_info *info) +static void iommu_disable_pci_caps(struct device_domain_info *info) { struct pci_dev *pdev; @@ -4088,30 +4088,6 @@ static void domain_context_clear(struct device_domain_info *info) &domain_context_clear_one_cb, info); } -static void dmar_remove_one_dev_info(struct device *dev) -{ - struct device_domain_info *info = dev_iommu_priv_get(dev); - struct dmar_domain *domain = info->domain; - struct intel_iommu *iommu = info->iommu; - unsigned long flags; - - if (!dev_is_real_dma_subdevice(info->dev)) { - if (dev_is_pci(info->dev) && sm_supported(iommu)) - intel_pasid_tear_down_entry(iommu, info->dev, - PASID_RID2PASID, false); - - iommu_disable_dev_iotlb(info); - domain_context_clear(info); - } - - spin_lock_irqsave(&domain->lock, flags); - list_del(&info->link); - spin_unlock_irqrestore(&domain->lock, flags); - - domain_detach_iommu(domain, iommu); - info->domain = NULL; -} - static int md_domain_init(struct dmar_domain *domain, int guest_width) { int adjust_width; @@ -4564,7 +4540,10 @@ static void intel_iommu_release_device(struct device *dev) { struct device_domain_info *info = dev_iommu_priv_get(dev); - dmar_remove_one_dev_info(dev); + iommu_disable_pci_caps(info); + domain_context_clear(info); + device_block_translation(dev); + intel_pasid_free_table(dev); dev_iommu_priv_set(dev, NULL); kfree(info); From patchwork Thu Nov 3 05:53:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 14666 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp342161wru; Wed, 2 Nov 2022 23:02:32 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6s1Wm2ZSIhVS2DYDqHnqBFpFBjVdxemm6VBJ0nYaTC3fMMTA1SA9ar14j3LYrdplWPBaFB X-Received: by 2002:a17:907:8a23:b0:78d:b042:eece with SMTP id sc35-20020a1709078a2300b0078db042eecemr26220166ejc.494.1667455352128; Wed, 02 Nov 2022 23:02:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1667455352; cv=none; d=google.com; s=arc-20160816; b=oBzPAwXZb2toky1inV/OYYcuq9TN+sbJlJhuiT+wciXwkYBdHiCOBdbxHmXqcl+GXC 6J6lAL5uLAnhyTtrHcgo1pUgFHtqPnhg0ZF6YtwD9MZmtV5NLDSv50WP/YzNQz182m7V nIzagzQndOC9x5K9dpchfDrAOghlG5AYFQBPvgMJoxrX8Fvod/MYmSnmqH7etVMWgfgB t+aMd6Tx4LK8iOW34vydL+Sj2PqP0MHlR8FNSvbGRsnR+Xt/hm+YF/VQl/2hjK5gE5RU nVxqaU80dZwPA3/a2N/OmK8FSayR5affmCpP5X/v/oUHB9/eI6ihgtrGmQbAhvCk3tMo qGsQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=EDGWvcACjCa2IeNk9XfXw04I5w7DsTGmMkb6f9hTX2k=; b=yEWhoZia5IA0s6Dz38wfj2QS9XNr3UeyN4ndwSbudV9J/gcrNRtFg+ZP3DZPjmNvK5 dTvg4Vk3ZwM4wuU4fUvou+mDOfRXHPjDJOzilc/fkJ1Urk5kg4oxWyJxjHW6HNNfAZDo moizwwqDywueu0T3ItUiPsPJXJlBgaO3BrClsYZMxjRC2Ljn8T08p53jRLOsxLDTMLqF SgXFru7P4OBrA6JXYbomJSzPtbNBGJ93UMNZ2z4ydqLpwX6ntezXpuQAwJKiajK5bGsx nbbd2XLscM7m9nH2+kBn6lQHxBd+/FM5U5BlQpMqSX8Wiu9K1mD+YtRsVPEGzIXjRdJf rD3w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=dhF7x3oY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id l18-20020a056402029200b004642b0f237esi148444edv.115.2022.11.02.23.02.08; Wed, 02 Nov 2022 23:02:32 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=dhF7x3oY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231183AbiKCGAn (ORCPT + 99 others); Thu, 3 Nov 2022 02:00:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39928 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231128AbiKCGAa (ORCPT ); Thu, 3 Nov 2022 02:00:30 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 14FD613E29 for ; Wed, 2 Nov 2022 23:00:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667455227; x=1698991227; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mc4vIypOieSvndflKVouNXUuy0SMzFwZmqjwCHrfFLg=; b=dhF7x3oYXgpO5/HqdXRwpb07PUvY4+PHeTnRiPlYy3trtqQLGjOE3RKv vvut8SEzZuSxjG7mZYX2Ol8nVO9q0Y5ZBSCmKGR2s+WPO+YfIEea900N7 iNuv8qtZQW6QHvQBGe0ZQqOTf8lCXpQbIs4k0tJB4sOwkaiOQGyKV2g1+ 9Wu5g2XuaOND9LppdnpQMLzzJFdRVB9dAqTtDrBg1OpV5ZOuof8sN1zfb 4JQyYe1liShp0Pn5zZoMQVm13EpJtZn5An5LQ54XUFWjogpWjtiYnjU7V 59mVVIoignUqq9tOd2TwnZuugB+ZLWxqojrXfcawIeuZ3m/zpfxaRCRRH g==; X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="311322518" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="311322518" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 23:00:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="723819319" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="723819319" Received: from allen-box.sh.intel.com ([10.239.159.48]) by FMSMGA003.fm.intel.com with ESMTP; 02 Nov 2022 23:00:24 -0700 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 5/7] iommu/vt-d: Rename domain_add_dev_info() Date: Thu, 3 Nov 2022 13:53:27 +0800 Message-Id: <20221103055329.633052-6-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221103055329.633052-1-baolu.lu@linux.intel.com> References: <20221103055329.633052-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-5.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748453662983021698?= X-GMAIL-MSGID: =?utf-8?q?1748453662983021698?= dmar_domain_attach_device() is more meaningful according to what this helper does. Signed-off-by: Lu Baolu --- drivers/iommu/intel/iommu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 393e07ac4c21..6ec5dd4e461b 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -2456,7 +2456,8 @@ static int __init si_domain_init(int hw) return 0; } -static int domain_add_dev_info(struct dmar_domain *domain, struct device *dev) +static int dmar_domain_attach_device(struct dmar_domain *domain, + struct device *dev) { struct device_domain_info *info = dev_iommu_priv_get(dev); struct intel_iommu *iommu; @@ -4266,7 +4267,7 @@ static int intel_iommu_attach_device(struct iommu_domain *domain, if (ret) return ret; - return domain_add_dev_info(to_dmar_domain(domain), dev); + return dmar_domain_attach_device(to_dmar_domain(domain), dev); } static int intel_iommu_map(struct iommu_domain *domain, From patchwork Thu Nov 3 05:53:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 14671 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp347501wru; Wed, 2 Nov 2022 23:18:48 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7uO7GRF2jYxPQmtPs/d4olbzH/xu4YrZ/jzDfn814yWyWdJTitKxNPgyQefGTa9tMyuVsM X-Received: by 2002:a17:90b:4c46:b0:213:d3e3:ba44 with SMTP id np6-20020a17090b4c4600b00213d3e3ba44mr21832062pjb.18.1667456328396; Wed, 02 Nov 2022 23:18:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1667456328; cv=none; d=google.com; s=arc-20160816; b=h8h6bVIoZjjvdgmcSIiBO3VizTuN8y2ZkuJGpsRtHvk7xAKqkBjVaYoHCe6u0i5T4G UVRPr75RJi3nbuwvzedXa1cHUpxj06mJrGUw80D9hiVByRDPMgzS227CuubvvCjRb5H2 Z7JU1ApL3TyNtWxgWGRtQa7jlZQw4KQG78PXEOhQKhWwOwmHbHJz8CYqlBgbri9pLxtY ocahoU7pZahvou4eqy+CGqmOIUwYgmicz0SnO0RDW5R4ztZmHkMQ/+jOr3SkWNvgbmCz nR0k80OaTrNT6bgfMR848PhiuxWtyiTxBhrp0B3QgGVGrbEciqW7lK5EL4/XqSLXal7C wqkg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Sbpaddpd1VMeuX3TZfW6yLRVawJWu6nPLWeCsPfoNOc=; b=wVwk2+uHXvl/x2raBpkYJzSPJtsXIu8tLcqmoQgZN42dPr/cluRQ0335WOb7R0AwWt YcwAnKbLhULe/vCEkvwaxjtt3+SmZWf6iRVqEIoXuKWzuos2kp4zjaRvSLY7soRzbmrl nfHwF5Gr97U428iiTqW1EuI6n1jA+2MHYk3XFK2CGtv6FXRbQr54Ivbvqb1ZbIr6ulXX uv/NpiTEMqKzIr0NWQ6AweuyxZ3mC3KleM3l62Bej/2YWXwpWQEDkpKWcYqUy0ln5vvu zagLKdfUrnyF5ogt8lPb8gxOYRXT8RhqgBuQJk049q29vgK0RR7R2QKoO/bwncecJA50 NsIQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=LQI0xOI9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i11-20020a63d44b000000b0045cbd4e43b8si18520710pgj.511.2022.11.02.23.18.34; Wed, 02 Nov 2022 23:18:48 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=LQI0xOI9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230520AbiKCGA4 (ORCPT + 99 others); Thu, 3 Nov 2022 02:00:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40158 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230500AbiKCGAb (ORCPT ); Thu, 3 Nov 2022 02:00:31 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2CAF4192B8 for ; Wed, 2 Nov 2022 23:00:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667455229; x=1698991229; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=QiRpo85cqFxjJ5iqjYeKDVL1Wbqll0BYbdczDs6g2tI=; b=LQI0xOI9afimDO727BrC7yvR9N/5/2QRDC2f6dIgF92DUuTcgidqPZMD N2jnwFjmgso5U/9n5eX0EmYtnSncZWXiErH3Ys+L4lDAm4Q6ZqmaDL4EA 25LFmu4XqrPZ/FL31LHMWXidPWiUUoAbsPcICzmrqcvNYGSfWDh4f+bFK SSNrRUImv/6bM7uTzDexaLwaiJs5hD6Q6kExvc3CZMVWFCndX3snZ5zKy rX37FUxaDqVaqyn6rSzt6OHqzJvmR2lxVQ7cDj1T0Vk8A5SL/Fzf8Xvdv 4Su6zIdCVbo+Tm0DDVCMn3jpi0SxG4c3XdNhz3e855iiIW9bWRzgH2kRv Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="311322528" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="311322528" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 23:00:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="723819324" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="723819324" Received: from allen-box.sh.intel.com ([10.239.159.48]) by FMSMGA003.fm.intel.com with ESMTP; 02 Nov 2022 23:00:26 -0700 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 6/7] iommu/vt-d: Remove unnecessary domain_context_mapped() Date: Thu, 3 Nov 2022 13:53:28 +0800 Message-Id: <20221103055329.633052-7-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221103055329.633052-1-baolu.lu@linux.intel.com> References: <20221103055329.633052-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-5.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748454687171974506?= X-GMAIL-MSGID: =?utf-8?q?1748454687171974506?= The device_domain_info::domain accurately records the domain attached to the device. It is unnecessary to check whether the context is present in the attach_dev path. Remove it to make the code neat. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 47 +++---------------------------------- 1 file changed, 3 insertions(+), 44 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 6ec5dd4e461b..5c7a574fad38 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -780,19 +780,6 @@ static void domain_flush_cache(struct dmar_domain *domain, clflush_cache_range(addr, size); } -static int device_context_mapped(struct intel_iommu *iommu, u8 bus, u8 devfn) -{ - struct context_entry *context; - int ret = 0; - - spin_lock(&iommu->lock); - context = iommu_context_addr(iommu, bus, devfn, 0); - if (context) - ret = context_present(context); - spin_unlock(&iommu->lock); - return ret; -} - static void free_context_table(struct intel_iommu *iommu) { struct context_entry *context; @@ -2100,30 +2087,6 @@ domain_context_mapping(struct dmar_domain *domain, struct device *dev) &domain_context_mapping_cb, &data); } -static int domain_context_mapped_cb(struct pci_dev *pdev, - u16 alias, void *opaque) -{ - struct intel_iommu *iommu = opaque; - - return !device_context_mapped(iommu, PCI_BUS_NUM(alias), alias & 0xff); -} - -static int domain_context_mapped(struct device *dev) -{ - struct intel_iommu *iommu; - u8 bus, devfn; - - iommu = device_to_iommu(dev, &bus, &devfn); - if (!iommu) - return -ENODEV; - - if (!dev_is_pci(dev)) - return device_context_mapped(iommu, bus, devfn); - - return !pci_for_each_dma_alias(to_pci_dev(dev), - domain_context_mapped_cb, iommu); -} - /* Returns a number of VTD pages, but aligned to MM page size */ static inline unsigned long aligned_nrpages(unsigned long host_addr, size_t size) @@ -4247,6 +4210,7 @@ static int prepare_domain_attach_device(struct iommu_domain *domain, static int intel_iommu_attach_device(struct iommu_domain *domain, struct device *dev) { + struct device_domain_info *info = dev_iommu_priv_get(dev); int ret; if (domain->type == IOMMU_DOMAIN_UNMANAGED && @@ -4255,13 +4219,8 @@ static int intel_iommu_attach_device(struct iommu_domain *domain, return -EPERM; } - /* normally dev is not mapped */ - if (unlikely(domain_context_mapped(dev))) { - struct device_domain_info *info = dev_iommu_priv_get(dev); - - if (info->domain) - device_block_translation(dev); - } + if (info->domain) + device_block_translation(dev); ret = prepare_domain_attach_device(domain, dev); if (ret) From patchwork Thu Nov 3 05:53:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 14670 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp346807wru; Wed, 2 Nov 2022 23:16:45 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7cUL0S7ULBCPXNuvr5EBQKl4Eoz70zeSyYwJ2QjMcraV6uJwqG6bKdpMKLd0C7CM4rWYDQ X-Received: by 2002:a17:902:ec81:b0:187:226d:7f9a with SMTP id x1-20020a170902ec8100b00187226d7f9amr19333284plg.164.1667456205706; Wed, 02 Nov 2022 23:16:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1667456205; cv=none; d=google.com; s=arc-20160816; b=mFVoCRb2bqz2Ttko3+pT9w2b+5oF6Eu/K34U1/D56YPdhL6SfOXkGuURyhhzNSuYea u2RvnH5YApPwdlohXfWLsMvBHl55inFHEBKqBeXPoKAN4MwzbH0diKezC0UJSwjmbrtt 1uQDbMU7J6pG3KdG73OxzWyI0P34p387gE8sZ2xYxu39VsHzGkgInaMZCCBfu+PHsgDC tFPiLNsXU1kJBjQqYpL/v0wk5uM9uJZE4+ywFYpBTTtrdDUsVKKB7P8CDdI7OGjWbFx7 QyaeaW/srs+a6yTGL1YMnEsjGAwRVulV7aAkZ4Mz9KVB56QZJNCr5+k+wGAAapUHBej/ qz0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=gCV/opdj21AADp7qTT+6a80rqVZFqLZuIlaor6waiOA=; b=d+TJJvzgvwZcRaiyxCFdCqdbRriRMr3YbNZ+DUsMVB1slmgcXedUjegKeYGiG/yw3I fdwPjHYxxhpV0tPyNDABniZnbDXgs3P77UK7CXMuo8yVu2yH5j1vfDvpCiSMDhzyktLk cwBhRXVn2GpCNaUKhA2M6zKQgqCCs/2c3z4vkOAeqrdjo3CVoKyve1Exfmop5xTWjXuS SfHVVuK1KEswJOCjZGEhNwTcUwIOy6RGvi9Hb85no6VFnT8iUzLyKnOSeEAGGO0HYuzp 4UM7UJJFvTncCy5lpNIuxqWdVlojlE7Juc1DUGfHUES8eHoQPIRuTDpkOQuHeHBOWEs9 8sWA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=YxtaM3Px; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id t68-20020a637847000000b0043c3fa353d6si30299pgc.153.2022.11.02.23.16.32; Wed, 02 Nov 2022 23:16:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=YxtaM3Px; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231146AbiKCGB2 (ORCPT + 99 others); Thu, 3 Nov 2022 02:01:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40900 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231160AbiKCGBL (ORCPT ); Thu, 3 Nov 2022 02:01:11 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 728671B1EE for ; Wed, 2 Nov 2022 23:00:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667455255; x=1698991255; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=X4+v4vxJ0haUTnYKGqOVSwGnGENKo2Aw35P8YezCiro=; b=YxtaM3PxiIfzg1W8kYhm7vrNf7OGaK0dr8PeQ3hKjkHI7TWd+q/Eo9l1 vMtnSJPCsr28sQDqUeObfOdXBJ1w06LU6yOCeFqrr1RTYpnqRHGnXZ5jX fF/oLWW/6EOSOR6FHl6lNmNm5VVdmWHCYjyL4r1IgehW2Hrg5BJdZsg8g I/OQ+v66gImHE/7LPqs+GlCt/EUE3rRKCJGyUjuwNfz3CYFsb0m8+BYpq f1hCB6GFRFhsOK9o+JdCjkW62m5/gRbrNNG/ftyHHdL0BP56TUEMzuGwb j4MXqMcyabE/rDFRn0/fDK0cb2OMnzfn/aVNO8SRnKOxOrslLScJsb27w w==; X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="311322538" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="311322538" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 23:00:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="723819335" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="723819335" Received: from allen-box.sh.intel.com ([10.239.159.48]) by FMSMGA003.fm.intel.com with ESMTP; 02 Nov 2022 23:00:28 -0700 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 7/7] iommu/vt-d: Use real field for indication of first level Date: Thu, 3 Nov 2022 13:53:29 +0800 Message-Id: <20221103055329.633052-8-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221103055329.633052-1-baolu.lu@linux.intel.com> References: <20221103055329.633052-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-5.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748454558039361240?= X-GMAIL-MSGID: =?utf-8?q?1748454558039361240?= The dmar_domain uses bit field members to indicate the behaviors. Add a bit field for using first level and remove the flags member to avoid duplication. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.h | 15 +++++---------- drivers/iommu/intel/iommu.c | 25 ++++++++++--------------- 2 files changed, 15 insertions(+), 25 deletions(-) diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h index 251a609fdce3..7b7234689cb4 100644 --- a/drivers/iommu/intel/iommu.h +++ b/drivers/iommu/intel/iommu.h @@ -515,14 +515,6 @@ struct context_entry { u64 hi; }; -/* - * When VT-d works in the scalable mode, it allows DMA translation to - * happen through either first level or second level page table. This - * bit marks that the DMA translation for the domain goes through the - * first level page table, otherwise, it goes through the second level. - */ -#define DOMAIN_FLAG_USE_FIRST_LEVEL BIT(1) - struct iommu_domain_info { struct intel_iommu *iommu; unsigned int refcnt; /* Refcount of devices per iommu */ @@ -539,6 +531,11 @@ struct dmar_domain { u8 iommu_coherency: 1; /* indicate coherency of iommu access */ u8 force_snooping : 1; /* Create IOPTEs with snoop control */ u8 set_pte_snp:1; + u8 use_first_level:1; /* DMA translation for the domain goes + * through the first level page table, + * otherwise, goes through the second + * level. + */ spinlock_t lock; /* Protect device tracking lists */ struct list_head devices; /* all devices' list */ @@ -548,8 +545,6 @@ struct dmar_domain { /* adjusted guest address width, 0 is level 2 30-bit */ int agaw; - - int flags; /* flags to find out type of domain */ int iommu_superpage;/* Level of superpages supported: 0 == 4KiB (no superpages), 1 == 2MiB, 2 == 1GiB, 3 == 512GiB, 4 == 1TiB */ diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 5c7a574fad38..9fb13250d84a 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -383,11 +383,6 @@ static inline int domain_type_is_si(struct dmar_domain *domain) return domain->domain.type == IOMMU_DOMAIN_IDENTITY; } -static inline bool domain_use_first_level(struct dmar_domain *domain) -{ - return domain->flags & DOMAIN_FLAG_USE_FIRST_LEVEL; -} - static inline int domain_pfn_supported(struct dmar_domain *domain, unsigned long pfn) { @@ -501,7 +496,7 @@ static int domain_update_iommu_superpage(struct dmar_domain *domain, rcu_read_lock(); for_each_active_iommu(iommu, drhd) { if (iommu != skip) { - if (domain && domain_use_first_level(domain)) { + if (domain && domain->use_first_level) { if (!cap_fl1gp_support(iommu->cap)) mask = 0x1; } else { @@ -579,7 +574,7 @@ static void domain_update_iommu_cap(struct dmar_domain *domain) * paging and 57-bits with 5-level paging). Hence, skip bit * [N-1]. */ - if (domain_use_first_level(domain)) + if (domain->use_first_level) domain->domain.geometry.aperture_end = __DOMAIN_MAX_ADDR(domain->gaw - 1); else domain->domain.geometry.aperture_end = __DOMAIN_MAX_ADDR(domain->gaw); @@ -947,7 +942,7 @@ static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain, domain_flush_cache(domain, tmp_page, VTD_PAGE_SIZE); pteval = ((uint64_t)virt_to_dma_pfn(tmp_page) << VTD_PAGE_SHIFT) | DMA_PTE_READ | DMA_PTE_WRITE; - if (domain_use_first_level(domain)) { + if (domain->use_first_level) { pteval |= DMA_FL_PTE_XD | DMA_FL_PTE_US; if (iommu_is_dma_domain(&domain->domain)) pteval |= DMA_FL_PTE_ACCESS; @@ -1500,7 +1495,7 @@ static void iommu_flush_iotlb_psi(struct intel_iommu *iommu, if (ih) ih = 1 << 6; - if (domain_use_first_level(domain)) { + if (domain->use_first_level) { qi_flush_piotlb(iommu, did, PASID_RID2PASID, addr, pages, ih); } else { unsigned long bitmask = aligned_pages - 1; @@ -1554,7 +1549,7 @@ static inline void __mapping_notify_one(struct intel_iommu *iommu, * It's a non-present to present mapping. Only flush if caching mode * and second level. */ - if (cap_caching_mode(iommu->cap) && !domain_use_first_level(domain)) + if (cap_caching_mode(iommu->cap) && !domain->use_first_level) iommu_flush_iotlb_psi(iommu, domain, pfn, pages, 0, 1); else iommu_flush_write_buffer(iommu); @@ -1570,7 +1565,7 @@ static void intel_flush_iotlb_all(struct iommu_domain *domain) struct intel_iommu *iommu = info->iommu; u16 did = domain_id_iommu(dmar_domain, iommu); - if (domain_use_first_level(dmar_domain)) + if (dmar_domain->use_first_level) qi_flush_piotlb(iommu, did, PASID_RID2PASID, 0, -1, 0); else iommu->flush.flush_iotlb(iommu, did, 0, 0, @@ -1743,7 +1738,7 @@ static struct dmar_domain *alloc_domain(unsigned int type) domain->nid = NUMA_NO_NODE; if (first_level_by_default(type)) - domain->flags |= DOMAIN_FLAG_USE_FIRST_LEVEL; + domain->use_first_level = true; domain->has_iotlb_device = false; INIT_LIST_HEAD(&domain->devices); spin_lock_init(&domain->lock); @@ -2176,7 +2171,7 @@ __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn, attr = prot & (DMA_PTE_READ | DMA_PTE_WRITE | DMA_PTE_SNP); attr |= DMA_FL_PTE_PRESENT; - if (domain_use_first_level(domain)) { + if (domain->use_first_level) { attr |= DMA_FL_PTE_XD | DMA_FL_PTE_US | DMA_FL_PTE_ACCESS; if (prot & DMA_PTE_WRITE) attr |= DMA_FL_PTE_DIRTY; @@ -2446,7 +2441,7 @@ static int dmar_domain_attach_device(struct dmar_domain *domain, if (hw_pass_through && domain_type_is_si(domain)) ret = intel_pasid_setup_pass_through(iommu, domain, dev, PASID_RID2PASID); - else if (domain_use_first_level(domain)) + else if (domain->use_first_level) ret = domain_setup_first_level(iommu, domain, dev, PASID_RID2PASID); else @@ -4390,7 +4385,7 @@ static void domain_set_force_snooping(struct dmar_domain *domain) * Second level page table supports per-PTE snoop control. The * iommu_map() interface will handle this by setting SNP bit. */ - if (!domain_use_first_level(domain)) { + if (!domain->use_first_level) { domain->set_pte_snp = true; return; }