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Thu, 17 Aug 2023 00:19:23 GMT Received: from smtpav03.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 33A7B58054; Thu, 17 Aug 2023 00:19:23 +0000 (GMT) Received: from smtpav03.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6E87A5805D; Thu, 17 Aug 2023 00:19:22 +0000 (GMT) Received: from li-e362e14c-2378-11b2-a85c-87d605f3c641.ibm.com (unknown [9.61.62.89]) by smtpav03.wdc07v.mail.ibm.com (Postfix) with ESMTP; Thu, 17 Aug 2023 00:19:22 +0000 (GMT) Message-ID: <1b4592764a6ad5bdd691e2b2ca2e9f824740f323.camel@us.ibm.com> Subject: [PATCH ver 2] rs6000, add overloaded DFP quantize support To: "Kewen.Lin" , Peter Bergner , Segher Boessenkool , David Edelsohn , gcc-patches@gcc.gnu.org Cc: cel@us.ibm.com Date: Wed, 16 Aug 2023 17:19:21 -0700 X-Mailer: Evolution 3.28.5 (3.28.5-18.el8) Mime-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: PLed8o31X-PgP_s0Bd6zG_epQmDU5X0n X-Proofpoint-ORIG-GUID: iLccxx4qt_omMdvGrftuAUoe6j3xzI4V X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-08-16_21,2023-08-15_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 phishscore=0 spamscore=0 mlxlogscore=999 priorityscore=1501 mlxscore=0 suspectscore=0 malwarescore=0 adultscore=0 bulkscore=0 impostorscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2308160214 X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Carl Love via Gcc-patches From: Carl Love Reply-To: Carl Love Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1774433491315366970 X-GMAIL-MSGID: 1774433491315366970 GCC maintainers: Version 2, renamed the built-in instances. Changed the name of the overloaded built-in. Added the missing documentation for the new built-ins. Fixed typos. Changed name of the test. Updated the effective target for the test. Retested the patch on Power 10LE and Power 8 and Power 9. The following patch adds four built-ins for the decimal floating point (DFP) quantize instructions on rs6000. The built-ins are for 64-bit and 128-bit DFP operands. The patch also adds a test case for the new builtins. The Patch has been tested on Power 10LE and Power 9 LE/BE. Please let me know if the patch is acceptable for mainline. Thanks. Carl Love -------------------------------------------------- [PATCH] rs6000, add overloaded DFP quantize support Add decimal floating point (DFP) quantize built-ins for both 64-bit DFP and 128-DFP operands. In each case, there is an immediate version and a variable version of the built-in. The RM value is a 2-bit constant int which specifies the rounding mode to use. For the immediate versions of the built-in, the TE field is a 5-bit constant that specifies the value of the ideal exponent for the result. The built-in specifications are: __Decimal64 builtin_dfp_quantize (_Decimal64, _Decimal64, const int RM) __Decimal64 builtin_dfp_quantize (const int TE, _Decimal64, const int) __Decimal128 builtin_dfp_quantize (_Decimal128, _Decimal128, const int RM) __Decimal128 builtin_dfp_quantize (const int TE, _Decimal128, const int) A testcase is added for the new built-in definitions. gcc/ChangeLog: * config/rs6000/dfp.md: New UNSPECDQUAN. (dfp_quan_, dfp_quan_i): New define_insn. * config/rs6000/rs6000-builtins.def (__builtin_dfp_quantize_64, __builtin_dfp_quantize_64i, __builtin_dfp_quantize_128, __builtin_dfp_quantize_128i): New buit-in definitions. * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize, __builtin_dfpq_quantize): New overloaded definitions. gcc/testsuite/ * gcc.target/powerpc/builtin-dfp-quantize-runnable.c: New test case. --- gcc/config/rs6000/dfp.md | 25 ++- gcc/config/rs6000/rs6000-builtins.def | 15 ++ gcc/config/rs6000/rs6000-overload.def | 10 + gcc/doc/extend.texi | 15 ++ .../gcc.target/powerpc/pr93448-dfp-quantize.c | 199 ++++++++++++++++++ 5 files changed, 263 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr93448-dfp-quantize.c diff --git a/gcc/config/rs6000/dfp.md b/gcc/config/rs6000/dfp.md index 5ed8a73ac51..abd21c5db75 100644 --- a/gcc/config/rs6000/dfp.md +++ b/gcc/config/rs6000/dfp.md @@ -271,7 +271,8 @@ UNSPEC_DIEX UNSPEC_DSCLI UNSPEC_DTSTSFI - UNSPEC_DSCRI]) + UNSPEC_DSCRI + UNSPEC_DQUAN]) (define_code_iterator DFP_TEST [eq lt gt unordered]) @@ -395,3 +396,25 @@ "dscri %0,%1,%2" [(set_attr "type" "dfp") (set_attr "size" "")]) + +(define_insn "dfp_dquan_" + [(set (match_operand:DDTD 0 "gpc_reg_operand" "=d") + (unspec:DDTD [(match_operand:DDTD 1 "gpc_reg_operand" "d") + (match_operand:DDTD 2 "gpc_reg_operand" "d") + (match_operand:QI 3 "immediate_operand" "i")] + UNSPEC_DQUAN))] + "TARGET_DFP" + "dqua %0,%1,%2,%3" + [(set_attr "type" "dfp") + (set_attr "size" "")]) + +(define_insn "dfp_dquan_i" + [(set (match_operand:DDTD 0 "gpc_reg_operand" "=d") + (unspec:DDTD [(match_operand:SI 1 "const_int_operand" "n") + (match_operand:DDTD 2 "gpc_reg_operand" "d") + (match_operand:SI 3 "immediate_operand" "i")] + UNSPEC_DQUAN))] + "TARGET_DFP" + "dquai %1,%0,%2,%3" + [(set_attr "type" "dfp") + (set_attr "size" "")]) diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def index 8a294d6c934..a7ab90771f9 100644 --- a/gcc/config/rs6000/rs6000-builtins.def +++ b/gcc/config/rs6000/rs6000-builtins.def @@ -2983,6 +2983,21 @@ const unsigned long long __builtin_unpack_dec128 (_Decimal128, const int<1>); UNPACK_TD unpacktd {} + const _Decimal64 __builtin_dfp_dqua (_Decimal64, _Decimal64, \ + const int<2>); + DFPQUAN_64 dfp_dquan_dd {} + + const _Decimal64 __builtin_dfp_dquai (const int<5>, _Decimal64, \ + const int<2>); + DFPQUAN_64i dfp_dquan_idd {} + + const _Decimal128 __builtin_dfp_dquaq (_Decimal128, _Decimal128, \ + const int<2>); + DFPQUAN_128 dfp_dquan_td {} + + const _Decimal128 __builtin_dfp_dquaqi (const int<5>, _Decimal128, \ + const int<2>); + DFPQUAN_128i dfp_dquan_itd {} [crypto] const vull __builtin_crypto_vcipher (vull, vull); diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def index b83946f5ad8..38d92fcf1f0 100644 --- a/gcc/config/rs6000/rs6000-overload.def +++ b/gcc/config/rs6000/rs6000-overload.def @@ -195,6 +195,16 @@ unsigned long long __builtin_cmpb (unsigned long long, unsigned long long); CMPB +[DFPQUAN, dfp_quantize, __builtin_dfp_quantize] + _Decimal64 __builtin_dfp_quantize (_Decimal64, _Decimal64, const int); + DFPQUAN_64 + _Decimal64 __builtin_dfp_quantize (const int, _Decimal64, const int); + DFPQUAN_64i + _Decimal128 __builtin_dfp_quantize (_Decimal128, _Decimal128, const int); + DFPQUAN_128 + _Decimal128 __builtin_dfp_quantize (const int, _Decimal128, const int); + DFPQUAN_128i + [VEC_ABS, vec_abs, __builtin_vec_abs] vsc __builtin_vec_abs (vsc); ABS_V16QI diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 73a997276cb..b3b92bf0632 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -18566,6 +18566,21 @@ The builtin uses the ISA 3.0 instruction @code{mffscdrn} if available. Otherwise the builtin reads the FPSCR, masks the current decimal rounding mode bits out and OR's in the new value. +_Decimal64 __builtin_dfp_quantize (_Decimal64, _Decimal64, const int); +_Decimal64 __builtin_dfp_quantize (const int, _Decimal64, const int); +_Decimal128 __builtin_dfp_quantize (_Decimal128, _Decimal128, const int); +_Decimal128 __builtin_dfp_quantize (const int, _Decimal128, const int); + +The @code{__builtin_dfp_quantize} built-in, converts and rounds the second +argument to the form with the same exponent as that of the first operand. +If the first argument is a constant int, then the 5-bit value in the second +argument is converted and rounded to the form with the exponent specified by +the 5-bit const int value in the first argument. The third argument, constant +int, is a two bit field that specifies the rounding mode. The possible modes +are: 00 Round to nearest, ties to even; 01 Round toward 0; 10 Round to nearest, +ties away from 0; 11 Round according to DRN where DRN is the Decimal Floating +point field of the FPSCR. + @end smallexample The following functions require @option{-mhard-float}, diff --git a/gcc/testsuite/gcc.target/powerpc/pr93448-dfp-quantize.c b/gcc/testsuite/gcc.target/powerpc/pr93448-dfp-quantize.c new file mode 100644 index 00000000000..9a6a1fdaea0 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr93448-dfp-quantize.c @@ -0,0 +1,199 @@ +/* { dg-do run } */ +/* { dg-require-effective-target dfp_hw} */ +/* { dg-require-effective-target has_arch_pwr6} */ +/* { dg-options "-mhard-float -O2 -save-temps" } */ + + +#define DEBUG 0 + +#ifdef DEBUG +#include +#endif +#include + +void abort (void); + +int main() +{ +#define IMM2 2 +#define IMM3 3 +#define IMM4 4 + + _Decimal64 srcA_dfp64, srcB_dfp64; + _Decimal64 result_dfp64; + _Decimal64 expected_result_dfp64; + _Decimal128 srcA_dfp128, srcB_dfp128; + _Decimal128 result_dfp128; + _Decimal128 expected_result_dfp128; + + /* Third argument of quantize built-ins is the rounding mode value (RMC). + + RMC Rounding Mode + 00 Round to nearest, ties to even + 01 Round toward 0 + 10 Round to nearest, ties toward 0 + 11 Round according to DRN */ + + + /* Tests for quantize with 64-bit DFP variable. */ + srcA_dfp64 = 100.0df; + srcB_dfp64 = 300.456789df; + expected_result_dfp64 = 300.5df; + + result_dfp64 = __builtin_dfp_quantize (srcA_dfp64, srcB_dfp64, 0x0); + + if (result_dfp64 != expected_result_dfp64) +#if DEBUG + printf("DFP 64-bit quantize of variable, RMC = 0 result does not match expected result\n"); +#else + abort(); +#endif + + srcA_dfp64 = 100.00df; + srcB_dfp64 = 300.456789df; + expected_result_dfp64 = 300.45df; + + result_dfp64 = __builtin_dfp_quantize (srcA_dfp64, srcB_dfp64, 0x1); + + if (result_dfp64 != expected_result_dfp64) +#if DEBUG + printf("DFP 64-bit quantize of variable, RMC = 1 result does not match expected result\n"); +#else + abort(); +#endif + + srcA_dfp64 = 100.001df; + srcB_dfp64 = 3001.456789df; + expected_result_dfp64 = 3001.457df; + + result_dfp64 = __builtin_dfp_quantize (srcA_dfp64, srcB_dfp64, 0x2); + + if (result_dfp64 != expected_result_dfp64) +#if DEBUG + printf("DFP 64-bit quantize of variable, RMC = 2 result does not match expected result\n"); +#else + abort(); +#endif + + /* Tests for 64-bit quantize with immediate value. */ + + srcB_dfp64 = 10.4567df; + expected_result_dfp64 = 000.0df; + + result_dfp64 = __builtin_dfp_quantize (IMM2, srcB_dfp64, 0x0); + + if (result_dfp64 != expected_result_dfp64) +#if DEBUG + printf("DFP 64-bit quantize immediate, RMC = 0 result does not match expected result\n"); +#else + abort(); +#endif + + srcB_dfp64 = 104567.891df; + expected_result_dfp64 = 100000.0df; + + result_dfp64 = __builtin_dfp_quantize (IMM4, srcB_dfp64, 0x1); + + if (result_dfp64 != expected_result_dfp64) +#if DEBUG + printf("DFP 64-bit quantize immediate, RMC = 1 result does not match expected result\n"); +#else + abort(); +#endif + + srcB_dfp64 = 109876.54321df; + expected_result_dfp64 = 109900.0df; + + result_dfp64 = __builtin_dfp_quantize (IMM2, srcB_dfp64, 0x2); + + if (result_dfp64 != expected_result_dfp64) +#if DEBUG + printf("DFP 64-bit quantize immediate, RMC = 2 result does not match expected result\n"); +#else + abort(); +#endif + + /* Tests for quantize 128-bit DFP variable. */ + srcA_dfp128 = 0.018df; + srcB_dfp128 = 50000.18345df; + expected_result_dfp128 = 50000.180df; + + result_dfp128 = __builtin_dfp_quantize (srcA_dfp128, srcB_dfp128, 0x0); + + if (result_dfp128 != expected_result_dfp128) +#if DEBUG + printf("DFP 128-bit quantize variable, RMC = 0 result does not match expected result\n"); +#else + abort(); +#endif + + srcA_dfp128 = 8.01df; + srcB_dfp128 = 50000.18345df; + expected_result_dfp128 = 50000.18df; + + result_dfp128 = __builtin_dfp_quantize (srcA_dfp128, srcB_dfp128, 0x1); + + if (result_dfp128 != expected_result_dfp128) +#if DEBUG + printf("DFP 128-bit quantize variable, RMC = 1 result does not match expected result\n"); +#else + abort(); +#endif + + srcA_dfp128 = 0.1234df; + srcB_dfp128 = 50000.18346789df; + expected_result_dfp128 = 50000.1800df; + + result_dfp128 = __builtin_dfp_quantize (srcA_dfp128, srcB_dfp128, 0x2); + + if (result_dfp128 != expected_result_dfp128) +#if DEBUG + printf("DFP 128-bit quantize variable, RMC = 2 result does not match expected result\n"); +#else + abort(); +#endif + + /* Tests for 128-bit quantize with immediate value. */ + srcB_dfp128 = 1234.18345df; + expected_result_dfp128 = 1200.0df; + + result_dfp128 = __builtin_dfp_quantize (IMM2, srcB_dfp128, 0x0); + + if (result_dfp128 != expected_result_dfp128) +#if DEBUG + printf("DFP 128-bit quantize immediate, RMC = 0 result does not match expected result\n"); +#else + abort(); +#endif + + srcB_dfp128 = 123456.18345df; + expected_result_dfp128 = 120000.0df; + + result_dfp128 = __builtin_dfp_quantize (IMM4, srcB_dfp128, 0x1); + + if (result_dfp128 != expected_result_dfp128) +#if DEBUG + printf("DFP 128-bit quantize immediate, RMC = 1 result does not match expected result\n"); +#else + abort(); +#endif + + srcB_dfp128 = 12361834.5df; + expected_result_dfp128 = 12362000.0df; + + result_dfp128 = __builtin_dfp_quantize (IMM3, srcB_dfp128, 0x2); + + if (result_dfp128 != expected_result_dfp128) +#if DEBUG + printf("DFP 128-bit quantize immediate, RMC = 2 result does not match expected result\n"); +#else + abort(); +#endif + + return 0; +} + +/* { dg-final { scan-assembler-times {\mdqua\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mdquai\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mdquaq\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mdquaiq\M} 3 } } */