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Signed-off-by: Thippeswamy Havalige Signed-off-by: Bharat Kumar Gogada Acked-by: Rob Herring --- changes in v4: None changes in v3: None changes in v2: None. changes in v1: None. --- Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml index 897602559b37..426f90a47f35 100644 --- a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml @@ -118,7 +118,7 @@ examples: compatible = "xlnx,nwl-pcie-2.11"; reg = <0x0 0xfd0e0000 0x0 0x1000>, <0x0 0xfd480000 0x0 0x1000>, - <0x80 0x00000000 0x0 0x1000000>; + <0x80 0x00000000 0x0 0x10000000>; reg-names = "breg", "pcireg", "cfg"; ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>, <0x43000000 0x00000006 0x0 0x00000006 0x0 0x00000002 0x0>; From patchwork Mon Aug 14 17:14:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Havalige, Thippeswamy" X-Patchwork-Id: 135580 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b824:0:b0:3f2:4152:657d with SMTP id z4csp2898884vqi; Mon, 14 Aug 2023 10:39:41 -0700 (PDT) X-Google-Smtp-Source: AGHT+IF2jPMx+pWrakEsIBOiAC/9HnXiwKeuf9RmrkfATCAFyGsgK22KESX3srMLaJXU3eZ/FUrP X-Received: by 2002:a17:902:b907:b0:1b3:e90b:93e1 with SMTP id bf7-20020a170902b90700b001b3e90b93e1mr9114937plb.36.1692034780885; Mon, 14 Aug 2023 10:39:40 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1692034780; cv=pass; d=google.com; s=arc-20160816; b=j5Qb8uhiIOzV1bfZ2gWUZRhbtLnYYzsr1eZHevqaA0oyLwoEPon0LT2n3dvboNFDDC Jf47nGExnyIeAJRIG4Kd7iwI7Irbd+JHkip7PZksG63GI+ERMgjRbbv5JXKTq/Z4YJjB uERanvRaa0szMHbv/yGzL/3MBpJi3JFaU7MhBHXWVTh6Wjvb3rCsYf7RT+LMW+8Az7G+ cxPReShZoU7JbPx7Qz8l1WpMYaHb/WRn+RvepXb583jiCohUGQRA3rUEZqXOwXmb2qQm CakUq6XUhsBfmKuuR+6Xtg9NfT06V9blnYx2Z+5GfPIkR+/ozr6S4B0XzmQaDFALj5Dn Hfog== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=deIE6rovC3luWUuvw9waiKbKe9xE6VjwznnRTal4t+k=; fh=x9JwCQ+056UD2yuDQWr9C55Ra0ADzj1DuwnsfWoeIy8=; b=mM+mBSzXJ+oMvPmrk352xPL+CJrnENdIKH75SYQDaEjb2pyMnDT0SXEW+PvUV4IUyz UQCfWLt74ZQFxeAOSluFL5MOcVzVf29Ei+jlZEirsg56X1Y2SblM0uA8OhZsOMlKaNL3 ILqdn6iB+jl3jqBr6fI9IGCzQC2YlNCBbzVOyJ5KpOKh9xDb3t1Ts+n2E01hLRmRil/G LPkuZnVKR+erTNYcNLE4oc3RbH6tS4Dp36CSYlyoCMlAw7ejmk9c8s1F8pyf5aOAftsu G/l6TK6UQPWShIa4jh81IW5MOowyDxba2PQm/88xPYj/QmiJ5295WU5cBKr0lSa9GbcO 9lnw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=RqFsbHOJ; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Thippeswamy Havalige Signed-off-by: Bharat Kumar Gogada --- changes in v4: - Rename macro changes in v3: - Remove periods at end of subject line - Update commit logs changes in v2: - Update this changes in a seperate patch. --- drivers/pci/controller/pcie-xilinx-nwl.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/controller/pcie-xilinx-nwl.c index d8a3a08be1d5..8fe0e8a325b0 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -126,7 +126,7 @@ #define E_ECAM_CR_ENABLE BIT(0) #define E_ECAM_SIZE_LOC GENMASK(20, 16) #define E_ECAM_SIZE_SHIFT 16 -#define NWL_ECAM_VALUE_DEFAULT 12 +#define NWL_ECAM_MAX_SIZE 12 #define CFG_DMA_REG_BAR GENMASK(2, 0) #define CFG_PCIE_CACHE GENMASK(7, 0) @@ -165,7 +165,6 @@ struct nwl_pcie { u32 ecam_size; int irq_intx; int irq_misc; - u32 ecam_value; struct nwl_msi msi; struct irq_domain *legacy_irq_domain; struct clk *clk; @@ -674,7 +673,7 @@ static int nwl_pcie_bridge_init(struct nwl_pcie *pcie) E_ECAM_CR_ENABLE, E_ECAM_CONTROL); nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, E_ECAM_CONTROL) | - (pcie->ecam_value << E_ECAM_SIZE_SHIFT), + (NWL_ECAM_MAX_SIZE << E_ECAM_SIZE_SHIFT), E_ECAM_CONTROL); nwl_bridge_writel(pcie, lower_32_bits(pcie->phys_ecam_base), @@ -782,7 +781,6 @@ static int nwl_pcie_probe(struct platform_device *pdev) pcie = pci_host_bridge_priv(bridge); pcie->dev = dev; - pcie->ecam_value = NWL_ECAM_VALUE_DEFAULT; err = nwl_pcie_parse_dt(pcie, pdev); if (err) {