From patchwork Fri Aug 11 16:14:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Marussi X-Patchwork-Id: 134595 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b824:0:b0:3f2:4152:657d with SMTP id z4csp1222695vqi; Fri, 11 Aug 2023 09:46:16 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGel/MtzruK+77jntnmsI/8FCz5PIHDMXdwaGCd26pFw4HzGSlkCq7cMWQKxqq0LMFzfMOw X-Received: by 2002:a05:6a00:a8b:b0:687:b78f:463 with SMTP id b11-20020a056a000a8b00b00687b78f0463mr2322161pfl.34.1691772376053; Fri, 11 Aug 2023 09:46:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691772376; cv=none; d=google.com; s=arc-20160816; b=JpG9XzeMUzk5thVJv9EM03DXx5502syzlPjwn5aj+dp2iI2+1iBUUVKJlqCk40/S0U AHcrV6uezgqJFWf4MyN7Abbolb0s5Y7Bgcb3E/eTNcCzyk1UNAqdy/oBYswPSIrZIBMD GS8KyTA9+n5nyzn8KjyAsKqB639sFEoVYiBCeZyFdBnr9QdGxl73+B79kE9DNPex/wMl MjZM99C28gcyQz5GDDDo/x5WQaFmVzABjku1CYRgKkafFHm/IwnhtO8qrKDpOpG3z2xW kO7UMMX9teCL0FCtgx2UyjoUtzfiwx+ZJodqYUmvvkcT7746EwZAQwKSHJMC5bFKpXCW 6tGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=VD4MNvruRy5k7KvjgyeNgabq2ub4TmSWKv4rWzIE5f4=; fh=S+pyV4uNeYv17K2EadaTrxZRaJH55XFTUj83MlxgjWo=; b=YffORF7ChmHHe8UK+CY0+O9RKnN+Zl0HfrPpsIU+2nD+qUGaXrvKtkyY5ou8OZyVMv CbO0rQ8j6oFhZYb4hl3yIPqVANrTSvc4gqfaRqAQupA7sGWHNGQoK0f0M7ptzxfs2vOZ J1ik+5lVYdC7RJK2IIHhP4zq8F0ickQTTw09Q3VZ/zwnkmqSf3odwOl2YGF6EU9Q8lXg Rxi4+7FmLPkEhpGCuZz5qVAeRwU3/54N+fh1dtmO0eVAuDWGZ3XNsk+Y5JpT5zbn0GMb dBi3VtT6zkou9x8SjHP8TiLj3ocQrCY7xDFi25aU+Rhal/SwImzw8i6lKbD08qRzg5T6 ntbg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id g192-20020a636bc9000000b0055c8d58cee9si3616339pgc.714.2023.08.11.09.46.02; Fri, 11 Aug 2023 09:46:16 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234550AbjHKQQA (ORCPT + 99 others); Fri, 11 Aug 2023 12:16:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233893AbjHKQPz (ORCPT ); Fri, 11 Aug 2023 12:15:55 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id DAE39271E; Fri, 11 Aug 2023 09:15:54 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 083BE139F; Fri, 11 Aug 2023 09:16:37 -0700 (PDT) Received: from pluto.. (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EB6023F64C; Fri, 11 Aug 2023 09:15:51 -0700 (PDT) From: Cristian Marussi To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: sudeep.holla@arm.com, james.quinlan@broadcom.com, f.fainelli@gmail.com, vincent.guittot@linaro.org, etienne.carriere@linaro.org, peng.fan@oss.nxp.com, chuck.cannon@nxp.com, souvik.chakravarty@arm.com, nicola.mazzucato@arm.com, Cristian Marussi , Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org Subject: [PATCH 1/6] firmware: arm_scmi: Simplify enable/disable Clock operations Date: Fri, 11 Aug 2023 17:14:41 +0100 Message-ID: <20230811161446.636253-2-cristian.marussi@arm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230811161446.636253-1-cristian.marussi@arm.com> References: <20230811161446.636253-1-cristian.marussi@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773951910894495365 X-GMAIL-MSGID: 1773951910894495365 Add a param to Clock enable/disable operation to ask for atomic operation and remove _atomic version of such operations. No functional change. CC: Michael Turquette CC: Stephen Boyd CC: linux-clk@vger.kernel.org Signed-off-by: Cristian Marussi --- drivers/clk/clk-scmi.c | 8 ++++---- drivers/firmware/arm_scmi/clock.c | 24 ++++++------------------ include/linux/scmi_protocol.h | 9 ++++----- 3 files changed, 14 insertions(+), 27 deletions(-) diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c index 2c7a830ce308..ff003083e592 100644 --- a/drivers/clk/clk-scmi.c +++ b/drivers/clk/clk-scmi.c @@ -78,28 +78,28 @@ static int scmi_clk_enable(struct clk_hw *hw) { struct scmi_clk *clk = to_scmi_clk(hw); - return scmi_proto_clk_ops->enable(clk->ph, clk->id); + return scmi_proto_clk_ops->enable(clk->ph, clk->id, false); } static void scmi_clk_disable(struct clk_hw *hw) { struct scmi_clk *clk = to_scmi_clk(hw); - scmi_proto_clk_ops->disable(clk->ph, clk->id); + scmi_proto_clk_ops->disable(clk->ph, clk->id, false); } static int scmi_clk_atomic_enable(struct clk_hw *hw) { struct scmi_clk *clk = to_scmi_clk(hw); - return scmi_proto_clk_ops->enable_atomic(clk->ph, clk->id); + return scmi_proto_clk_ops->enable(clk->ph, clk->id, true); } static void scmi_clk_atomic_disable(struct clk_hw *hw) { struct scmi_clk *clk = to_scmi_clk(hw); - scmi_proto_clk_ops->disable_atomic(clk->ph, clk->id); + scmi_proto_clk_ops->disable(clk->ph, clk->id, true); } /* diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/clock.c index 96060bf90a24..447d29b5fc72 100644 --- a/drivers/firmware/arm_scmi/clock.c +++ b/drivers/firmware/arm_scmi/clock.c @@ -418,26 +418,16 @@ scmi_clock_config_set(const struct scmi_protocol_handle *ph, u32 clk_id, return ret; } -static int scmi_clock_enable(const struct scmi_protocol_handle *ph, u32 clk_id) +static int scmi_clock_enable(const struct scmi_protocol_handle *ph, u32 clk_id, + bool atomic) { - return scmi_clock_config_set(ph, clk_id, CLOCK_ENABLE, false); + return scmi_clock_config_set(ph, clk_id, CLOCK_ENABLE, atomic); } -static int scmi_clock_disable(const struct scmi_protocol_handle *ph, u32 clk_id) +static int scmi_clock_disable(const struct scmi_protocol_handle *ph, u32 clk_id, + bool atomic) { - return scmi_clock_config_set(ph, clk_id, 0, false); -} - -static int scmi_clock_enable_atomic(const struct scmi_protocol_handle *ph, - u32 clk_id) -{ - return scmi_clock_config_set(ph, clk_id, CLOCK_ENABLE, true); -} - -static int scmi_clock_disable_atomic(const struct scmi_protocol_handle *ph, - u32 clk_id) -{ - return scmi_clock_config_set(ph, clk_id, 0, true); + return scmi_clock_config_set(ph, clk_id, 0, atomic); } static int scmi_clock_count_get(const struct scmi_protocol_handle *ph) @@ -470,8 +460,6 @@ static const struct scmi_clk_proto_ops clk_proto_ops = { .rate_set = scmi_clock_rate_set, .enable = scmi_clock_enable, .disable = scmi_clock_disable, - .enable_atomic = scmi_clock_enable_atomic, - .disable_atomic = scmi_clock_disable_atomic, }; static int scmi_clk_rate_notify(const struct scmi_protocol_handle *ph, diff --git a/include/linux/scmi_protocol.h b/include/linux/scmi_protocol.h index e6fe4f73ffe6..b4c631a8d0ac 100644 --- a/include/linux/scmi_protocol.h +++ b/include/linux/scmi_protocol.h @@ -90,11 +90,10 @@ struct scmi_clk_proto_ops { u64 *rate); int (*rate_set)(const struct scmi_protocol_handle *ph, u32 clk_id, u64 rate); - int (*enable)(const struct scmi_protocol_handle *ph, u32 clk_id); - int (*disable)(const struct scmi_protocol_handle *ph, u32 clk_id); - int (*enable_atomic)(const struct scmi_protocol_handle *ph, u32 clk_id); - int (*disable_atomic)(const struct scmi_protocol_handle *ph, - u32 clk_id); + int (*enable)(const struct scmi_protocol_handle *ph, u32 clk_id, + bool atomic); + int (*disable)(const struct scmi_protocol_handle *ph, u32 clk_id, + bool atomic); }; /** From patchwork Fri Aug 11 16:14:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Marussi X-Patchwork-Id: 134598 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b824:0:b0:3f2:4152:657d with SMTP id z4csp1223404vqi; Fri, 11 Aug 2023 09:47:36 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHBzhmcHUNBc49Ybw6cjIOSFEmfMCZK36CSKospNlV9kJE0/W1i3yd7a9J+3IDFEFzbP5VZ X-Received: by 2002:a05:6a20:7354:b0:140:4efb:1c21 with SMTP id v20-20020a056a20735400b001404efb1c21mr2793701pzc.47.1691772456112; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id y124-20020a636482000000b00564cd142ca4si3811112pgb.338.2023.08.11.09.47.23; Fri, 11 Aug 2023 09:47:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235820AbjHKQQC (ORCPT + 99 others); Fri, 11 Aug 2023 12:16:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40928 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235449AbjHKQP6 (ORCPT ); Fri, 11 Aug 2023 12:15:58 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 586102712 for ; Fri, 11 Aug 2023 09:15:57 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 865B9113E; Fri, 11 Aug 2023 09:16:39 -0700 (PDT) Received: from pluto.. (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E7C3B3F64C; Fri, 11 Aug 2023 09:15:54 -0700 (PDT) From: Cristian Marussi To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: sudeep.holla@arm.com, james.quinlan@broadcom.com, f.fainelli@gmail.com, vincent.guittot@linaro.org, etienne.carriere@linaro.org, peng.fan@oss.nxp.com, chuck.cannon@nxp.com, souvik.chakravarty@arm.com, nicola.mazzucato@arm.com, Cristian Marussi Subject: [PATCH 2/6] firmware: arm_scmi: Add Clock v3.2 CONFIG_SET support Date: Fri, 11 Aug 2023 17:14:42 +0100 Message-ID: <20230811161446.636253-3-cristian.marussi@arm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230811161446.636253-1-cristian.marussi@arm.com> References: <20230811161446.636253-1-cristian.marussi@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773951995118273712 X-GMAIL-MSGID: 1773951995118273712 SCMI v3.2 introduces a new Clock CONFIG_SET message format that can optionally carry also OEM specific configuration values beside the usual clock enable/disable requests. Refactor internal helpers and add support to use such new format when talking to a v3.2 compliant SCMI platform. Support existing enable/disable operations across different Clock protocol versions: this patch still does not add protocol operations to support the new OEM specific optional configuration capabilities. No functional change for the SCMI drivers users of the related enable and disable clock operations. Signed-off-by: Cristian Marussi --- drivers/firmware/arm_scmi/clock.c | 88 ++++++++++++++++++++++++++++--- 1 file changed, 80 insertions(+), 8 deletions(-) diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/clock.c index 447d29b5fc72..63bd043365cd 100644 --- a/drivers/firmware/arm_scmi/clock.c +++ b/drivers/firmware/arm_scmi/clock.c @@ -23,6 +23,13 @@ enum scmi_clock_protocol_cmd { CLOCK_RATE_CHANGE_REQUESTED_NOTIFY = 0xA, }; +enum clk_state { + CLK_STATE_DISABLE, + CLK_STATE_ENABLE, + CLK_STATE_RESERVED, + CLK_STATE_UNCHANGED, +}; + struct scmi_msg_resp_clock_protocol_attributes { __le16 num_clocks; u8 max_async_req; @@ -31,7 +38,6 @@ struct scmi_msg_resp_clock_protocol_attributes { struct scmi_msg_resp_clock_attributes { __le32 attributes; -#define CLOCK_ENABLE BIT(0) #define SUPPORTS_RATE_CHANGED_NOTIF(x) ((x) & BIT(31)) #define SUPPORTS_RATE_CHANGE_REQUESTED_NOTIF(x) ((x) & BIT(30)) #define SUPPORTS_EXTENDED_NAMES(x) ((x) & BIT(29)) @@ -39,9 +45,18 @@ struct scmi_msg_resp_clock_attributes { __le32 clock_enable_latency; }; -struct scmi_clock_set_config { +struct scmi_msg_clock_config_set_v2 { + __le32 id; + __le32 attributes; +}; + +struct scmi_msg_clock_config_set_v21 { __le32 id; __le32 attributes; +#define NULL_OEM_TYPE 0 +#define REGMASK_OEM_TYPE_SET GENMASK(23, 16) +#define REGMASK_CLK_STATE GENMASK(1, 0) + __le32 oem_config_val; }; struct scmi_msg_clock_describe_rates { @@ -100,6 +115,9 @@ struct clock_info { int max_async_req; atomic_t cur_async_req; struct scmi_clock_info *clk; + int (*clock_config_set)(const struct scmi_protocol_handle *ph, + u32 clk_id, enum clk_state state, + u8 oem_type, u32 oem_val, bool atomic); }; static enum scmi_clock_protocol_cmd evt_2_cmd[] = { @@ -394,12 +412,47 @@ static int scmi_clock_rate_set(const struct scmi_protocol_handle *ph, } static int -scmi_clock_config_set(const struct scmi_protocol_handle *ph, u32 clk_id, - u32 config, bool atomic) +scmi_clock_config_set_v2(const struct scmi_protocol_handle *ph, u32 clk_id, + enum clk_state state, u8 __unused0, u32 __unused1, + bool atomic) +{ + int ret; + struct scmi_xfer *t; + struct scmi_msg_clock_config_set_v2 *cfg; + + if (state >= CLK_STATE_RESERVED) + return -EINVAL; + + ret = ph->xops->xfer_get_init(ph, CLOCK_CONFIG_SET, + sizeof(*cfg), 0, &t); + if (ret) + return ret; + + t->hdr.poll_completion = atomic; + + cfg = t->tx.buf; + cfg->id = cpu_to_le32(clk_id); + cfg->attributes = cpu_to_le32(state); + + ret = ph->xops->do_xfer(ph, t); + + ph->xops->xfer_put(ph, t); + return ret; +} + +static int +scmi_clock_config_set_v21(const struct scmi_protocol_handle *ph, u32 clk_id, + enum clk_state state, u8 oem_type, u32 oem_val, + bool atomic) { int ret; + u32 attrs; struct scmi_xfer *t; - struct scmi_clock_set_config *cfg; + struct scmi_msg_clock_config_set_v21 *cfg; + + if (state == CLK_STATE_RESERVED || + (!oem_type && state == CLK_STATE_UNCHANGED)) + return -EINVAL; ret = ph->xops->xfer_get_init(ph, CLOCK_CONFIG_SET, sizeof(*cfg), 0, &t); @@ -408,9 +461,16 @@ scmi_clock_config_set(const struct scmi_protocol_handle *ph, u32 clk_id, t->hdr.poll_completion = atomic; + attrs = FIELD_PREP(REGMASK_OEM_TYPE_SET, oem_type) | + FIELD_PREP(REGMASK_CLK_STATE, state); + cfg = t->tx.buf; cfg->id = cpu_to_le32(clk_id); - cfg->attributes = cpu_to_le32(config); + cfg->attributes = cpu_to_le32(attrs); + /* Clear in any case */ + cfg->oem_config_val = cpu_to_le32(0); + if (oem_type) + cfg->oem_config_val = cpu_to_le32(oem_val); ret = ph->xops->do_xfer(ph, t); @@ -421,13 +481,19 @@ scmi_clock_config_set(const struct scmi_protocol_handle *ph, u32 clk_id, static int scmi_clock_enable(const struct scmi_protocol_handle *ph, u32 clk_id, bool atomic) { - return scmi_clock_config_set(ph, clk_id, CLOCK_ENABLE, atomic); + struct clock_info *ci = ph->get_priv(ph); + + return ci->clock_config_set(ph, clk_id, CLK_STATE_ENABLE, + NULL_OEM_TYPE, 0, atomic); } static int scmi_clock_disable(const struct scmi_protocol_handle *ph, u32 clk_id, bool atomic) { - return scmi_clock_config_set(ph, clk_id, 0, atomic); + struct clock_info *ci = ph->get_priv(ph); + + return ci->clock_config_set(ph, clk_id, CLK_STATE_DISABLE, + NULL_OEM_TYPE, 0, atomic); } static int scmi_clock_count_get(const struct scmi_protocol_handle *ph) @@ -592,6 +658,12 @@ static int scmi_clock_protocol_init(const struct scmi_protocol_handle *ph) scmi_clock_describe_rates_get(ph, clkid, clk); } + if (PROTOCOL_REV_MAJOR(version) >= 0x2 && + PROTOCOL_REV_MINOR(version) >= 0x1) + cinfo->clock_config_set = scmi_clock_config_set_v21; + else + cinfo->clock_config_set = scmi_clock_config_set_v2; + cinfo->version = version; return ph->set_priv(ph, cinfo); } From patchwork Fri Aug 11 16:14:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Marussi X-Patchwork-Id: 134590 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b824:0:b0:3f2:4152:657d with SMTP id z4csp1222102vqi; Fri, 11 Aug 2023 09:45:16 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGq9CQbQPKsgmQgEVmPunkOUwDwNRauC/OmE2XNTTlYZLdzWLMuJRGkX3YVTLLCyVsHS9vL X-Received: by 2002:a17:902:a58c:b0:1b8:16c7:a786 with SMTP id az12-20020a170902a58c00b001b816c7a786mr2420919plb.4.1691772316139; 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(unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 738ED3F64C; Fri, 11 Aug 2023 09:15:57 -0700 (PDT) From: Cristian Marussi To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: sudeep.holla@arm.com, james.quinlan@broadcom.com, f.fainelli@gmail.com, vincent.guittot@linaro.org, etienne.carriere@linaro.org, peng.fan@oss.nxp.com, chuck.cannon@nxp.com, souvik.chakravarty@arm.com, nicola.mazzucato@arm.com, Cristian Marussi Subject: [PATCH 3/6] firmware: arm_scmi: Add v3.2 Clock CONFIG_GET support Date: Fri, 11 Aug 2023 17:14:43 +0100 Message-ID: <20230811161446.636253-4-cristian.marussi@arm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230811161446.636253-1-cristian.marussi@arm.com> References: <20230811161446.636253-1-cristian.marussi@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773951847946051287 X-GMAIL-MSGID: 1773951847946051287 Add support for v3.2 Clock CONFIG_GET command and related new clock protocol operation state_get() to retrieve the status of a clock. Signed-off-by: Cristian Marussi --- drivers/firmware/arm_scmi/clock.c | 64 +++++++++++++++++++++++++++++++ include/linux/scmi_protocol.h | 3 ++ 2 files changed, 67 insertions(+) diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/clock.c index 63bd043365cd..aaa95624493d 100644 --- a/drivers/firmware/arm_scmi/clock.c +++ b/drivers/firmware/arm_scmi/clock.c @@ -21,6 +21,7 @@ enum scmi_clock_protocol_cmd { CLOCK_NAME_GET = 0x8, CLOCK_RATE_NOTIFY = 0x9, CLOCK_RATE_CHANGE_REQUESTED_NOTIFY = 0xA, + CLOCK_CONFIG_GET = 0xB, }; enum clk_state { @@ -59,6 +60,19 @@ struct scmi_msg_clock_config_set_v21 { __le32 oem_config_val; }; +struct scmi_msg_clock_config_get { + __le32 id; + __le32 flags; +#define REGMASK_OEM_TYPE_GET GENMASK(7, 0) +}; + +struct scmi_msg_resp_clock_config_get { + __le32 attributes; + __le32 config; +#define IS_CLK_ENABLED(x) le32_get_bits((x), BIT(0)) + __le32 oem_config_val; +}; + struct scmi_msg_clock_describe_rates { __le32 id; __le32 rate_index; @@ -496,6 +510,55 @@ static int scmi_clock_disable(const struct scmi_protocol_handle *ph, u32 clk_id, NULL_OEM_TYPE, 0, atomic); } +static int +scmi_clock_config_get(const struct scmi_protocol_handle *ph, u32 clk_id, + u8 oem_type, u32 *attributes, bool *enabled, + u32 *oem_val, bool atomic) +{ + int ret; + u32 flags; + struct scmi_xfer *t; + struct scmi_msg_clock_config_get *cfg; + + ret = ph->xops->xfer_get_init(ph, CLOCK_CONFIG_GET, + sizeof(*cfg), 0, &t); + if (ret) + return ret; + + t->hdr.poll_completion = atomic; + + flags = FIELD_PREP(REGMASK_OEM_TYPE_GET, oem_type); + + cfg = t->tx.buf; + cfg->id = cpu_to_le32(clk_id); + cfg->flags = cpu_to_le32(flags); + + ret = ph->xops->do_xfer(ph, t); + if (!ret) { + struct scmi_msg_resp_clock_config_get *resp = t->rx.buf; + + if (attributes) + *attributes = le32_to_cpu(resp->attributes); + + if (enabled) + *enabled = IS_CLK_ENABLED(resp->config); + + if (oem_val && oem_type) + *oem_val = le32_to_cpu(resp->oem_config_val); + } + + ph->xops->xfer_put(ph, t); + + return ret; +} + +static int scmi_clock_state_get(const struct scmi_protocol_handle *ph, + u32 clk_id, bool *enabled, bool atomic) +{ + return scmi_clock_config_get(ph, clk_id, NULL_OEM_TYPE, NULL, + enabled, NULL, atomic); +} + static int scmi_clock_count_get(const struct scmi_protocol_handle *ph) { struct clock_info *ci = ph->get_priv(ph); @@ -526,6 +589,7 @@ static const struct scmi_clk_proto_ops clk_proto_ops = { .rate_set = scmi_clock_rate_set, .enable = scmi_clock_enable, .disable = scmi_clock_disable, + .state_get = scmi_clock_state_get, }; static int scmi_clk_rate_notify(const struct scmi_protocol_handle *ph, diff --git a/include/linux/scmi_protocol.h b/include/linux/scmi_protocol.h index b4c631a8d0ac..d11ca4286d57 100644 --- a/include/linux/scmi_protocol.h +++ b/include/linux/scmi_protocol.h @@ -80,6 +80,7 @@ struct scmi_protocol_handle; * @rate_set: set the clock rate of a clock * @enable: enables the specified clock * @disable: disables the specified clock + * @state_get: get the status of the specified clock */ struct scmi_clk_proto_ops { int (*count_get)(const struct scmi_protocol_handle *ph); @@ -94,6 +95,8 @@ struct scmi_clk_proto_ops { bool atomic); int (*disable)(const struct scmi_protocol_handle *ph, u32 clk_id, bool atomic); + int (*state_get)(const struct scmi_protocol_handle *ph, u32 clk_id, + bool *enabled, bool atomic); }; /** From patchwork Fri Aug 11 16:14:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Marussi X-Patchwork-Id: 134588 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b824:0:b0:3f2:4152:657d with SMTP id z4csp1218564vqi; Fri, 11 Aug 2023 09:38:27 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG9/IFIqCvdIKw72rOQmO2P1R89I0mSzRjEjHkc0LWJhfr1h4dZsIBT+k2PO3bUQTejcgsQ X-Received: by 2002:a05:6a00:2e96:b0:66f:7076:a5b4 with SMTP id fd22-20020a056a002e9600b0066f7076a5b4mr3487251pfb.7.1691771907417; Fri, 11 Aug 2023 09:38:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691771907; cv=none; d=google.com; s=arc-20160816; b=KTNOxTpd07Gq2MnS/iQJKol3gDvJVxfN4jJ8R8I8V5Wqm1a96V8/uN3cnjUnm5vKkb kod2fyza6hSjNuFBw46HqWP8+slgsEuWJmFT3+1JbOsA3MonrryagCitT4cEnqryfREg RcFJKhrw7PJZIqXth32YzLtj9d//W/uE/kEC6L9//TkpD1DrUhHwVtO8xBrJ2ArVPHmP RqNVtJULEzQYhPJAs4yHRxWSbn3AS4XqQhE13IU+xkJ3x9/dSH7UlVOIWOquLLrNlXls rVcVEUmtiFqQ3zqkLgniGJ86TpCvpT98NCBwR3bksiuMqeTh5AcY/Q10nZXpgT/Zjykt 2KfQ== ARC-Message-Signature: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id l19-20020a637013000000b0056428dcea78si3756085pgc.17.2023.08.11.09.38.14; Fri, 11 Aug 2023 09:38:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236171AbjHKQQK (ORCPT + 99 others); Fri, 11 Aug 2023 12:16:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235857AbjHKQQD (ORCPT ); Fri, 11 Aug 2023 12:16:03 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 6DE752D69 for ; Fri, 11 Aug 2023 09:16:02 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 92DBD113E; Fri, 11 Aug 2023 09:16:44 -0700 (PDT) Received: from pluto.. (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F39F63F64C; Fri, 11 Aug 2023 09:15:59 -0700 (PDT) From: Cristian Marussi To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: sudeep.holla@arm.com, james.quinlan@broadcom.com, f.fainelli@gmail.com, vincent.guittot@linaro.org, etienne.carriere@linaro.org, peng.fan@oss.nxp.com, chuck.cannon@nxp.com, souvik.chakravarty@arm.com, nicola.mazzucato@arm.com, Cristian Marussi Subject: [PATCH 4/6] firmware: arm_scmi: Add Clock .state_get support to pre-v3.2 Date: Fri, 11 Aug 2023 17:14:44 +0100 Message-ID: <20230811161446.636253-5-cristian.marussi@arm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230811161446.636253-1-cristian.marussi@arm.com> References: <20230811161446.636253-1-cristian.marussi@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773951419517927132 X-GMAIL-MSGID: 1773951419517927132 Support Clock .state_get operation against SCMI platform servers that do not support v3.2 CONFIG_GET dedicated command: while talking with these platforms the command CLOCK_ATTRIBUTES can be used to gather the current clock states. Note that, in case of shared resources, the retrieved clock state 'flavour' (virtual vs physical) depends on the backend SCMI platform server specific kind of implementation. Signed-off-by: Cristian Marussi --- drivers/firmware/arm_scmi/clock.c | 52 ++++++++++++++++++++++++++----- 1 file changed, 45 insertions(+), 7 deletions(-) diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/clock.c index aaa95624493d..333d08822f77 100644 --- a/drivers/firmware/arm_scmi/clock.c +++ b/drivers/firmware/arm_scmi/clock.c @@ -132,6 +132,9 @@ struct clock_info { int (*clock_config_set)(const struct scmi_protocol_handle *ph, u32 clk_id, enum clk_state state, u8 oem_type, u32 oem_val, bool atomic); + int (*clock_config_get)(const struct scmi_protocol_handle *ph, + u32 clk_id, u8 oem_type, u32 *attributes, + bool *enabled, u32 *oem_val, bool atomic); }; static enum scmi_clock_protocol_cmd evt_2_cmd[] = { @@ -511,9 +514,9 @@ static int scmi_clock_disable(const struct scmi_protocol_handle *ph, u32 clk_id, } static int -scmi_clock_config_get(const struct scmi_protocol_handle *ph, u32 clk_id, - u8 oem_type, u32 *attributes, bool *enabled, - u32 *oem_val, bool atomic) +scmi_clock_config_get_v21(const struct scmi_protocol_handle *ph, u32 clk_id, + u8 oem_type, u32 *attributes, bool *enabled, + u32 *oem_val, bool atomic) { int ret; u32 flags; @@ -552,11 +555,43 @@ scmi_clock_config_get(const struct scmi_protocol_handle *ph, u32 clk_id, return ret; } +static int +scmi_clock_config_get_v2(const struct scmi_protocol_handle *ph, u32 clk_id, + u8 oem_type, u32 *attributes, bool *enabled, + u32 *oem_val, bool atomic) +{ + int ret; + struct scmi_xfer *t; + struct scmi_msg_resp_clock_attributes *resp; + + if (!enabled) + return -EINVAL; + + ret = ph->xops->xfer_get_init(ph, CLOCK_ATTRIBUTES, + sizeof(clk_id), sizeof(*resp), &t); + if (ret) + return ret; + + t->hdr.poll_completion = atomic; + put_unaligned_le32(clk_id, t->tx.buf); + resp = t->rx.buf; + + ret = ph->xops->do_xfer(ph, t); + if (!ret) + *enabled = IS_CLK_ENABLED(resp->attributes); + + ph->xops->xfer_put(ph, t); + + return ret; +} + static int scmi_clock_state_get(const struct scmi_protocol_handle *ph, u32 clk_id, bool *enabled, bool atomic) { - return scmi_clock_config_get(ph, clk_id, NULL_OEM_TYPE, NULL, - enabled, NULL, atomic); + struct clock_info *ci = ph->get_priv(ph); + + return ci->clock_config_get(ph, clk_id, NULL_OEM_TYPE, NULL, + enabled, NULL, atomic); } static int scmi_clock_count_get(const struct scmi_protocol_handle *ph) @@ -723,10 +758,13 @@ static int scmi_clock_protocol_init(const struct scmi_protocol_handle *ph) } if (PROTOCOL_REV_MAJOR(version) >= 0x2 && - PROTOCOL_REV_MINOR(version) >= 0x1) + PROTOCOL_REV_MINOR(version) >= 0x1) { cinfo->clock_config_set = scmi_clock_config_set_v21; - else + cinfo->clock_config_get = scmi_clock_config_get_v21; + } else { cinfo->clock_config_set = scmi_clock_config_set_v2; + cinfo->clock_config_get = scmi_clock_config_get_v2; + } cinfo->version = version; return ph->set_priv(ph, cinfo); From patchwork Fri Aug 11 16:14:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Marussi X-Patchwork-Id: 134596 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b824:0:b0:3f2:4152:657d with SMTP id z4csp1222725vqi; Fri, 11 Aug 2023 09:46:21 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG1ZhV/jkKvVdTrzkKQWsPAhQgmFa3tryJJDhruB93418xTZ9b2aclAJ91svX/dYZek2h0Y X-Received: by 2002:a05:6a00:1594:b0:666:d78c:33ab with SMTP id u20-20020a056a00159400b00666d78c33abmr3137557pfk.21.1691772380594; Fri, 11 Aug 2023 09:46:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691772380; cv=none; d=google.com; s=arc-20160816; b=1EWDcjoikD7pThWkm9DHiDbtTN6vZoFps/K9dg65MvweMbmNNuTUzw3mPTRnRmb/xd RF+e7UETfwl2DYsY6/08Opj66fCH/lnMN5s78TLN1d6vDrEPxjwQ4t3KdLH56TNF6CHd w9Ri2EjF//x093DZptOChlhBUfVpibXXlCrZ38BEzvqynYA+KvpYnR0auNYFIxrvyYpJ lkK+zrPUwnbqGFdTJP8m5bmwtFxNg0JwNiyMSOPKgE6wAPF2/j20zPcjScLJKbJJ1rIc VxifnFNP1M9HmwNZQhj2PhOdsC0zChP7WS1WFSct0HyiLzhqBpwH37JzUTWh8aJ2JkVv hWlg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=zyf6Vy2/Q+MPoiuR3BOK5bqwhmUoklaGctag7NKy+LU=; fh=S+pyV4uNeYv17K2EadaTrxZRaJH55XFTUj83MlxgjWo=; b=DUH5dTQg3QvmE1k2Y1c/aAPzbBVBEOYn8es59US/xjdawxpcFm75oSAr7X2jEcaair u8WRm+8j9TQOIfBWIfAc9jQXUWlQGamQh/EM6Xg+vzaSXsHmIZr9vbAvn91XGfmGD7Ka zm0Zgs2psdEKue+IsI9/1OXXMigamToSmGnuVpH4TdMz6WaqDYL6cG+MuV6xjyCu9Uve Zsx1KS9NAJZTWK2Yt79yjFyiU4ZKrKBY1QdUemwY1t8cPeslhBA/YAP02TjEIsVTwXhD vpiULigugTVTWVIsVHyCoragUG/tnCludd8brulAI8zMCWr3a0IQer6H/rAVULMlsZSF vljg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. 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(unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7E4763F64C; Fri, 11 Aug 2023 09:16:02 -0700 (PDT) From: Cristian Marussi To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: sudeep.holla@arm.com, james.quinlan@broadcom.com, f.fainelli@gmail.com, vincent.guittot@linaro.org, etienne.carriere@linaro.org, peng.fan@oss.nxp.com, chuck.cannon@nxp.com, souvik.chakravarty@arm.com, nicola.mazzucato@arm.com, Cristian Marussi , Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org Subject: [PATCH 5/6] clk: scmi: Add support for .is_enabled clk_ops Date: Fri, 11 Aug 2023 17:14:45 +0100 Message-ID: <20230811161446.636253-6-cristian.marussi@arm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230811161446.636253-1-cristian.marussi@arm.com> References: <20230811161446.636253-1-cristian.marussi@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773951915787257774 X-GMAIL-MSGID: 1773951915787257774 Add support for .is_enabled atomic clk_ops using the related SCMI Clock operation in atomic mode, if available. Note that the .is_enabled callback will be supported by this SCMI Clock driver only if the configured underlying SCMI transport does support atomic operations. CC: Michael Turquette CC: Stephen Boyd CC: linux-clk@vger.kernel.org Signed-off-by: Cristian Marussi Acked-by: Stephen Boyd --- drivers/clk/clk-scmi.c | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c index ff003083e592..3770b58cc882 100644 --- a/drivers/clk/clk-scmi.c +++ b/drivers/clk/clk-scmi.c @@ -17,6 +17,7 @@ static const struct scmi_clk_proto_ops *scmi_proto_clk_ops; struct scmi_clk { u32 id; + struct device *dev; struct clk_hw hw; const struct scmi_clock_info *info; const struct scmi_protocol_handle *ph; @@ -102,10 +103,24 @@ static void scmi_clk_atomic_disable(struct clk_hw *hw) scmi_proto_clk_ops->disable(clk->ph, clk->id, true); } +static int scmi_clk_atomic_is_enabled(struct clk_hw *hw) +{ + int ret; + bool enabled = false; + struct scmi_clk *clk = to_scmi_clk(hw); + + ret = scmi_proto_clk_ops->state_get(clk->ph, clk->id, &enabled, true); + if (ret) + dev_warn(clk->dev, + "Failed to get state for clock ID %d\n", clk->id); + + return !!enabled; +} + /* - * We can provide enable/disable atomic callbacks only if the underlying SCMI - * transport for an SCMI instance is configured to handle SCMI commands in an - * atomic manner. + * We can provide enable/disable/is_enabled atomic callbacks only if the + * underlying SCMI transport for an SCMI instance is configured to handle + * SCMI commands in an atomic manner. * * When no SCMI atomic transport support is available we instead provide only * the prepare/unprepare API, as allowed by the clock framework when atomic @@ -129,6 +144,7 @@ static const struct clk_ops scmi_atomic_clk_ops = { .set_rate = scmi_clk_set_rate, .enable = scmi_clk_atomic_enable, .disable = scmi_clk_atomic_disable, + .is_enabled = scmi_clk_atomic_is_enabled, }; static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk, @@ -218,6 +234,7 @@ static int scmi_clocks_probe(struct scmi_device *sdev) sclk->id = idx; sclk->ph = ph; + sclk->dev = dev; /* * Note that when transport is atomic but SCMI protocol did not From patchwork Fri Aug 11 16:14:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Marussi X-Patchwork-Id: 134589 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b824:0:b0:3f2:4152:657d with SMTP id z4csp1221357vqi; Fri, 11 Aug 2023 09:43:54 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFT1v2cbilNABUfebwUp0WaHI2C2h3+nee4p5k3jhr7PhI6zn/VRjD2eIyCdj7/41dLtWtf X-Received: by 2002:a05:6a21:47c6:b0:140:2805:6cc9 with SMTP id as6-20020a056a2147c600b0014028056cc9mr2680158pzc.57.1691772234336; Fri, 11 Aug 2023 09:43:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691772234; cv=none; d=google.com; s=arc-20160816; b=Qhkby7kja37A6OiVNPU+/p9xFqm+Zlpw7/8qDKS5Mre6IUYfXFfX4c+MdZ89DZBcMr Zbng56HAy0Neq0tOhbFCY1qGO2A2+QUFV8MJxfHSXWFHY2kfhPBBSaE0EeioWDs41pnm OsEdcA7CmU7iOl7Ni/urmHeIt+JFxeuyO7Y6VMgntiK/K/tabV/CZjalVg3WuwRrEYaz byip9jJhRXPC9msZWxnMqLL6GZo8L7/iyslE5xtGgBGKL7aOq+E8at/4pXLfVqwHxtmx DDc3JXq6WCna22tyPI9Ydy0HearvlJXlBMVinQHwGBEkj6iNE0bUCPunInpZHyQjuMQN /Y7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=NuY4xU/DRToL5q3XofABdnJekxUKlyaL48BxvP2WWhE=; fh=2kLKFRms5+zwuHU5oRh0LaFszr6EZWHSaAcvcesrAM4=; b=FSh6GUdfpykHKwPZN2/Ktn/yMJ0eQQrrSutHb1uTOYb/Xw4JqK6NzCDgl71tj7IneQ XPHI1Xfp/Uze0sQLZ6RWebQKyjQ9s/XElOUCXxQmG4rG5cuxnCgy1B8zuZnlU4iP+UvW O9Xs/ZDRi+g0Pdr3KOljiJ2AgtFTkrlQz3SkR409rrCyZMga5oAzXg0vr/g2ZMA2qrRX +lBJG5tXl5viVjrc6aTsNGVLcb6fXxfLwNjRh23lfq3p7cxr//i98Hn4TprA6Qx5JMLS xnht9gGQVM1JvkFEIEVSeREZ00xa4so3Sn92lrAzFlgSyfMmwFVOg3KxRlTleVPJCa20 YKdw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j6-20020a654306000000b00543cba6043asi3574109pgq.151.2023.08.11.09.43.36; Fri, 11 Aug 2023 09:43:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236306AbjHKQQU (ORCPT + 99 others); Fri, 11 Aug 2023 12:16:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37578 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236167AbjHKQQJ (ORCPT ); Fri, 11 Aug 2023 12:16:09 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id DF12630EA for ; Fri, 11 Aug 2023 09:16:07 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1987C139F; Fri, 11 Aug 2023 09:16:50 -0700 (PDT) Received: from pluto.. (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7A9963F64C; Fri, 11 Aug 2023 09:16:05 -0700 (PDT) From: Cristian Marussi To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: sudeep.holla@arm.com, james.quinlan@broadcom.com, f.fainelli@gmail.com, vincent.guittot@linaro.org, etienne.carriere@linaro.org, peng.fan@oss.nxp.com, chuck.cannon@nxp.com, souvik.chakravarty@arm.com, nicola.mazzucato@arm.com, Cristian Marussi Subject: [PATCH 6/6] [RFC] firmware: arm_scmi: Add Clock OEM config clock operations Date: Fri, 11 Aug 2023 17:14:46 +0100 Message-ID: <20230811161446.636253-7-cristian.marussi@arm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230811161446.636253-1-cristian.marussi@arm.com> References: <20230811161446.636253-1-cristian.marussi@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773951762324077716 X-GMAIL-MSGID: 1773951762324077716 Expose a couple of new SCMI Clock operations to get and set OEM specific clock configurations when talking to an SCMI v3.2 compliant. Issuing such requests against an SCMI platform server not supporting v3.2 extension for OEM specific clock configurations will fail. Signed-off-by: Cristian Marussi --- drivers/firmware/arm_scmi/clock.c | 22 ++++++++++++++++++++++ include/linux/scmi_protocol.h | 7 +++++++ 2 files changed, 29 insertions(+) diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/clock.c index 333d08822f77..d18bf789fc24 100644 --- a/drivers/firmware/arm_scmi/clock.c +++ b/drivers/firmware/arm_scmi/clock.c @@ -594,6 +594,26 @@ static int scmi_clock_state_get(const struct scmi_protocol_handle *ph, enabled, NULL, atomic); } +static int scmi_clock_config_oem_set(const struct scmi_protocol_handle *ph, + u32 clk_id, u8 oem_type, u32 oem_val, + bool atomic) +{ + struct clock_info *ci = ph->get_priv(ph); + + return ci->clock_config_set(ph, clk_id, CLK_STATE_UNCHANGED, + oem_type, oem_val, atomic); +} + +static int scmi_clock_config_oem_get(const struct scmi_protocol_handle *ph, + u32 clk_id, u8 oem_type, u32 *oem_val, + u32 *attributes, bool atomic) +{ + struct clock_info *ci = ph->get_priv(ph); + + return ci->clock_config_get(ph, clk_id, oem_type, attributes, + NULL, oem_val, atomic); +} + static int scmi_clock_count_get(const struct scmi_protocol_handle *ph) { struct clock_info *ci = ph->get_priv(ph); @@ -625,6 +645,8 @@ static const struct scmi_clk_proto_ops clk_proto_ops = { .enable = scmi_clock_enable, .disable = scmi_clock_disable, .state_get = scmi_clock_state_get, + .config_oem_get = scmi_clock_config_oem_get, + .config_oem_set = scmi_clock_config_oem_set, }; static int scmi_clk_rate_notify(const struct scmi_protocol_handle *ph, diff --git a/include/linux/scmi_protocol.h b/include/linux/scmi_protocol.h index d11ca4286d57..e09ac428fa1b 100644 --- a/include/linux/scmi_protocol.h +++ b/include/linux/scmi_protocol.h @@ -81,6 +81,8 @@ struct scmi_protocol_handle; * @enable: enables the specified clock * @disable: disables the specified clock * @state_get: get the status of the specified clock + * @config_oem_get: get the value of an OEM specific clock config + * @config_oem_set: set the value of an OEM specific clock config */ struct scmi_clk_proto_ops { int (*count_get)(const struct scmi_protocol_handle *ph); @@ -97,6 +99,11 @@ struct scmi_clk_proto_ops { bool atomic); int (*state_get)(const struct scmi_protocol_handle *ph, u32 clk_id, bool *enabled, bool atomic); + int (*config_oem_get)(const struct scmi_protocol_handle *ph, u32 clk_id, + u8 oem_type, u32 *oem_val, u32 *attributes, + bool atomic); + int (*config_oem_set)(const struct scmi_protocol_handle *ph, u32 clk_id, + u8 oem_type, u32 oem_val, bool atomic); }; /**