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([188.252.220.253]) by smtp.googlemail.com with ESMTPSA id gg15-20020a170906e28f00b00982b204678fsm2103206ejb.207.2023.08.11.04.10.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Aug 2023 04:10:34 -0700 (PDT) From: Robert Marko To: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, corbet@lwn.net, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Cc: luka.perkov@sartura.hr, Robert Marko , Rob Herring Subject: [PATCH net-next v2 1/2] dt-bindings: net: ethernet-controller: add PSGMII mode Date: Fri, 11 Aug 2023 13:10:06 +0200 Message-ID: <20230811111032.231308-1-robert.marko@sartura.hr> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773933172308055837 X-GMAIL-MSGID: 1773933172308055837 Add a new PSGMII mode which is similar to QSGMII with the difference being that it combines 5 SGMII lines into a single link compared to 4 on QSGMII. It is commonly used by Qualcomm on their QCA807x PHY series. Signed-off-by: Robert Marko Acked-by: Rob Herring --- Documentation/devicetree/bindings/net/ethernet-controller.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml index 6b0d359367da..9f6a5ccbcefe 100644 --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -66,6 +66,7 @@ properties: - mii - gmii - sgmii + - psgmii - qsgmii - qusgmii - tbi From patchwork Fri Aug 11 11:10:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 134462 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b824:0:b0:3f2:4152:657d with SMTP id z4csp1060542vqi; Fri, 11 Aug 2023 05:39:17 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFpJxvjjuhC2CX0Kp1BivwzQUVAZYP3izV3t7E0dXl5Go9pLskamjiIzqCoTQUvc3tUWbd+ X-Received: by 2002:a05:6a20:555:b0:128:ffb7:dcfe with SMTP id 21-20020a056a20055500b00128ffb7dcfemr1939746pzq.1.1691757556962; Fri, 11 Aug 2023 05:39:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691757556; cv=none; d=google.com; s=arc-20160816; b=ozYzAGOvcKR+dNQj52IlPXVND/0a9Ni33PlpUZlB5iNvPN98wg8OukoLWKfJSYNnbr DMT/0QhUXJvSPEWr9ywZbH1OTSqE85LXCL+O32tdt09oadBvfHBFQWAxHNXRR8dN47+I F0UCvHXkfSwukf382AGvbwkGdfYlcI8KM+5Fbx+NOCN7ixQbhqWJj1efCKlFAsOGVfIk 9jqetfbJktGegHJ8Tfvr57/Eo9CSpM8HvdyUkRyEen1XYeuqUV5Ksgmv190jJa5BXNn7 Ev6iwf594R+RSlOB65LYcnGs1VQ7hJzsmsOqFB1dVGzTcB387/i9Vo5B5gmKSa8eVHv4 iTRw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=B/9oPiHmjQ4FsK5HpEZ0bkWyRg1lCyJ+ZeEBx0bVH60=; fh=HfiEBlPN09B/62SUqczTlF0P/c46VxaTM5yP7n2mYz0=; b=rDX/aE/zqRTLaGx5jGHHjGjU1lCm4+V+xAXyqz7ASiIY2VCUV9mKXPR76n5F/RZquu WBaaQcTjPZfOjacxSQDFznQzBdeRIJ/zKn85IYHd8rN7Lh3YYz05lQLcpHknGBp0XIrg axOfk6ZGGKhUep/+w4wf26uu8Z2AvEqabple/WsI2f3XslCdcBkIaDjbu8GYXOSxhN7D sawCqxPOgNAw+IfRVN7Fn4odfh/7pBw+IL1IMn5RdLQ+ZfDuXszRwyfvnFrHdx8g/1dZ cxBvPdjb4AOJccK7vaYzx7voLAXCFZUFRdk44D05wkQMYbGINyHH+K0xGr8vYpS3hP9C L7SA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sartura.hr header.s=sartura header.b=CcjjxBIk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=NONE dis=NONE) header.from=sartura.hr Received: from out1.vger.email (out1.vger.email. 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([188.252.220.253]) by smtp.googlemail.com with ESMTPSA id gg15-20020a170906e28f00b00982b204678fsm2103206ejb.207.2023.08.11.04.10.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Aug 2023 04:10:35 -0700 (PDT) From: Robert Marko To: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, corbet@lwn.net, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Cc: luka.perkov@sartura.hr, Gabor Juhos , Robert Marko Subject: [PATCH net-next v2 2/2] net: phy: Introduce PSGMII PHY interface mode Date: Fri, 11 Aug 2023 13:10:07 +0200 Message-ID: <20230811111032.231308-2-robert.marko@sartura.hr> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230811111032.231308-1-robert.marko@sartura.hr> References: <20230811111032.231308-1-robert.marko@sartura.hr> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773936372273179902 X-GMAIL-MSGID: 1773936372273179902 From: Gabor Juhos The PSGMII interface is similar to QSGMII. The main difference is that the PSGMII interface combines five SGMII lines into a single link while in QSGMII only four lines are combined. Similarly to the QSGMII, this interface mode might also needs special handling within the MAC driver. It is commonly used by Qualcomm with their QCA807x PHY series and modern WiSoC-s. Add definitions for the PHY layer to allow to express this type of connection between the MAC and PHY. Signed-off-by: Gabor Juhos Signed-off-by: Robert Marko --- Changes in v2: * Document the PSGMII PHY mode in phy.rst and phy_interface_t kerneldoc --- Documentation/networking/phy.rst | 4 ++++ drivers/net/phy/phy-core.c | 2 ++ drivers/net/phy/phylink.c | 3 +++ include/linux/phy.h | 4 ++++ 4 files changed, 13 insertions(+) diff --git a/Documentation/networking/phy.rst b/Documentation/networking/phy.rst index b7ac4c64cf67..1283240d7620 100644 --- a/Documentation/networking/phy.rst +++ b/Documentation/networking/phy.rst @@ -323,6 +323,10 @@ Some of the interface modes are described below: contrast with the 1000BASE-X phy mode used for Clause 38 and 39 PMDs, this interface mode has different autonegotiation and only supports full duplex. +``PHY_INTERFACE_MODE_PSGMII`` + This is the Penta SGMII mode, it is similar to QSGMII but it combines 5 + SGMII lines into a single link compared to 4 on QSGMII. + Pause frames / flow control =========================== diff --git a/drivers/net/phy/phy-core.c b/drivers/net/phy/phy-core.c index a64186dc53f8..966c93cbe616 100644 --- a/drivers/net/phy/phy-core.c +++ b/drivers/net/phy/phy-core.c @@ -142,6 +142,8 @@ int phy_interface_num_ports(phy_interface_t interface) case PHY_INTERFACE_MODE_QSGMII: case PHY_INTERFACE_MODE_QUSGMII: return 4; + case PHY_INTERFACE_MODE_PSGMII: + return 5; case PHY_INTERFACE_MODE_MAX: WARN_ONCE(1, "PHY_INTERFACE_MODE_MAX isn't a valid interface mode"); return 0; diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 4f1c8bb199e9..160bce608c34 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -210,6 +210,7 @@ static int phylink_interface_max_speed(phy_interface_t interface) case PHY_INTERFACE_MODE_RGMII_RXID: case PHY_INTERFACE_MODE_RGMII_ID: case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_PSGMII: case PHY_INTERFACE_MODE_QSGMII: case PHY_INTERFACE_MODE_QUSGMII: case PHY_INTERFACE_MODE_SGMII: @@ -475,6 +476,7 @@ unsigned long phylink_get_capabilities(phy_interface_t interface, case PHY_INTERFACE_MODE_RGMII_RXID: case PHY_INTERFACE_MODE_RGMII_ID: case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_PSGMII: case PHY_INTERFACE_MODE_QSGMII: case PHY_INTERFACE_MODE_QUSGMII: case PHY_INTERFACE_MODE_SGMII: @@ -868,6 +870,7 @@ static int phylink_parse_mode(struct phylink *pl, switch (pl->link_config.interface) { case PHY_INTERFACE_MODE_SGMII: + case PHY_INTERFACE_MODE_PSGMII: case PHY_INTERFACE_MODE_QSGMII: case PHY_INTERFACE_MODE_QUSGMII: case PHY_INTERFACE_MODE_RGMII: diff --git a/include/linux/phy.h b/include/linux/phy.h index ba08b0e60279..d7407f9a56a7 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -110,6 +110,7 @@ extern const int phy_10gbit_features_array[1]; * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax + * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX @@ -147,6 +148,7 @@ typedef enum { PHY_INTERFACE_MODE_XGMII, PHY_INTERFACE_MODE_XLGMII, PHY_INTERFACE_MODE_MOCA, + PHY_INTERFACE_MODE_PSGMII, PHY_INTERFACE_MODE_QSGMII, PHY_INTERFACE_MODE_TRGMII, PHY_INTERFACE_MODE_100BASEX, @@ -254,6 +256,8 @@ static inline const char *phy_modes(phy_interface_t interface) return "xlgmii"; case PHY_INTERFACE_MODE_MOCA: return "moca"; + case PHY_INTERFACE_MODE_PSGMII: + return "psgmii"; case PHY_INTERFACE_MODE_QSGMII: return "qsgmii"; case PHY_INTERFACE_MODE_TRGMII: