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Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT006.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB9345 X-Spam-Status: No, score=-10.9 required=5.0 tests=BAYES_00, BODY_8BITS, DKIM_SIGNED, DKIM_VALID, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_NONE, KAM_LOTSOFHASH, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Richard Ball via Binutils From: Richard Ball Reply-To: Richard Ball Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773666509072645186 X-GMAIL-MSGID: 1773666509072645186 This patch adds support for the Cortex-A520 CPU to gas. No regressions on aarch64-none-elf. Ok for binutils-master? Could this patch please be committed on my behalf, as I do not have write access yet? gas/ChangeLog:         * NEWS: Update docs.         * config/tc-aarch64.c: Add Cortex-A520.         * doc/c-aarch64.texi: Update docs. ####################################  @code{exynos-m1}, diff --git a/gas/NEWS b/gas/NEWS index 1ed043511eb67aadc96549a775a87bc50c2b5ab8..07ba75661052842554a478ee612b9c7a087cec1b 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -10,6 +10,8 @@  * Add support for Intel AVX-VNNI-INT16 instructions. +* Add support for Cortex-A520 for AArch64. +  Changes in 2.41:  * Add support for Intel FRED instructions. diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 99fb5de267960cac694128357bf7f6cf3576b96c..e692161105a5c75fab92f707a114c20c9531f18f 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -10227,6 +10227,10 @@ static const struct aarch64_cpu_option_table aarch64_cpus[] = {                    | AARCH64_FEATURE_MEMTAG                    | AARCH64_FEATURE_SVE2_BITPERM),     "Cortex-A510"}, +  {"cortex-a520", AARCH64_FEATURE (AARCH64_ARCH_V9_2, +                  AARCH64_FEATURE_MEMTAG +                  | AARCH64_FEATURE_SVE2_BITPERM), +   "Cortex-A520"},    {"cortex-a710", AARCH64_FEATURE (AARCH64_ARCH_V9,                    AARCH64_FEATURE_BFLOAT16                    | AARCH64_FEATURE_I8MM diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index acde4a77dd25f20398c41222ce66bbc64cc99bbd..ed6b46e042290d806d98728d725b62520644e246 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -72,6 +72,7 @@ on the target processor.  The following processor names are recognized:  @code{cortex-a78ae},  @code{cortex-a78c},  @code{cortex-a510}, +@code{cortex-a520},  @code{cortex-a710},  @code{ares},