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Acked-by: Conor Dooley Signed-off-by: Michael Riesch --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 1e2e51401dc5..1dfafc339ddd 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -677,6 +677,8 @@ patternProperties: description: iWave Systems Technologies Pvt. Ltd. "^jadard,.*": description: Jadard Technology Inc. + "^jasonic,.*": + description: Jasonic Technology Ltd. "^jdi,.*": description: Japan Display Inc. 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JT240MHQS-HWT-EK-E3 display. Acked-by: Conor Dooley Signed-off-by: Michael Riesch --- Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml b/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml index 0da4c7e05097..ef162b51d010 100644 --- a/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml +++ b/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml @@ -18,6 +18,7 @@ properties: enum: - edt,et028013dma - inanbo,t28cp45tn89-v17 + - jasonic,jt240mhqs-hwt-ek-e3 - sitronix,st7789v reg: true From patchwork Fri Aug 4 13:02:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 131179 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:44a:b0:3f2:4152:657d with SMTP id ez10csp267128vqb; Fri, 4 Aug 2023 06:36:05 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGb13S1n2+x/gKrdOX89lmagYWnwSbJt4sUVEeEqghYP58YY0RGVvrcRA0CcFRUQ8Uz1Np9 X-Received: by 2002:a05:6a00:21cb:b0:653:de9a:d933 with SMTP id t11-20020a056a0021cb00b00653de9ad933mr1761793pfj.17.1691156165371; Fri, 04 Aug 2023 06:36:05 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1691156165; cv=pass; d=google.com; s=arc-20160816; b=yIRJjz6ZhwBKtIes7vSPUmfXy7VFBKzTM1cWsCOTT4CZ8D5tF4O4R5neOuX/hNbSkK y0i+eGQ4fC/THHUjjyIHXkISbLkKZJW2rpVDzVX9duTmiL3u21yWJEczvD3MiE4XzgZX 5OuuT828BmxkQCgUoWhqddAQ2tGFgzespjxt7952/J/kOR0Hm5DaGuuLhdoDJfvPGNzW qXSf9CipmBuPC9cf/VWkAfNWFV83LZcFUj6IT20gZBI1YQOH+NAxsCRVPdVdTHMK4RYs a+LccFXqSXdidG1TEy1CWm7m0pMlrzE2fuFne0IFgbnD3X2MhUJTjPNWkeN3x3LPR9iq mlww== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:cc:to:in-reply-to:references :message-id:content-transfer-encoding:subject:date:from :dkim-signature; bh=ac5f6Oxahs92G9BhJ5ffEeT3JoNdmuQaXl2k1ppr2BE=; fh=Tq5vakelb7Evvy1hSU1bJIwKBl0VAr7pcHQ3+RKee2k=; b=gc42BKMC5ZSNM8wL5QLhQdeCtyvcAv7YUsjyo+I15jAQFqlsCspu7YnyiWcAQ5gZBJ 9DsaQ5rLduTGZxQ68gFUY0b66MjgaCdriUxXPwGyDMn8eROsiGjkiAZVE77U8EnCw6nU Fnv0dVr7i/12hFTwfdVRETuMNE22TyoXE+/cofJn9W3KzaZ+m9bitTSvAkBqbCbE8vZX t2nGaZjh2fwx3tN7n9JKc2QrEpdIc7eKv4WzasV3VIdlO0woocx5hQdxGcB5GoUZEfrt NzasGa1Okw0tWXlDJvytmaBl3LrEJjlPQ8r65RifHcrnnGradGALNNV8mUVtT8Gjjlwc ZkvQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@wolfvision.net header.s=selector2 header.b=I1CdbpaG; arc=pass (i=1 spf=pass spfdomain=wolfvision.net dkim=pass dkdomain=wolfvision.net dmarc=pass fromdomain=wolfvision.net); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=wolfvision.net Received: from out1.vger.email (out1.vger.email. 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Here, the area to be displayed can be restricted in one direction (by default, in vertical direction). This is useful for panels that are partially occluded by design. Add support for the partial mode. Signed-off-by: Michael Riesch --- drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 43 ++++++++++++++++++++++++-- 1 file changed, 41 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c index 0ded72ed2fcd..ebc9a3bd6db3 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c @@ -118,6 +118,9 @@ struct st7789_panel_info { u32 bus_format; u32 bus_flags; bool invert_mode; + bool partial_mode; + u16 partial_start; + u16 partial_end; }; struct st7789v { @@ -345,9 +348,14 @@ static enum drm_panel_orientation st7789v_get_orientation(struct drm_panel *p) static int st7789v_prepare(struct drm_panel *panel) { struct st7789v *ctx = panel_to_st7789v(panel); - u8 pixel_fmt, polarity; + u8 mode, pixel_fmt, polarity; int ret; + if (!ctx->info->partial_mode) + mode = ST7789V_RGBCTRL_WO; + else + mode = 0; + switch (ctx->info->bus_format) { case MEDIA_BUS_FMT_RGB666_1X18: pixel_fmt = MIPI_DCS_PIXEL_FMT_18BIT; @@ -487,6 +495,37 @@ static int st7789v_prepare(struct drm_panel *panel) MIPI_DCS_EXIT_INVERT_MODE)); } + if (ctx->info->partial_mode) { + u8 area_data[4] = { + (ctx->info->partial_start >> 8) & 0xff, + (ctx->info->partial_start >> 0) & 0xff, + ((ctx->info->partial_end - 1) >> 8) & 0xff, + ((ctx->info->partial_end - 1) >> 0) & 0xff, + }; + + /* Caution: if userspace ever pushes a mode different from the + * expected one (i.e., the one advertised by get_modes), we'll + * add margins. + */ + + ST7789V_TEST(ret, st7789v_write_command( + ctx, MIPI_DCS_ENTER_PARTIAL_MODE)); + + ST7789V_TEST(ret, st7789v_write_command( + ctx, MIPI_DCS_SET_PAGE_ADDRESS)); + ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[0])); + ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[1])); + ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[2])); + ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[3])); + + ST7789V_TEST(ret, st7789v_write_command( + ctx, MIPI_DCS_SET_PARTIAL_ROWS)); + ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[0])); + ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[1])); + ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[2])); + ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[3])); + } + ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_RAMCTRL_CMD)); ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RAMCTRL_DM_RGB | ST7789V_RAMCTRL_RM_RGB)); @@ -494,7 +533,7 @@ static int st7789v_prepare(struct drm_panel *panel) ST7789V_RAMCTRL_MAGIC)); ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_RGBCTRL_CMD)); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RGBCTRL_WO | + ST7789V_TEST(ret, st7789v_write_data(ctx, mode | ST7789V_RGBCTRL_RCM(2) | polarity)); ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RGBCTRL_VBP(8))); From patchwork Fri Aug 4 13:02:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 131163 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:44a:b0:3f2:4152:657d with SMTP id ez10csp255074vqb; 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While the controller features a resolution of 320x240, only an area of 280x240 is visible by design. Signed-off-by: Michael Riesch Reviewed-by: Neil Armstrong --- drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 29 ++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c index ebc9a3bd6db3..88e80fe98112 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c @@ -279,6 +279,21 @@ static const struct drm_display_mode et028013dma_mode = { .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }; +static const struct drm_display_mode jt240mhqs_hwt_ek_e3_mode = { + .clock = 6000, + .hdisplay = 240, + .hsync_start = 240 + 28, + .hsync_end = 240 + 28 + 10, + .htotal = 240 + 28 + 10 + 10, + .vdisplay = 280, + .vsync_start = 280 + 8, + .vsync_end = 280 + 8 + 4, + .vtotal = 280 + 8 + 4 + 4, + .width_mm = 43, + .height_mm = 37, + .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, +}; + static const struct st7789_panel_info default_panel = { .mode = &default_mode, .invert_mode = true, @@ -303,6 +318,17 @@ static const struct st7789_panel_info et028013dma_panel = { DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, }; +static const struct st7789_panel_info jt240mhqs_hwt_ek_e3_panel = { + .mode = &jt240mhqs_hwt_ek_e3_mode, + .invert_mode = true, + .bus_format = MEDIA_BUS_FMT_RGB666_1X18, + .bus_flags = DRM_BUS_FLAG_DE_HIGH | + DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE, + .partial_mode = true, + .partial_start = 38, + .partial_end = 318, +}; + static int st7789v_get_modes(struct drm_panel *panel, struct drm_connector *connector) { @@ -635,6 +661,7 @@ static const struct spi_device_id st7789v_spi_id[] = { { "st7789v", (unsigned long) &default_panel }, { "t28cp45tn89-v17", (unsigned long) &t28cp45tn89_panel }, { "et028013dma", (unsigned long) &et028013dma_panel }, + { "jt240mhqs-hwt-ek-e3", (unsigned long) &jt240mhqs_hwt_ek_e3_panel }, { } }; MODULE_DEVICE_TABLE(spi, st7789v_spi_id); @@ -643,6 +670,8 @@ static const struct of_device_id st7789v_of_match[] = { { .compatible = "sitronix,st7789v", .data = &default_panel }, { .compatible = "inanbo,t28cp45tn89-v17", .data = &t28cp45tn89_panel }, { .compatible = "edt,et028013dma", .data = &et028013dma_panel }, + { .compatible = "jasonic,jt240mhqs-hwt-ek-e3", + .data = &jt240mhqs_hwt_ek_e3_panel }, { } }; MODULE_DEVICE_TABLE(of, st7789v_of_match);