From patchwork Fri Aug 4 09:02:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georg-Johann Lay X-Patchwork-Id: 131024 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:44a:b0:3f2:4152:657d with SMTP id ez10csp125299vqb; Fri, 4 Aug 2023 02:03:21 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHrclolz172yrXAbIVdlLNfJI51LUmvj5kcdEyl6AnASSSKusKEYwpBVrL4TRBO3o8WZgPZ X-Received: by 2002:a17:906:4fc5:b0:991:f0dc:c930 with SMTP id i5-20020a1709064fc500b00991f0dcc930mr1454963ejw.16.1691139801582; Fri, 04 Aug 2023 02:03:21 -0700 (PDT) Received: from server2.sourceware.org (ip-8-43-85-97.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id d4-20020a1709063ec400b0098decd9e210si1399955ejj.19.2023.08.04.02.03.21 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Aug 2023 02:03:21 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=fail header.i=@gjlay.de header.s=strato-dkim-0002 header.b=OuD+0k07; dkim=neutral (no key) header.i=@gjlay.de header.s=strato-dkim-0003 header.b="DVDIe3s/"; arc=fail (signature failed); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 74BAF3858C2D for ; Fri, 4 Aug 2023 09:03:20 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mo4-p00-ob.smtp.rzone.de (mo4-p00-ob.smtp.rzone.de [81.169.146.217]) by sourceware.org (Postfix) with ESMTPS id AF4CE3858C2D for ; Fri, 4 Aug 2023 09:02:34 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org AF4CE3858C2D Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=gjlay.de Authentication-Results: sourceware.org; spf=none smtp.mailfrom=gjlay.de ARC-Seal: i=1; a=rsa-sha256; t=1691139753; cv=none; d=strato.com; s=strato-dkim-0002; b=MjmtGCWI91FMtzg44ntUk63hwxr1Pl+J/ZH8wtSvEVDyZA/2IB9eD06ZZI6N2L1Wuz ngAFZUZzoL5PUbAM9ac+C+ufaSUXZepEultgj6RB8hKyoxKSwJ7VGwIeOsslSQaX6ay1 u4dD+Jd1tqXejn1gLHqupLMB9sLsIm3OpKNYT1COnT4eCGJfZwnbxLkIFGP7uYWns5A/ ht77Xu1ww88BPBLPDEMnHuvBy138GAnVPN67UUMoY/1JMBU8vRCywsng6dt+aY8VjfhT nAluNEj7MbVVDhmeoAtlRKiI8tlqHJMm0CP/56QV/vCdsYBy1XVPUEuREaPsCjuiHEdd D6GA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; t=1691139753; s=strato-dkim-0002; d=strato.com; h=Subject:From:To:Date:Message-ID:Cc:Date:From:Subject:Sender; bh=IUOPeRdqK2Ze/y5ak4oBYWGeRLE8BaxS0wyBz3sbIh8=; b=dt3u/e1OzaP3EtxFNKLsockYto22ivzbac5TWKzgerUAXUSZQPR6uoINjr3/ia42fy m7labe+K0LbfsvyUyAxDpvkV+oVj0CEwAFiNyGl8d44CHdo8s0dIZj5/t/sxPbuUOo1S qOOmAA/C33F88G6OEpLNmA43M0expzlV3MdiD6k8Vu96TaLCtsjdUZmP68gI/lP+n/wR Qb5C3BP5vOUwwgDxKWsVF56T8GPXxO08F0V0Ivnof/CQfKpNXlVWDBiGdmfqgANiZndk cJBJQkM4H47C5l9scRwUlCUZuylX1fVNyGfx0CaqVqTVQ5PmB7UE7UpntIPk25j/UoHk 8fiw== ARC-Authentication-Results: i=1; strato.com; arc=none; dkim=none X-RZG-CLASS-ID: mo00 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1691139753; s=strato-dkim-0002; d=gjlay.de; h=Subject:From:To:Date:Message-ID:Cc:Date:From:Subject:Sender; bh=IUOPeRdqK2Ze/y5ak4oBYWGeRLE8BaxS0wyBz3sbIh8=; b=OuD+0k0791or+xskBu3LJ/7DTns/xLbmzEWpN0PdB9SV0dp4Kd2mAK5qiHQkxFvwNa ryo+yjRJyaVihNVIO25XlwAG1GjzN9Q/UhRo2pSjfbSx/b0zrvsZdi2NcdhbwVduA7vv 741/84mI/U21Qo9ytkUAuedgBC50H1c734t3qKGtV0Wz7xrE2IydLMQKIsRnThgwpcpl uRPLFvHQY0ilXCimHdWmxeoGNL6xvS0yylZSSO6G51ZlJaWmNuxone7Dp41DqA5wz2ss MxLjU6fUPWnCUy8EdzWiLMJrr6HhHcdCRHGf6shfUge/+YbG9og5L3foJw6UsFDskghf wGSQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; t=1691139753; s=strato-dkim-0003; d=gjlay.de; h=Subject:From:To:Date:Message-ID:Cc:Date:From:Subject:Sender; bh=IUOPeRdqK2Ze/y5ak4oBYWGeRLE8BaxS0wyBz3sbIh8=; b=DVDIe3s/Qktq8qbbhGmrvuMicPIiU/zYVw1ZPKG8gePbcbQb2Pp9TDhvoTz42/PrCB 9xpaNTbr4Qyw9GimHKCQ== X-RZG-AUTH: ":LXoWVUeid/7A29J/hMvvT3koxZnKT7Qq0xotTetVnKkRmM69o2y+LiO3MutATA==" Received: from [192.168.2.102] by smtp.strato.de (RZmta 49.6.6 DYNA|AUTH) with ESMTPSA id Cd29bez7492XtGr (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate) for ; Fri, 4 Aug 2023 11:02:33 +0200 (CEST) Message-ID: <34f7be13-0f2f-7110-24aa-6d9a70cc03f8@gjlay.de> Date: Fri, 4 Aug 2023 11:02:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Content-Language: en-US To: gcc-patches@gcc.gnu.org From: Georg-Johann Lay Subject: [avr,committed] Add some more devices to avr-mcus.def. X-Spam-Status: No, score=-9.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, SPF_HELO_PASS, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773288608190187074 X-GMAIL-MSGID: 1773288608190187074 This adds some more Xmega like devices to the avr backend. Johann AVR: Add some more devices: AVR16DD*, AVR32DD*, AVR64DD*, AVR64EA*, ATtiny42*, ATtiny82*, ATtiny162*, ATtiny322*, ATtiny10*. gcc/ * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32) (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427) (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627) (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28) (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32) (attiny102, attiny104): New devices. * doc/avr-mmcu.texi: Regenerate. AVR: Add some more devices: AVR16DD*, AVR32DD*, AVR64DD*, AVR64EA*, ATtiny42*, ATtiny82*, ATtiny162*, ATtiny322*, ATtiny10*. gcc/ * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32) (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427) (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627) (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28) (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32) (attiny102, attiny104): New devices. * doc/avr-mmcu.texi: Regenerate. diff --git a/gcc/config/avr/avr-mcus.def b/gcc/config/avr/avr-mcus.def index d0056c960ee..4c4269cd429 100644 --- a/gcc/config/avr/avr-mcus.def +++ b/gcc/config/avr/avr-mcus.def @@ -314,6 +314,13 @@ AVR_MCU ("avr64db28", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DB28__", AVR_MCU ("avr64db32", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DB32__", 0x6000, 0x0, 0x10000, 0) AVR_MCU ("avr64db48", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DB48__", 0x6000, 0x0, 0x10000, 0) AVR_MCU ("avr64db64", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DB64__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64dd14", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DD14__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64dd20", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DD20__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64dd28", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DD28__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64dd32", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64DD32__", 0x6000, 0x0, 0x10000, 0) +AVR_MCU ("avr64ea28", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64EA28__", 0x6800, 0x0, 0x10000, 0) +AVR_MCU ("avr64ea32", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64EA32__", 0x6800, 0x0, 0x10000, 0) +AVR_MCU ("avr64ea48", ARCH_AVRXMEGA2, AVR_ISA_NONE, "__AVR_AVR64EA48__", 0x6800, 0x0, 0x10000, 0) /* Xmega, Flash + RAM < 64K, flash visible in RAM address space */ AVR_MCU ("avrxmega3", ARCH_AVRXMEGA3, AVR_ISA_NONE, NULL, 0x3f00, 0x0, 0x8000, 0) AVR_MCU ("attiny202", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny202__", 0x3f80, 0x0, 0x800, 0x8000) @@ -342,6 +349,18 @@ AVR_MCU ("attiny1617", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny1617__" AVR_MCU ("attiny3214", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny3214__", 0x3800, 0x0, 0x8000, 0x8000) AVR_MCU ("attiny3216", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny3216__", 0x3800, 0x0, 0x8000, 0x8000) AVR_MCU ("attiny3217", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny3217__", 0x3800, 0x0, 0x8000, 0x8000) +AVR_MCU ("attiny424", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny424__", 0x3e00, 0x0, 0x1000, 0x8000) +AVR_MCU ("attiny426", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny426__", 0x3e00, 0x0, 0x1000, 0x8000) +AVR_MCU ("attiny427", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny427__", 0x3e00, 0x0, 0x1000, 0x8000) +AVR_MCU ("attiny824", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny824__", 0x3c00, 0x0, 0x2000, 0x8000) +AVR_MCU ("attiny826", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny826__", 0x3c00, 0x0, 0x2000, 0x8000) +AVR_MCU ("attiny827", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATtiny827__", 0x3c00, 0x0, 0x2000, 0x8000) +AVR_MCU ("attiny1624", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny1624__", 0x3800, 0x0, 0x4000, 0x8000) +AVR_MCU ("attiny1626", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny1626__", 0x3800, 0x0, 0x4000, 0x8000) +AVR_MCU ("attiny1627", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny1627__", 0x3800, 0x0, 0x4000, 0x8000) +AVR_MCU ("attiny3224", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny3224__", 0x3400, 0x0, 0x8000, 0x8000) +AVR_MCU ("attiny3226", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny3226__", 0x3400, 0x0, 0x8000, 0x8000) +AVR_MCU ("attiny3227", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATtiny3227__", 0x3400, 0x0, 0x8000, 0x8000) AVR_MCU ("atmega808", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATmega808__", 0x3c00, 0x0, 0x2000, 0x4000) AVR_MCU ("atmega809", ARCH_AVRXMEGA3, AVR_ISA_RCALL, "__AVR_ATmega809__", 0x3c00, 0x0, 0x2000, 0x4000) AVR_MCU ("atmega1608", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATmega1608__", 0x3800, 0x0, 0x4000, 0x4000) @@ -350,12 +369,20 @@ AVR_MCU ("atmega3208", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATmega3208__" AVR_MCU ("atmega3209", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATmega3209__", 0x3800, 0x0, 0x8000, 0x4000) AVR_MCU ("atmega4808", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATmega4808__", 0x2800, 0x0, 0xc000, 0x4000) AVR_MCU ("atmega4809", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_ATmega4809__", 0x2800, 0x0, 0xc000, 0x4000) +AVR_MCU ("avr16dd14", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16DD14__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr16dd20", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16DD20__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr16dd28", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16DD28__", 0x7800, 0x0, 0x4000, 0x8000) +AVR_MCU ("avr16dd32", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR16DD32__", 0x7800, 0x0, 0x4000, 0x8000) AVR_MCU ("avr32da28", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DA28__", 0x7000, 0x0, 0x8000, 0x8000) AVR_MCU ("avr32da32", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DA32__", 0x7000, 0x0, 0x8000, 0x8000) AVR_MCU ("avr32da48", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DA48__", 0x7000, 0x0, 0x8000, 0x8000) AVR_MCU ("avr32db28", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DB28__", 0x7000, 0x0, 0x8000, 0x8000) AVR_MCU ("avr32db32", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DB32__", 0x7000, 0x0, 0x8000, 0x8000) AVR_MCU ("avr32db48", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DB48__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32dd14", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DD14__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32dd20", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DD20__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32dd28", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DD28__", 0x7000, 0x0, 0x8000, 0x8000) +AVR_MCU ("avr32dd32", ARCH_AVRXMEGA3, AVR_ISA_NONE, "__AVR_AVR32DD32__", 0x7000, 0x0, 0x8000, 0x8000) /* Xmega, 64K < Flash <= 128K, RAM <= 64K */ AVR_MCU ("avrxmega4", ARCH_AVRXMEGA4, AVR_ISA_NONE, NULL, 0x2000, 0x0, 0x11000, 0) AVR_MCU ("atxmega64a3", ARCH_AVRXMEGA4, AVR_ISA_NONE, "__AVR_ATxmega64A3__", 0x2000, 0x0, 0x11000, 0) @@ -410,6 +437,8 @@ AVR_MCU ("attiny4", ARCH_AVRTINY, AVR_ISA_LDS, "__AVR_ATtiny4__", AVR_MCU ("attiny5", ARCH_AVRTINY, AVR_ISA_LDS, "__AVR_ATtiny5__", 0x0040, 0x0, 0x200, 0) AVR_MCU ("attiny9", ARCH_AVRTINY, AVR_ISA_LDS, "__AVR_ATtiny9__", 0x0040, 0x0, 0x400, 0) AVR_MCU ("attiny10", ARCH_AVRTINY, AVR_ISA_LDS, "__AVR_ATtiny10__", 0x0040, 0x0, 0x400, 0) +AVR_MCU ("attiny102", ARCH_AVRTINY, AVR_ISA_LDS, "__AVR_ATtiny102__", 0x0040, 0x0, 0x400, 0) +AVR_MCU ("attiny104", ARCH_AVRTINY, AVR_ISA_LDS, "__AVR_ATtiny104__", 0x0040, 0x0, 0x400, 0) AVR_MCU ("attiny20", ARCH_AVRTINY, AVR_ISA_LDS, "__AVR_ATtiny20__", 0x0040, 0x0, 0x800, 0) AVR_MCU ("attiny40", ARCH_AVRTINY, AVR_ISA_NONE, "__AVR_ATtiny40__", 0x0040, 0x0, 0x1000, 0) /* Assembler only. */ diff --git a/gcc/doc/avr-mmcu.texi b/gcc/doc/avr-mmcu.texi index 2a1134ada9f..bec8e4322ce 100644 --- a/gcc/doc/avr-mmcu.texi +++ b/gcc/doc/avr-mmcu.texi @@ -50,11 +50,11 @@ @item avrxmega2 ``XMEGA'' devices with more than 8@tie{}KiB and up to 64@tie{}KiB of program memory. -@*@var{mcu}@tie{}= @code{atxmega8e5}, @code{atxmega16a4}, @code{atxmega16a4u}, @code{atxmega16c4}, @code{atxmega16d4}, @code{atxmega16e5}, @code{atxmega32a4}, @code{atxmega32a4u}, @code{atxmega32c3}, @code{atxmega32c4}, @code{atxmega32d3}, @code{atxmega32d4}, @code{atxmega32e5}, @code{avr64da28}, @code{avr64da32}, @code{avr64da48}, @code{avr64da64}, @code{avr64db28}, @code{avr64db32}, @code{avr64db48}, @code{avr64db64}. +@*@var{mcu}@tie{}= @code{atxmega8e5}, @code{atxmega16a4}, @code{atxmega16a4u}, @code{atxmega16c4}, @code{atxmega16d4}, @code{atxmega16e5}, @code{atxmega32a4}, @code{atxmega32a4u}, @code{atxmega32c3}, @code{atxmega32c4}, @code{atxmega32d3}, @code{atxmega32d4}, @code{atxmega32e5}, @code{avr64da28}, @code{avr64da32}, @code{avr64da48}, @code{avr64da64}, @code{avr64db28}, @code{avr64db32}, @code{avr64db48}, @code{avr64db64}, @code{avr64dd14}, @code{avr64dd20}, @code{avr64dd28}, @code{avr64dd32}, @code{avr64ea28}, @code{avr64ea32}, @code{avr64ea48}. @item avrxmega3 ``XMEGA'' devices with up to 64@tie{}KiB of combined program memory and RAM, and with program memory visible in the RAM address space. -@*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212}, @code{attiny214}, @code{attiny402}, @code{attiny404}, @code{attiny406}, @code{attiny412}, @code{attiny414}, @code{attiny416}, @code{attiny417}, @code{attiny804}, @code{attiny806}, @code{attiny807}, @code{attiny814}, @code{attiny816}, @code{attiny817}, @code{attiny1604}, @code{attiny1606}, @code{attiny1607}, @code{attiny1614}, @code{attiny1616}, @code{attiny1617}, @code{attiny3214}, @code{attiny3216}, @code{attiny3217}, @code{atmega808}, @code{atmega809}, @code{atmega1608}, @code{atmega1609}, @code{atmega3208}, @code{atmega3209}, @code{atmega4808}, @code{atmega4809}, @code{avr32da28}, @code{avr32da32}, @code{avr32da48}, @code{avr32db28}, @code{avr32db32}, @code{avr32db48}. +@*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212}, @code{attiny214}, @code{attiny402}, @code{attiny404}, @code{attiny406}, @code{attiny412}, @code{attiny414}, @code{attiny416}, @code{attiny417}, @code{attiny424}, @code{attiny426}, @code{attiny427}, @code{attiny804}, @code{attiny806}, @code{attiny807}, @code{attiny814}, @code{attiny816}, @code{attiny817}, @code{attiny824}, @code{attiny826}, @code{attiny827}, @code{attiny1604}, @code{attiny1606}, @code{attiny1607}, @code{attiny1614}, @code{attiny1616}, @code{attiny1617}, @code{attiny1624}, @code{attiny1626}, @code{attiny1627}, @code{attiny3214}, @code{attiny3216}, @code{attiny3217}, @code{attiny3224}, @code{attiny3226}, @code{attiny3227}, @code{atmega808}, @code{atmega809}, @code{atmega1608}, @code{atmega1609}, @code{atmega3208}, @code{atmega3209}, @code{atmega4808}, @code{atmega4809}, @code{avr16dd14}, @code{avr16dd20}, @code{avr16dd28}, @code{avr16dd32}, @code{avr32da28}, @code{avr32da32}, @code{avr32da48}, @code{avr32db28}, @code{avr32db32}, @code{avr32db48}, @code{avr32dd14}, @code{avr32dd20}, @code{avr32dd28}, @code{avr32dd32}. @item avrxmega4 ``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of program memory. @@ -74,7 +74,7 @@ @item avrtiny ``TINY'' Tiny core devices with 512@tie{}B up to 4@tie{}KiB of program memory. -@*@var{mcu}@tie{}= @code{attiny4}, @code{attiny5}, @code{attiny9}, @code{attiny10}, @code{attiny20}, @code{attiny40}. +@*@var{mcu}@tie{}= @code{attiny4}, @code{attiny5}, @code{attiny9}, @code{attiny10}, @code{attiny102}, @code{attiny104}, @code{attiny20}, @code{attiny40}. @item avr1 This ISA is implemented by the minimal AVR core and supported for assembler only.