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a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773205518708132996 X-GMAIL-MSGID: 1773205518708132996 Multimedia subsystem (MMsys) contains multimedia controller, Multimedia Data Path v2.0 (MDP 2.0) and Display (DISP). The multimedia controller includes bus fabric control, Smart Memory Interface (SMI) control, memory access second-level arbiter, and multimedia configuration. It plays the key role in handling different handshakings between infra subsystem, video subsystem, image subsystem and G3D subsystem. For more detail, ask Mediatek for the MT8365 AIoT application processor functional specification. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index 413496c92069..bcabc2b89a94 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -603,6 +603,12 @@ u2port1: usb-phy@1000 { #phy-cells = <1>; }; }; + + mmsys: syscon@14000000 { + compatible = "mediatek,mt8365-mmsys", "syscon"; + reg = <0 0x14000000 0 0x1000>; + #clock-cells = <1>; + }; }; timer { From patchwork Thu Aug 3 09:40:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 130465 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp1063784vqx; Thu, 3 Aug 2023 04:02:13 -0700 (PDT) X-Google-Smtp-Source: APBJJlFWdjBTRkuhyXtFUs2hD6LMYZRaprYGEIrvO2ufWmF7yp+eh54XDFk5uGSwFmZyVt/kyKhA X-Received: by 2002:a17:906:cc55:b0:99b:ebf9:90f2 with SMTP id mm21-20020a170906cc5500b0099bebf990f2mr7446515ejb.45.1691060532925; Thu, 03 Aug 2023 04:02:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691060532; cv=none; d=google.com; s=arc-20160816; b=os0S2qENQPzHQpkTQ/WgC8O4HqJXrri3PXn3RkuMNSS+3zjoDvZ8AHYVWUsmyA8mra nk60G77ghpj/OEc36IcGew+xYvSwK/3DQgm43EHI5juSY3msqv7plwUt40ApkQ/iR5lR HwiH/A/ExAZwzSUf7UspvsrGMaijiiQFh5wIJNLAhwiSMH/xsS0KDd2E1ToXoNluuLmT lAD65GN6P0Krv6LkTG5fBB9EFM/vn42NSwFojraDNusc5MVyBZmaIOg4ANSPKeo3xWyA Zg3pDvrrsjrIgejE2wtI+AWjpia48eMsPSG5CBaGENe3XbACCDfv91ponJiApQPQxB3O BC8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=RatweBkvtrU6P41JPdWUfgV+9gxtDS8Z15ua81Y0Obw=; fh=BOObgak1TgpItHQ9B3ZjvZxLN7OMXZn5Va0KKl0kPbo=; b=HgxzY657xBq0ajhUvqASpO+lvsUnQbvy1R1TVASt9jEJi1uOIe2PE8dreociAnxjd7 ejBhVn1rH1BkYdhuFBRLZZVwzqHW7DMfy+16erJn4tSL0T/uLcm1M4RC3AdzE5/VwroB s8wJm9x1lWwx484AoMkm5yi56fn9SHpV3EF6NxTUm/obLmvDtFZGlQ/yOwH36IVHVUV/ 44acFC9GgtlLSe/896u+YgTCwDSsDzwslbf7hVXEzL6AgHD3noynsaJYqwIc9NqZ2hTl ZgoO8926FmeCChGQdMlbrjlqx+mmCURko3DRZ9Fw7ZQ05us+x5edzdlYk+dQZ5RNOj+M uipQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20221208.gappssmtp.com header.s=20221208 header.b=APeHPOyX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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This processor consists of timing generated unit (TG), lens/sensor compensation unit and image process unit. For more detail, ask Mediatek for the MT8365 AIoT application processor functional specification. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index bcabc2b89a94..f9cddce5bd9d 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -609,6 +609,12 @@ mmsys: syscon@14000000 { reg = <0 0x14000000 0 0x1000>; #clock-cells = <1>; }; + + camsys: syscon@15000000 { + compatible = "mediatek,mt8365-imgsys", "syscon"; + reg = <0 0x15000000 0 0x1000>; + #clock-cells = <1>; + }; }; timer { From patchwork Thu Aug 3 09:40:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 130496 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp1084926vqx; Thu, 3 Aug 2023 04:39:22 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGmFdLSwppib3COxv/WsazQpVyd3KzpYK358+feTtEq18HK7O+hT83MmmFfHKch8RBxxpOT X-Received: by 2002:a17:90a:ea18:b0:269:1d16:25fa with SMTP id w24-20020a17090aea1800b002691d1625famr189265pjy.12.1691062762087; Thu, 03 Aug 2023 04:39:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691062762; cv=none; d=google.com; s=arc-20160816; b=ko6OBFXhQNgHjx5N5aWHLJ75b7ocOYxOPVzvGD0vXjIlF2u+XlZLfwIFRSpTrXycuk myKnmk2sTZPuouOBcnJgtm7Mv4i+WbVVGUtOouTQ/4ePFpQsuYnVMmrNlEGl5KipqtJ7 Idj1IZbTrSWVCWNRMaAtZlfaZiNqCpuWwO//T5PUG+nik0nwLkocOyN4/Nn6OfuGJL55 zQT95N+rEtzbJ5n3q4OmPs0yW2h9B50YjlSsDUAf0XqBPpwrZzA7KFP7sO8KV2LIQrfx tKABZI1eK5Mll1MnnnQBVigpTsyFFLztjtAdmBp0bHW9theSFbVmffdUvM5Ee/MMlrhB i9xQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=ABe5lag05JGrRRfK6Q7TQU2Nmk4xnwbIxqigvQsoK2A=; fh=BOObgak1TgpItHQ9B3ZjvZxLN7OMXZn5Va0KKl0kPbo=; b=gJdi4ji5USiZDWXPPuxcafdCumnDPCv+3yHjv+nFd8PqbA31q/TlcN1G3nUqo3j9Bs +TzrjxWfB2ppcumxIDdi4OTedwtPs6E1Mrn1HRCHnOpyR1lSr8UpaLM2mQE+26XnmfVC H9+zOhY/O15In+27+1lx5/Ru72Q+Y9o0eU5Yo5h1YpTu9qFVit4aofu8IQCRUUqMSwV9 6SUetis16OWeOh8dSA7xlABCrD4WApcYVUigxzIIqLbrMQObrdXKPkwGx2WUmgzW/HRh rkLOJZZx2kieehi+Rt6LKwscVhYz0OukPMJH7n4vMNef/zRyCDdrJ6XK8aEifmd0XjOK OykQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20221208.gappssmtp.com header.s=20221208 header.b=IGrwuEB8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773207827096981282 X-GMAIL-MSGID: 1773207827096981282 AI Processor Unit System (APUSYS) is a highly efficient computing unit system which is most suitable for AI/CV algorithms. It includes one programmable AI processor (Cadence VP6) for both AI and CV algorithms, and an eDMA engine for data movement between external DRAM and VP6 internal memory. For more detail, ask Mediatek for the MT8365 AIoT application processor functional specification. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index f9cddce5bd9d..c3ad7cbc89ab 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -615,6 +615,12 @@ camsys: syscon@15000000 { reg = <0 0x15000000 0 0x1000>; #clock-cells = <1>; }; + + apu: syscon@19020000 { + compatible = "mediatek,mt8365-apu", "syscon"; + reg = <0 0x19020000 0 0x1000>; + #clock-cells = <1>; + }; }; timer { From patchwork Thu Aug 3 09:40:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 130476 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp1067127vqx; Thu, 3 Aug 2023 04:07:18 -0700 (PDT) X-Google-Smtp-Source: APBJJlGKC/sPZSct7p0yWXq+WWXhtXbPnXURCsgG2PlDGAHqV9bR6PSOU0a89voPIf5NGnLnOTUJ X-Received: by 2002:a17:90b:3b8e:b0:268:1b62:2f6c with SMTP id pc14-20020a17090b3b8e00b002681b622f6cmr17902226pjb.2.1691060838123; Thu, 03 Aug 2023 04:07:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691060838; cv=none; d=google.com; s=arc-20160816; b=X9cbxB1SfNLFsHI7X56QWWgROmp1XfX6yFiQQXpOOrmSpBHHp1OlgzBSthiA9qFP23 XLQNjRYrhzXFpAAdfaePokJJowe1V4OQoXK8TipWSU5NDIrcqiDxzy71MjzMgSwhmDn+ DkvTE8ZhqKREn6/vHMtRIXQBGTgo0v/0XHS52AgeVcHqIiDdiIMrZl2O1UYz20SCRvi+ GnQWvOjHxnFMYnKZ+OdE0iDTOBwQIswQKV0qyShWGbcUYqdBoEgmr4ivwm+4wnOYWyTt vG/qLYNqdi46A9ao7kJWl63l0C6ZqnRU781q6vuFeibcI/iQqc2V1S80SGBCwd9NpRGG cbxA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=clF9IqfWOEF59ajJbesUMGqxvJHi1IjyVraJZokbP8Y=; fh=BOObgak1TgpItHQ9B3ZjvZxLN7OMXZn5Va0KKl0kPbo=; b=eO+5pX+ja/M/4zf6jdzdwZTuNzbRXdXQOq7/FJa7xFkUOjWMgSnaLyVApgr+762vgM Gpa2EpV8R6U4X8EY3Xvt3Hh8A6x4HFxBEKm0MT1aUB6N7xksOdIDMimF/4yehK9hhhXy k8it0LaK94Cqqh+dhavlCwGQ+2hAnCQlo55rimYs4vX3peTCJ1iKs7HU53VT5w7IxGPe ab+gc74NJr/KlH1AFw+BeEtUDOsT71h39UUYBMRojhrWF/2C7rU5lyNY8P3ngBZTAovf XP2INbJzfTiOiTQFezy/icM1K6o/nH1IeX2wGVtVtaj9lYQRqunn5b6RcFHkQ/6aJFIh 6Bew== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20221208.gappssmtp.com header.s=20221208 header.b="0ISQ8Lo/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773205809435461720 X-GMAIL-MSGID: 1773205809435461720 The following power domain are added to the SoC dts: - MM (MultiMedia) - CONN (Connectivity) - MFG (MFlexGraphics) - Audio - Cam (Camera) - DSP (Digital Signal Processor) - Vdec (Video decoder) - Venc (Video encoder) - APU (AI Processor Unit) Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 110 +++++++++++++++++++++++++++++++ 1 file changed, 110 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index c3ad7cbc89ab..c2f88d153dee 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include / { compatible = "mediatek,mt8365"; @@ -298,6 +299,115 @@ syscfg_pctl: syscfg-pctl@10005000 { reg = <0 0x10005000 0 0x1000>; }; + scpsys: syscon@10006000 { + compatible = "mediatek,mt8365-syscfg", "syscon", "simple-mfd"; + reg = <0 0x10006000 0 0x1000>; + #power-domain-cells = <1>; + + /* System Power Manager */ + spm: power-controller { + compatible = "mediatek,mt8365-power-controller"; + #address-cells = <1>; + #size-cells = <0>; + #power-domain-cells = <1>; + + /* power domains of the SoC */ + power-domain@MT8365_POWER_DOMAIN_MM { + reg = ; + clocks = <&topckgen CLK_TOP_MM_SEL>, + <&mmsys CLK_MM_MM_SMI_COMMON>, + <&mmsys CLK_MM_MM_SMI_COMM0>, + <&mmsys CLK_MM_MM_SMI_COMM1>, + <&mmsys CLK_MM_MM_SMI_LARB0>; + clock-names = "mm", "mm-0", "mm-1", + "mm-2", "mm-3"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + mediatek,infracfg-nao = <&infracfg_nao>; + #address-cells = <1>; + #size-cells = <0>; + + power-domain@MT8365_POWER_DOMAIN_CAM { + reg = ; + clocks = <&camsys CLK_CAM_LARB2>, + <&camsys CLK_CAM_SENIF>, + <&camsys CLK_CAMSV0>, + <&camsys CLK_CAMSV1>, + <&camsys CLK_CAM_FDVT>, + <&camsys CLK_CAM_WPE>; + clock-names = "cam-0", "cam-1", + "cam-2", "cam-3", + "cam-4", "cam-5"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + + power-domain@MT8365_POWER_DOMAIN_VDEC { + reg = ; + #power-domain-cells = <0>; + }; + + power-domain@MT8365_POWER_DOMAIN_VENC { + reg = ; + #power-domain-cells = <0>; + }; + + power-domain@MT8365_POWER_DOMAIN_APU { + reg = ; + clocks = <&infracfg CLK_IFR_APU_AXI>, + <&apu CLK_APU_IPU_CK>, + <&apu CLK_APU_AXI>, + <&apu CLK_APU_JTAG>, + <&apu CLK_APU_IF_CK>, + <&apu CLK_APU_EDMA>, + <&apu CLK_APU_AHB>; + clock-names = "apu", "apu-0", + "apu-1", "apu-2", + "apu-3", "apu-4", + "apu-5"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + }; + + power-domain@MT8365_POWER_DOMAIN_CONN { + reg = ; + clocks = <&topckgen CLK_TOP_CONN_32K>, + <&topckgen CLK_TOP_CONN_26M>; + clock-names = "conn", "conn1"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + + power-domain@MT8365_POWER_DOMAIN_MFG { + reg = ; + clocks = <&topckgen CLK_TOP_MFG_SEL>; + clock-names = "mfg"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + + power-domain@MT8365_POWER_DOMAIN_AUDIO { + reg = ; + clocks = <&topckgen CLK_TOP_AUD_INTBUS_SEL>, + <&infracfg CLK_IFR_AUDIO>, + <&infracfg CLK_IFR_AUD_26M_BK>; + clock-names = "audio", "audio1", "audio2"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + + power-domain@MT8365_POWER_DOMAIN_DSP { + reg = ; + clocks = <&topckgen CLK_TOP_DSP_SEL>, + <&topckgen CLK_TOP_DSP_26M>; + clock-names = "dsp", "dsp1"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + }; + }; + watchdog: watchdog@10007000 { compatible = "mediatek,mt8365-wdt", "mediatek,mt6589-wdt"; reg = <0 0x10007000 0 0x100>; From patchwork Thu Aug 3 09:40:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 130503 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp1087309vqx; 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a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773208123153606535 X-GMAIL-MSGID: 1773208123153606535 Smart Multimedia Interface (SMI) local arbiter does the arbitration for memory requests from multi-media engines. Add SMI in the MT8365 DTS will allow to add local ARBiter (LARB), use by IOMMU. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index c2f88d153dee..a03b8c0da68b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -340,16 +340,19 @@ power-domain@MT8365_POWER_DOMAIN_CAM { "cam-4", "cam-5"; #power-domain-cells = <0>; mediatek,infracfg = <&infracfg>; + mediatek,smi = <&smi_common>; }; power-domain@MT8365_POWER_DOMAIN_VDEC { reg = ; #power-domain-cells = <0>; + mediatek,smi = <&smi_common>; }; power-domain@MT8365_POWER_DOMAIN_VENC { reg = ; #power-domain-cells = <0>; + mediatek,smi = <&smi_common>; }; power-domain@MT8365_POWER_DOMAIN_APU { @@ -367,6 +370,7 @@ power-domain@MT8365_POWER_DOMAIN_APU { "apu-5"; #power-domain-cells = <0>; mediatek,infracfg = <&infracfg>; + mediatek,smi = <&smi_common>; }; }; @@ -720,6 +724,17 @@ mmsys: syscon@14000000 { #clock-cells = <1>; }; + smi_common: smi@14002000 { + compatible = "mediatek,mt8365-smi-common"; + reg = <0 0x14002000 0 0x1000>; + clocks = <&mmsys CLK_MM_MM_SMI_COMMON>, + <&mmsys CLK_MM_MM_SMI_COMMON>, + <&mmsys CLK_MM_MM_SMI_COMM0>, + <&mmsys CLK_MM_MM_SMI_COMM1>; + clock-names = "apb", "smi", "gals0", "gals1"; + power-domains = <&spm MT8365_POWER_DOMAIN_MM>; + }; + camsys: syscon@15000000 { compatible = "mediatek,mt8365-imgsys", "syscon"; reg = <0 0x15000000 0 0x1000>; From patchwork Thu Aug 3 09:40:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 130480 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp1068948vqx; Thu, 3 Aug 2023 04:10:27 -0700 (PDT) X-Google-Smtp-Source: APBJJlEjBkSJgDc1ZoqbN3JqCOVnPoxYo2DKjYYtQHLD2G109CZGxDn7SX+RrwtrnuPodZAvEC/w X-Received: by 2002:a17:906:2102:b0:99b:ed8d:de4 with SMTP id 2-20020a170906210200b0099bed8d0de4mr7264723ejt.20.1691061026993; Thu, 03 Aug 2023 04:10:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691061026; cv=none; d=google.com; s=arc-20160816; b=MRwkFMhJPQ85napOHRe7dzKEAdnFaec4ZjX18DmdlcvNiffWj9/5YZ75eOYhJYf0w5 Z2Izo6r5oGX22KvVa7Msh+irnyTChzn1QmWCcMHoHfb9QCs1VA1E7SJ0puOepQSjZnqX 0iPd9NDiD9xpZrukIcdFNtpBHlHTbYOUz+78JOvPDpqGL2CN0G5xUrijAAYsPkYWQYtu Heg0CoxLqoP5hfs2aWu/eR8mOf6pRcTKiJIcSEYAUyYutCsHNO8xhm7u/daw0WQAlCtG Bo2CY9dJjhD0xQWLIg4sPhTy3CaFhpVMs0Ssv9otNedTqQBXQTu7jokJ7hXQB710AtPr 7jww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=fxkPmAViZ4bBY9DKE4WBvD6KeHCq77X51+2zFhsJvjI=; fh=BOObgak1TgpItHQ9B3ZjvZxLN7OMXZn5Va0KKl0kPbo=; b=p0elEeFNCVGtS7mgugxmbjDpVQ1oUDene+oQK7tUJ8iskn0MnWyuchbN5TeUE8GXZ4 OUhRQbs8iOk8GHV3kuAhKpuYwxpGwc4uV6JyAGwP97tgeCUP9vQAW2nNL8J/lXD61t0Z 7Iv/SG82eLpb6ykYnZGS+kAXlK9Po4mGir5Hj6jMfRtRKcRk4LollvmMTT7yWqEXTEpb Qb1jbS/vNMkK6vke/Z9vuqoxrLKZBJd1oXj79lFbsOoOxGpmnMEMPZWmOpi3x11RrnGt 4iqxZfeFnx2x7FBPJkqyQlV8t7C4B/ynebBX6okw44mhSldtubK0BoY0GkoLYspcUbUM yYjw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20221208.gappssmtp.com header.s=20221208 header.b="nVOzC/fy"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773206007263619050 X-GMAIL-MSGID: 1773206007263619050 Local arbiter (LARB) is a component of Smart Multimedia Interface (SMI), used to help the memory management (IOMMU). This patch add 4 LARBs and 2 clocks for the larb1 and larb3 support. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 59 ++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index a03b8c0da68b..afcfa1dd242e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -735,12 +735,71 @@ smi_common: smi@14002000 { power-domains = <&spm MT8365_POWER_DOMAIN_MM>; }; + larb0: larb@14003000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x14003000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&mmsys CLK_MM_MM_SMI_LARB0>, + <&mmsys CLK_MM_MM_SMI_LARB0>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_MM>; + mediatek,larb-id = <0>; + }; + camsys: syscon@15000000 { compatible = "mediatek,mt8365-imgsys", "syscon"; reg = <0 0x15000000 0 0x1000>; #clock-cells = <1>; }; + larb2: larb@15001000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x15001000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&mmsys CLK_MM_MM_SMI_IMG>, + <&camsys CLK_CAM_LARB2>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_CAM>; + mediatek,larb-id = <2>; + }; + + vdecsys: syscon@16000000 { + compatible = "mediatek,mt8365-vdecsys", "syscon"; + reg = <0 0x16000000 0 0x1000>; + #clock-cells = <1>; + }; + + larb3: larb@16010000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x16010000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&vdecsys CLK_VDEC_LARB1>, + <&vdecsys CLK_VDEC_LARB1>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_VDEC>; + mediatek,larb-id = <3>; + }; + + vencsys: syscon@17000000 { + compatible = "mediatek,mt8365-vencsys", "syscon"; + reg = <0 0x17000000 0 0x1000>; + #clock-cells = <1>; + }; + + larb1: larb@17010000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x17010000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&vencsys CLK_VENC>, <&vencsys CLK_VENC>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_VENC>; + mediatek,larb-id = <1>; + }; + apu: syscon@19020000 { compatible = "mediatek,mt8365-apu", "syscon"; reg = <0 0x19020000 0 0x1000>; From patchwork Thu Aug 3 09:40:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 130477 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp1067629vqx; Thu, 3 Aug 2023 04:08:08 -0700 (PDT) X-Google-Smtp-Source: APBJJlHT6Z292QH7wZRJgJ3Qp7R3JvlqpYAp4FC5rK9ppiM7f1CE+4laTggF4Rftz1TdyA1L6rgJ X-Received: by 2002:a17:907:7817:b0:99b:e36a:41cf with SMTP id la23-20020a170907781700b0099be36a41cfmr7937349ejc.70.1691060888259; Thu, 03 Aug 2023 04:08:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691060888; cv=none; d=google.com; s=arc-20160816; b=d/TsQTo1XpsMgWCEpvIrdAai3J7h+qJW9uK5I03Iy2GjvKoEpqymVUxfOhAR4RAJ4K Nkt/yajwvmVMreKlopRbySS0ud2qAxtw02/KWmv8MA35XsauggROi9Jtfe+PMWV50t+w YUc1BLOg1dhfTYy0zmvfNkl1A+ngtywmE19OhDgCBDaQQNtZrv6ie9Mgq2RwQ1OCTJVw YcTi5v3XDrQJvfBDniAq3UmCd5psOAtMWvTu7CXmTtbILUYk/0mEgXMBELmjHWlpYthB 6BKui5Yoi2ndwsGydsUjBFZWlwx6Df5DkvJgPIigbF0L8mU7DCRSFocRJhsBjqr3+xIN EkUw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=NaqmMPfKXAOtSVjFcLvPHbWm7slgkGY5/ld8VMlAl3Q=; fh=BOObgak1TgpItHQ9B3ZjvZxLN7OMXZn5Va0KKl0kPbo=; b=Iw3QndWhTU62TvbwZQ7ZdPdJCEP+geHqgXr8Z6Vhy/ItJOVKaIMwTdZv1p6/S/daMb OUUkoBfg1fihxpoQt9qVrvaVnR36fqwGNXqCCDXv97fVZQFWzLuk8zsxmEDcjEOj5BV4 JKlPAayoJc4zU7j3hWANJHtpDn469+fNM6yvfYcDj6gHuky3hzG7YtUWO3cSeHma3qpC QrdPQhCVMdQDtCM6hzywmT8bjxPwOV2L0LGkB2e89UE20DTG4LjJAG1sKoQWANqy/L5E m9wecyKetGUzPW3U+39NBKeSLBobwC4l24trKmjz/Xk1HsKpSizXmf62n/cDyRs1yNui Mpsg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20221208.gappssmtp.com header.s=20221208 header.b=ORHKnuWx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773205862160872208 X-GMAIL-MSGID: 1773205862160872208 Add iommu support in the SoC DTS using the 4 local arbiters (LARBs) Reviewed-by: Yong Wu Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index afcfa1dd242e..24581f7410aa 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -471,6 +471,14 @@ sysirq: interrupt-controller@10200a80 { reg = <0 0x10200a80 0 0x20>; }; + iommu: iommu@10205000 { + compatible = "mediatek,mt8365-m4u"; + reg = <0 0x10205000 0 0x1000>; + interrupts = ; + mediatek,larbs = <&larb0>, <&larb1>, <&larb2>, <&larb3>; + #iommu-cells = <1>; + }; + infracfg_nao: infracfg@1020e000 { compatible = "mediatek,mt8365-infracfg", "syscon"; reg = <0 0x1020e000 0 0x1000>;