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[2620:137:e000::1:20]) by mx.google.com with ESMTP id o24-20020a63fb18000000b0054fe6b9502esi12091650pgh.687.2023.08.03.01.14.45; Thu, 03 Aug 2023 01:14:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=G50odMpA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233501AbjHCHyT (ORCPT + 99 others); Thu, 3 Aug 2023 03:54:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58468 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230226AbjHCHxl (ORCPT ); Thu, 3 Aug 2023 03:53:41 -0400 Received: from mail-oi1-x22d.google.com (mail-oi1-x22d.google.com [IPv6:2607:f8b0:4864:20::22d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1158C8A5E for ; Thu, 3 Aug 2023 00:43:25 -0700 (PDT) Received: by mail-oi1-x22d.google.com with SMTP id 5614622812f47-3a4875e65a3so492320b6e.2 for ; Thu, 03 Aug 2023 00:43:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1691048580; x=1691653380; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=O80suLs8Qvsgc7R30L63r0azKWcMa3PZDlYRfpOpp9M=; b=G50odMpAiZPUQ5zKrQkOTXNvwx71UmOrW5jQwfS90yBVF4M1S1MmNa91G9TeT3n6x9 kcPygwXC5w7+KoeaijZIPd62cmcxCJBeeJ4uc68B4fPzdMdTG58FRERDnHX3inxJbaWI bKxOMGW/At9tyeEGMXhL/vivf8DwgG9a/sh5M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691048580; x=1691653380; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=O80suLs8Qvsgc7R30L63r0azKWcMa3PZDlYRfpOpp9M=; b=BddNXkUEnCQAtAFBhHSY1zpkqBKoZO4zXj+xtEgqbw8UU8QzmhnlLUaQm8tGV1kvkm VF+x1Xoec7QOKvBD5CPtVXuq1pZbZfvZZDgMog8h78DWddAOYHrEQoxkNL0EhOI+2WQB EiWOttpTtIQ45gSbbmalNW+/8ukYG5ZUCkOYKrVU2yF3N93VZYnHSuarZwn+31BT71KI UawIvlJxVtZt4OnSEjNJO76bG4PWdmXcOV1oVT/QcsU6vLwb9hQv3GVdowM6+ugrOijq WoGdGnjkOr384aQtTXDmQAzZu7Guz6IatWBkQSeFXqHA5nBmXaXwq301tuyXarzZyhQn NVtg== X-Gm-Message-State: ABy/qLabrUOS/+5pkf+EhK80VVR3aSA49OAH+9t8rXr1m1OzhDjLEOFg dYrdHiFfec+c7e45wkK5Jw97UQ== X-Received: by 2002:a54:4d8b:0:b0:3a6:f876:148d with SMTP id y11-20020a544d8b000000b003a6f876148dmr18312483oix.8.1691048580528; Thu, 03 Aug 2023 00:43:00 -0700 (PDT) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:6f3e:66ee:db46:473b]) by smtp.gmail.com with ESMTPSA id l11-20020a17090a72cb00b00262d079720bsm2095753pjk.29.2023.08.03.00.42.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 00:43:00 -0700 (PDT) From: Chen-Yu Tsai To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Mark Brown Cc: Chen-Yu Tsai , Zhiyong Tao , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH 1/9] dt-bindings: mfd: mt6397: Split out compatible for MediaTek MT6366 PMIC Date: Thu, 3 Aug 2023 15:42:39 +0800 Message-ID: <20230803074249.3065586-2-wenst@chromium.org> X-Mailer: git-send-email 2.41.0.585.gd2178a4bd4-goog In-Reply-To: <20230803074249.3065586-1-wenst@chromium.org> References: <20230803074249.3065586-1-wenst@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773194967032541124 X-GMAIL-MSGID: 1773194967032541124 The MT6366 PMIC is mostly, but not fully, compatible with MT6358. It has a different set of regulators. Specifically, it lacks the camera related VCAM* LDOs, but has additional VM18, VMDDR, and VSRAM_CORE LDOs. Add a separate compatible for the MT6366 PMIC. Fixes: 49be16305587 ("dt-bindings: mfd: Add compatible for the MediaTek MT6366 PMIC") Signed-off-by: Chen-Yu Tsai Reviewed-by: Conor Dooley --- Documentation/devicetree/bindings/mfd/mt6397.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt index 294693a8906c..d4778b0d5f5c 100644 --- a/Documentation/devicetree/bindings/mfd/mt6397.txt +++ b/Documentation/devicetree/bindings/mfd/mt6397.txt @@ -22,8 +22,9 @@ compatible: "mediatek,mt6323" for PMIC MT6323 "mediatek,mt6331" for PMIC MT6331 and MT6332 "mediatek,mt6357" for PMIC MT6357 - "mediatek,mt6358" for PMIC MT6358 and MT6366 + "mediatek,mt6358" for PMIC MT6358 "mediatek,mt6359" for PMIC MT6359 + "mediatek,mt6366" for PMIC MT6366 "mediatek,mt6397" for PMIC MT6397 Optional subnodes: @@ -41,6 +42,8 @@ Optional subnodes: see ../regulator/mt6323-regulator.txt - compatible: "mediatek,mt6358-regulator" see ../regulator/mt6358-regulator.txt + - compatible: "mediatek,mt6366-regulator" + see ../regulator/mediatek,mt6366-regulator.yaml - compatible: "mediatek,mt6397-regulator" see ../regulator/mt6397-regulator.txt - codec From patchwork Thu Aug 3 07:42:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 130396 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp990657vqx; Thu, 3 Aug 2023 01:17:13 -0700 (PDT) X-Google-Smtp-Source: APBJJlGLXToVI7KHvzM5QZx4/oWq3PhWcc6QarhJN6IgnRPkLV/8rna5elJpWwQfFiecL5M2vH4z X-Received: by 2002:a81:6604:0:b0:585:eca3:28f3 with SMTP id a4-20020a816604000000b00585eca328f3mr15169384ywc.34.1691050632892; Thu, 03 Aug 2023 01:17:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691050632; cv=none; d=google.com; s=arc-20160816; b=ZXDYNAAMGM6LbOgU3gpcz3udRfo5mUN/CCU3ZIWvwu/Ip75kaX8Ru1YjayXRgdYagH Zx7uh3csmc2onyEQd/p4MRQB2S5gUqltx+qq1ORrxQrIvghNTbMGSJIY3MuRgpYmNvsl FABCYFKx/4L32+6dK/auUL7qkeHOx9ONcu0lVtW6FhTQgeE0IjqOa4YqxLPl5JRNCN9B y39KjCoB8bRtqMxL3E2O54xKrbrNCU5oR/sOEoJ2qJayvPlVHLll+0mb4xgQ19XZnhnk XxWph5OSV1SPlOWGRCfdfWD3oSxHG59QKZCJEAty/HZ1+S2nfB1Q0UD0Tn9ON/aD+DX0 FGpA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=qnzZ3mVH80rTTFN4mmKfEKmsqs6Mvvf/rKk6UFaJvog=; fh=8pjLFPk71yS0kQjQH42IjMGHfWvSFXlQQFuq588a4+Q=; b=jz29CrMDDwoGF3f4YOFpSzs2ZX0qlVdpLvlJXOK184dsSliCmBTFxzPcrBO8vpYYQF ZYBpBK4ymLE5s2CIEiJbbzEKG/7Jbx1NP8kkNt+xPXTRdEeUfD/lW2ePKT+nn5FJk2UW L3h2AO2ggnx+D8cSEQAAjQjq5rOxtg+vEKcsrUVJklPFkIAQoyzU2N1mSrAR/d6NSFXT Yh7fPibYx62QStjfNE/DKehXBTeNtBffibmuJj6nabYHB/rIie7GgJUm18QyopwUH0ZQ pSeWQjdZa5dQjX2KkpfStN8FvzDPj2RIl1/AthJ6PMh6s0s8crL0l2YfWx21k4q958ia vIgg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=YjgZrYrz; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. 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Two regulators VM18 and VMDDR reuse their register space. There's also a VSRAM type regulator VSRAM_CORE thats' split between the VCAM* register space and other parts. Add register address macros for these MT6366 specific regulators. Signed-off-by: Chen-Yu Tsai --- include/linux/mfd/mt6358/registers.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/include/linux/mfd/mt6358/registers.h b/include/linux/mfd/mt6358/registers.h index 5ea2590be710..f4c321574da3 100644 --- a/include/linux/mfd/mt6358/registers.h +++ b/include/linux/mfd/mt6358/registers.h @@ -219,6 +219,7 @@ #define MT6358_LDO_VCAMIO_CON1 0x1cbe #define MT6358_LDO_VCAMIO_CON2 0x1cc0 #define MT6358_LDO_VCAMIO_CON3 0x1cc2 + #define MT6358_LDO_VMC_CON0 0x1cc4 #define MT6358_LDO_VMC_CON1 0x1cd2 #define MT6358_LDO_VMC_CON2 0x1cd4 @@ -294,4 +295,21 @@ #define MT6358_AUD_TOP_INT_CON0 0x2228 #define MT6358_AUD_TOP_INT_STATUS0 0x2234 +/* + * MT6366 has no VCAM*, but has other regulators in its place. The names + * keep the MT6358 prefix for ease of use in the regulator driver. + */ +#define MT6358_LDO_VSRAM_CON5 0x1bf8 +#define MT6358_LDO_VM18_CON0 MT6358_LDO_VCAMA1_CON0 +#define MT6358_LDO_VM18_CON1 MT6358_LDO_VCAMA1_CON1 +#define MT6358_LDO_VM18_CON2 MT6358_LDO_VCAMA1_CON2 +#define MT6358_LDO_VMDDR_CON0 MT6358_LDO_VCAMA2_CON0 +#define MT6358_LDO_VMDDR_CON1 MT6358_LDO_VCAMA2_CON1 +#define MT6358_LDO_VMDDR_CON2 MT6358_LDO_VCAMA2_CON2 +#define MT6358_LDO_VSRAM_CORE_CON0 MT6358_LDO_VCAMD_CON0 +#define MT6358_LDO_VSRAM_CORE_DBG0 0x1cb6 +#define MT6358_LDO_VSRAM_CORE_DBG1 0x1cb8 +#define MT6358_VM18_ANA_CON0 MT6358_VCAMA1_ANA_CON0 +#define MT6358_VMDDR_ANA_CON0 MT6358_VCAMD_ANA_CON0 + #endif /* __MFD_MT6358_REGISTERS_H__ */ From patchwork Thu Aug 3 07:42:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 130410 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp996480vqx; Thu, 3 Aug 2023 01:30:53 -0700 (PDT) X-Google-Smtp-Source: APBJJlFZGZWtR6VYllL6UjWofyx166IYQECvNyDF/5EL/J9M+Co8I5jp58MIJhMYEXwrqWXsrYfm X-Received: by 2002:a05:6a21:71cb:b0:13e:aede:f386 with SMTP id ay11-20020a056a2171cb00b0013eaedef386mr5514451pzc.1.1691051453681; Thu, 03 Aug 2023 01:30:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691051453; cv=none; d=google.com; s=arc-20160816; b=AN2urYmrhkjQrzGMKuQB3DZ8v4jN4mHRhRAo+QVTVaANXCNFamgNA/GtLU3Y+6BUKX IRzqx41uPRIlzAuO5ZiI8+QawkGUxZFdPnXiyy9Co3U2uT/MEdUgI1cirmWIzkRd23T7 0pten234/N0EGpuKfzXqsj3BqimsOrOiQFp2CjJ8mrHMjUvvGMwhAiPALoAy9IAg4lph iD7Zn++cagPZNZXMKVIrpwlfEKn/VCg5aFrsgfR0bHNJWETzAFcifR3RX4AR2eMK0FUr /jCtlJuLrXGE6H+DJCNkBnQzmJDnIVmXcZiZxtGuZMBuxdCoRpItoTWLXt9e265UGRFT KPmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=0qupwZObmmk0/sdY9oZ6qJIIOW7j+/1bq8fINDZIIlo=; fh=8pjLFPk71yS0kQjQH42IjMGHfWvSFXlQQFuq588a4+Q=; b=DBFou57zUkq4g8HBnR4ESaOWKFB9fDtsA4ZkFn9ZnFQsriG0BTZrq3/keBOpQQppCJ 2b4FJMaXbk/4LkWJsGYRorswPLzwg948uJ6kysorx/u5LQwomTevhG+X79eTUeWAKo8Q mjbylLSmfPX/JyoTXgkU0h2U5ACcgi5fBUHWDwOIJa4JEdqmJ1lTXctrBfyAPV/KIK3e sTMyedwVzaFKpkyz5w+gZyRrLP550VlMyx0t7mkYWGaqb/GVC0bQPATajhj1G8M/qC+N QXqF2DIt4mnyyfnBoxyd4FtVIHt3YPfN5/VNmbXHvJTv6Ij9Z/8/J8XSEh7BrYm9/4J/ eKcQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=iuw6BH7u; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. 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It has a different set of regulators. Specifically, it lacks the camera related VCAM* LDOs, but has additional VM18, VMDDR, and VSRAM_CORE LDOs. Add a separate compatible for the MT6366 PMIC. The regulator cell for this new entry uses a new compatible string matching MT6366. Fixes: c47383f84909 ("mfd: Add support for the MediaTek MT6366 PMIC") Signed-off-by: Chen-Yu Tsai --- drivers/mfd/mt6397-core.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c index f6c1f80f94a4..3f8dfe60a59b 100644 --- a/drivers/mfd/mt6397-core.c +++ b/drivers/mfd/mt6397-core.c @@ -206,6 +206,26 @@ static const struct mfd_cell mt6359_devs[] = { }, }; +static const struct mfd_cell mt6366_devs[] = { + { + .name = "mt6358-regulator", + .of_compatible = "mediatek,mt6366-regulator" + }, { + .name = "mt6358-rtc", + .num_resources = ARRAY_SIZE(mt6358_rtc_resources), + .resources = mt6358_rtc_resources, + .of_compatible = "mediatek,mt6358-rtc", + }, { + .name = "mt6358-sound", + .of_compatible = "mediatek,mt6358-sound" + }, { + .name = "mt6358-keys", + .num_resources = ARRAY_SIZE(mt6358_keys_resources), + .resources = mt6358_keys_resources, + .of_compatible = "mediatek,mt6358-keys" + }, +}; + static const struct mfd_cell mt6397_devs[] = { { .name = "mt6397-rtc", @@ -280,6 +300,14 @@ static const struct chip_data mt6359_core = { .irq_init = mt6358_irq_init, }; +static const struct chip_data mt6366_core = { + .cid_addr = MT6358_SWCID, + .cid_shift = 8, + .cells = mt6366_devs, + .cell_size = ARRAY_SIZE(mt6366_devs), + .irq_init = mt6358_irq_init, +}; + static const struct chip_data mt6397_core = { .cid_addr = MT6397_CID, .cid_shift = 0, @@ -358,6 +386,9 @@ static const struct of_device_id mt6397_of_match[] = { }, { .compatible = "mediatek,mt6359", .data = &mt6359_core, + }, { + .compatible = "mediatek,mt6366", + .data = &mt6366_core, }, { .compatible = "mediatek,mt6397", .data = &mt6397_core, From patchwork Thu Aug 3 07:42:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 130438 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp1010556vqx; Thu, 3 Aug 2023 02:05:10 -0700 (PDT) X-Google-Smtp-Source: APBJJlGVVX14So4vlcEu83xcyFIk236yQsOkv5desmcA52bysVLvzhUnELm+Yvj7nMnhxyvqjjc+ X-Received: by 2002:a05:6402:2747:b0:522:b723:11bd with SMTP id z7-20020a056402274700b00522b72311bdmr10173855edd.4.1691053509999; Thu, 03 Aug 2023 02:05:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691053509; cv=none; d=google.com; s=arc-20160816; b=CS8lEujdPKzw7yMXkhj/K/0kZ7v4NBSEX2INvLyniHJ7bNYblrn0tMrAdu+XKh6hh6 b+h5pcWj+iEpWJHI8YudpPOaTC1JrCrFqcH9R5KRRdmbl1AZSLNC8dBWMC9Ma8WYvc5a 1z9WlIbx1rvqlZUfj0Vg/rdqLvCfzeyQ7aersiuyBxRzlpSGlgbwbiV6Cp+CgKWdofNa ikmh6iQmJuJVwCjTvTGxy4GIOd0uzwrNA9+KKJjqDZeKTa8B2YbWS+TYEipSS+PHdxcJ xwDthmD9NitVDQuM9fHVPTO6xvrqS5su1fp+qHVaN3mtE52C9z6l4s2D/bdcCXaFCPxq DHpA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=jVtXI1HZxhBYq/0/uTELsRw0u0pAzWKlEP1Rn/MZ4jk=; fh=7tp/EfX83USZ/T1YCuQbjCBDZ/Ip9v7yqFvHeuSAK10=; b=jTNGq//XVw2zZJBhgRpBy8bWO5JH+bT8cetmMONMVc+UOZv7OX/hDkLfrZyQLSXXEn gRHIdF4GJsbO6+YXERmE8sst8wieJw1r4RqmvsZ73FrKwKku7H7smWgnCkUwQwrtlPLP NuV10cNh5J14CXl+EchW2dO6QJ9yBF51Q2un4WfOf91CYDdVuXc1LsL/AEwyczW4uQAB 8v0C6qj8VSPUGz2rjqqqHNKh4xIbTZke04js9Z79pKrGapRLrmU57f82uIuyEqloa1Ah bA5Va3nJXSjN4Ze7HZlKP7dE7GKOObLpgWKDZCMwfLEiPjdovg17CsxWv3NUasPAe1sO JwMw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=PKwk4GEk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h7-20020aa7c607000000b005222d007c74si8468555edq.400.2023.08.03.02.04.44; Thu, 03 Aug 2023 02:05:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=PKwk4GEk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232183AbjHCHyp (ORCPT + 99 others); Thu, 3 Aug 2023 03:54:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58634 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231888AbjHCHxw (ORCPT ); Thu, 3 Aug 2023 03:53:52 -0400 Received: from mail-pf1-x436.google.com (mail-pf1-x436.google.com [IPv6:2607:f8b0:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 91ED58A69 for ; Thu, 3 Aug 2023 00:43:33 -0700 (PDT) Received: by mail-pf1-x436.google.com with SMTP id d2e1a72fcca58-686efa1804eso433275b3a.3 for ; Thu, 03 Aug 2023 00:43:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1691048588; x=1691653388; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jVtXI1HZxhBYq/0/uTELsRw0u0pAzWKlEP1Rn/MZ4jk=; b=PKwk4GEk3yopaHuENojxSNYlbNJmh6+WGq90OHBeQqMuCf/L03VfIqLe6JOtcSeJ2n 2cxjXwsxhbh5alr8Uz9LKnOIPqOSUMrBCQmXJ9m98Li81fZgf/f+GjqyTiMEcsW3R7LK jPJez4gRDjDFj7HtyUX/mJ4++B3sv8bJDHcSw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691048588; x=1691653388; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jVtXI1HZxhBYq/0/uTELsRw0u0pAzWKlEP1Rn/MZ4jk=; b=dy+PUpoKEaHNeKxvp1t6/ZQRZHbiERukHEUeR+AHJ0mbQWlmo1a3EkSFCVlHIOyNZl SADAeybhpngdKP67gkStcGDjv9mrVWOWBcJSUFWpeVRmnaG7p+HjxbFOTrWN88Nrn61D 8vaRtTuCW3JPocCOx3zyHe70B/3lgu69Uku9XbK8FQri7fyz371+GKuNkb2yodhZSdm9 njAW+OhDp88ZooxLaAWQ4WnzJ9lPKOydypBMvggBfxJJEtaSUV2NLvbmMxJPkfsCbm0B 9NzwEJdntya0EH+lavHcsp0hFMQboeTjcFklsNWR3V3eJx8MrqbZpuc1zVVVZRwh8UXj QFTw== X-Gm-Message-State: ABy/qLZDif95I+21bXKUVBDYShDsi1DHp1mzUcqqvOOieBEvmYteBzhq +AS5Njrr/3buIBSe3g4108i6Yw== X-Received: by 2002:a17:90b:8d2:b0:267:75ce:f6d9 with SMTP id ds18-20020a17090b08d200b0026775cef6d9mr14285008pjb.3.1691048588039; Thu, 03 Aug 2023 00:43:08 -0700 (PDT) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:6f3e:66ee:db46:473b]) by smtp.gmail.com with ESMTPSA id l11-20020a17090a72cb00b00262d079720bsm2095753pjk.29.2023.08.03.00.43.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 00:43:07 -0700 (PDT) From: Chen-Yu Tsai To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Mark Brown Cc: Zhiyong Tao , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Chen-Yu Tsai Subject: [PATCH 4/9] regulator: dt-bindings: mediatek: Add MT6366 PMIC Date: Thu, 3 Aug 2023 15:42:42 +0800 Message-ID: <20230803074249.3065586-5-wenst@chromium.org> X-Mailer: git-send-email 2.41.0.585.gd2178a4bd4-goog In-Reply-To: <20230803074249.3065586-1-wenst@chromium.org> References: <20230803074249.3065586-1-wenst@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773198125131197398 X-GMAIL-MSGID: 1773198125131197398 From: Zhiyong Tao The MediaTek MT6366 PMIC is similar to the MT6358 PMIC. It is designed to be paired with the MediaTek MT8186 SoC. It has 9 buck regulators and 29 LDO regulators, not counting ones that feed internally and basically have no controls. The regulators are named after their intended usage for the SoC and system design, thus not named generically as ldoX or dcdcX, but as vcn33 or vgpu. Add a binding document describing all the regulators and their supplies. Signed-off-by: Zhiyong Tao [wens@chromium.org: major rework and added commit message] Signed-off-by: Chen-Yu Tsai --- Changes since Zhiyong's last version (v4) [1]: - simplified regulator names - added descriptions to regulators - removed bogus regulators (*_sshub) - merged vcn33-wifi and vcn33-bt as vcn33 - added missing regulators (vm18, vmddr, vsram-core) - cut down examples to a handful of cases and made them complete - expanded commit message a lot [1] https://lore.kernel.org/linux-arm-kernel/20220823123745.14061-1-zhiyong.tao@mediatek.com/ .../regulator/mediatek,mt6366-regulator.yaml | 154 ++++++++++++++++++ 1 file changed, 154 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/mediatek,mt6366-regulator.yaml diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6366-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6366-regulator.yaml new file mode 100644 index 000000000000..715c6ffcb3ab --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6366-regulator.yaml @@ -0,0 +1,154 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/mediatek,mt6366-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MT6366 Regulator from MediaTek Integrated + +maintainers: + - Zhiyong Tao + +description: | + Regulator part of the MT6366 PMIC. This node should be under the PMIC's + device node. + +properties: + compatible: + const: mediatek,mt6366-regulator + + vsys_ldo1-supply: + description: Supply for LDOs vfe28, vxo22, vcn28, vaux18, vaud28, vsim1, vusb, vbif28 + vsys_ldo2-supply: + description: Supply for LDOs vio28, vmc, vmch, vsim2 + vsys_ldo3-supply: + description: Supply for LDOs vcn33, vemc, vibr + vsys_vcore-supply: + description: Supply for buck regulator vcore + vsys_vdram1-supply: + description: Supply for buck regulator vdram1 + vsys_vgpu-supply: + description: Supply for buck regulator vgpu + vsys_vmodem-supply: + description: Supply for buck regulator vmodem + vsys_vpa-supply: + description: Supply for buck regulator vpa + vsys_vproc11-supply: + description: Supply for buck regulator vproc11 + vsys_vproc12-supply: + description: Supply for buck regulator vproc12 + vsys_vs1-supply: + description: Supply for buck regulator vs1 + vsys_vs2-supply: + description: Supply for buck regulator vs2 + vs1_ldo1-supply: + description: Supply for LDOs vrf18, vefuse, vcn18, vio18, vm18 + vs2_ldo1-supply: + description: Supply for LDOs vmddr, vdram2 + vs2_ldo2-supply: + description: Supply for LDOs vrf12, va12 + vs2_ldo3-supply: + description: Supply for LDOs vsram-core, vsram-gpu, vsram-others, vsram-proc11, vsram-proc12 + +patternProperties: + "^v(core|dram1|gpu|modem|pa|proc1[12]|s[12])$": + description: Buck regulators + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + + "^v(a|rf)12": + description: LDOs with fixed 1.2V output and 0~100/10mV tuning + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + + "^v(aux|io|rf)18": + description: LDOs with fixed 1.8V output and 0~100/10mV tuning + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + + "^vxo22": + description: LDOs with fixed 2.2V output and 0~100/10mV tuning + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + + "^v(aud|bif|cn|fe|io)28": + description: LDOs with fixed 2.8V output and 0~100/10mV tuning + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + + "^vusb": + description: LDOs with fixed 3.0V output and 0~100/10mV tuning + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + + "^vsram-(core|gpu|others|proc1[12])$": + description: LDOs with variable output + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + + "^v(cn18|cn33|dram2|efuse|emc|ibr|m18|mc|mch|mddr|sim[12])$": + description: LDOs with variable output and 0~100/10mV tuning + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + +required: + - compatible + +additionalProperties: false + +examples: + - | + #include + + regulator { + compatible = "mediatek,mt6366-regulator"; + + vdram1 { + regulator-name = "pp1125_emi_vdd2"; + regulator-min-microvolt = <1125000>; + regulator-max-microvolt = <1125000>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <0>; + regulator-allowed-modes = ; + regulator-always-on; + }; + + vproc11 { + regulator-name = "ppvar_dvdd_proc_bc_mt6366"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1200000>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <200>; + regulator-allowed-modes = ; + regulator-always-on; + }; + + vmddr { + regulator-name = "pm0750_emi_vmddr"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <750000>; + regulator-enable-ramp-delay = <325>; + regulator-always-on; + }; + + vsram-proc11 { + regulator-name = "pp0900_dvdd_sram_bc"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1120000>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <240>; + regulator-always-on; + }; + }; + +... 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This better matches the PMIC pin names. Remaining underscores in names are also replaced with hyphens. Drop the type prefixes and replace remaining underscores to match the MT6366 binding. Signed-off-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- drivers/regulator/mt6358-regulator.c | 70 ++++++++++++++-------------- 1 file changed, 35 insertions(+), 35 deletions(-) diff --git a/drivers/regulator/mt6358-regulator.c b/drivers/regulator/mt6358-regulator.c index 3cb2e6768e25..5a43a84c7a3e 100644 --- a/drivers/regulator/mt6358-regulator.c +++ b/drivers/regulator/mt6358-regulator.c @@ -536,68 +536,68 @@ static const struct mt6358_regulator_info mt6358_regulators[] = { /* The array is indexed by id(MT6366_ID_XXX) */ static const struct mt6358_regulator_info mt6366_regulators[] = { - MT6366_BUCK("buck_vdram1", VDRAM1, 500000, 2087500, 12500, + MT6366_BUCK("vdram1", VDRAM1, 500000, 2087500, 12500, 0x7f, MT6358_BUCK_VDRAM1_DBG0, 0x7f, MT6358_VDRAM1_ANA_CON0, 8), - MT6366_BUCK("buck_vcore", VCORE, 500000, 1293750, 6250, + MT6366_BUCK("vcore", VCORE, 500000, 1293750, 6250, 0x7f, MT6358_BUCK_VCORE_DBG0, 0x7f, MT6358_VCORE_VGPU_ANA_CON0, 1), - MT6366_BUCK("buck_vpa", VPA, 500000, 3650000, 50000, + MT6366_BUCK("vpa", VPA, 500000, 3650000, 50000, 0x3f, MT6358_BUCK_VPA_DBG0, 0x3f, MT6358_VPA_ANA_CON0, 3), - MT6366_BUCK("buck_vproc11", VPROC11, 500000, 1293750, 6250, + MT6366_BUCK("vproc11", VPROC11, 500000, 1293750, 6250, 0x7f, MT6358_BUCK_VPROC11_DBG0, 0x7f, MT6358_VPROC_ANA_CON0, 1), - MT6366_BUCK("buck_vproc12", VPROC12, 500000, 1293750, 6250, + MT6366_BUCK("vproc12", VPROC12, 500000, 1293750, 6250, 0x7f, MT6358_BUCK_VPROC12_DBG0, 0x7f, MT6358_VPROC_ANA_CON0, 2), - MT6366_BUCK("buck_vgpu", VGPU, 500000, 1293750, 6250, + MT6366_BUCK("vgpu", VGPU, 500000, 1293750, 6250, 0x7f, MT6358_BUCK_VGPU_ELR0, 0x7f, MT6358_VCORE_VGPU_ANA_CON0, 2), - MT6366_BUCK("buck_vs2", VS2, 500000, 2087500, 12500, + MT6366_BUCK("vs2", VS2, 500000, 2087500, 12500, 0x7f, MT6358_BUCK_VS2_DBG0, 0x7f, MT6358_VS2_ANA_CON0, 8), - MT6366_BUCK("buck_vmodem", VMODEM, 500000, 1293750, 6250, + MT6366_BUCK("vmodem", VMODEM, 500000, 1293750, 6250, 0x7f, MT6358_BUCK_VMODEM_DBG0, 0x7f, MT6358_VMODEM_ANA_CON0, 8), - MT6366_BUCK("buck_vs1", VS1, 1000000, 2587500, 12500, + MT6366_BUCK("vs1", VS1, 1000000, 2587500, 12500, 0x7f, MT6358_BUCK_VS1_DBG0, 0x7f, MT6358_VS1_ANA_CON0, 8), - MT6366_REG_FIXED("ldo_vrf12", VRF12, + MT6366_REG_FIXED("vrf12", VRF12, MT6358_LDO_VRF12_CON0, 0, 1200000), - MT6366_REG_FIXED("ldo_vio18", VIO18, + MT6366_REG_FIXED("vio18", VIO18, MT6358_LDO_VIO18_CON0, 0, 1800000), - MT6366_REG_FIXED("ldo_vcn18", VCN18, MT6358_LDO_VCN18_CON0, 0, 1800000), - MT6366_REG_FIXED("ldo_vfe28", VFE28, MT6358_LDO_VFE28_CON0, 0, 2800000), - MT6366_REG_FIXED("ldo_vcn28", VCN28, MT6358_LDO_VCN28_CON0, 0, 2800000), - MT6366_REG_FIXED("ldo_vxo22", VXO22, MT6358_LDO_VXO22_CON0, 0, 2200000), - MT6366_REG_FIXED("ldo_vaux18", VAUX18, + MT6366_REG_FIXED("vcn18", VCN18, MT6358_LDO_VCN18_CON0, 0, 1800000), + MT6366_REG_FIXED("vfe28", VFE28, MT6358_LDO_VFE28_CON0, 0, 2800000), + MT6366_REG_FIXED("vcn28", VCN28, MT6358_LDO_VCN28_CON0, 0, 2800000), + MT6366_REG_FIXED("vxo22", VXO22, MT6358_LDO_VXO22_CON0, 0, 2200000), + MT6366_REG_FIXED("vaux18", VAUX18, MT6358_LDO_VAUX18_CON0, 0, 1800000), - MT6366_REG_FIXED("ldo_vbif28", VBIF28, + MT6366_REG_FIXED("vbif28", VBIF28, MT6358_LDO_VBIF28_CON0, 0, 2800000), - MT6366_REG_FIXED("ldo_vio28", VIO28, MT6358_LDO_VIO28_CON0, 0, 2800000), - MT6366_REG_FIXED("ldo_va12", VA12, MT6358_LDO_VA12_CON0, 0, 1200000), - MT6366_REG_FIXED("ldo_vrf18", VRF18, MT6358_LDO_VRF18_CON0, 0, 1800000), - MT6366_REG_FIXED("ldo_vaud28", VAUD28, + MT6366_REG_FIXED("vio28", VIO28, MT6358_LDO_VIO28_CON0, 0, 2800000), + MT6366_REG_FIXED("va12", VA12, MT6358_LDO_VA12_CON0, 0, 1200000), + MT6366_REG_FIXED("vrf18", VRF18, MT6358_LDO_VRF18_CON0, 0, 1800000), + MT6366_REG_FIXED("vaud28", VAUD28, MT6358_LDO_VAUD28_CON0, 0, 2800000), - MT6366_LDO("ldo_vdram2", VDRAM2, vdram2, + MT6366_LDO("vdram2", VDRAM2, vdram2, MT6358_LDO_VDRAM2_CON0, 0, MT6358_LDO_VDRAM2_ELR0, 0x10), - MT6366_LDO("ldo_vsim1", VSIM1, vsim, + MT6366_LDO("vsim1", VSIM1, vsim, MT6358_LDO_VSIM1_CON0, 0, MT6358_VSIM1_ANA_CON0, 0xf00), - MT6366_LDO("ldo_vibr", VIBR, vibr, + MT6366_LDO("vibr", VIBR, vibr, MT6358_LDO_VIBR_CON0, 0, MT6358_VIBR_ANA_CON0, 0xf00), - MT6366_LDO("ldo_vusb", VUSB, vusb, + MT6366_LDO("vusb", VUSB, vusb, MT6358_LDO_VUSB_CON0_0, 0, MT6358_VUSB_ANA_CON0, 0x700), - MT6366_LDO("ldo_vefuse", VEFUSE, vefuse, + MT6366_LDO("vefuse", VEFUSE, vefuse, MT6358_LDO_VEFUSE_CON0, 0, MT6358_VEFUSE_ANA_CON0, 0xf00), - MT6366_LDO("ldo_vmch", VMCH, vmch_vemc, + MT6366_LDO("vmch", VMCH, vmch_vemc, MT6358_LDO_VMCH_CON0, 0, MT6358_VMCH_ANA_CON0, 0x700), - MT6366_LDO("ldo_vemc", VEMC, vmch_vemc, + MT6366_LDO("vemc", VEMC, vmch_vemc, MT6358_LDO_VEMC_CON0, 0, MT6358_VEMC_ANA_CON0, 0x700), - MT6366_LDO("ldo_vcn33", VCN33, vcn33, + MT6366_LDO("vcn33", VCN33, vcn33, MT6358_LDO_VCN33_CON0_0, 0, MT6358_VCN33_ANA_CON0, 0x300), - MT6366_LDO("ldo_vmc", VMC, vmc, + MT6366_LDO("vmc", VMC, vmc, MT6358_LDO_VMC_CON0, 0, MT6358_VMC_ANA_CON0, 0xf00), - MT6366_LDO("ldo_vsim2", VSIM2, vsim, + MT6366_LDO("vsim2", VSIM2, vsim, MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00), - MT6366_LDO1("ldo_vsram_proc11", VSRAM_PROC11, 500000, 1293750, 6250, + MT6366_LDO1("vsram-proc11", VSRAM_PROC11, 500000, 1293750, 6250, MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON0, 0x7f), - MT6366_LDO1("ldo_vsram_others", VSRAM_OTHERS, 500000, 1293750, 6250, + MT6366_LDO1("vsram-others", VSRAM_OTHERS, 500000, 1293750, 6250, MT6358_LDO_VSRAM_OTHERS_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON2, 0x7f), - MT6366_LDO1("ldo_vsram_gpu", VSRAM_GPU, 500000, 1293750, 6250, + MT6366_LDO1("vsram-gpu", VSRAM_GPU, 500000, 1293750, 6250, MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON3, 0x7f), - MT6366_LDO1("ldo_vsram_proc12", VSRAM_PROC12, 500000, 1293750, 6250, + MT6366_LDO1("vsram-proc12", VSRAM_PROC12, 500000, 1293750, 6250, MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON1, 0x7f), }; From patchwork Thu Aug 3 07:42:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 130402 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp994820vqx; Thu, 3 Aug 2023 01:26:58 -0700 (PDT) X-Google-Smtp-Source: APBJJlEjh9DmMNWmrkjvy/Qi3DcF6EBv0nWV2OmUHHhSSD1N4fduVslr1GD8RHgdnrTedcDGtg/G X-Received: by 2002:a05:6a20:3cb:b0:13b:9a09:674b with SMTP id 11-20020a056a2003cb00b0013b9a09674bmr14893730pzu.36.1691051217676; Thu, 03 Aug 2023 01:26:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691051217; cv=none; d=google.com; s=arc-20160816; b=gW7gbRpAGUGEi6FvtoOURszcp+C8BAbWmHTjM5kkapxwBeLr95f7PzasVag8iUipcZ Gs75ZIg2WfMFtmEjDlUdm2XzO1Us4omjDEsbNlVyEz8b2Cl5gwVBOxSwygf4XlUDAQXn nnyIJekYv8+2MGVPcFa8e368QVgNI+HZSBjKQL5WR93V2o87/XxvMEHj2AAN1VqEbk3f lNyx2BYC6sC0pUXQf98YzSTnlCGgNj4cBl7qU0uNMohvP8KRXA3FmTUyzdKDvvM+0iA2 7R26N9kHQeOpQkBzB9h3f0i6X8UxSa8S8T8rty4qqY1ozieAuLalV1uB3uQMt9SSHhQC c0Cw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=+PS0ssiIqsOqxPlpp2oSfbt7ntbtXB4pivkxkQJXtwM=; fh=8pjLFPk71yS0kQjQH42IjMGHfWvSFXlQQFuq588a4+Q=; b=0wOvJdT+qKxXbTgdnSaqrGSGVj/BPEk0d4vNChvWzHN01is/tN/sZtSWk09OmZEYt0 o12LoqF+jUUv2/cUxRJJ59rHjBEgON63bEU0hWAArM7J5r1kkhOn54SkOylG+r93dt4l k25kcq0VUpWBKWRQClznbAMXX1JJ8Kje8rngegU0bT89WYvunFujncLULONQj6/QnAcR nAyAbzbb0E2zD4cxTkToft5DstEhyoEMtIXopwm21SzkreP3V/ASHfopWNT3VMjS+sEP YwIQVmVFK7vDZkgmeGFSZZIuL9LBkR3ISowk+A9T4papsKw0ScnlfOSOT8/jNN6CGUK9 d8mA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=jZNiROXV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id bg26-20020a056a02011a00b00564ac0c6ce9si65651pgb.394.2023.08.03.01.26.37; Thu, 03 Aug 2023 01:26:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=jZNiROXV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233952AbjHCHzF (ORCPT + 99 others); Thu, 3 Aug 2023 03:55:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58350 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232452AbjHCHyA (ORCPT ); Thu, 3 Aug 2023 03:54:00 -0400 Received: from mail-oo1-xc29.google.com (mail-oo1-xc29.google.com [IPv6:2607:f8b0:4864:20::c29]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 729C88A6D for ; Thu, 3 Aug 2023 00:43:36 -0700 (PDT) Received: by mail-oo1-xc29.google.com with SMTP id 006d021491bc7-56c884e1d74so425651eaf.0 for ; Thu, 03 Aug 2023 00:43:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1691048593; x=1691653393; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+PS0ssiIqsOqxPlpp2oSfbt7ntbtXB4pivkxkQJXtwM=; b=jZNiROXV1Y8OAEvmMlJLmEDbubZTXUi1T2+J6xGMw0OsiLZ15TB0HeZWqjYU46/CPe Teqr2XwZ/lAv6OY3i3Jv9wng9jqRbKm1aJXfstf/p8iTD5zQGvBWlfT7POHUxIzVoNWe 0q/NWoCYElzBGTk+rxrPiwwo8g72n8oUwfl7A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691048593; x=1691653393; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+PS0ssiIqsOqxPlpp2oSfbt7ntbtXB4pivkxkQJXtwM=; b=l/UZ2gvNbsXPGjYiS9qrBvpyFjckMUoExV9QSukTn7DbUkJ0d6ZOYkiQTrF/OghNeo bhR64udW3XN2NcW/MLGOIpZjKchGrECwIEYEw9PXl3EsMlYGYztq6MgW4fmLw+4z84EP j2CAqff/dkrv/KFEBvqXTGpUygeosVi0GNbgtkwm63D95xDl7LTyWCPBmwiRCN03f7ag AYsYgaPihdFIMc5Zlu3DcDHYb4frLwfy7e1XK5wbARPJ6IOBTcp0GRZvGQipmZqRoa5k AuDdLaM1Q864SMS2H5HJJMnG/QHrpQjfCs4e9DSF8ZlwBYPsOR47ve4dMMKLoaeNoDu8 AYWQ== X-Gm-Message-State: ABy/qLb7DCMasI48j3DmxH0wbJzD+VGEpat6KYMxbz5tdGtZ4E0LM8rI XZ+JhxvCVI8L5GoLcnAPrSg7Eg== X-Received: by 2002:a05:6870:420d:b0:1bb:e381:e1f1 with SMTP id u13-20020a056870420d00b001bbe381e1f1mr20111422oac.9.1691048593034; Thu, 03 Aug 2023 00:43:13 -0700 (PDT) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:6f3e:66ee:db46:473b]) by smtp.gmail.com with ESMTPSA id l11-20020a17090a72cb00b00262d079720bsm2095753pjk.29.2023.08.03.00.43.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 00:43:12 -0700 (PDT) From: Chen-Yu Tsai To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Mark Brown Cc: Chen-Yu Tsai , Zhiyong Tao , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH 6/9] regulator: mt6358: Make MT6366 vcn18 LDO configurable Date: Thu, 3 Aug 2023 15:42:44 +0800 Message-ID: <20230803074249.3065586-7-wenst@chromium.org> X-Mailer: git-send-email 2.41.0.585.gd2178a4bd4-goog In-Reply-To: <20230803074249.3065586-1-wenst@chromium.org> References: <20230803074249.3065586-1-wenst@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773195721457415547 X-GMAIL-MSGID: 1773195721457415547 The VCN18 regulator on the MT6366 (only) actually has a wide configurable range of voltages, even though its name suggests a fixed output voltage. Convert it from a fixed LDO to a configurable LDO. Its range of settings is the same as the VM18 regulator, which is missing and will be added in a subsequent patch. Signed-off-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- drivers/regulator/mt6358-regulator.c | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/regulator/mt6358-regulator.c b/drivers/regulator/mt6358-regulator.c index 5a43a84c7a3e..f8cdfa992c23 100644 --- a/drivers/regulator/mt6358-regulator.c +++ b/drivers/regulator/mt6358-regulator.c @@ -324,6 +324,27 @@ static const struct linear_range vldo28_ranges[] = { REGULATOR_LINEAR_RANGE(3000000, 11, 21, 10000), }; +static const unsigned int mt6366_vcn18_vm18_selectors[] = { + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }; +static const struct linear_range mt6366_vcn18_vm18_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(700000, 11, 21, 10000), + REGULATOR_LINEAR_RANGE(800000, 22, 32, 10000), + REGULATOR_LINEAR_RANGE(900000, 33, 43, 10000), + REGULATOR_LINEAR_RANGE(1000000, 44, 54, 10000), + REGULATOR_LINEAR_RANGE(1100000, 55, 65, 10000), + REGULATOR_LINEAR_RANGE(1200000, 66, 76, 10000), + REGULATOR_LINEAR_RANGE(1300000, 77, 87, 10000), + REGULATOR_LINEAR_RANGE(1400000, 88, 98, 10000), + REGULATOR_LINEAR_RANGE(1500000, 99, 109, 10000), + REGULATOR_LINEAR_RANGE(1600000, 110, 120, 10000), + REGULATOR_LINEAR_RANGE(1700000, 121, 131, 10000), + REGULATOR_LINEAR_RANGE(1800000, 132, 142, 10000), + REGULATOR_LINEAR_RANGE(1900000, 143, 153, 10000), + REGULATOR_LINEAR_RANGE(2000000, 154, 164, 10000), + REGULATOR_LINEAR_RANGE(2100000, 165, 175, 10000), +}; + static unsigned int mt6358_map_mode(unsigned int mode) { return mode == MT6358_BUCK_MODE_AUTO ? @@ -558,7 +579,6 @@ static const struct mt6358_regulator_info mt6366_regulators[] = { MT6358_LDO_VRF12_CON0, 0, 1200000), MT6366_REG_FIXED("vio18", VIO18, MT6358_LDO_VIO18_CON0, 0, 1800000), - MT6366_REG_FIXED("vcn18", VCN18, MT6358_LDO_VCN18_CON0, 0, 1800000), MT6366_REG_FIXED("vfe28", VFE28, MT6358_LDO_VFE28_CON0, 0, 2800000), MT6366_REG_FIXED("vcn28", VCN28, MT6358_LDO_VCN28_CON0, 0, 2800000), MT6366_REG_FIXED("vxo22", VXO22, MT6358_LDO_VXO22_CON0, 0, 2200000), @@ -591,6 +611,8 @@ static const struct mt6358_regulator_info mt6366_regulators[] = { MT6358_LDO_VMC_CON0, 0, MT6358_VMC_ANA_CON0, 0xf00), MT6366_LDO("vsim2", VSIM2, vsim, MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00), + MT6366_LDO("vcn18", VCN18, mt6366_vcn18_vm18, + MT6358_LDO_VCN18_CON0, 0, MT6358_VCN18_ANA_CON0, 0xf00), MT6366_LDO1("vsram-proc11", VSRAM_PROC11, 500000, 1293750, 6250, MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON0, 0x7f), MT6366_LDO1("vsram-others", VSRAM_OTHERS, 500000, 1293750, 6250, From patchwork Thu Aug 3 07:42:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 130427 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp1002954vqx; Thu, 3 Aug 2023 01:47:03 -0700 (PDT) X-Google-Smtp-Source: APBJJlHYyKGNnb6LvXKC8FxjOaDGCtObLdG+E9Y0cRbblhjldjktFjTAyvl54LzcAXWvAMjc5oi0 X-Received: by 2002:a05:6358:e499:b0:139:d226:b361 with SMTP id by25-20020a056358e49900b00139d226b361mr8670273rwb.31.1691052423223; Thu, 03 Aug 2023 01:47:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691052423; cv=none; d=google.com; s=arc-20160816; b=n/bVx+O27DfBGcRm7fz9WBa1fNFDUGkBIECVQI15B4W5Wf+lm2Z2X1cev5vqvcie/q 2SCoj+1ES4o73FkML+isPEfk669mABsObZqNutuqb3AfNTnJuNIB/4Yf1G0DFhvbLkWL MJGdIjNAAg9kMBvWFJpEiX7mRZdhArpysGwbVGH6lb8L2iYAsM/Qh0jVvoqn+YlV0cND X4Q3kH7jQMOvdmv2pyypQAXbGTo9jJ64uKDZ4pi+gF54fHgZG78nmBEJLII55zTxNTUX v++EgRN442xDMSpHv08O29DbjZhf3YF9Xyf256S/bd0+9tCpl/Q7aaBJq46g3lSi2MX8 qIiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Iu4rM2I/GmlnQQPwmur/VaOJeKpYAYS3uqnVLSVAkjM=; fh=8pjLFPk71yS0kQjQH42IjMGHfWvSFXlQQFuq588a4+Q=; b=DEJu7lvj7X0QplMc91W9ZvrYe8IXTojtCdMu64bMht6K0zDO1Vd6KauGd0VKnQ2Wo2 yF6LgC4fKkLtwatPexxS56lveoQZvPnKkRAA+HcOUKBXaE5pdVUPmElNUIDrWeF5VmUe VWL2yfBu+1qjoF/NaougdPZ7t8A9DwHaJoP0+pvmvU6sF+l4pIz1+kwJUURhqu++1ZHi KHdc5bAD5gSyufJPmhRy5YKtsykGnbtyV4wwTcpd/mvX7zH7YuTxcyN+4CMo/cNlZW1z dJ/Rb8UYAL/tTU5DBg+e2rRm2S3opLKRTb5GLiBJ9gxD5CL1hwFpq4SJYF3hG8+Xxitf 57tA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=Jg6ZstZL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. 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In reality there are differences. A few regulators have different ranges, or were renamed and repurposed, or removed altogether. Add the 3 regulators that were missing from the original submission. These are added for completeness. VSRAM_CORE is not used in existing projects. VM18 and VMDDR feed DRAM related consumers, and are not used in-kernel. Signed-off-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- drivers/regulator/mt6358-regulator.c | 20 ++++++++++++++++++++ include/linux/regulator/mt6358-regulator.h | 3 +++ 2 files changed, 23 insertions(+) diff --git a/drivers/regulator/mt6358-regulator.c b/drivers/regulator/mt6358-regulator.c index f8cdfa992c23..c9fd5904d13f 100644 --- a/drivers/regulator/mt6358-regulator.c +++ b/drivers/regulator/mt6358-regulator.c @@ -324,6 +324,20 @@ static const struct linear_range vldo28_ranges[] = { REGULATOR_LINEAR_RANGE(3000000, 11, 21, 10000), }; +static const unsigned int mt6366_vmddr_selectors[] = { 0, 1, 2, 3, 4, 5, 6, 7, 9, 12 }; +static const struct linear_range mt6366_vmddr_ranges[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 10, 10000), + REGULATOR_LINEAR_RANGE(700000, 11, 21, 10000), + REGULATOR_LINEAR_RANGE(800000, 22, 32, 10000), + REGULATOR_LINEAR_RANGE(900000, 33, 43, 10000), + REGULATOR_LINEAR_RANGE(1000000, 44, 54, 10000), + REGULATOR_LINEAR_RANGE(1100000, 55, 65, 10000), + REGULATOR_LINEAR_RANGE(1200000, 66, 76, 10000), + REGULATOR_LINEAR_RANGE(1300000, 77, 87, 10000), + REGULATOR_LINEAR_RANGE(1500000, 88, 98, 10000), + REGULATOR_LINEAR_RANGE(1800000, 99, 109, 10000), +}; + static const unsigned int mt6366_vcn18_vm18_selectors[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }; static const struct linear_range mt6366_vcn18_vm18_ranges[] = { @@ -613,6 +627,10 @@ static const struct mt6358_regulator_info mt6366_regulators[] = { MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00), MT6366_LDO("vcn18", VCN18, mt6366_vcn18_vm18, MT6358_LDO_VCN18_CON0, 0, MT6358_VCN18_ANA_CON0, 0xf00), + MT6366_LDO("vm18", VM18, mt6366_vcn18_vm18, + MT6358_LDO_VM18_CON0, 0, MT6358_VM18_ANA_CON0, 0xf00), + MT6366_LDO("vmddr", VMDDR, mt6366_vmddr, + MT6358_LDO_VMDDR_CON0, 0, MT6358_VMDDR_ANA_CON0, 0xf00), MT6366_LDO1("vsram-proc11", VSRAM_PROC11, 500000, 1293750, 6250, MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON0, 0x7f), MT6366_LDO1("vsram-others", VSRAM_OTHERS, 500000, 1293750, 6250, @@ -621,6 +639,8 @@ static const struct mt6358_regulator_info mt6366_regulators[] = { MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON3, 0x7f), MT6366_LDO1("vsram-proc12", VSRAM_PROC12, 500000, 1293750, 6250, MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON1, 0x7f), + MT6366_LDO1("vsram-core", VSRAM_CORE, 500000, 1293750, 6250, + MT6358_LDO_VSRAM_CORE_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON5, 0x7f), }; static int mt6358_sync_vcn33_setting(struct device *dev) diff --git a/include/linux/regulator/mt6358-regulator.h b/include/linux/regulator/mt6358-regulator.h index c71a6a9fce7a..562386f9b80e 100644 --- a/include/linux/regulator/mt6358-regulator.h +++ b/include/linux/regulator/mt6358-regulator.h @@ -86,6 +86,9 @@ enum { MT6366_ID_VMC, MT6366_ID_VAUD28, MT6366_ID_VSIM2, + MT6366_ID_VM18, + MT6366_ID_VMDDR, + MT6366_ID_VSRAM_CORE, MT6366_ID_RG_MAX, }; From patchwork Thu Aug 3 07:42:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 130390 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp990352vqx; Thu, 3 Aug 2023 01:16:31 -0700 (PDT) X-Google-Smtp-Source: APBJJlGpNvZeGSRLKY6w1UA3rUBeYuIZmm2bik0//lsTQJ3n6TG0ZDys+7Sgs6L/8GeO0uJ5woCb X-Received: by 2002:a05:6a20:4423:b0:13e:fb5e:b460 with SMTP id ce35-20020a056a20442300b0013efb5eb460mr5784388pzb.0.1691050591589; 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Add support for them by adding .supply_name field settings for each regulator. The buck regulators each have their own supply whose name can be derived from the regulator name. The LDOs have shared supplies. Signed-off-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- drivers/regulator/mt6358-regulator.c | 73 ++++++++++++++-------------- 1 file changed, 36 insertions(+), 37 deletions(-) diff --git a/drivers/regulator/mt6358-regulator.c b/drivers/regulator/mt6358-regulator.c index c9fd5904d13f..b3de933c58b3 100644 --- a/drivers/regulator/mt6358-regulator.c +++ b/drivers/regulator/mt6358-regulator.c @@ -139,6 +139,7 @@ struct mt6358_regulator_info { [MT6366_ID_##vreg] = { \ .desc = { \ .name = #vreg, \ + .supply_name = "vsys_" match, \ .of_match = of_match_ptr(match), \ .ops = &mt6358_volt_range_ops, \ .type = REGULATOR_VOLTAGE, \ @@ -161,10 +162,11 @@ struct mt6358_regulator_info { .modeset_mask = BIT(_modeset_shift), \ } -#define MT6366_LDO(match, vreg, volt_ranges, enreg, enbit, vosel, vosel_mask) \ +#define MT6366_LDO(match, vreg, volt_ranges, supply, enreg, enbit, vosel, vosel_mask) \ [MT6366_ID_##vreg] = { \ .desc = { \ .name = #vreg, \ + .supply_name = supply, \ .of_match = of_match_ptr(match), \ .ops = &mt6358_volt_table_ops, \ .type = REGULATOR_VOLTAGE, \ @@ -185,12 +187,13 @@ struct mt6358_regulator_info { .qi = BIT(15), \ } -#define MT6366_LDO1(match, vreg, min, max, step, \ +#define MT6366_LDO1(match, vreg, supply, min, max, step, \ _da_vsel_reg, _da_vsel_mask, \ vosel, vosel_mask) \ [MT6366_ID_##vreg] = { \ .desc = { \ .name = #vreg, \ + .supply_name = supply, \ .of_match = of_match_ptr(match), \ .ops = &mt6358_volt_range_ops, \ .type = REGULATOR_VOLTAGE, \ @@ -210,11 +213,12 @@ struct mt6358_regulator_info { .qi = BIT(0), \ } -#define MT6366_REG_FIXED(match, vreg, \ +#define MT6366_REG_FIXED(match, vreg, supply, \ enreg, enbit, volt) \ [MT6366_ID_##vreg] = { \ .desc = { \ .name = #vreg, \ + .supply_name = supply, \ .of_match = of_match_ptr(match), \ .ops = &mt6358_volt_fixed_ops, \ .type = REGULATOR_VOLTAGE, \ @@ -589,57 +593,52 @@ static const struct mt6358_regulator_info mt6366_regulators[] = { 0x7f, MT6358_BUCK_VMODEM_DBG0, 0x7f, MT6358_VMODEM_ANA_CON0, 8), MT6366_BUCK("vs1", VS1, 1000000, 2587500, 12500, 0x7f, MT6358_BUCK_VS1_DBG0, 0x7f, MT6358_VS1_ANA_CON0, 8), - MT6366_REG_FIXED("vrf12", VRF12, - MT6358_LDO_VRF12_CON0, 0, 1200000), - MT6366_REG_FIXED("vio18", VIO18, - MT6358_LDO_VIO18_CON0, 0, 1800000), - MT6366_REG_FIXED("vfe28", VFE28, MT6358_LDO_VFE28_CON0, 0, 2800000), - MT6366_REG_FIXED("vcn28", VCN28, MT6358_LDO_VCN28_CON0, 0, 2800000), - MT6366_REG_FIXED("vxo22", VXO22, MT6358_LDO_VXO22_CON0, 0, 2200000), - MT6366_REG_FIXED("vaux18", VAUX18, - MT6358_LDO_VAUX18_CON0, 0, 1800000), - MT6366_REG_FIXED("vbif28", VBIF28, - MT6358_LDO_VBIF28_CON0, 0, 2800000), - MT6366_REG_FIXED("vio28", VIO28, MT6358_LDO_VIO28_CON0, 0, 2800000), - MT6366_REG_FIXED("va12", VA12, MT6358_LDO_VA12_CON0, 0, 1200000), - MT6366_REG_FIXED("vrf18", VRF18, MT6358_LDO_VRF18_CON0, 0, 1800000), - MT6366_REG_FIXED("vaud28", VAUD28, - MT6358_LDO_VAUD28_CON0, 0, 2800000), - MT6366_LDO("vdram2", VDRAM2, vdram2, + MT6366_REG_FIXED("vrf12", VRF12, "vs2_ldo2", MT6358_LDO_VRF12_CON0, 0, 1200000), + MT6366_REG_FIXED("vio18", VIO18, "vs1_ldo1", MT6358_LDO_VIO18_CON0, 0, 1800000), + MT6366_REG_FIXED("vfe28", VFE28, "vsys_ldo1", MT6358_LDO_VFE28_CON0, 0, 2800000), + MT6366_REG_FIXED("vcn28", VCN28, "vsys_ldo1", MT6358_LDO_VCN28_CON0, 0, 2800000), + MT6366_REG_FIXED("vxo22", VXO22, "vsys_ldo1", MT6358_LDO_VXO22_CON0, 0, 2200000), + MT6366_REG_FIXED("vaux18", VAUX18, "vsys_ldo1", MT6358_LDO_VAUX18_CON0, 0, 1800000), + MT6366_REG_FIXED("vbif28", VBIF28, "vsys_ldo1", MT6358_LDO_VBIF28_CON0, 0, 2800000), + MT6366_REG_FIXED("vio28", VIO28, "vsys_ldo2", MT6358_LDO_VIO28_CON0, 0, 2800000), + MT6366_REG_FIXED("va12", VA12, "vs2_ldo2", MT6358_LDO_VA12_CON0, 0, 1200000), + MT6366_REG_FIXED("vrf18", VRF18, "vs1_ldo1", MT6358_LDO_VRF18_CON0, 0, 1800000), + MT6366_REG_FIXED("vaud28", VAUD28, "vsys_ldo1", MT6358_LDO_VAUD28_CON0, 0, 2800000), + MT6366_LDO("vdram2", VDRAM2, vdram2, "vs2_ldo1", MT6358_LDO_VDRAM2_CON0, 0, MT6358_LDO_VDRAM2_ELR0, 0x10), - MT6366_LDO("vsim1", VSIM1, vsim, + MT6366_LDO("vsim1", VSIM1, vsim, "vsys_ldo1", MT6358_LDO_VSIM1_CON0, 0, MT6358_VSIM1_ANA_CON0, 0xf00), - MT6366_LDO("vibr", VIBR, vibr, + MT6366_LDO("vibr", VIBR, vibr, "vsys_ldo3", MT6358_LDO_VIBR_CON0, 0, MT6358_VIBR_ANA_CON0, 0xf00), - MT6366_LDO("vusb", VUSB, vusb, + MT6366_LDO("vusb", VUSB, vusb, "vsys_ldo1", MT6358_LDO_VUSB_CON0_0, 0, MT6358_VUSB_ANA_CON0, 0x700), - MT6366_LDO("vefuse", VEFUSE, vefuse, + MT6366_LDO("vefuse", VEFUSE, vefuse, "vs1_ldo1", MT6358_LDO_VEFUSE_CON0, 0, MT6358_VEFUSE_ANA_CON0, 0xf00), - MT6366_LDO("vmch", VMCH, vmch_vemc, + MT6366_LDO("vmch", VMCH, vmch_vemc, "vsys_ldo2", MT6358_LDO_VMCH_CON0, 0, MT6358_VMCH_ANA_CON0, 0x700), - MT6366_LDO("vemc", VEMC, vmch_vemc, + MT6366_LDO("vemc", VEMC, vmch_vemc, "vsys_ldo3", MT6358_LDO_VEMC_CON0, 0, MT6358_VEMC_ANA_CON0, 0x700), - MT6366_LDO("vcn33", VCN33, vcn33, + MT6366_LDO("vcn33", VCN33, vcn33, "vsys_ldo3", MT6358_LDO_VCN33_CON0_0, 0, MT6358_VCN33_ANA_CON0, 0x300), - MT6366_LDO("vmc", VMC, vmc, + MT6366_LDO("vmc", VMC, vmc, "vsys_ldo2", MT6358_LDO_VMC_CON0, 0, MT6358_VMC_ANA_CON0, 0xf00), - MT6366_LDO("vsim2", VSIM2, vsim, + MT6366_LDO("vsim2", VSIM2, vsim, "vsys_ldo2", MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00), - MT6366_LDO("vcn18", VCN18, mt6366_vcn18_vm18, + MT6366_LDO("vcn18", VCN18, mt6366_vcn18_vm18, "vs1_ldo1", MT6358_LDO_VCN18_CON0, 0, MT6358_VCN18_ANA_CON0, 0xf00), - MT6366_LDO("vm18", VM18, mt6366_vcn18_vm18, + MT6366_LDO("vm18", VM18, mt6366_vcn18_vm18, "vs1_ldo1", MT6358_LDO_VM18_CON0, 0, MT6358_VM18_ANA_CON0, 0xf00), - MT6366_LDO("vmddr", VMDDR, mt6366_vmddr, + MT6366_LDO("vmddr", VMDDR, mt6366_vmddr, "vs2_ldo1", MT6358_LDO_VMDDR_CON0, 0, MT6358_VMDDR_ANA_CON0, 0xf00), - MT6366_LDO1("vsram-proc11", VSRAM_PROC11, 500000, 1293750, 6250, + MT6366_LDO1("vsram-proc11", VSRAM_PROC11, "vs2_ldo3", 500000, 1293750, 6250, MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON0, 0x7f), - MT6366_LDO1("vsram-others", VSRAM_OTHERS, 500000, 1293750, 6250, + MT6366_LDO1("vsram-others", VSRAM_OTHERS, "vs2_ldo3", 500000, 1293750, 6250, MT6358_LDO_VSRAM_OTHERS_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON2, 0x7f), - MT6366_LDO1("vsram-gpu", VSRAM_GPU, 500000, 1293750, 6250, + MT6366_LDO1("vsram-gpu", VSRAM_GPU, "vs2_ldo3", 500000, 1293750, 6250, MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON3, 0x7f), - MT6366_LDO1("vsram-proc12", VSRAM_PROC12, 500000, 1293750, 6250, + MT6366_LDO1("vsram-proc12", VSRAM_PROC12, "vs2_ldo3", 500000, 1293750, 6250, MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON1, 0x7f), - MT6366_LDO1("vsram-core", VSRAM_CORE, 500000, 1293750, 6250, + MT6366_LDO1("vsram-core", VSRAM_CORE, "vs2_ldo3", 500000, 1293750, 6250, MT6358_LDO_VSRAM_CORE_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON5, 0x7f), }; From patchwork Thu Aug 3 07:42:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 130434 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp1007205vqx; Thu, 3 Aug 2023 01:59:23 -0700 (PDT) X-Google-Smtp-Source: APBJJlFfP8zGhRVRGmZEamWOvmw9a1fId7wgZ/W9gByO4hU4RiXS2T8lFdN5FvOe/RRZJw3JnY3I X-Received: by 2002:a17:906:24f:b0:96f:1f79:c0a6 with SMTP id 15-20020a170906024f00b0096f1f79c0a6mr7750360ejl.70.1691053163583; Thu, 03 Aug 2023 01:59:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691053163; cv=none; d=google.com; s=arc-20160816; b=JdTYTYTc2xdVC8K7BzOgDCt7Oh5p/0/q1fdLv+T5zGfUYMbONz0aUu0NNNO7IrbSzc kLcDjF+uwKropFYYit9ZIoGrqDhQ0QTwyo1uQiIDETlIU/P4j8db4ATm7zN3wlIUiUIS pi3QnWxh32IiI0R4Zjg8n1QLGWaPwx3KbrsupGwt5rJPauI0hqd5cfYrxfu++X/NvmxO X7S3kuYzTtn5SdfHk4zXsOU6CEQVj98Dw0zTK1kW7gDqxjkJgakj9w5DvVZTgRae8kK8 ofXIkPsdO0fa0esCfC3Cbe2rCJ7aNt2BuTSc2h1L5J9aObNCP2VFG5ZW4uS81PbScfNp MYGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vrPeOXoKc2hUZA03cIawOYELY2pxQM3mW6RdAg6oP4Q=; fh=8pjLFPk71yS0kQjQH42IjMGHfWvSFXlQQFuq588a4+Q=; b=jF+An+X4gNquK+areOzXbWdDXtRkSzFNkbkpxSKkCtnDl2lBErjvZQ5ypWb6chI0eW zSdGp4YShKzQg3nz8rZY3yMR22w/Y1V3k+WKxJ83SXWi+Nj6kiTWBgUFQtRpwf6ALkH/ 2x/nn+JVikpihoqf0Vds2QW5T55BtfVmIViyPpMIpi4Pn6xClW0KixqS9qwTrSox2UrS bFEtLJDj6AYrJstgpSt4J69sEauGHbgcWAoHo7uJI2DIb2D4XQDe7xpAn37mhjcTmbVF fd1f5ECvYy8LuoasNpW/SQ/uJpHXbjcw0Y1SZNpbamSyp6KSYSrxI6lK39bsPwjsQPlb ORlg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=B64w8cCq; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. 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It has a different set of regulators. Specifically, it lacks the camera related VCAM* LDOs, but has additional VM18, VMDDR, and VSRAM_CORE LDOs. Add a separate compatible for the MT6366 PMIC. Signed-off-by: Chen-Yu Tsai --- drivers/soc/mediatek/mtk-pmic-wrap.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c index 11095b8de71a..e3c0e767033b 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c @@ -2257,6 +2257,8 @@ static const struct of_device_id of_slave_match_tbl[] = { { .compatible = "mediatek,mt6357", .data = &pmic_mt6357 }, { .compatible = "mediatek,mt6358", .data = &pmic_mt6358 }, { .compatible = "mediatek,mt6359", .data = &pmic_mt6359 }, + /* MT6366 is mostly compatible with MT6358, except for slightly different regulators. */ + { .compatible = "mediatek,mt6366", .data = &pmic_mt6358 }, /* The MT6380 PMIC only implements a regulator, so we bind it * directly instead of using a MFD.