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[2620:137:e000::1:20]) by mx.google.com with ESMTP id e11-20020a170902e0cb00b001b8ba81d04dsi11178467pla.395.2023.08.02.14.13.54; Wed, 02 Aug 2023 14:14:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=NJRYI2l7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232799AbjHBUxe (ORCPT + 99 others); Wed, 2 Aug 2023 16:53:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44618 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232585AbjHBUxX (ORCPT ); Wed, 2 Aug 2023 16:53:23 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7157C1FF2; Wed, 2 Aug 2023 13:53:22 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 372KrCAW045361; Wed, 2 Aug 2023 15:53:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691009592; bh=ikH5ABT8LZJrm7nGoHEgUHGZs13YKt53UZF5jbARDvk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=NJRYI2l7cXBEIEADyY0cSWI5d1dT1C+5hxvo+2uCPqbHg3KgALxTPH4N9X4zUU7wW fkv+ZCCCOzVlRmOLRK0JZRBTdiyuOewFJCICeD93ihVHyuzaGxxBKQzkWXf9giYTF8 +ujGoxFGiFqQp6iq/GCpKhJC8L3oLmt/QwODVvFQ= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 372KrCGJ043463 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 2 Aug 2023 15:53:12 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 2 Aug 2023 15:53:11 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 2 Aug 2023 15:53:11 -0500 Received: from lelv0326.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 372KrAS8090834; Wed, 2 Aug 2023 15:53:11 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 01/13] arm64: dts: ti: k3-j721e: Enable SDHCI nodes at the board level Date: Wed, 2 Aug 2023 15:52:57 -0500 Message-ID: <20230802205309.257392-2-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802205309.257392-1-afd@ti.com> References: <20230802205309.257392-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773153392349527782 X-GMAIL-MSGID: 1773153392349527782 SDHCI nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended. As the attached SD/eMMC is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the SDHCI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis Reviewed-by: Dhruva Gole --- arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 7 ++----- arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 7 ++----- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 3 +++ arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 11 +---------- 4 files changed, 8 insertions(+), 20 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts index 66aac145e7530..64eed76bbb7a3 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts @@ -563,6 +563,7 @@ &main_uart0 { &main_sdhci0 { /* eMMC */ + status = "okay"; non-removable; ti,driver-strength-ohm = <50>; disable-wp; @@ -570,6 +571,7 @@ &main_sdhci0 { &main_sdhci1 { /* SD Card */ + status = "okay"; vmmc-supply = <&vdd_mmc1>; vqmmc-supply = <&vdd_sd_dv_alt>; pinctrl-names = "default"; @@ -578,11 +580,6 @@ &main_sdhci1 { disable-wp; }; -&main_sdhci2 { - /* Unused */ - status = "disabled"; -}; - &ospi0 { /* Unused */ status = "disabled"; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index c1cbbae761827..e9b84d2c64b26 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -504,6 +504,7 @@ &wkup_gpio1 { &main_sdhci0 { /* eMMC */ + status = "okay"; non-removable; ti,driver-strength-ohm = <50>; disable-wp; @@ -511,6 +512,7 @@ &main_sdhci0 { &main_sdhci1 { /* SD/MMC */ + status = "okay"; vmmc-supply = <&vdd_mmc1>; vqmmc-supply = <&vdd_sd_dv_alt>; pinctrl-names = "default"; @@ -519,11 +521,6 @@ &main_sdhci1 { disable-wp; }; -&main_sdhci2 { - /* Unused */ - status = "disabled"; -}; - &usb_serdes_mux { idle-states = <1>, <0>; /* USB0 to SERDES3, USB1 to SERDES1 */ }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 3acd55ffd4ffc..0ca31186b9b74 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -1478,6 +1478,7 @@ main_sdhci0: mmc@4f80000 { ti,itap-del-sel-ddr52 = <0x3>; ti,trm-icp = <0x8>; dma-coherent; + status = "disabled"; }; main_sdhci1: mmc@4fb0000 { @@ -1505,6 +1506,7 @@ main_sdhci1: mmc@4fb0000 { ti,clkbuf-sel = <0x7>; dma-coherent; sdhci-caps-mask = <0x2 0x0>; + status = "disabled"; }; main_sdhci2: mmc@4f98000 { @@ -1532,6 +1534,7 @@ main_sdhci2: mmc@4f98000 { ti,clkbuf-sel = <0x7>; dma-coherent; sdhci-caps-mask = <0x2 0x0>; + status = "disabled"; }; usbss0: cdns-usb@4104000 { diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts index 0ee4f38ec8f03..bd1bd1b746056 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -582,13 +582,9 @@ &main_uart1 { pinctrl-0 = <&main_uart1_pins_default>; }; -&main_sdhci0 { - /* Unused */ - status = "disabled"; -}; - &main_sdhci1 { /* SD Card */ + status = "okay"; vmmc-supply = <&vdd_mmc1>; vqmmc-supply = <&vdd_sd_dv_alt>; pinctrl-names = "default"; @@ -597,11 +593,6 @@ &main_sdhci1 { disable-wp; }; -&main_sdhci2 { - /* Unused */ - status = "disabled"; -}; - &ospi0 { pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; From patchwork Wed Aug 2 20:52:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 130143 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp733138vqx; Wed, 2 Aug 2023 14:19:51 -0700 (PDT) X-Google-Smtp-Source: APBJJlEcwEBGMGKrpgHwIl3yabrA3acDgN655fC9t3WWis9jKkpjHvdMGv3xSA1HFAXZWrHnKxJf X-Received: by 2002:a05:6808:1183:b0:3a4:8ac7:3407 with SMTP id j3-20020a056808118300b003a48ac73407mr21796847oil.42.1691011191266; Wed, 02 Aug 2023 14:19:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691011191; cv=none; d=google.com; s=arc-20160816; b=k4K6bgjM8qJ8mLluaBSO+HG303YRxjVLlunQZvJRnshT48OKXwKXMZAJc4j1Mm9Yc6 Oam/7XPJ2i0exZTitb5HSupqtNt80mlIclUOhcd15ZRfnI6TqY1rdWAHMwka3SO0eZ2b lk9qT3OY1GkaxEuebKkgpRZQWqZP6Xio3YRVlw7kbvlKvdmqLwVm5pYNvUQ2DWFGYaHP QyjmbQ7a3X6YJI7vsPqr6ik5hhh+3BbJa62QBSiUOvARSXASZ8CsykxSW9K6GJWpWZrw KBk8xWZgBy6u7dJqxe2viyEdXEqk8cy+Y9DcU4r+qMQqnILODcDiuxguCU2W83oluXYB 2leA== ARC-Message-Signature: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id w64-20020a638243000000b0055c868268f9si2028028pgd.462.2023.08.02.14.19.35; Wed, 02 Aug 2023 14:19:51 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=TXhQX8xJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232626AbjHBUxZ (ORCPT + 99 others); Wed, 2 Aug 2023 16:53:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44604 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232545AbjHBUxW (ORCPT ); Wed, 2 Aug 2023 16:53:22 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 419D426B0; Wed, 2 Aug 2023 13:53:21 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 372KrCxJ109448; Wed, 2 Aug 2023 15:53:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691009592; bh=KuRrfwlrYN7ck4e9lXUh/hH/ruzG2lPDTZNjQtzdsy8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=TXhQX8xJ9RaUjb52meUEp0HrxtUHpbBRzMyrMyPOPVOAoUED1VLU2S9NsrcctYh6M tzmSEP6LQvma89cjyjr1+vD159CUtLYIFo63fdJBEYBTtka+Lq/5/sQX4wJwS1WeTV QrjDZ3Ly3XcI6Dxwmce2PO1f145FSSWUT9snkAuQ= Received: from DLEE110.ent.ti.com (dlee110.ent.ti.com [157.170.170.21]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 372KrC5i071653 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 2 Aug 2023 15:53:12 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 2 Aug 2023 15:53:12 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 2 Aug 2023 15:53:12 -0500 Received: from lelv0326.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 372KrAS9090834; Wed, 2 Aug 2023 15:53:12 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 02/13] arm64: dts: ti: k3-j7200: Enable SDHCI nodes at the board level Date: Wed, 2 Aug 2023 15:52:58 -0500 Message-ID: <20230802205309.257392-3-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802205309.257392-1-afd@ti.com> References: <20230802205309.257392-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773153750742942862 X-GMAIL-MSGID: 1773153750742942862 SDHCI nodes defined in the top-level J7200 SoC dtsi files are incomplete and will not be functional unless they are extended. As the attached SD/eMMC is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the SDHCI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 2 ++ arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts index 92a5414911729..dee9056f56051 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts @@ -326,6 +326,7 @@ exp3: gpio@20 { &main_sdhci0 { /* eMMC */ + status = "okay"; non-removable; ti,driver-strength-ohm = <50>; disable-wp; @@ -333,6 +334,7 @@ &main_sdhci0 { &main_sdhci1 { /* SD card */ + status = "okay"; pinctrl-0 = <&main_mmc1_pins_default>; pinctrl-names = "default"; vmmc-supply = <&vdd_mmc1>; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index 6eaade5aeb423..5d7542ba41b93 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -654,6 +654,7 @@ main_sdhci0: mmc@4f80000 { mmc-hs200-1_8v; mmc-hs400-1_8v; dma-coherent; + status = "disabled"; }; main_sdhci1: mmc@4fb0000 { @@ -677,6 +678,7 @@ main_sdhci1: mmc@4fb0000 { ti,clkbuf-sel = <0x7>; ti,trm-icp = <0x8>; dma-coherent; + status = "disabled"; }; serdes_wiz0: wiz@5060000 { From patchwork Wed Aug 2 20:52:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 130141 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp729278vqx; Wed, 2 Aug 2023 14:12:31 -0700 (PDT) X-Google-Smtp-Source: APBJJlFIfC6dnuoy6cGTV0RkmB50I5WUDNx6oT/7FEjDtZuTVgE0wsVN/hmzIYbPQ/WPJHQ8jC2Y X-Received: by 2002:a05:6a20:96c9:b0:135:110c:c6de with SMTP id hq9-20020a056a2096c900b00135110cc6demr16296014pzc.6.1691010751568; Wed, 02 Aug 2023 14:12:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691010751; cv=none; d=google.com; s=arc-20160816; b=bIVQtLs7RtyyDH8AOLbQWmG+1joQgYVl1ao/Sz3+YXbaLS8pJcSeJXf8580Q5g2LCy BO325lNga/4W+SpUY2muS2YRc1FhFqEcwBVOFN5RPLhD8IddW6T5tiPzpVgBko8YfMLz en4Mt9LQi74VQHyJt1eCnRNc64I6UXIC9z7MITmzSMnFhJHevlG1sewwg1y8bQclu+8N 9ui4pNZweB2ni7tpuaWL6OumwXzB7b13ZIUHpYKuhRB0jNZ3no10LYtYQu37TnlF7Yra 9o2c8YNV7K73SSoZkJrxYejTiGNo0EBW8PdmLQCUgRQE6CYicdlNtam1jST/qqrB9FSv DP1Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=fWSyFj3uZd4vOshVZF6VQQ8ba4qh5QIH6FgUNDtjwug=; fh=878OLI05L9osNW8108hv37bieiY2kkkgXUhCMqaYoVQ=; b=WCoOBJuDWKnl1QjZQzK+V2C0LWKI7aKFIxmiRA3Vgv9atdaAr6LZTuKagD5L3TliFp TK0TYTL+sef7YmmlZzN2TlfqIFUGiUaKBrm/uT5Otb8ppty2cYlmm74kcax8pBjHeSQU +0nhSwgT5CnSg0qLZRl0Ht8cIc8joffmax9LhQxa4IlmUv6zpm+XHmqG1I3Drolz++lM NIRvJH4LRYsqSbciMnJrswrq60co9msPxbpNt4KpBm37yDIGvDqoIHlXmvDIZ4zYNkHx Rj/iXP2/zIAosI8rNLUo8A6QHzw+uQA1GK4XF6sOU08V/TdjSuPySr9527aOW07cTkAf 0a/g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=tawHfSXv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i65-20020a636d44000000b0055fc7d2e920si11011602pgc.638.2023.08.02.14.12.18; Wed, 02 Aug 2023 14:12:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=tawHfSXv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232700AbjHBUxa (ORCPT + 99 others); Wed, 2 Aug 2023 16:53:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44606 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232422AbjHBUxW (ORCPT ); Wed, 2 Aug 2023 16:53:22 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4984326B2; Wed, 2 Aug 2023 13:53:21 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 372KrDFL045366; Wed, 2 Aug 2023 15:53:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691009593; bh=fWSyFj3uZd4vOshVZF6VQQ8ba4qh5QIH6FgUNDtjwug=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=tawHfSXvY4trqc512CDqTf1SLM1EMYjuIT9ICGoVdoRNQT60FHyl+T+82Z9S+6RfM dp6u+/dJAVrSX/TkpxuVMHfWkRyTfzmHc60HoLv3bwdJNvVlwjI+2oUcrpoHNqNlNq iuRZNSWoqvPRrdJuox/rcKDgzAp35TRi4bGNvXfg= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 372KrDNu086539 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 2 Aug 2023 15:53:13 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 2 Aug 2023 15:53:13 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 2 Aug 2023 15:53:13 -0500 Received: from lelv0326.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 372KrASA090834; Wed, 2 Aug 2023 15:53:12 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 03/13] arm64: dts: ti: k3-j721s2: Enable SDHCI nodes at the board level Date: Wed, 2 Aug 2023 15:52:59 -0500 Message-ID: <20230802205309.257392-4-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802205309.257392-1-afd@ti.com> References: <20230802205309.257392-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773153290267207241 X-GMAIL-MSGID: 1773153290267207241 SDHCI nodes defined in the top-level J721s2 SoC dtsi files are incomplete and will not be functional unless they are extended. As the attached SD/eMMC is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the SDHCI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts | 6 +----- arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts | 2 ++ arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 2 ++ 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts index 21ad49cfa7eed..ffca12df0a6da 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts @@ -373,13 +373,9 @@ &mcu_i2c0 { clock-frequency = <400000>; }; -&main_sdhci0 { - /* Unused */ - status = "disabled"; -}; - &main_sdhci1 { /* SD card */ + status = "okay"; pinctrl-0 = <&main_mmc1_pins_default>; pinctrl-names = "default"; disable-wp; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index 02b7a559bdf21..3a8e6eb402448 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -333,6 +333,7 @@ exp2: gpio@22 { &main_sdhci0 { /* eMMC */ + status = "okay"; non-removable; ti,driver-strength-ohm = <50>; disable-wp; @@ -340,6 +341,7 @@ &main_sdhci0 { &main_sdhci1 { /* SD card */ + status = "okay"; pinctrl-0 = <&main_mmc1_pins_default>; pinctrl-names = "default"; disable-wp; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi index ed79ab3a32718..c46079fe4ed6e 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -665,6 +665,7 @@ main_sdhci0: mmc@4f80000 { mmc-hs200-1_8v; mmc-hs400-1_8v; dma-coherent; + status = "disabled"; }; main_sdhci1: mmc@4fb0000 { @@ -694,6 +695,7 @@ main_sdhci1: mmc@4fb0000 { dma-coherent; /* Masking support for SDR104 capability */ sdhci-caps-mask = <0x00000003 0x00000000>; + status = "disabled"; }; main_navss: bus@30000000 { From patchwork Wed Aug 2 20:53:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 130148 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp737730vqx; Wed, 2 Aug 2023 14:29:58 -0700 (PDT) X-Google-Smtp-Source: APBJJlFcIKKxhJDrW538qeEjjTsztp65eiDlyDEXgpTiKAX7ywQ2cfYsc50ELviZ8uaBky07yB1d X-Received: by 2002:a17:907:1ca7:b0:978:2b56:d76e with SMTP id nb39-20020a1709071ca700b009782b56d76emr8747554ejc.12.1691011798537; Wed, 02 Aug 2023 14:29:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691011798; cv=none; d=google.com; s=arc-20160816; b=TC8IJisVX2TPBxdWWI386hQBV07mT8oMnurFiOg4LekOtRFxpw6qgBkjBljr6KW3Da pGlGLB0MoyPB3IMT/eUqrMnP7mQ7/8ATGaIFT8+QPEp/KAQ0PCqk/QNNkruoDMiykjPm YxFvsT53oFCRds8TjRpu2BSF6DVokKhaiuBa5nYD8kutLX324O9jOajXy1gTZyVkXD6x uDyGwbfsPgg1v4oj0d8RdeXP2xWjqEKp9Zv5KTNHTLQfRIYlhQIsehbKhyjnHVk7fMtD uktDhEg481h0ICzplR5btUB05DfpsGvyCJEpTxMAvGR4SFwPCVu+u3vFFTLuvrpEAMeK 0JGg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=znWex16Y60PCPpX3wNxyCdSXP099wFwmM+Z6mxV+hwc=; fh=878OLI05L9osNW8108hv37bieiY2kkkgXUhCMqaYoVQ=; b=TEMHwxTLaropgXeWKZUb64jR0N8FfqCXuAEOvIcETuxVyUUxUbAr/lI4PMicsThwzJ fjzp5sHSn5+PZu0921ibg+0WnlL1XlCwWRa+xDXQt2nwkSswTKU2kF2WXzhqAX2TYcLQ n5dwyD5fozAs5cILIPgx44BMqnnjcdK1QvcFtG627GuDcMYpf/fJESQm9hd80PsaF2qo IrbcEZtV3jv9zZvLoMPrHqs0BfLZzIxfaY4vQLHOWYm23e2nw1NB4N0GIekV0JKcGHPX RtO74GXJ3iggA28RsY/22WxSBtcVpi0/+k3MFbjc355WgFQZTyDhjhLRDvxHtIuFOfgF x0ow== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=y71zSxG7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id k22-20020a17090627d600b00992d8355decsi11158235ejc.249.2023.08.02.14.29.34; Wed, 02 Aug 2023 14:29:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=y71zSxG7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231886AbjHBUyO (ORCPT + 99 others); Wed, 2 Aug 2023 16:54:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44742 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232736AbjHBUxd (ORCPT ); Wed, 2 Aug 2023 16:53:33 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E74102D42; Wed, 2 Aug 2023 13:53:27 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 372KrE3d098036; Wed, 2 Aug 2023 15:53:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691009594; bh=znWex16Y60PCPpX3wNxyCdSXP099wFwmM+Z6mxV+hwc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=y71zSxG7EfDlqDqiMAPb+LN2m5Q0y8/rveEN1j37+uFrYdZMQAokBLgZHpHrSGZzh oMEVl/Oq6wwrttmpJtLDsIol2aQ+rUAPOFaPD+RS3NU+Oh9uytV2mZxlx/8pjJrz0X tqACw2d22lbMS7CabDyHKubiwptUDLnHiouCYl/g= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 372KrDkh071657 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 2 Aug 2023 15:53:13 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 2 Aug 2023 15:53:13 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 2 Aug 2023 15:53:13 -0500 Received: from lelv0326.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 372KrASB090834; Wed, 2 Aug 2023 15:53:13 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 04/13] arm64: dts: ti: k3-am65: Enable OSPI nodes at the board level Date: Wed, 2 Aug 2023 15:53:00 -0500 Message-ID: <20230802205309.257392-5-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802205309.257392-1-afd@ti.com> References: <20230802205309.257392-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773154387463410798 X-GMAIL-MSGID: 1773154387463410798 OSPI nodes defined in the top-level AM65x SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and device information. As the attached OSPI device is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the OSPI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 1 + arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 2 ++ arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 1 + 3 files changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi index e26bd988e5224..6041862d5aa75 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi @@ -593,6 +593,7 @@ adc { }; &ospi0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi index 7b1f94a89eca8..2c9c20a9d9179 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -295,6 +295,7 @@ ospi0: spi@47040000 { power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; ospi1: spi@47050000 { @@ -309,6 +310,7 @@ ospi1: spi@47050000 { power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index 973a89b04a22f..43de7c132d343 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -530,6 +530,7 @@ &mcu_r5fss0_core1 { }; &ospi0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; From patchwork Wed Aug 2 20:53:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 130149 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp737904vqx; Wed, 2 Aug 2023 14:30:21 -0700 (PDT) X-Google-Smtp-Source: APBJJlGqeSrcYD1eFEw88BOvakP9M3dkC/OIKE/cXT5Byy4qUDWnaCXbXP6ckdPQdGlrXcdQoD7d X-Received: by 2002:a19:ae15:0:b0:4fe:89f:cbad with SMTP id f21-20020a19ae15000000b004fe089fcbadmr5543021lfc.51.1691011820923; Wed, 02 Aug 2023 14:30:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691011820; cv=none; d=google.com; s=arc-20160816; b=xSqQrcooM12u6CiKAzLgsb3PWyGgZzj0T35XM/PErRutda7EUozTIFGxZdIqFVC3gb 745YexsKSeQXPNFiaL65T9ysw7k5hjeJGszDELzzd7Y2BRVx5xMbAPTUcNMoyPaXT30y QhU/c5D9Knl+X2+jYfskKtVW8LzT4yhnxjACODXr8teYi312MBcCWHt68C5kT4LTd7/m PLf7rZS8mCO/tpcwAXk5FLe/l+uwN6BncQp4yp8bO+2JcfmAnQbinT0mFIm4k3LwKGYI M2i9UMq0fpZoEu/CRyLIoFIImCuValLW0dGj6BngoS/IqPflBaVJMrxxlJ74h8T88E4f kGrA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=fQ/532nBdHyDyg7gVLVsTIcGiqz0ZCTnjYpgJNoX93k=; fh=878OLI05L9osNW8108hv37bieiY2kkkgXUhCMqaYoVQ=; b=eLPfHrVVGLXSBpOStJdwo9CF7RuIuMC7yBvMJwxSmZxknAzh3Bxh8X/3efmNN1T6GA rVHrAATJuxK5rUlEzZNZ2CEEI9oE7fiUiwQ9lGKgrtDTFiMoKZFKfcGHF4aSriXAeM9I 3tIL9NfahzcN0DSeqT8V6u32Ir+IQ26VFv2XpWhttl3HEdxEskAf7CSAsuHpfZVvzUbv tqZUr36JA5ptj1ynlazBtuJagvQfqB2ngioyy8AcvEL8lFrL93c5zdTh6NqpxvWcKko8 bntWan3vSxTN7e6PZ5j/lqDsd80QYnoeNLb9YYOK5UUrJ7+83UHnhekGWjq10I/7fZPT CfPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=f1gBNyZq; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u10-20020a056402064a00b0051e3cbc399dsi10188852edx.287.2023.08.02.14.29.55; Wed, 02 Aug 2023 14:30:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=f1gBNyZq; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232682AbjHBUxx (ORCPT + 99 others); Wed, 2 Aug 2023 16:53:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44766 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232698AbjHBUxa (ORCPT ); Wed, 2 Aug 2023 16:53:30 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2E56D2726; Wed, 2 Aug 2023 13:53:26 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 372KrExP098041; Wed, 2 Aug 2023 15:53:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691009594; bh=fQ/532nBdHyDyg7gVLVsTIcGiqz0ZCTnjYpgJNoX93k=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=f1gBNyZqBWoo72/belRCWT4bYUhoIFlFkocPlfWZ6Ge92lPUGMz0GqLhTUucy+pqP TzKu5jE7d/BkK1/07twxXO/XFnhTpaJX9B4ZvpAu1n6jJFLTXcRvAArGPfVOhhL82W 3HJ6tHg4hMzYrERYpITVlZ0uM5MwEWIxUDTkJb1A= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 372KrEjY071664 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 2 Aug 2023 15:53:14 -0500 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 2 Aug 2023 15:53:14 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 2 Aug 2023 15:53:14 -0500 Received: from lelv0326.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 372KrASC090834; Wed, 2 Aug 2023 15:53:13 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 05/13] arm64: dts: ti: k3-j721e: Enable OSPI nodes at the board level Date: Wed, 2 Aug 2023 15:53:01 -0500 Message-ID: <20230802205309.257392-6-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802205309.257392-1-afd@ti.com> References: <20230802205309.257392-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773154410857250227 X-GMAIL-MSGID: 1773154410857250227 OSPI nodes defined in the top-level J721e SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and device information. As the attached OSPI device is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the OSPI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 10 ---------- arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 2 ++ arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 6 +----- arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 1 + 4 files changed, 4 insertions(+), 15 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts index 64eed76bbb7a3..0b89977351c98 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts @@ -580,16 +580,6 @@ &main_sdhci1 { disable-wp; }; -&ospi0 { - /* Unused */ - status = "disabled"; -}; - -&ospi1 { - /* Unused */ - status = "disabled"; -}; - &main_i2c0 { status = "okay"; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi index c1b6f8d7d1898..0c01bdd9656f1 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -378,6 +378,7 @@ ospi0: spi@47040000 { power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; ospi1: spi@47050000 { @@ -392,6 +393,7 @@ ospi1: spi@47050000 { power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts index bd1bd1b746056..4cd5346f2dd59 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -594,6 +594,7 @@ &main_sdhci1 { }; &ospi0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; @@ -657,11 +658,6 @@ partition@3fc0000 { }; }; -&ospi1 { - /* Unused */ - status = "disabled"; -}; - &main_i2c0 { status = "okay"; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi index e90e43202546e..928d3a8ad2d09 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi @@ -202,6 +202,7 @@ eeprom@50 { }; &ospi0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; From patchwork Wed Aug 2 20:53:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 130147 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp736718vqx; Wed, 2 Aug 2023 14:27:23 -0700 (PDT) X-Google-Smtp-Source: APBJJlFosDbsDUh3EjFuA1z3XwFGXECvzM+moI9cu8AXYnTMUhNsddv7T6M+7BKMEADaNcPMcWUY X-Received: by 2002:a05:6512:3611:b0:4ec:9ef9:e3d with SMTP id f17-20020a056512361100b004ec9ef90e3dmr5092351lfs.26.1691011643140; Wed, 02 Aug 2023 14:27:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691011643; cv=none; d=google.com; s=arc-20160816; b=sRZIarhdvJ46jXOXGeOKc0cxVTnDPNt9QTonppkuoBUvjpJbkjzu9fsTr6yDEWVTWr GtHUsBTfS79uShJs8OxesOEak7GSvcE+6e9FjuQlN0ktA3xxA6iaGrdCGG1sF9AgeXL6 nkcjNIIXpBi9emAy7pXL6O/R/e2Kl0sj4xq2kZil7QzpwND68VSoNc3vsn9oGhxHpZqK DY0dO6TAbpOZFlKrFwa1YjvJF23Z7A2TJnNyEm76KuZEF2r/yc/mKEiztCUKAFMNqvMv 927JP1ulvjPeGf+enRR3wrHJ0Mk1Hs9Zi3JwsYr1ku0Ql+Bik7pMXQq9OqKKmD4yUrTF T6XA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=e7Hj4FuyBxmorKTyYofLw+PErJZV5a7lGgU1QcTquOQ=; fh=878OLI05L9osNW8108hv37bieiY2kkkgXUhCMqaYoVQ=; b=s3h4sRkun8j1rQ4AyaIIgwX6gyq3DZ1T39m8K4piRhMrhiw1M+dX02FQn4JsclvfXZ krKk9DgrUgIFUbwi/otoFvwGfV7xlrS+S9tzpRkRl0YQUOYdinDQ/4BUhQHClAJ7DqeS 9Ec8t2/Kk+7BBKW+pPsMhoVUDTg2dhUKBkygAqopi9k5qwGeHYZOmVmx06SFlkaY73EU 0s/3fhiaQ64TGJ7jbXvx5CMC6AZwrF1Tu3b/2gZyVC1iKmSatDxkio5+FN0ICbET4m5C vghHC/nV+tRM0B7NHq7gislbH6agWiXyh6AT5xAi3j5CcvZBH02dA/mEiFvyvrFHTQ33 1+tQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=gXWyAGF8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z12-20020aa7d40c000000b0052307545125si947278edq.635.2023.08.02.14.26.58; Wed, 02 Aug 2023 14:27:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=gXWyAGF8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232741AbjHBUyI (ORCPT + 99 others); Wed, 2 Aug 2023 16:54:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44790 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232708AbjHBUxb (ORCPT ); Wed, 2 Aug 2023 16:53:31 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ACB6D1A5; Wed, 2 Aug 2023 13:53:26 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 372KrF6X098045; Wed, 2 Aug 2023 15:53:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691009595; bh=e7Hj4FuyBxmorKTyYofLw+PErJZV5a7lGgU1QcTquOQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=gXWyAGF8Mct6Y1Jlo/XAYc3R9xjALKyeoZLKTodKQLYbavGNUdBVG5DLFyNvwbu8m 1IW8hxx1sqjdnhIlecWnaSJ2tBTiET8ps14LLvMteTB9LORsewYc1jHvekDOSVpGVl 4EtZLiZq/IkXfz+sct+Lt2uGrLafw8SJjjeOHa4c= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 372KrFQP071671 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 2 Aug 2023 15:53:15 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 2 Aug 2023 15:53:14 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 2 Aug 2023 15:53:14 -0500 Received: from lelv0326.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 372KrASD090834; Wed, 2 Aug 2023 15:53:14 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 06/13] arm64: dts: ti: k3-j7200: Enable OSPI nodes at the board level Date: Wed, 2 Aug 2023 15:53:02 -0500 Message-ID: <20230802205309.257392-7-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802205309.257392-1-afd@ti.com> References: <20230802205309.257392-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773154224655002380 X-GMAIL-MSGID: 1773154224655002380 OSPI nodes defined in the top-level J7200 SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and device information. As the attached OSPI device is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the OSPI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis Reviewed-by: Dhruva Gole --- arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 1 + arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi index ee7860913c387..571eb0e2eac92 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -544,6 +544,7 @@ ospi0: spi@47040000 { power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi index b37f4f88ece4f..5a300d4c8ba03 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi @@ -267,6 +267,7 @@ eeprom@50 { }; &ospi0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; From patchwork Wed Aug 2 20:53:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 130144 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp733402vqx; Wed, 2 Aug 2023 14:20:22 -0700 (PDT) X-Google-Smtp-Source: APBJJlF1yH1b2KVWIKFdS7Y/L6cX+rgCbq+1EaZppX3EQv9rJEWgVLzslb59etqbx3Dc5jz4EpwG X-Received: by 2002:a05:6a00:18a5:b0:668:6eed:7c12 with SMTP id x37-20020a056a0018a500b006686eed7c12mr19253919pfh.22.1691011221931; Wed, 02 Aug 2023 14:20:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691011221; cv=none; d=google.com; s=arc-20160816; b=SeVWn8AQVSOjPc+g4I2/7EnK0mVVV1bcDjAlqCB5kFIJkqctxE0j3LBt5mlGGp+Zt8 9rYMTkBF/7KHBaSCdbe44DePXEx0C4R2yjdZaRm8rSsZkXWG3L3Aexpri5K0YXR69JKO K+IYQWPdgR+FDNOt72f7XgyvjzihMG4yXvYqSJFPgLQDoTSPcfjwmY8eQfye76L80lBK oiTWBbkiypO87FFUpD/xA0W5B3qtf61ZtGE8haQgXdHKGkFcBbiieG9iWINKCvR8GbEa Q5j5yzqvZosCo2EssN3rGCOzt6a9L1jKvVNdC3T2k2WFAYQZQUgJbqsRpHs2uWj8eq9W u2vw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=c+jmsJ+oDjhDHMr+F50lEy0xYbWV2+4R66PIkMPoEHc=; fh=878OLI05L9osNW8108hv37bieiY2kkkgXUhCMqaYoVQ=; b=phdFG0MTMyBETPMaUW9j7OzFnKCJKVMgY/8KjntfppBRmbDCGamX3WHOTovKCw0Cgj 0P4L1r+wogHKuifIUj94/BVbwrePAxDX49Yzp3gxM7sUxzXVaF+O4rAcNo5MUpZ+5fwx W34cVhPZUy23NPMowLHhJxyrWx8trfasPxUd14Xw6t35dEfGjbR9mpgLUyj6/KyTDe9U TemzyBEhHQwYMXozk3l9k9PXz+ONr5bJUhy5rBd7Pi0Kt4meXFZ5TeH2dbaQwQNu0v6T ceeaC9Y7CJX2fhJpzlhaktwYuucAcr5Dr+x8B5cG6PosiJ5M2g4z7dwV//HyYbHHD9De DlcA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=VA21gPlY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id fa36-20020a056a002d2400b0067bf9a05b45si11269461pfb.110.2023.08.02.14.20.08; Wed, 02 Aug 2023 14:20:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=VA21gPlY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233213AbjHBUx4 (ORCPT + 99 others); Wed, 2 Aug 2023 16:53:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44742 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232685AbjHBUx3 (ORCPT ); Wed, 2 Aug 2023 16:53:29 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 14A5B2708; Wed, 2 Aug 2023 13:53:25 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 372KrFg3092475; Wed, 2 Aug 2023 15:53:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691009595; bh=c+jmsJ+oDjhDHMr+F50lEy0xYbWV2+4R66PIkMPoEHc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=VA21gPlYMCyuyIXHUg2e8QhSPmScsqGmfRSz3wFQ0x4Tg7BGWYa9shIF4PpAiIYiw kwGNUEC1XqqvfxTo7rFG/RXTrAcdQJdRqYkwoBbZ63FOTl6FPO51EAB3B+TSqiOygQ KpkzL6vJiV06m2+gcYPyN1LXLS8SGXQXjaJGcO58= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 372KrF10071674 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 2 Aug 2023 15:53:15 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 2 Aug 2023 15:53:15 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 2 Aug 2023 15:53:15 -0500 Received: from lelv0326.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 372KrASE090834; Wed, 2 Aug 2023 15:53:14 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 07/13] arm64: dts: ti: k3-am64: Enable OSPI nodes at the board level Date: Wed, 2 Aug 2023 15:53:03 -0500 Message-ID: <20230802205309.257392-8-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802205309.257392-1-afd@ti.com> References: <20230802205309.257392-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773153782789256544 X-GMAIL-MSGID: 1773153782789256544 OSPI nodes defined in the top-level AM64 SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and device information. As the attached OSPI device is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the OSPI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis Reviewed-by: Dhruva Gole --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 1 + arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi | 1 + arch/arm64/boot/dts/ti/k3-am642-evm.dts | 1 + arch/arm64/boot/dts/ti/k3-am642-sk.dts | 1 + 4 files changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index d3dd8c426dada..49f910e4b03fc 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -802,6 +802,7 @@ ospi0: spi@fc40000 { assigned-clock-parents = <&k3_clks 75 7>; assigned-clock-rates = <166666666>; power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>; + status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi index 5606d775153d4..1c2c8f0daca9f 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi @@ -181,6 +181,7 @@ i2c_som_rtc: rtc@52 { }; &ospi0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&ospi0_pins_default>; diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index d84e7ee160328..b4a1f73d4fb17 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -520,6 +520,7 @@ &tscadc0 { }; &ospi0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&ospi0_pins_default>; diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index 963d796a3a970..af06ccd466802 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -518,6 +518,7 @@ &tscadc0 { }; &ospi0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&ospi0_pins_default>; From patchwork Wed Aug 2 20:53:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 130195 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp776355vqx; Wed, 2 Aug 2023 15:56:07 -0700 (PDT) X-Google-Smtp-Source: APBJJlFBQyCYVgvbuWEXdVDkK9hs8iCQZ8dXKX35e2L5OEkXaPfXHKkRhRjINKkM4e/6b+3Ymkpg X-Received: by 2002:a05:6a20:7352:b0:122:c6c4:36b1 with SMTP id v18-20020a056a20735200b00122c6c436b1mr21382369pzc.4.1691016967361; Wed, 02 Aug 2023 15:56:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691016967; cv=none; d=google.com; s=arc-20160816; b=0pKHbPR8IYUq8/zysEZBhlXOS83YTrMDBdKdouSMlhA6SIdYGgRxTIplkY4Opn/J7I 4j12uphC0LBg760lHaJ+zdxSYTlQEozb4XwfAwRQaNFGB3VdDszVR6bqN3R4l5nMaonx ktJIkvrLRwsUi2+6WVOOAFJ6iUEiO1ZaG4QY22MIiNJL+0p98CirD7kNb+mx5qb8xb5J +4xb+11mkbHkF0//VL5zXclFzNUnIdmG3Vo1WSAHuH4+tAUsXSHVcGFO27g1/pAsc/Np 9BKvbpeFDJW1pltX+wNgPCbMlPkrxTFXKgz5HncldnAptKOo4QyIj49NfKkgUI2+EFuC yDGQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=aDI8cMXt39aKEhmixQlgMMFEmWazt299GyEFV9WZ+SQ=; fh=878OLI05L9osNW8108hv37bieiY2kkkgXUhCMqaYoVQ=; b=HRqeDriFgRZ0t19X0b6ZTgZGnfOsTplJfeHNxZoUdaWJw2xlUOzBD81XAdq/yPSnsM ROml7KdRfhEQXk9O7rxtKNmoPwXMdPM+ryGOP6yF3xO4RjxbWLPodBiJljebtgvAAW5e UwpjZeOoIqRGBGZiCANbcP+IJac4jJWfqLm3xZBWzV2FzpCN3g2Us47ltOicthUXlvEH VJuirIMl8FtpAEw4U+wObVYviXPCcWr2eAxNNCUd/56c3bxQb1ilqYDaSHBZESodxvLP mn6zaIEPVSlxTyCES5pIy8RpMgBbF4PM9D3UX6ZH6Eaz31rdbDcJnjhi2w5II9JWK/cc hSyQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=xHAFM2bW; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. 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Disable the GPIO nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis Reviewed-by: Dhruva Gole --- .../boot/dts/ti/k3-j721e-beagleboneai64.dts | 42 ++++--------------- .../dts/ti/k3-j721e-common-proc-board.dts | 35 ++++------------ arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 8 ++++ .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 2 + arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 31 +++----------- 5 files changed, 31 insertions(+), 87 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts index 0b89977351c98..99536765939d9 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts @@ -647,52 +647,24 @@ eeprom@50 { }; }; -&main_gpio2 { - /* Unused */ - status = "disabled"; -}; - -&main_gpio3 { - /* Unused */ - status = "disabled"; -}; - -&main_gpio4 { - /* Unused */ - status = "disabled"; -}; - -&main_gpio5 { - /* Unused */ - status = "disabled"; -}; - -&main_gpio6 { - /* Unused */ - status = "disabled"; -}; - -&main_gpio7 { - /* Unused */ - status = "disabled"; -}; - &wkup_gpio0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_adc0_pins_default>, <&mcu_adc1_pins_default>, <&mikro_bus_pins_default>; }; -&wkup_gpio1 { - /* Unused */ - status = "disabled"; -}; - &main_gpio0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&csi1_gpio_pins_default>, <&csi0_gpio_pins_default>; }; +&main_gpio1 { + status = "okay"; + /* default pins */ +}; + &usb_serdes_mux { idle-states = <1>, <1>; /* USB0 to SERDES3, USB1 to SERDES2 */ }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index e9b84d2c64b26..2fd940893eb5f 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -469,37 +469,20 @@ &main_uart4 { pinctrl-0 = <&main_uart4_pins_default>; }; -&main_gpio2 { - status = "disabled"; -}; - -&main_gpio3 { - status = "disabled"; -}; - -&main_gpio4 { - status = "disabled"; -}; - -&main_gpio5 { - status = "disabled"; -}; - -&main_gpio6 { - status = "disabled"; -}; - -&main_gpio7 { - status = "disabled"; -}; - &wkup_gpio0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&wkup_gpio_pins_default>; }; -&wkup_gpio1 { - status = "disabled"; +&main_gpio0 { + status = "okay"; + /* default pins */ +}; + +&main_gpio1 { + status = "okay"; + /* default pins */ }; &main_sdhci0 { diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 0ca31186b9b74..7f663d9280b57 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -1339,6 +1339,7 @@ main_gpio0: gpio@600000 { power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 105 0>; clock-names = "gpio"; + status = "disabled"; }; main_gpio1: gpio@601000 { @@ -1355,6 +1356,7 @@ main_gpio1: gpio@601000 { power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 106 0>; clock-names = "gpio"; + status = "disabled"; }; main_gpio2: gpio@610000 { @@ -1372,6 +1374,7 @@ main_gpio2: gpio@610000 { power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 107 0>; clock-names = "gpio"; + status = "disabled"; }; main_gpio3: gpio@611000 { @@ -1388,6 +1391,7 @@ main_gpio3: gpio@611000 { power-domains = <&k3_pds 108 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 108 0>; clock-names = "gpio"; + status = "disabled"; }; main_gpio4: gpio@620000 { @@ -1405,6 +1409,7 @@ main_gpio4: gpio@620000 { power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 109 0>; clock-names = "gpio"; + status = "disabled"; }; main_gpio5: gpio@621000 { @@ -1421,6 +1426,7 @@ main_gpio5: gpio@621000 { power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 110 0>; clock-names = "gpio"; + status = "disabled"; }; main_gpio6: gpio@630000 { @@ -1438,6 +1444,7 @@ main_gpio6: gpio@630000 { power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 111 0>; clock-names = "gpio"; + status = "disabled"; }; main_gpio7: gpio@631000 { @@ -1454,6 +1461,7 @@ main_gpio7: gpio@631000 { power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 112 0>; clock-names = "gpio"; + status = "disabled"; }; main_sdhci0: mmc@4f80000 { diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi index 0c01bdd9656f1..4d107eee9b341 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -281,6 +281,7 @@ wkup_gpio0: gpio@42110000 { power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 113 0>; clock-names = "gpio"; + status = "disabled"; }; wkup_gpio1: gpio@42100000 { @@ -297,6 +298,7 @@ wkup_gpio1: gpio@42100000 { power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 114 0>; clock-names = "gpio"; + status = "disabled"; }; mcu_i2c0: i2c@40b00000 { diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts index 4cd5346f2dd59..dfb6af60482e7 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -731,41 +731,20 @@ &main_i2c5 { }; &main_gpio0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&rpi_header_gpio0_pins_default>; }; &main_gpio1 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&rpi_header_gpio1_pins_default>; }; -&main_gpio2 { - status = "disabled"; -}; - -&main_gpio3 { - status = "disabled"; -}; - -&main_gpio4 { - status = "disabled"; -}; - -&main_gpio5 { - status = "disabled"; -}; - -&main_gpio6 { - status = "disabled"; -}; - -&main_gpio7 { - status = "disabled"; -}; - -&wkup_gpio1 { - status = "disabled"; +&wkup_gpio0 { + status = "okay"; + /* default pins */ }; &usb_serdes_mux { From patchwork Wed Aug 2 20:53:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 130162 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp747418vqx; Wed, 2 Aug 2023 14:52:27 -0700 (PDT) X-Google-Smtp-Source: APBJJlEXgrZg1o+mBk32bmLUUtZzBjJ2X1PbzfPo7gMYfirDXmqBNNtWTFRm+vgmSStwVmFE30tM X-Received: by 2002:a17:902:9049:b0:1af:aafb:64c8 with SMTP id w9-20020a170902904900b001afaafb64c8mr15768065plz.21.1691013146871; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id i10-20020a17090332ca00b001bbb39c68b2si12069429plr.178.2023.08.02.14.52.10; Wed, 02 Aug 2023 14:52:26 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=IQEI95Wa; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233237AbjHBUyB (ORCPT + 99 others); Wed, 2 Aug 2023 16:54:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44716 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232676AbjHBUx2 (ORCPT ); Wed, 2 Aug 2023 16:53:28 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F0E752701; Wed, 2 Aug 2023 13:53:25 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 372KrHxT045381; Wed, 2 Aug 2023 15:53:17 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691009597; bh=PeWKo87jieyjxvitxFJp4Ro66vWYj7z+iNvIdGw3Kiw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=IQEI95WaL5vV9gTFEkBtAhRyZm2wkQNGiPRCYgDB365+Fq9XSTDorpz4ZXeMJPoOu 1nvMipVyTYYXBtoKmMpOW7W3E/xnCJEYnyned5qqJDo7Y4msPN2a1OHuXzisUlWN4N +KbaNS51NDQnYmLFV6ltfZt83nqIGDraTImxnm28= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 372KrH5h018955 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 2 Aug 2023 15:53:17 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 2 Aug 2023 15:53:16 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 2 Aug 2023 15:53:16 -0500 Received: from lelv0326.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 372KrASG090834; Wed, 2 Aug 2023 15:53:16 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 09/13] arm64: dts: ti: k3-j721s2: Enable GPIO nodes at the board level Date: Wed, 2 Aug 2023 15:53:05 -0500 Message-ID: <20230802205309.257392-10-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802205309.257392-1-afd@ti.com> References: <20230802205309.257392-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773155801292003569 X-GMAIL-MSGID: 1773155801292003569 GPIO nodes defined in the top-level J721s2 SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and device information. Disable the GPIO nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis Reviewed-by: Dhruva Gole --- .../boot/dts/ti/k3-am68-sk-base-board.dts | 18 ++---------------- .../dts/ti/k3-j721s2-common-proc-board.dts | 18 ++++++------------ arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 4 ++++ .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 2 ++ 4 files changed, 14 insertions(+), 28 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts index ffca12df0a6da..4c855dffb4cd2 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts @@ -297,31 +297,17 @@ J721S2_WKUP_IOPAD(0x000, PIN_INPUT, 7) /* (K26) WKUP_GPIO0_49 */ }; &main_gpio0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&rpi_header_gpio0_pins_default>; }; -&main_gpio2 { - status = "disabled"; -}; - -&main_gpio4 { - status = "disabled"; -}; - -&main_gpio6 { - status = "disabled"; -}; - &wkup_gpio0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_rpi_header_gpio0_pins0_default>, <&mcu_rpi_header_gpio0_pins1_default>; }; -&wkup_gpio1 { - status = "disabled"; -}; - &wkup_uart0 { status = "reserved"; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index 3a8e6eb402448..6f248d27a30a4 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -266,20 +266,14 @@ J721S2_WKUP_IOPAD(0x044, PIN_INPUT, 0) /* (B20) MCU_OSPI1_LBCLKO */ }; }; -&main_gpio2 { - status = "disabled"; -}; - -&main_gpio4 { - status = "disabled"; -}; - -&main_gpio6 { - status = "disabled"; +&main_gpio0 { + status = "okay"; + /* default pins */ }; -&wkup_gpio1 { - status = "disabled"; +&wkup_gpio0 { + status = "okay"; + /* default pins */ }; &wkup_uart0 { diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi index c46079fe4ed6e..0cc8057fce13c 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -507,6 +507,7 @@ main_gpio0: gpio@600000 { power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 111 0>; clock-names = "gpio"; + status = "disabled"; }; main_gpio2: gpio@610000 { @@ -523,6 +524,7 @@ main_gpio2: gpio@610000 { power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 112 0>; clock-names = "gpio"; + status = "disabled"; }; main_gpio4: gpio@620000 { @@ -539,6 +541,7 @@ main_gpio4: gpio@620000 { power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 113 0>; clock-names = "gpio"; + status = "disabled"; }; main_gpio6: gpio@630000 { @@ -555,6 +558,7 @@ main_gpio6: gpio@630000 { power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 114 0>; clock-names = "gpio"; + status = "disabled"; }; main_i2c0: i2c@2000000 { diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index 736ec5fa0ea28..3557f3338377d 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -323,6 +323,7 @@ wkup_gpio0: gpio@42110000 { power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 115 0>; clock-names = "gpio"; + status = "disabled"; }; wkup_gpio1: gpio@42100000 { @@ -339,6 +340,7 @@ wkup_gpio1: gpio@42100000 { power-domains = <&k3_pds 116 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 116 0>; clock-names = "gpio"; + status = "disabled"; }; wkup_i2c0: i2c@42120000 { From patchwork Wed Aug 2 20:53:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 130152 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp740545vqx; Wed, 2 Aug 2023 14:35:57 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFdPFgLChqDItN4tkIVzylcXaNSWMO2XtJIzt+x1QoNg1WYL5lHa6lAYRSu/LwyTHY2RY0P X-Received: by 2002:a17:902:a703:b0:1bc:3f9b:2d57 with SMTP id w3-20020a170902a70300b001bc3f9b2d57mr478358plq.37.1691012156738; Wed, 02 Aug 2023 14:35:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691012156; cv=none; d=google.com; s=arc-20160816; b=bYCqQlYeWrRCz8XXhzSkbXZesF9fez95Ii5ob6e3QfezLeuT9Eqa4FSDK0vxDV4NX/ y9cQK5hZGDRj9vZ9Tkry00Ma4nMP7okDZ6UC0lGo5KtfUwlpWFykmXcrgBRZqrutHdsC R45bmQ1hi/SKr1C/0BK3qyy/mr5JTYfst+auXIMd4Xu3swfoFFag9ndXhLFRC1Of0Ev1 ODzZAIhtK6SQrEaNkkAly4MM7Eft+Rzeu3WNCickgtl+i0MakUZCJDhgNXr6HhpDWV/j dUg1RqXxJH1ObuOSjxFxKt9u4jZ4MryzSJT87Vnv7oKeXl7pCdyC6QCWduD3508GLxu4 1ygQ== ARC-Message-Signature: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id kz7-20020a170902f9c700b001bb0fc56a1esi11254915plb.197.2023.08.02.14.35.42; Wed, 02 Aug 2023 14:35:56 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=N+WpwMIx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232831AbjHBUxh (ORCPT + 99 others); Wed, 2 Aug 2023 16:53:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44630 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229801AbjHBUxY (ORCPT ); Wed, 2 Aug 2023 16:53:24 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D473C26B5; Wed, 2 Aug 2023 13:53:22 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 372KrH1G109460; Wed, 2 Aug 2023 15:53:17 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691009597; bh=t0NFPm/eBGsI8PsBULav5hRKKRo235LNB1aMsQWzZIc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=N+WpwMIxhKB8CkjOZxM6bMRs6mi5EvcCgW2R6RAhqjBpEapMVGyIxxPDnElyio5Va pMBNtgYR9RkqSF1ehxFpLa9rJYNHhHkniiJ0hBdSXxRfFcEE1euaM49ko7juF8cslt lq0SmNFS4sey9bhbJEqPLFuS5wdMHN49w8aljtYQ= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 372KrHxJ018948 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 2 Aug 2023 15:53:17 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 2 Aug 2023 15:53:17 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 2 Aug 2023 15:53:16 -0500 Received: from lelv0326.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 372KrASH090834; Wed, 2 Aug 2023 15:53:16 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 10/13] arm64: dts: ti: k3-j7200: Enable GPIO nodes at the board level Date: Wed, 2 Aug 2023 15:53:06 -0500 Message-ID: <20230802205309.257392-11-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802205309.257392-1-afd@ti.com> References: <20230802205309.257392-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773154763276916415 X-GMAIL-MSGID: 1773154763276916415 GPIO nodes defined in the top-level J7200 SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and device information. Disable the GPIO nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis --- .../boot/dts/ti/k3-j7200-common-proc-board.dts | 18 ++++-------------- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 4 ++++ .../arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 2 ++ 3 files changed, 10 insertions(+), 14 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts index dee9056f56051..4a5c4f36baeec 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts @@ -240,27 +240,17 @@ &main_uart3 { pinctrl-0 = <&main_uart3_pins_default>; }; -&main_gpio2 { - status = "disabled"; -}; - -&main_gpio4 { - status = "disabled"; -}; - -&main_gpio6 { - status = "disabled"; +&main_gpio0 { + status = "okay"; + /* default pins */ }; &wkup_gpio0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&wkup_gpio_pins_default>; }; -&wkup_gpio1 { - status = "disabled"; -}; - &mcu_cpsw { pinctrl-names = "default"; pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index 5d7542ba41b93..6a776f3bbcb19 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -832,6 +832,7 @@ main_gpio0: gpio@600000 { power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 105 0>; clock-names = "gpio"; + status = "disabled"; }; main_gpio2: gpio@610000 { @@ -849,6 +850,7 @@ main_gpio2: gpio@610000 { power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 107 0>; clock-names = "gpio"; + status = "disabled"; }; main_gpio4: gpio@620000 { @@ -866,6 +868,7 @@ main_gpio4: gpio@620000 { power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 109 0>; clock-names = "gpio"; + status = "disabled"; }; main_gpio6: gpio@630000 { @@ -883,6 +886,7 @@ main_gpio6: gpio@630000 { power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 111 0>; clock-names = "gpio"; + status = "disabled"; }; main_spi0: spi@2100000 { diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi index 571eb0e2eac92..5ae7320efad7b 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -297,6 +297,7 @@ wkup_gpio0: gpio@42110000 { power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 113 0>; clock-names = "gpio"; + status = "disabled"; }; wkup_gpio1: gpio@42100000 { @@ -313,6 +314,7 @@ wkup_gpio1: gpio@42100000 { power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 114 0>; clock-names = "gpio"; + status = "disabled"; }; mcu_navss: bus@28380000 { From patchwork Wed Aug 2 20:53:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 130180 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp763950vqx; Wed, 2 Aug 2023 15:24:40 -0700 (PDT) X-Google-Smtp-Source: APBJJlFNy9eAn3PKLD9WRt1JpG1z8h7vbT3Khij8AJjkqiYKKO76zJCRlDoyINH0LQkd5rv3eAWD X-Received: by 2002:a05:6402:78e:b0:522:3ad4:9c9c with SMTP id d14-20020a056402078e00b005223ad49c9cmr5839232edy.31.1691015080087; Wed, 02 Aug 2023 15:24:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691015080; cv=none; d=google.com; s=arc-20160816; b=TdU1RM2HZjuuCjjvpkYTZ1/zoOwT2B3H0FhzBnhtIrNdA6QbacrYKDRdmDn8b32Ywp DzPWIQr7cMpu/TrOKAbVtWOa2Tx0Jkk3gpzK1w1fAq38N8OYhdCJJSLdOUzJO61wnHmh iQm4pAUaXTFyMyBXfcMR/SsBpGYGlT28sXxUQLRMA32deQ0nqQl4UfOk22ei8/++Isb/ jeCnhG5ieJ/Ch1O9v3vEYSXzXbdwMsCMol88aIUO7yxMuNTo9lJYutvgcxv1FXT5GoAn IARxoZXNUu4WVMAJbkVB0mPwHqCCxksGVB1dFWjQZ/tRdKBVk0mJQ/ZUe0kglysHPi/t DHrA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=eDbpN4GN5cN13qWNNOtLQP7WEzXKsAfX2/vHBGDMoPY=; fh=878OLI05L9osNW8108hv37bieiY2kkkgXUhCMqaYoVQ=; b=VRXGCi5mSodVtYLJaiVi6ZaA7etuZNlx+M+hlcPQeiKzTRyJu+OPMylcXMMtSnWep5 DrUBQy70rU1FMU9hITai8Hc8mQpBZvn+/OiLkMUp20OZRJvzQu8coHc6g4odfkcyorHZ FjBcIG2lpjVf3VoZxwj9ltiSUMamZIvHxPSUwcxxuMHl6hrMY/0j8HzJDWbMs2g4dt8F mLBAVdxrblnkf8mSDYdIas9QiAOXWhXOU70Ac+xHv6Xp9w3f2O35qpNvdUkhcT7kiNao Z6kcpV+10ogzO6dSz9S4UF4jJxYuEPX+SyeAb/BcFf1WpL47cE5K7L7PHAm90oydbCGZ lPTQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=m0TVr0sI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. 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Disable the TSCADC nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 2 ++ arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 2 ++ arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 2 ++ arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 10 ---------- 4 files changed, 6 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts index 99536765939d9..79245a85d7c69 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts @@ -748,6 +748,7 @@ &usb1 { }; &tscadc0 { + status = "okay"; /* BBB Header: P9.39, P9.40, P9.37, P9.38, P9.33, P9.36, P9.35 */ adc { ti,adc-channels = <0 1 2 3 4 5 6>; @@ -755,6 +756,7 @@ adc { }; &tscadc1 { + status = "okay"; /* MCU mikroBUS Header J10.1 - MCU_ADC1_AIN0 */ adc { ti,adc-channels = <0>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 2fd940893eb5f..6cea309fc247a 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -621,12 +621,14 @@ partition@3fe0000 { }; &tscadc0 { + status = "okay"; adc { ti,adc-channels = <0 1 2 3 4 5 6 7>; }; }; &tscadc1 { + status = "okay"; adc { ti,adc-channels = <0 1 2 3 4 5 6 7>; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi index 4d107eee9b341..37a8c80de3bc5 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -411,6 +411,7 @@ tscadc0: tscadc@40200000 { dmas = <&main_udmap 0x7400>, <&main_udmap 0x7401>; dma-names = "fifo0", "fifo1"; + status = "disabled"; adc { #io-channel-cells = <1>; @@ -430,6 +431,7 @@ tscadc1: tscadc@40210000 { dmas = <&main_udmap 0x7402>, <&main_udmap 0x7403>; dma-names = "fifo0", "fifo1"; + status = "disabled"; adc { #io-channel-cells = <1>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts index dfb6af60482e7..ca5be7797a02b 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -829,16 +829,6 @@ &usb1 { phy-names = "cdns3,usb3-phy"; }; -&tscadc0 { - /* Unused */ - status = "disabled"; -}; - -&tscadc1 { - /* Unused */ - status = "disabled"; -}; - &mcu_cpsw { pinctrl-names = "default"; pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>; From patchwork Wed Aug 2 20:53:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 130154 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp740770vqx; Wed, 2 Aug 2023 14:36:29 -0700 (PDT) X-Google-Smtp-Source: APBJJlGDR/r2mcfbBWAFehGxjGzsArSwhNrK+yKkXtFJ85RbM6hoT+zlgLSlIBtFMjoqfWUCOZND X-Received: by 2002:a17:902:da83:b0:1bb:4861:d3a7 with SMTP id j3-20020a170902da8300b001bb4861d3a7mr16352998plx.16.1691012189279; Wed, 02 Aug 2023 14:36:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691012189; cv=none; d=google.com; s=arc-20160816; b=j64pTonGwJS0vupAv4P6TlfnV64iOstU2msqqnFiVvePFK6Lrvdlgu9GqgCy4FP+nE qtyc2C1G0NFewHWn6VMtLkNKtoUaaGqu0v0LZLaIcm18oD675vI2ALaNFVTvmh+HXDK2 Ekb+PnrD62DzYw8ubpJ4ge5L4IyPDl1GFw8bygtmRwvl/5YH6PyXizTEHYgUXiFlDWNy 7VhhysLf3naGtU2wV4nn856nrit8UNJqZ3mkW1fOLe7e6hpQx7SrgcWOBQdCLwVc8kNZ +5nSCC1oAE27+q8KaBkBJ54WnhtFA2ZvkN/fXopvUYkQRbmjh8TbWheHYyYJAFsl6wjF aPMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=zciprX999203YuLCsDKMILGBWNGLQeNjXQ4jCdJgqyY=; fh=878OLI05L9osNW8108hv37bieiY2kkkgXUhCMqaYoVQ=; b=a+dGy9IObfQwa8qNAabXyJjvbhjaJyUT/nN3tNmnsh5op+9MvvQzEAZfyc6OKiT4aO uemZUK4nC/Nc64X2SJO+lv+FaRRoXwwisiJZY/PNGWfLybcMKPLX5LkCQYUGmuMMTcwy 0JD08Gy0fxB6acKsqdYQ2PvdMRDRMd0a2n3qmnPpABDak+r6G0qh98pZ8qHCHkEuoogq 0iruu66e30WsyxF0ARzfZFS7fqV+NLsPtoF00Ufa4l4D4Mj/shitdmO8dKfIt5hLBIei oqqA6TCpKr/KNESAIgK8b/Rttm6TPnTEHzxUaIc2IULXBz+FMyng2gk9kbCJpq8lkCFo 5TZA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=SZupBAir; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id kz7-20020a170902f9c700b001bb0fc56a1esi11254915plb.197.2023.08.02.14.36.15; Wed, 02 Aug 2023 14:36:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=SZupBAir; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232800AbjHBUxo (ORCPT + 99 others); Wed, 2 Aug 2023 16:53:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44650 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232633AbjHBUxZ (ORCPT ); Wed, 2 Aug 2023 16:53:25 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 777BF26AB; Wed, 2 Aug 2023 13:53:24 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 372KrIw1109479; Wed, 2 Aug 2023 15:53:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691009598; bh=zciprX999203YuLCsDKMILGBWNGLQeNjXQ4jCdJgqyY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=SZupBAirJmJK0+8vjR4+i1iRrrV3yDGeHsCX8HydfoZQ1E5f8+ZqSaDtIIkBf/uq0 FnKh6ZiqhwBZkkz2FIlGTeC/3fi4+ZKBAQA2BUj7Q8DKAMDU8yby4HsVCxc+5sx9rX 89+UGKbrAfmim87s183dwqFkOKQbLoYeRBn8I350= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 372KrIqV018962 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 2 Aug 2023 15:53:18 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 2 Aug 2023 15:53:18 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 2 Aug 2023 15:53:18 -0500 Received: from lelv0326.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 372KrASJ090834; Wed, 2 Aug 2023 15:53:17 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 12/13] arm64: dts: ti: k3-am65: Enable TSCADC nodes at the board level Date: Wed, 2 Aug 2023 15:53:08 -0500 Message-ID: <20230802205309.257392-13-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802205309.257392-1-afd@ti.com> References: <20230802205309.257392-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773154797717417786 X-GMAIL-MSGID: 1773154797717417786 TSCADC nodes defined in the top-level AM65 SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and/or device information. Disable the TSCADC nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 5 +---- arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 2 ++ arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 2 ++ 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi index 6041862d5aa75..ba1c14a54acf4 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi @@ -582,11 +582,8 @@ &mcu_spi0 { ti,pindir-d0-out-d1-in; }; -&tscadc0 { - status = "disabled"; -}; - &tscadc1 { + status = "okay"; adc { ti,adc-channels = <0 1 2 3 4 5>; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi index 2c9c20a9d9179..4defde540fe0b 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -112,6 +112,7 @@ tscadc0: tscadc@40200000 { dmas = <&mcu_udmap 0x7100>, <&mcu_udmap 0x7101 >; dma-names = "fifo0", "fifo1"; + status = "disabled"; adc { #io-channel-cells = <1>; @@ -130,6 +131,7 @@ tscadc1: tscadc@40210000 { dmas = <&mcu_udmap 0x7102>, <&mcu_udmap 0x7103>; dma-names = "fifo0", "fifo1"; + status = "disabled"; adc { #io-channel-cells = <1>; diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index 43de7c132d343..17f45a9f7b146 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -478,12 +478,14 @@ &usb0_phy { }; &tscadc0 { + status = "okay"; adc { ti,adc-channels = <0 1 2 3 4 5 6 7>; }; }; &tscadc1 { + status = "okay"; adc { ti,adc-channels = <0 1 2 3 4 5 6 7>; }; From patchwork Wed Aug 2 20:53:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 130150 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp739464vqx; Wed, 2 Aug 2023 14:33:33 -0700 (PDT) X-Google-Smtp-Source: APBJJlGC62BLSAoqSqrkZ5w4T0YqMoIhW0E4iixz898XF89+3+T3O+A88zBHPsVudhKT/B0BKN9W X-Received: by 2002:a05:6402:180f:b0:51d:e2c4:f94a with SMTP id g15-20020a056402180f00b0051de2c4f94amr5970448edy.20.1691012013015; Wed, 02 Aug 2023 14:33:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691012013; cv=none; d=google.com; s=arc-20160816; b=brmSvQ8WV0m74QKIHsR5Hc3hwLwombZQDcOoewqo8edZ2HME1u5naoZkS3KcgKVDuU 1vXtzZMk2p7CEUPQRtA2zm8sQ6Mg1g56YUZmQJnS9P55W2jspCukqCcoI9A0YrYdYqCq gm6o9eXQ5pQDy0LSoOnIaLdi4EzmlbslQ5wTUveurbZ/+RbwNc+q3UvBp/8DghpHNr3J kRhNtkRw/rdfBP/rJSj5f0mgzHELjWeyMCJl2XZaOWGJj8OPmROJvPdSZ6xKUXeTzy6D HpP0tUWbhuQEDGm8YqJOKHR6z4+uEZSA7s50m678fFsf8akV8y9d/COQHt+MZKaQeu6P KTMg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ZHnSjfvWyMiD35RmuNRSm+q3hGovfiL7kU9qUqJO7zI=; fh=878OLI05L9osNW8108hv37bieiY2kkkgXUhCMqaYoVQ=; b=Y2W6UJG2BBsGSOPwnoivzUx/+2pcRr1tLpyYapfE1mP3/AZxQwaPML8MzA++1TTqR4 bHrCZI8jLmUAjTdZ1Cs7GxpF37D8NzHLS0prcA2CdVpCGyamdzRbDTQ89ZWm5rg0dVOC DDadKBHONBMOTPsQqk2ixBk9ENQYMykDryTsTnDt+OZ/cRF8H/BBGJ3EizJkhEBrfvJS JtJwnjtpP5zp3GG0VViU1xN+9QBMmHMDkcjop4Sem0LdPt8XetOfYLQ7icdj7bhHV8N+ h34emZGoklT6pILqLbrk1b6QNGa6cRRPiyUsv1VtOAueHaLzId/gWfwLrtr515Vnaup9 Fcvg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=InJ9tylo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u20-20020a05640207d400b00522c1b1e796si7207219edy.214.2023.08.02.14.33.08; Wed, 02 Aug 2023 14:33:33 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=InJ9tylo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232866AbjHBUxu (ORCPT + 99 others); Wed, 2 Aug 2023 16:53:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44740 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232682AbjHBUx3 (ORCPT ); Wed, 2 Aug 2023 16:53:29 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2E48A271C; Wed, 2 Aug 2023 13:53:26 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 372KrJgF109483; Wed, 2 Aug 2023 15:53:19 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691009599; bh=ZHnSjfvWyMiD35RmuNRSm+q3hGovfiL7kU9qUqJO7zI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=InJ9tyloqK1qj+j8x2aFAcj8898zuzOiFsLnvcWI1J6eWBIkKWB+/mvsZefIsyCsz SBPuzRyjc4ZcKE4vjsXEiEVTH7JyJdB7dYoSkvr6LNNuH0USl37OO+ZGBy8wNawwdT HSgjSK0kizrTUCyI4W7koGWiqriFLlbiwKK0za7Q= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 372KrJ8n018966 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 2 Aug 2023 15:53:19 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 2 Aug 2023 15:53:18 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 2 Aug 2023 15:53:18 -0500 Received: from lelv0326.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 372KrASK090834; Wed, 2 Aug 2023 15:53:18 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 13/13] arm64: dts: ti: k3-am64: Enable TSCADC nodes at the board level Date: Wed, 2 Aug 2023 15:53:09 -0500 Message-ID: <20230802205309.257392-14-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802205309.257392-1-afd@ti.com> References: <20230802205309.257392-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773154612146169003 X-GMAIL-MSGID: 1773154612146169003 TSCADC nodes defined in the top-level AM64 SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and/or device information. Disable the TSCADC nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis Reviewed-by: Dhruva Gole --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 1 + arch/arm64/boot/dts/ti/k3-am642-sk.dts | 4 ---- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index 49f910e4b03fc..a9db9b6d03aca 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -773,6 +773,7 @@ tscadc0: tscadc@28001000 { assigned-clock-parents = <&k3_clks 0 3>; assigned-clock-rates = <60000000>; clock-names = "fck"; + status = "disabled"; adc { #io-channel-cells = <1>; diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index af06ccd466802..722fd285a34ec 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -513,10 +513,6 @@ cpsw3g_phy1: ethernet-phy@1 { }; }; -&tscadc0 { - status = "disabled"; -}; - &ospi0 { status = "okay"; pinctrl-names = "default";