From patchwork Wed Aug 2 16:32:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Shavit X-Patchwork-Id: 130067 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp659613vqx; Wed, 2 Aug 2023 11:52:39 -0700 (PDT) X-Google-Smtp-Source: APBJJlHLkGP4VwHtT4lOxoTVi8DySE5mZCFRsxHY9n4trxhTDHytxhe3RO4Ev50eiOeCfj34jAw+ X-Received: by 2002:aa7:ce02:0:b0:522:4697:8102 with SMTP id d2-20020aa7ce02000000b0052246978102mr5853047edv.38.1691002359508; Wed, 02 Aug 2023 11:52:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691002359; cv=none; d=google.com; s=arc-20160816; b=sACyqKigyxwdiguX3Yd+ceBgAoR/mwECI9ZEdKJOxlmF8eRSb5xfY/bAO7IxHFXlMC FBwnNLBNGmpkwvulZBg22hUI0+0K6m8il52MaJdA5kr5tHfLrOg2yP39rlV1qlrkIOQy zYm63A6bMlaOjCOhVfIMOTVjyWW9sBfXSAP8IPTUzT2t9agfGvvfHFuX8e+Nn7DgL6OV vWjjgCz2Ay7JtP0DJwtj/yT6/xHQvxC1XErckhjAsZW/wh7BmoyfeiWlcJ0nOymdDJYO MnVXNU34fFJ54JZogrPObyh1PMG5hPBP1/GvoEkHmSIWI+73urve06qwkLiHxOAfbEgo AVaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:dkim-signature; bh=FGhZFYnHXRSeNZzMPSJMjfhqZmzQC/L7Opahs9wW1cY=; fh=51loh+OS6vr0QdvTi7t7xEP2VSRDvSfeMVfkb8abBBs=; b=rKDJVz9qyajFZ78sKVWwHBXaAtshjWLvMyZHvR/GCtDl/+uxysvFhnw+XV/yPSUpsd rDNG9vRgKNIPA65RCOq3Z/omBke6RFfT8CUzzhYta5mK2yJsWTQWeG2QyAGwKhmk69Xn zZsRmyamsOCH1fghVi+WT04qG8p+TLDCLqUWoF8i+W81zwXMg5459lc5SsCrE3nh+aVL 3t5F9ZGoljeOEzErkNT98F1rLR/FmJbtVWJVZULWnYpVL7uF5sSXAxNif/cMiM3WDSRW EB/dTCl+SOqriy1TURSHqUphdGeAahK8622CLqam2sM5wG7l00uZjFXrplMwRS5E5Enn UMmA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b=qbAiZYTH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c10-20020a056402120a00b005222717c469si6682308edw.260.2023.08.02.11.52.15; Wed, 02 Aug 2023 11:52:39 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b=qbAiZYTH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232698AbjHBQdr (ORCPT + 99 others); Wed, 2 Aug 2023 12:33:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233079AbjHBQdo (ORCPT ); Wed, 2 Aug 2023 12:33:44 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E416826AB for ; Wed, 2 Aug 2023 09:33:40 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-c5a479bc2d4so2696276.1 for ; Wed, 02 Aug 2023 09:33:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1690994020; x=1691598820; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=FGhZFYnHXRSeNZzMPSJMjfhqZmzQC/L7Opahs9wW1cY=; b=qbAiZYTHU/BZPRpEk6nJ6g5qVVdJKLX6nPtkdkC4XfeuGUhWBI+dO+3QEtHojy3qGy Wu8mwDFpDzE5m7m+mWKIHRZPJKiQg4mqSSKngYIUZ/eq2nmhoLhvAQ7zLmSBWN50L0x+ 0zBP5MI9g8JmUVCuQiHLNquf61mUnORjSkDTx5dKApzwBTIFvadWhcBp5Ymv7EvdkQ4a 9D5JVsbAFcttUaOxTbShccfSulmLAHikd2SSBJilr2ot+xuJ3dABG/Yy0FgRgEOGdm/s 8I8w1lcAMk8EVlPEuxqnDCrydmzwy1LP0ZjDC5UlTAT30AJrx27Ys1EfXgS0uIMbWCN3 UqFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690994020; x=1691598820; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=FGhZFYnHXRSeNZzMPSJMjfhqZmzQC/L7Opahs9wW1cY=; b=kXRDQhTCMRpEMY1NLLQsMj4u1uKUEO5aCoZFQdjGFyoOT/z3f3v6SizsdRciyaRKmq QtIVIRLVaV8YExiPi7C8AwqrO/K3cbLAXItQHE9z0tpDwvlg/M9R2yBaFfjR/AUWL/yU JjsXyMQxr/MQaxl4A0HfYM5ANCkF0eGc7a9bnxmkG2EGv03xjIBBK2wiXkWxtDg44Cib HsuD8H2ObSwUC3PIsGLv506Y2/zZQW/34Qwgw+zxz9PLSHgKpeBTjz+WtE4FQekKpXuL RkqqgKV6s2310kr+wKHl3TJCrW/1HqSHsCj79aasRNFpBBJoAvfapKgO/sHPpxyyqC8E 3kIg== X-Gm-Message-State: ABy/qLZdheMtWATZrdpaoQi6nI4KS5WvHfsZDDF1iFr+yyFRApRGHfmf sr+oPkj8ChZOAoUi4c/LBCyReJtA2Pmp X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:39d1:8774:b733:6210]) (user=mshavit job=sendgmr) by 2002:a25:ac43:0:b0:d0a:5674:c4f6 with SMTP id r3-20020a25ac43000000b00d0a5674c4f6mr115325ybd.3.1690994019921; Wed, 02 Aug 2023 09:33:39 -0700 (PDT) Date: Thu, 3 Aug 2023 00:32:29 +0800 In-Reply-To: <20230802163328.2623773-1-mshavit@google.com> Mime-Version: 1.0 References: <20230802163328.2623773-1-mshavit@google.com> X-Mailer: git-send-email 2.41.0.585.gd2178a4bd4-goog Message-ID: <20230803003234.v4.1.I67ab103c18d882aedc8a08985af1fba70bca084e@changeid> Subject: [PATCH v4 1/8] iommu/arm-smmu-v3: Move ctx_desc out of s1_cfg From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: will@kernel.org, robin.murphy@arm.com, nicolinc@nvidia.com, jgg@nvidia.com, jean-philippe@linaro.org, Michael Shavit X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773144490270628787 X-GMAIL-MSGID: 1773144490270628787 s1_cfg describes the CD table that is inserted into an SMMU's STEs. It's weird for s1_cfg to also own ctx_desc which describes a CD that is inserted into that table. It is more appropriate for arm_smmu_domain to own ctx_desc. Signed-off-by: Michael Shavit Reviewed-by: Jason Gunthorpe Reviewed-by: Nicolin Chen --- (no changes since v2) Changes in v2: - Undo over-reaching column alignment change .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 2 +- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 23 ++++++++++--------- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 6 +++-- 3 files changed, 17 insertions(+), 14 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c index a5a63b1c947e..968559d625c4 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -62,7 +62,7 @@ arm_smmu_share_asid(struct mm_struct *mm, u16 asid) return cd; } - smmu_domain = container_of(cd, struct arm_smmu_domain, s1_cfg.cd); + smmu_domain = container_of(cd, struct arm_smmu_domain, cd); smmu = smmu_domain->smmu; ret = xa_alloc(&arm_smmu_asid_xa, &new_asid, cd, diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 9b0dc3505601..bb277ff86f65 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1869,7 +1869,7 @@ static void arm_smmu_tlb_inv_context(void *cookie) * careful, 007. */ if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { - arm_smmu_tlb_inv_asid(smmu, smmu_domain->s1_cfg.cd.asid); + arm_smmu_tlb_inv_asid(smmu, smmu_domain->cd.asid); } else { cmd.opcode = CMDQ_OP_TLBI_S12_VMALL; cmd.tlbi.vmid = smmu_domain->s2_cfg.vmid; @@ -1957,7 +1957,7 @@ static void arm_smmu_tlb_inv_range_domain(unsigned long iova, size_t size, if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { cmd.opcode = smmu_domain->smmu->features & ARM_SMMU_FEAT_E2H ? CMDQ_OP_TLBI_EL2_VA : CMDQ_OP_TLBI_NH_VA; - cmd.tlbi.asid = smmu_domain->s1_cfg.cd.asid; + cmd.tlbi.asid = smmu_domain->cd.asid; } else { cmd.opcode = CMDQ_OP_TLBI_S2_IPA; cmd.tlbi.vmid = smmu_domain->s2_cfg.vmid; @@ -2088,7 +2088,7 @@ static void arm_smmu_domain_free(struct iommu_domain *domain) mutex_lock(&arm_smmu_asid_lock); if (cfg->cdcfg.cdtab) arm_smmu_free_cd_tables(smmu_domain); - arm_smmu_free_asid(&cfg->cd); + arm_smmu_free_asid(&smmu_domain->cd); mutex_unlock(&arm_smmu_asid_lock); } else { struct arm_smmu_s2_cfg *cfg = &smmu_domain->s2_cfg; @@ -2107,13 +2107,14 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, u32 asid; struct arm_smmu_device *smmu = smmu_domain->smmu; struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg; + struct arm_smmu_ctx_desc *cd = &smmu_domain->cd; typeof(&pgtbl_cfg->arm_lpae_s1_cfg.tcr) tcr = &pgtbl_cfg->arm_lpae_s1_cfg.tcr; - refcount_set(&cfg->cd.refs, 1); + refcount_set(&cd->refs, 1); /* Prevent SVA from modifying the ASID until it is written to the CD */ mutex_lock(&arm_smmu_asid_lock); - ret = xa_alloc(&arm_smmu_asid_xa, &asid, &cfg->cd, + ret = xa_alloc(&arm_smmu_asid_xa, &asid, cd, XA_LIMIT(1, (1 << smmu->asid_bits) - 1), GFP_KERNEL); if (ret) goto out_unlock; @@ -2126,23 +2127,23 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, if (ret) goto out_free_asid; - cfg->cd.asid = (u16)asid; - cfg->cd.ttbr = pgtbl_cfg->arm_lpae_s1_cfg.ttbr; - cfg->cd.tcr = FIELD_PREP(CTXDESC_CD_0_TCR_T0SZ, tcr->tsz) | + cd->asid = (u16)asid; + cd->ttbr = pgtbl_cfg->arm_lpae_s1_cfg.ttbr; + cd->tcr = FIELD_PREP(CTXDESC_CD_0_TCR_T0SZ, tcr->tsz) | FIELD_PREP(CTXDESC_CD_0_TCR_TG0, tcr->tg) | FIELD_PREP(CTXDESC_CD_0_TCR_IRGN0, tcr->irgn) | FIELD_PREP(CTXDESC_CD_0_TCR_ORGN0, tcr->orgn) | FIELD_PREP(CTXDESC_CD_0_TCR_SH0, tcr->sh) | FIELD_PREP(CTXDESC_CD_0_TCR_IPS, tcr->ips) | CTXDESC_CD_0_TCR_EPD1 | CTXDESC_CD_0_AA64; - cfg->cd.mair = pgtbl_cfg->arm_lpae_s1_cfg.mair; + cd->mair = pgtbl_cfg->arm_lpae_s1_cfg.mair; /* * Note that this will end up calling arm_smmu_sync_cd() before * the master has been added to the devices list for this domain. * This isn't an issue because the STE hasn't been installed yet. */ - ret = arm_smmu_write_ctx_desc(smmu_domain, 0, &cfg->cd); + ret = arm_smmu_write_ctx_desc(smmu_domain, 0, cd); if (ret) goto out_free_cd_tables; @@ -2152,7 +2153,7 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, out_free_cd_tables: arm_smmu_free_cd_tables(smmu_domain); out_free_asid: - arm_smmu_free_asid(&cfg->cd); + arm_smmu_free_asid(cd); out_unlock: mutex_unlock(&arm_smmu_asid_lock); return ret; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index dcab85698a4e..f841383a55a3 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -599,7 +599,6 @@ struct arm_smmu_ctx_desc_cfg { struct arm_smmu_s1_cfg { struct arm_smmu_ctx_desc_cfg cdcfg; - struct arm_smmu_ctx_desc cd; u8 s1fmt; u8 s1cdmax; }; @@ -724,7 +723,10 @@ struct arm_smmu_domain { enum arm_smmu_domain_stage stage; union { - struct arm_smmu_s1_cfg s1_cfg; + struct { + struct arm_smmu_ctx_desc cd; + struct arm_smmu_s1_cfg s1_cfg; + }; struct arm_smmu_s2_cfg s2_cfg; }; From patchwork Wed Aug 2 16:32:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Shavit X-Patchwork-Id: 130031 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp629494vqx; Wed, 2 Aug 2023 10:58:51 -0700 (PDT) X-Google-Smtp-Source: APBJJlF7dqcnSvoBnCH5XWxjxeGfNJ9lGkf4pkLb8YQXQdMzFg9qCwd61Fvs/OYTP3772TR2P8oZ X-Received: by 2002:a05:6402:430f:b0:51e:5898:a23d with SMTP id m15-20020a056402430f00b0051e5898a23dmr7803391edc.5.1690999130974; Wed, 02 Aug 2023 10:58:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690999130; cv=none; d=google.com; s=arc-20160816; b=nt/P9Z/eMwXGfFno56pqa0KVEC2P2jz+7bUAV8HV8JEbFVWJx0w86ROoMaCrVjpEcj qfiwqy6TZRRjMhJIoltXTY0uxNfl/Il3bGVKXVbzDRwFXTaxNC+ZA4tgemIfl+4cKuMr pRvnYFp1O3neGx4JvuzuzvzKrVidVCpL0Wg0XOFBAlG3bMkZ5QAphmb2fX3Vyw1zOCkg f38pmHg6F0fHq+zA0Mpf5fKKJUs5lgGs7bqGK9pF2iceVK8svmTv7F2Czgp+Pc7RJWln Gc+VpBz/dG7zRgWaGy5VZYrLs9zPxDdSSoLB6S0N9Oy3HFAfWdTKQ7bgyAF8/f+MyWLx JsbQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:dkim-signature; bh=r3+yIt5RymsTwdmi2GYawedbQ7ADkg2oqEcGa/FOhO4=; fh=51loh+OS6vr0QdvTi7t7xEP2VSRDvSfeMVfkb8abBBs=; b=iWWGUNpzK4L+K1Tx+YxTtSQHHrx9IeRqzTrIjyH6QU6b/UyBzCQNbFNqKH7PeTVGGE Bhg9zt99GqexLMv6ToiMWBmPhsDhsxHtE8nCGXUVNTF1Hd7lFujYZANwgPkkvXtGFGe+ 7lmJqTVaHzgQIN8z/mB1F1R3KL3wLn0SbF3o4q5EJtblV0H1ssQwvUE+g0DciUlSI8It kJr9fIdz1TrszgEGcY6HO4qn8Cagm+acZSwklSl7FTRXvbGaQdmU4x7AKUS0P54SbKzT DTWErti72HGq7R/WgvfSbpSlW2GxUxMLBCIhW95HZ+seGv/IxzBk77IpnqdBV43/f5Iw dusQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b=7NfRVq4I; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v19-20020aa7d9d3000000b005224f3f470bsi10430746eds.137.2023.08.02.10.58.27; Wed, 02 Aug 2023 10:58:50 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b=7NfRVq4I; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233343AbjHBQd7 (ORCPT + 99 others); Wed, 2 Aug 2023 12:33:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38686 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232919AbjHBQds (ORCPT ); Wed, 2 Aug 2023 12:33:48 -0400 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 117EE2685 for ; Wed, 2 Aug 2023 09:33:46 -0700 (PDT) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-5843fed1e88so84660087b3.0 for ; Wed, 02 Aug 2023 09:33:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1690994025; x=1691598825; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=r3+yIt5RymsTwdmi2GYawedbQ7ADkg2oqEcGa/FOhO4=; b=7NfRVq4Idu++ILngYRgZBFEO+HTiQCZCmbx/2UL+ljXsZfjQhl48ik+oDiGj4WaNye JZql0cWzJrMvjTCXbJwCNsZTtIgCGFEftqjWcvDsRr4gLQ39lw99YUhKyUPrm+IR/TmH pSqfU9ZWM0AmwTGSyEITP7sup0vFzfF3xKV2tRk58CVllYuCybMJgQGpStU9eMXwg/L1 SGh76hpI7+bkwUe4/3YCAptaeSZj2OsihEshnMZ4l+QyE+X1YxI5fdKN3gH8ftTBgDXi CRDzjEW4GeNkIAQ5usnpQ3S85FxPrriZ+Pgftpyg4Bpr0OF1LAt32aJISvVspD1VNteW bxZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690994025; x=1691598825; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=r3+yIt5RymsTwdmi2GYawedbQ7ADkg2oqEcGa/FOhO4=; b=VuO0MgcvcUsCUdg0VzqXsOhmmTrSvpeRGqG9vitBljUB4O5vQ9OMxbD1J7gRujzFrT WtHNpEVSXhPsa3hWALmJ998Siv7LQcmXmbGLIz1G4wZEKvUJnXBK5Fi8Skptx5L2PElu xqNYpzuKbawdtjl6PWcrS2E9fl2wGSwviR+jqgsm6b2mRFATqdLHQq72e8FpAv4p0KOH i7y7hLIu70Ol31pdt49hb8L2hzhc8emgchJg6u5xjrc8ZHuC8w4CiIVYNBmDstuWwvth fgt2x7/y3NMsAbvzO8pW5i/z9PVfimhbxBWmuoNOQsnIKqdADb+MI/wymdlhx63wWrBP EkvQ== X-Gm-Message-State: ABy/qLYY+SUAfgJv/S/Y6RKePuEX4dFcPbuXfjpF+FZXSZkZIIQ7HlJI ho5ITbPvoYaZBxHtFEJrjgj3BG3EhWVF X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:39d1:8774:b733:6210]) (user=mshavit job=sendgmr) by 2002:a81:ad27:0:b0:581:3899:91bc with SMTP id l39-20020a81ad27000000b00581389991bcmr152757ywh.6.1690994024824; Wed, 02 Aug 2023 09:33:44 -0700 (PDT) Date: Thu, 3 Aug 2023 00:32:30 +0800 In-Reply-To: <20230802163328.2623773-1-mshavit@google.com> Mime-Version: 1.0 References: <20230802163328.2623773-1-mshavit@google.com> X-Mailer: git-send-email 2.41.0.585.gd2178a4bd4-goog Message-ID: <20230803003234.v4.2.I1ef1ed19d7786c8176a0d05820c869e650c8d68f@changeid> Subject: [PATCH v4 2/8] iommu/arm-smmu-v3: Replace s1_cfg with cdtab_cfg From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: will@kernel.org, robin.murphy@arm.com, nicolinc@nvidia.com, jgg@nvidia.com, jean-philippe@linaro.org, Michael Shavit X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773141104667143179 X-GMAIL-MSGID: 1773141104667143179 Remove struct arm_smmu_s1_cfg. This is really just a CD table with a bit of extra information. Enhance the existing CD table structure, struct arm_smmu_ctx_desc_cfg, with max_cds_bits and replace all usages of arm_smmu_s1_cfg with arm_smmu_ctx_desc_cfg. Compute the other values that were stored in s1cfg directly from existing arm_smmu_ctx_desc_cfg. For clarity, use the name "cd_table" for the variables pointing to arm_smmu_ctx_desc_cfg in the new code instead of cdcfg. A later patch will make this fully consistent. Signed-off-by: Michael Shavit Reviewed-by: Jason Gunthorpe Reviewed-by: Nicolin Chen --- (no changes since v3) Changes in v3: - Updated commit messages again - Replace more usages of cdcfg with cdtable (lines that were already touched by this commit anyways). Changes in v2: - Updated commit message drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 45 +++++++++++---------- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 10 ++--- 2 files changed, 26 insertions(+), 29 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index bb277ff86f65..ded613aedbb0 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1033,9 +1033,9 @@ static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_domain *smmu_domain, unsigned int idx; struct arm_smmu_l1_ctx_desc *l1_desc; struct arm_smmu_device *smmu = smmu_domain->smmu; - struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->s1_cfg.cdcfg; + struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->cd_table; - if (smmu_domain->s1_cfg.s1fmt == STRTAB_STE_0_S1FMT_LINEAR) + if (!cdcfg->l1_desc) return cdcfg->cdtab + ssid * CTXDESC_CD_DWORDS; idx = ssid >> CTXDESC_SPLIT; @@ -1071,7 +1071,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, bool cd_live; __le64 *cdptr; - if (WARN_ON(ssid >= (1 << smmu_domain->s1_cfg.s1cdmax))) + if (WARN_ON(ssid >= (1 << smmu_domain->cd_table.max_cds_bits))) return -E2BIG; cdptr = arm_smmu_get_cd_ptr(smmu_domain, ssid); @@ -1138,19 +1138,16 @@ static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain) size_t l1size; size_t max_contexts; struct arm_smmu_device *smmu = smmu_domain->smmu; - struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg; - struct arm_smmu_ctx_desc_cfg *cdcfg = &cfg->cdcfg; + struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->cd_table; - max_contexts = 1 << cfg->s1cdmax; + max_contexts = 1 << cdcfg->max_cds_bits; if (!(smmu->features & ARM_SMMU_FEAT_2_LVL_CDTAB) || max_contexts <= CTXDESC_L2_ENTRIES) { - cfg->s1fmt = STRTAB_STE_0_S1FMT_LINEAR; cdcfg->num_l1_ents = max_contexts; l1size = max_contexts * (CTXDESC_CD_DWORDS << 3); } else { - cfg->s1fmt = STRTAB_STE_0_S1FMT_64K_L2; cdcfg->num_l1_ents = DIV_ROUND_UP(max_contexts, CTXDESC_L2_ENTRIES); @@ -1186,7 +1183,7 @@ static void arm_smmu_free_cd_tables(struct arm_smmu_domain *smmu_domain) int i; size_t size, l1size; struct arm_smmu_device *smmu = smmu_domain->smmu; - struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->s1_cfg.cdcfg; + struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->cd_table; if (cdcfg->l1_desc) { size = CTXDESC_L2_ENTRIES * (CTXDESC_CD_DWORDS << 3); @@ -1276,7 +1273,7 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, u64 val = le64_to_cpu(dst[0]); bool ste_live = false; struct arm_smmu_device *smmu = NULL; - struct arm_smmu_s1_cfg *s1_cfg = NULL; + struct arm_smmu_ctx_desc_cfg *cd_table = NULL; struct arm_smmu_s2_cfg *s2_cfg = NULL; struct arm_smmu_domain *smmu_domain = NULL; struct arm_smmu_cmdq_ent prefetch_cmd = { @@ -1294,7 +1291,7 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, if (smmu_domain) { switch (smmu_domain->stage) { case ARM_SMMU_DOMAIN_S1: - s1_cfg = &smmu_domain->s1_cfg; + cd_table = &smmu_domain->cd_table; break; case ARM_SMMU_DOMAIN_S2: case ARM_SMMU_DOMAIN_NESTED: @@ -1325,7 +1322,7 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, val = STRTAB_STE_0_V; /* Bypass/fault */ - if (!smmu_domain || !(s1_cfg || s2_cfg)) { + if (!smmu_domain || !(cd_table || s2_cfg)) { if (!smmu_domain && disable_bypass) val |= FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_ABORT); else @@ -1344,7 +1341,7 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, return; } - if (s1_cfg) { + if (cd_table) { u64 strw = smmu->features & ARM_SMMU_FEAT_E2H ? STRTAB_STE_1_STRW_EL2 : STRTAB_STE_1_STRW_NSEL1; @@ -1360,10 +1357,14 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, !master->stall_enabled) dst[1] |= cpu_to_le64(STRTAB_STE_1_S1STALLD); - val |= (s1_cfg->cdcfg.cdtab_dma & STRTAB_STE_0_S1CTXPTR_MASK) | - FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_S1_TRANS) | - FIELD_PREP(STRTAB_STE_0_S1CDMAX, s1_cfg->s1cdmax) | - FIELD_PREP(STRTAB_STE_0_S1FMT, s1_cfg->s1fmt); + val |= (cd_table->cdtab_dma & STRTAB_STE_0_S1CTXPTR_MASK) | + FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_S1_TRANS) | + FIELD_PREP(STRTAB_STE_0_S1CDMAX, + cd_table->max_cds_bits) | + FIELD_PREP(STRTAB_STE_0_S1FMT, + cd_table->l1_desc ? + STRTAB_STE_0_S1FMT_64K_L2 : + STRTAB_STE_0_S1FMT_LINEAR); } if (s2_cfg) { @@ -2082,11 +2083,11 @@ static void arm_smmu_domain_free(struct iommu_domain *domain) /* Free the CD and ASID, if we allocated them */ if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { - struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg; + struct arm_smmu_ctx_desc_cfg *cd_table = &smmu_domain->cd_table; /* Prevent SVA from touching the CD while we're freeing it */ mutex_lock(&arm_smmu_asid_lock); - if (cfg->cdcfg.cdtab) + if (cd_table->cdtab) arm_smmu_free_cd_tables(smmu_domain); arm_smmu_free_asid(&smmu_domain->cd); mutex_unlock(&arm_smmu_asid_lock); @@ -2106,7 +2107,7 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, int ret; u32 asid; struct arm_smmu_device *smmu = smmu_domain->smmu; - struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg; + struct arm_smmu_ctx_desc_cfg *cd_table = &smmu_domain->cd_table; struct arm_smmu_ctx_desc *cd = &smmu_domain->cd; typeof(&pgtbl_cfg->arm_lpae_s1_cfg.tcr) tcr = &pgtbl_cfg->arm_lpae_s1_cfg.tcr; @@ -2119,7 +2120,7 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, if (ret) goto out_unlock; - cfg->s1cdmax = master->ssid_bits; + cd_table->max_cds_bits = master->ssid_bits; smmu_domain->stall_enabled = master->stall_enabled; @@ -2457,7 +2458,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) ret = -EINVAL; goto out_unlock; } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1 && - master->ssid_bits != smmu_domain->s1_cfg.s1cdmax) { + master->ssid_bits != smmu_domain->cd_table.max_cds_bits) { ret = -EINVAL; goto out_unlock; } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1 && diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index f841383a55a3..35a93e885887 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -595,12 +595,8 @@ struct arm_smmu_ctx_desc_cfg { dma_addr_t cdtab_dma; struct arm_smmu_l1_ctx_desc *l1_desc; unsigned int num_l1_ents; -}; - -struct arm_smmu_s1_cfg { - struct arm_smmu_ctx_desc_cfg cdcfg; - u8 s1fmt; - u8 s1cdmax; + /* log2 of the maximum number of CDs supported by this table */ + u8 max_cds_bits; }; struct arm_smmu_s2_cfg { @@ -725,7 +721,7 @@ struct arm_smmu_domain { union { struct { struct arm_smmu_ctx_desc cd; - struct arm_smmu_s1_cfg s1_cfg; + struct arm_smmu_ctx_desc_cfg cd_table; }; struct arm_smmu_s2_cfg s2_cfg; }; From patchwork Wed Aug 2 16:32:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Shavit X-Patchwork-Id: 130021 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp615610vqx; Wed, 2 Aug 2023 10:31:22 -0700 (PDT) X-Google-Smtp-Source: APBJJlH45xdC/ONqtNiuEhbg9+fp//XMFXmMINzAQ829ZyJCq2O811wXS/w2ZnBzV1n+lmjUtSGC X-Received: by 2002:a05:6a21:6d9a:b0:132:c7de:f71c with SMTP id wl26-20020a056a216d9a00b00132c7def71cmr19139151pzb.59.1690997481745; Wed, 02 Aug 2023 10:31:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690997481; cv=none; d=google.com; s=arc-20160816; b=vZvT4ydYecwN37G1F61lBGDCE+HAnm1b0itS53dz1FakyhGuo5DJlgt+h8QvNUGbUP R8azwuRPcyUDIRNmZcu5I8lBwCbfRz4n6PwJv9TdzYWtYZoJNS9xd9As29YMs3BXgw9Q NnZc7FyYsf2odv4SfCqFzRvsyALzR/tpSwul24F//XwsDpINYUchCu+sQrgq669Z06Q/ 5270luutJj9OcE6SpGgPZufy1/i+2+hlZgATNeeoMPPSTsz6dyhuBteg3ppUr06lLfwJ r4LC9Bl0vDAObMgCSbh1nId3AaF2ZWD8uqDCEWGR18KKRWR54kmUHvaHbmCVgWKw4FGd 9NnA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:dkim-signature; bh=bGhWSbzc4cZej0FeJJbc3VXFTtBzmMATq60yYbQRCzk=; fh=51loh+OS6vr0QdvTi7t7xEP2VSRDvSfeMVfkb8abBBs=; b=C7JMjG+obKKcS1KtefJqyYBekC+npQbDd2sZN48e+z2D1OZRl+y+Uwh7JuQHI7Ga4Z mpMkaMEN0BSc0tY60jFxJYd3MYar4Yu2um0V8IjfLuT0uJhVOEJ+XoUNW4dwDgWAPWw7 7O4X7kXL2zG80Iik2PuNr0wFZcrwDe/+PMRrOmaPmz16MFAYajO+Yc8m+0gy7VIulWri WZoMJ/stB+CFhzA4qU5slMPKjibDeSxQwu7TmeUSbIv2p+/A/8fRk7+O+xjiTQkmRdQ1 d8NgKFAT+JE7IeAFglOAAuj6BvRNDwfMZo79qmSi0YZy4eyCLEuMrxo4ws2CczrSohc4 JazQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b=Wfmjss+U; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id r24-20020a638f58000000b00547b25ea099si5303680pgn.682.2023.08.02.10.31.07; Wed, 02 Aug 2023 10:31:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b=Wfmjss+U; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233984AbjHBQeE (ORCPT + 99 others); Wed, 2 Aug 2023 12:34:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233049AbjHBQd4 (ORCPT ); Wed, 2 Aug 2023 12:33:56 -0400 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 593372733 for ; Wed, 2 Aug 2023 09:33:50 -0700 (PDT) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-583b256faf5so692807b3.1 for ; Wed, 02 Aug 2023 09:33:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1690994029; x=1691598829; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=bGhWSbzc4cZej0FeJJbc3VXFTtBzmMATq60yYbQRCzk=; b=Wfmjss+UWmZsCytY4z2zpjHfRx8D5zoF9UEpfx4Rmioi27engfbfmtGjsJKQWBcyVf QS5jrHEj985TIIPJU2Mfx45hFU3uZrL0e52dgYK7tVtA9xaCfnfD2ihgwvbDsnbWO4Ag So0UGVMoWSVnDk+FESZFRihVwOytovkaGPzW4T8N0gSCoM2jXawxIf3LpwlN5Khp+pah yjcreTw1ONoQ8cMSKG2QPznIeGjCQIWll17RNVuYyACk1GcDPSczUDF/RDsO9l6A46K0 0Lcty3jmaLU2xZl9Y76nI9/56Xbhl0emopedb/DqA/C06TZARGBtPULdRn5u2XTvcmw/ kOJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690994029; x=1691598829; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=bGhWSbzc4cZej0FeJJbc3VXFTtBzmMATq60yYbQRCzk=; b=eGRpqs/jhvoJ9IcpwR2Se2/WOWRIqgtvC4C0paKW0yjrC7jB/6tGA+wQaZVk3tlXUu fefFxLQxnbd5XIjA2ylx+4bGOJZWHpPt2HN0W1AN4mNqt+SncmSTvhw9ZKrGx2mPI5tf Zppwx3FPSj1/jjzTYRSFJ3B0g9lJGLM31f/g77IgCumXogZfJjhH8xSg2UkL76p/64o3 pdmvC1K+Yjk9+0AK1q9BjXmYSNafLhW9GKj04lvV430RIw7qDhmA5S2E7UCSEvYHLWKK bLrGWzGp2INePh/KtwYFHnNp6hlxQjHM9DmsSQvzO3hBtqc1OLBdq5zAnbWQDf0SUPvp AMUQ== X-Gm-Message-State: ABy/qLbBFtjs/ehGMioL19nPHu0xzcyCnDUFJurZoryK13HWdGifUJkN LYEDOom6TFs2Vm3wwnbfFss4FX/mE/or X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:39d1:8774:b733:6210]) (user=mshavit job=sendgmr) by 2002:a81:ad5b:0:b0:56c:e9fe:3cb4 with SMTP id l27-20020a81ad5b000000b0056ce9fe3cb4mr227897ywk.1.1690994028873; Wed, 02 Aug 2023 09:33:48 -0700 (PDT) Date: Thu, 3 Aug 2023 00:32:31 +0800 In-Reply-To: <20230802163328.2623773-1-mshavit@google.com> Mime-Version: 1.0 References: <20230802163328.2623773-1-mshavit@google.com> X-Mailer: git-send-email 2.41.0.585.gd2178a4bd4-goog Message-ID: <20230803003234.v4.3.I875254464d044a8ce8b3a2ad6beb655a4a006456@changeid> Subject: [PATCH v4 3/8] iommu/arm-smmu-v3: Encapsulate ctx_desc_cfg init in alloc_cd_tables From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: will@kernel.org, robin.murphy@arm.com, nicolinc@nvidia.com, jgg@nvidia.com, jean-philippe@linaro.org, Michael Shavit X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773139375453598283 X-GMAIL-MSGID: 1773139375453598283 This is slighlty cleaner: arm_smmu_ctx_desc_cfg is initialized in a single function instead of having pieces set ahead-of time by its caller. Signed-off-by: Michael Shavit Reviewed-by: Jason Gunthorpe Reviewed-by: Nicolin Chen --- (no changes since v1) drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index ded613aedbb0..fe4b19c3b8de 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1132,7 +1132,8 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, return 0; } -static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain) +static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain, + struct arm_smmu_master *master) { int ret; size_t l1size; @@ -1140,6 +1141,7 @@ static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain) struct arm_smmu_device *smmu = smmu_domain->smmu; struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->cd_table; + cdcfg->max_cds_bits = master->ssid_bits; max_contexts = 1 << cdcfg->max_cds_bits; if (!(smmu->features & ARM_SMMU_FEAT_2_LVL_CDTAB) || @@ -2107,7 +2109,6 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, int ret; u32 asid; struct arm_smmu_device *smmu = smmu_domain->smmu; - struct arm_smmu_ctx_desc_cfg *cd_table = &smmu_domain->cd_table; struct arm_smmu_ctx_desc *cd = &smmu_domain->cd; typeof(&pgtbl_cfg->arm_lpae_s1_cfg.tcr) tcr = &pgtbl_cfg->arm_lpae_s1_cfg.tcr; @@ -2120,11 +2121,9 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, if (ret) goto out_unlock; - cd_table->max_cds_bits = master->ssid_bits; - smmu_domain->stall_enabled = master->stall_enabled; - ret = arm_smmu_alloc_cd_tables(smmu_domain); + ret = arm_smmu_alloc_cd_tables(smmu_domain, master); if (ret) goto out_free_asid; From patchwork Wed Aug 2 16:32:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Shavit X-Patchwork-Id: 130002 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp611834vqx; Wed, 2 Aug 2023 10:24:29 -0700 (PDT) X-Google-Smtp-Source: APBJJlGvXREZ2sfBp6oTEZHBnwzhriy+ezJRaPSCVz7Y1rN9efjZXqz6x4nl8NPFBzCfN9UXpLEr X-Received: by 2002:a17:906:7489:b0:999:80cf:82fd with SMTP id e9-20020a170906748900b0099980cf82fdmr5234072ejl.18.1690997068906; Wed, 02 Aug 2023 10:24:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690997068; cv=none; d=google.com; s=arc-20160816; b=H6yqlhamm/yVZeFLzkdNI3TXzskcT0lDf6EkCADQJqQDDtKVYhEWsAzLYk0nK43wYG 3WLHt88V+rCUIu3IlGmurJehKUAdxBjRlnzN1L354icY/3SqmdNKy22nS/BrovrNIF7s yi//wRP43a2Ki41yIQMkNCudDSynPLjnYlCufCIdYd4ZW0agEnWCKfaySuHfqVDAZVmd NQp5WS7S6bOA58OV0I+SndBIaa8dN4u98zL6uP3V2HC9Di8ZrQypt/K1F31fcCIzwL7g 3Lags/nDEJWmyUOS5i8ncy53fPuxzNcw2WckKhsUSUQTTA3HcBWAahsZmFsLblzipuOF CShw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:dkim-signature; bh=JkSkXQKYJ56ysrmlEDQExeOLrrR+KHQKd0NE5Ad+0tQ=; fh=51loh+OS6vr0QdvTi7t7xEP2VSRDvSfeMVfkb8abBBs=; b=SitscMF9TQXCJFrkj89VeqPsyRWD4Eoc34t0xbPNoDA6S9gUJ9emuymY7vkgUj4PMx uQ8hvl+c7cCh9wn+jpENnXDGPisAp1RGSRhNE4m24nrlsXALnZxEz3rUwNUg+HWnpc88 IWE1V/jUASEPEgsmeG3QYyaWSTDBjJEF58QfwauClXkPjimHNS2UsdD6AwnY7BnJSzvn GkI2OEJ4e+nscdunKK2h59saN1ntjLCC7wKzid5zQ/Rz9yVrcVmHSLP7ByBwH4cy/jdS e49QXUPlrYY4Vh2LFAVzHZhsrbUX9jsxv923zk2pyor5epaBjHRkL9AjiJ2kUDtZoQM9 fxUA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b=Sx4NgzTX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id y5-20020a17090668c500b0098678728b52si10362068ejr.123.2023.08.02.10.24.01; Wed, 02 Aug 2023 10:24:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b=Sx4NgzTX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234196AbjHBQeU (ORCPT + 99 others); Wed, 2 Aug 2023 12:34:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38496 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233451AbjHBQeA (ORCPT ); Wed, 2 Aug 2023 12:34:00 -0400 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 914B02D69 for ; Wed, 2 Aug 2023 09:33:54 -0700 (PDT) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-56942442eb0so82268397b3.1 for ; Wed, 02 Aug 2023 09:33:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1690994033; x=1691598833; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=JkSkXQKYJ56ysrmlEDQExeOLrrR+KHQKd0NE5Ad+0tQ=; b=Sx4NgzTXcAqonwe3umZclUZGuCSTNOJdjHZfhQsHFzrrGgvIBu+PVtD/2bbThkc2kg O/sl/fsv5azhqF6rFWZaIoCHnP/dsGxMk80XJekswYjv3IYw+0unms2NiOxnWe9mtMed d+vYRYCK+LmW/8uHomdrDGzkjSrKkMZ98LCels1IDh735su3QiiRYMMiZPsdWP6xMEMn WhaPiXb3DC8n86HOkDb1expULa/KNgZQMmuevHGecWWfRrBbMHtE8vm19ZWUoU8x2a/c IlcM9zeUNhiB99UW7QV8MuCdv5p4/3k5j4PcrytWgqaoLwkYtmZLqLUYQ0ylGG3xlVub +rbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690994033; x=1691598833; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=JkSkXQKYJ56ysrmlEDQExeOLrrR+KHQKd0NE5Ad+0tQ=; b=Ro4d/KP8juiSQZhfOC1SIGbCCp2tMBvks29yhLItFhcKGgVfu5998poBkfEXzGt8Mu HqOGZSaoOo65dtBbT1ACQtNnql+CzKQPv7EhQpptivrSSip/GO9iuQQmk2AJ+SiBo5jP twcBMpKLldGN9loLC7IoGZLnr+dlFcGAwv+XExh1FbtGkPimpCiKAl8+J2sO0o/YCN4X H+UckRkybtgPvxr9as6AtEgeXgPjY/KqNR84/Dz6fwQHqJYCZKKvhEEIGGzt9hnBiqsV WOXMJpKisY4xTbQC1tg3w/A5FRByHVK0TXzTHSYt67zT9t8RiUruwt02txRAdfI66knE 0jBg== X-Gm-Message-State: ABy/qLarWTdQ2zaecT2sgrn+neDxkhqK0/Eks5wpEIQ/3C9ytYV6fxov 1qKWpDhfZjHk2TF5XOlUBYoR88u+rG7p X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:39d1:8774:b733:6210]) (user=mshavit job=sendgmr) by 2002:a25:48a:0:b0:d37:353:b7eb with SMTP id 132-20020a25048a000000b00d370353b7ebmr56014ybe.11.1690994033344; Wed, 02 Aug 2023 09:33:53 -0700 (PDT) Date: Thu, 3 Aug 2023 00:32:32 +0800 In-Reply-To: <20230802163328.2623773-1-mshavit@google.com> Mime-Version: 1.0 References: <20230802163328.2623773-1-mshavit@google.com> X-Mailer: git-send-email 2.41.0.585.gd2178a4bd4-goog Message-ID: <20230803003234.v4.4.I5aa89c849228794a64146cfe86df21fb71629384@changeid> Subject: [PATCH v4 4/8] iommu/arm-smmu-v3: move stall_enabled to the cd table From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: will@kernel.org, robin.murphy@arm.com, nicolinc@nvidia.com, jgg@nvidia.com, jean-philippe@linaro.org, Michael Shavit X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773138942643631047 X-GMAIL-MSGID: 1773138942643631047 This controls whether CD entries will have the stall bit set when writing entries into the table. Signed-off-by: Michael Shavit Reviewed-by: Jason Gunthorpe Reviewed-by: Nicolin Chen --- (no changes since v2) Changes in v2: - Use a bitfield instead of a bool for stall_enabled drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 8 ++++---- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 3 ++- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index fe4b19c3b8de..c01023404c26 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1114,7 +1114,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, FIELD_PREP(CTXDESC_CD_0_ASID, cd->asid) | CTXDESC_CD_0_V; - if (smmu_domain->stall_enabled) + if (smmu_domain->cd_table.stall_enabled) val |= CTXDESC_CD_0_S; } @@ -1141,6 +1141,7 @@ static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain, struct arm_smmu_device *smmu = smmu_domain->smmu; struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->cd_table; + cdcfg->stall_enabled = master->stall_enabled; cdcfg->max_cds_bits = master->ssid_bits; max_contexts = 1 << cdcfg->max_cds_bits; @@ -2121,8 +2122,6 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, if (ret) goto out_unlock; - smmu_domain->stall_enabled = master->stall_enabled; - ret = arm_smmu_alloc_cd_tables(smmu_domain, master); if (ret) goto out_free_asid; @@ -2461,7 +2460,8 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) ret = -EINVAL; goto out_unlock; } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1 && - smmu_domain->stall_enabled != master->stall_enabled) { + smmu_domain->cd_table.stall_enabled != + master->stall_enabled) { ret = -EINVAL; goto out_unlock; } diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 35a93e885887..05b1f0ee6080 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -597,6 +597,8 @@ struct arm_smmu_ctx_desc_cfg { unsigned int num_l1_ents; /* log2 of the maximum number of CDs supported by this table */ u8 max_cds_bits; + /* Whether CD entries in this table have the stall bit set. */ + u8 stall_enabled:1; }; struct arm_smmu_s2_cfg { @@ -714,7 +716,6 @@ struct arm_smmu_domain { struct mutex init_mutex; /* Protects smmu pointer */ struct io_pgtable_ops *pgtbl_ops; - bool stall_enabled; atomic_t nr_ats_masters; enum arm_smmu_domain_stage stage; From patchwork Wed Aug 2 16:32:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Shavit X-Patchwork-Id: 129999 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp610346vqx; Wed, 2 Aug 2023 10:21:50 -0700 (PDT) X-Google-Smtp-Source: APBJJlHAU+w4iRXBXMlhC/ETYG//dNOq5U1HgjIlW1GpRyao11zqZyij5PuNac5yJKmVVWC9m5UQ X-Received: by 2002:aa7:d94d:0:b0:522:38f9:e64e with SMTP id l13-20020aa7d94d000000b0052238f9e64emr6112600eds.1.1690996910172; Wed, 02 Aug 2023 10:21:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690996910; cv=none; d=google.com; s=arc-20160816; b=FLmOt+T4lHRxR17wYTLF8YBTkX48ZD/0J+3xQhTkynx/sugM5pMH2mTCOFe6QewtfZ 6Sx5JB+dQXZqW8dcRvVK9Weq5m93rrOlY803OJmQx5ehwJW/4oGsIFIBFRAgHNt4V1ZJ PuzC0XuskAeeHU0OvmR53F2EeA8V3Qw6T5QfOb6J90mUNnhs8TR4R6yP8uUMwjK8yXnm 5xd9Pj7Fd9X072NdiviTJRSgpQ2EFJeqMF9QuWDsTgbrU0Awu2EzVAoSm5L448cQ9UFQ Z6gBKsniulnRXRTD6qAkTl/i9SI183mc4xIoCACtF8CFfSEgBB9CFjJGFrJWkzjcVNhf R8Bg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:dkim-signature; bh=Nsrqxec2unoGbX9KQJr31nnyfTckBujoXSXq19+cQZI=; fh=51loh+OS6vr0QdvTi7t7xEP2VSRDvSfeMVfkb8abBBs=; b=Ya1th0RZRIfzOXtk4zPYTZx1nuIFgZFBzs+iEnKDkROppnWW8I74G5ZZhYpzYmlZkB 91/vSEMJO+Xd0yE6772fLwo9FP+EjJvdPdlLEhWzE0jShqh75Sev4WVybHMrZ07lSMJY zGqK8ij2FQUdFpLpDRgYVTS7zjMH2YGM4OP+ECMq4fjjcR27f3YPag1day4rI++JVIvC NpyCXJFBYDSI2r7D32OE+3kBC6Yd7o/ov5+ueMTAbXPhVEf4jg2rDXZbdpolg74+oNE9 20b8VLMqkx7rG8lEkdfk4NGQwpBMj/m+iXTVO9RjlJB/Q/TUXB3708ozIAXegOSpmius i86A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b=taFPg4Ct; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v21-20020aa7cd55000000b005223d10cc08si10693671edw.675.2023.08.02.10.21.22; Wed, 02 Aug 2023 10:21:50 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b=taFPg4Ct; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233822AbjHBQen (ORCPT + 99 others); Wed, 2 Aug 2023 12:34:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38916 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233796AbjHBQeM (ORCPT ); Wed, 2 Aug 2023 12:34:12 -0400 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 84BF82706 for ; Wed, 2 Aug 2023 09:33:59 -0700 (PDT) Received: by mail-yb1-xb49.google.com with SMTP id 3f1490d57ef6-c5fc972760eso4896276.1 for ; Wed, 02 Aug 2023 09:33:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1690994038; x=1691598838; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=Nsrqxec2unoGbX9KQJr31nnyfTckBujoXSXq19+cQZI=; b=taFPg4CtXS6wQkzNpsgzmsouWdIXqXLq8mdwTKz4sWNpCRb6E/eVmyTize8AOaZZ7p 8X9ZZYRU4ucutlE6Zw/olc2LiTrW9LagJHGu6A/COc0FCt3EtaddlnVFqWjXyQgvhBgQ EfrQQuumwOHTcmfRWI09mpGOXhxITl8DAVelGC2Ujx0K7Zh8SnwXMdIiK7aaA/XeVK3q slTafS5X3XUzTA0sgoMqjydf7aBreEe0/eGCuyLdCbfSlyvBF4HLkdpG1JoPG/KX+kzr bmvj3MgOAo8X4BK9kNRrwf1U7KJcx0oCrTBtkhCH1/Hhg2eu8A1/LXZXLfCp6h5vpYi8 PBEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690994038; x=1691598838; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=Nsrqxec2unoGbX9KQJr31nnyfTckBujoXSXq19+cQZI=; b=F6UkHvaVZyTNLeGgPbtOXuMbBs0Akgj4zwpPlfwLyI4qcJjLRVl65pETD7MI4d5RU0 0Sz6pUNkfTkOxYgiVmCC++UBSnqN7su4x8j1WVb9xW3ekJYHTJDPpZ1tdsQ2YOrAnCRL yj+1gRJunFP6vyz2dWt6F0f9Hnt+DHU5Jj+xUZv87GV7s1QKfyPm/fDEhTw4xWp7ccbj xg713xDMakYqe/ZRTEdSGafAvfCWl/6OLHQ2Go3IL6i4cIj6CB2hyhkgAAJNjuAAj4pT v2SSI5FyEnURuMgG4uABC5Vn3NYfO/buxtqsDT+zx5ohRaxAcMtikS0t2WVf2ahRd5ph oeGQ== X-Gm-Message-State: ABy/qLbOHLDlMQt2WxNfvovsm66/sWb0GtOuiAFghIRSfx1XuWb4X4Fj W1m9z4RGcKnch292kjk5ztmdm6rMIxLG X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:39d1:8774:b733:6210]) (user=mshavit job=sendgmr) by 2002:a25:ce47:0:b0:d20:7752:e384 with SMTP id x68-20020a25ce47000000b00d207752e384mr116092ybe.3.1690994038147; Wed, 02 Aug 2023 09:33:58 -0700 (PDT) Date: Thu, 3 Aug 2023 00:32:33 +0800 In-Reply-To: <20230802163328.2623773-1-mshavit@google.com> Mime-Version: 1.0 References: <20230802163328.2623773-1-mshavit@google.com> X-Mailer: git-send-email 2.41.0.585.gd2178a4bd4-goog Message-ID: <20230803003234.v4.5.I219054a6cf538df5bb22f4ada2d9933155d6058c@changeid> Subject: [PATCH v4 5/8] iommu/arm-smmu-v3: Refactor write_ctx_desc From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: will@kernel.org, robin.murphy@arm.com, nicolinc@nvidia.com, jgg@nvidia.com, jean-philippe@linaro.org, Michael Shavit X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773138776216180007 X-GMAIL-MSGID: 1773138776216180007 Update arm_smmu_write_ctx_desc and downstream functions to operate on a master instead of an smmu domain. We expect arm_smmu_write_ctx_desc() to only be called to write a CD entry into a CD table owned by the master. Under the hood, arm_smmu_write_ctx_desc still fetches the CD table from the domain that is attached to the master, but a subsequent commit will move that table's ownership to the master. Note that this change isn't a nop refactor since SVA will call arm_smmu_write_ctx_desc in a loop for every master the domain is attached to despite the fact that they all share the same CD table. This loop may look weird but becomes necessary when the CD table becomes per-master in a subsequent commit. Signed-off-by: Michael Shavit Reviewed-by: Jason Gunthorpe Reviewed-by: Nicolin Chen --- (no changes since v3) Changes in v3: - Add a helper to write a CD to all masters that a domain is attached to. - Fixed an issue where an arm_smmu_write_ctx_desc error return wasn't correctly handled by its caller. Changes in v2: - minor style fixes Changes in v1: - arm_smmu_write_ctx_desc now get's the CD table to write to from the master parameter instead of a distinct parameter. This works well because the CD table being written to should always be owned by the master by the end of this series. This version no longer allows master to be NULL. .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 31 +++++++++-- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 51 +++++++------------ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 +- 3 files changed, 46 insertions(+), 38 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c index 968559d625c4..e3992a0c1637 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -37,6 +37,24 @@ struct arm_smmu_bond { static DEFINE_MUTEX(sva_lock); +static int arm_smmu_write_ctx_desc_devices(struct arm_smmu_domain *smmu_domain, + int ssid, + struct arm_smmu_ctx_desc *cd) +{ + struct arm_smmu_master *master; + unsigned long flags; + int ret; + + spin_lock_irqsave(&smmu_domain->devices_lock, flags); + list_for_each_entry(master, &smmu_domain->devices, domain_head) { + ret = arm_smmu_write_ctx_desc(master, ssid, cd); + if (ret) + break; + } + spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); + return ret; +} + /* * Check if the CPU ASID is available on the SMMU side. If a private context * descriptor is using it, try to replace it. @@ -80,7 +98,7 @@ arm_smmu_share_asid(struct mm_struct *mm, u16 asid) * be some overlap between use of both ASIDs, until we invalidate the * TLB. */ - arm_smmu_write_ctx_desc(smmu_domain, 0, cd); + arm_smmu_write_ctx_desc_devices(smmu_domain, 0, cd); /* Invalidate TLB entries previously associated with that context */ arm_smmu_tlb_inv_asid(smmu, asid); @@ -222,7 +240,7 @@ static void arm_smmu_mm_release(struct mmu_notifier *mn, struct mm_struct *mm) * DMA may still be running. Keep the cd valid to avoid C_BAD_CD events, * but disable translation. */ - arm_smmu_write_ctx_desc(smmu_domain, mm->pasid, &quiet_cd); + arm_smmu_write_ctx_desc_devices(smmu_domain, mm->pasid, &quiet_cd); arm_smmu_tlb_inv_asid(smmu_domain->smmu, smmu_mn->cd->asid); arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, 0, 0); @@ -279,9 +297,11 @@ arm_smmu_mmu_notifier_get(struct arm_smmu_domain *smmu_domain, goto err_free_cd; } - ret = arm_smmu_write_ctx_desc(smmu_domain, mm->pasid, cd); - if (ret) + ret = arm_smmu_write_ctx_desc_devices(smmu_domain, mm->pasid, cd); + if (ret) { + arm_smmu_write_ctx_desc_devices(smmu_domain, mm->pasid, NULL); goto err_put_notifier; + } list_add(&smmu_mn->list, &smmu_domain->mmu_notifiers); return smmu_mn; @@ -304,7 +324,8 @@ static void arm_smmu_mmu_notifier_put(struct arm_smmu_mmu_notifier *smmu_mn) return; list_del(&smmu_mn->list); - arm_smmu_write_ctx_desc(smmu_domain, mm->pasid, NULL); + + arm_smmu_write_ctx_desc_devices(smmu_domain, mm->pasid, NULL); /* * If we went through clear(), we've already invalidated, and no diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index c01023404c26..34bd7815aeb8 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -971,14 +971,12 @@ void arm_smmu_tlb_inv_asid(struct arm_smmu_device *smmu, u16 asid) arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd); } -static void arm_smmu_sync_cd(struct arm_smmu_domain *smmu_domain, +static void arm_smmu_sync_cd(struct arm_smmu_master *master, int ssid, bool leaf) { size_t i; - unsigned long flags; - struct arm_smmu_master *master; struct arm_smmu_cmdq_batch cmds; - struct arm_smmu_device *smmu = smmu_domain->smmu; + struct arm_smmu_device *smmu = master->smmu; struct arm_smmu_cmdq_ent cmd = { .opcode = CMDQ_OP_CFGI_CD, .cfgi = { @@ -988,15 +986,10 @@ static void arm_smmu_sync_cd(struct arm_smmu_domain *smmu_domain, }; cmds.num = 0; - - spin_lock_irqsave(&smmu_domain->devices_lock, flags); - list_for_each_entry(master, &smmu_domain->devices, domain_head) { - for (i = 0; i < master->num_streams; i++) { - cmd.cfgi.sid = master->streams[i].id; - arm_smmu_cmdq_batch_add(smmu, &cmds, &cmd); - } + for (i = 0; i < master->num_streams; i++) { + cmd.cfgi.sid = master->streams[i].id; + arm_smmu_cmdq_batch_add(smmu, &cmds, &cmd); } - spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); arm_smmu_cmdq_batch_submit(smmu, &cmds); } @@ -1026,14 +1019,13 @@ static void arm_smmu_write_cd_l1_desc(__le64 *dst, WRITE_ONCE(*dst, cpu_to_le64(val)); } -static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_domain *smmu_domain, - u32 ssid) +static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_master *master, u32 ssid) { __le64 *l1ptr; unsigned int idx; struct arm_smmu_l1_ctx_desc *l1_desc; - struct arm_smmu_device *smmu = smmu_domain->smmu; - struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->cd_table; + struct arm_smmu_device *smmu = master->smmu; + struct arm_smmu_ctx_desc_cfg *cdcfg = &master->domain->cd_table; if (!cdcfg->l1_desc) return cdcfg->cdtab + ssid * CTXDESC_CD_DWORDS; @@ -1047,13 +1039,13 @@ static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_domain *smmu_domain, l1ptr = cdcfg->cdtab + idx * CTXDESC_L1_DESC_DWORDS; arm_smmu_write_cd_l1_desc(l1ptr, l1_desc); /* An invalid L1CD can be cached */ - arm_smmu_sync_cd(smmu_domain, ssid, false); + arm_smmu_sync_cd(master, ssid, false); } idx = ssid & (CTXDESC_L2_ENTRIES - 1); return l1_desc->l2ptr + idx * CTXDESC_CD_DWORDS; } -int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, +int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid, struct arm_smmu_ctx_desc *cd) { /* @@ -1070,11 +1062,12 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, u64 val; bool cd_live; __le64 *cdptr; + struct arm_smmu_ctx_desc_cfg *cd_table = &master->domain->cd_table; - if (WARN_ON(ssid >= (1 << smmu_domain->cd_table.max_cds_bits))) + if (WARN_ON(ssid >= (1 << cd_table->max_cds_bits))) return -E2BIG; - cdptr = arm_smmu_get_cd_ptr(smmu_domain, ssid); + cdptr = arm_smmu_get_cd_ptr(master, ssid); if (!cdptr) return -ENOMEM; @@ -1102,7 +1095,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, * order. Ensure that it observes valid values before reading * V=1. */ - arm_smmu_sync_cd(smmu_domain, ssid, true); + arm_smmu_sync_cd(master, ssid, true); val = cd->tcr | #ifdef __BIG_ENDIAN @@ -1114,7 +1107,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, FIELD_PREP(CTXDESC_CD_0_ASID, cd->asid) | CTXDESC_CD_0_V; - if (smmu_domain->cd_table.stall_enabled) + if (cd_table->stall_enabled) val |= CTXDESC_CD_0_S; } @@ -1128,7 +1121,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, * without first making the structure invalid. */ WRITE_ONCE(cdptr[0], cpu_to_le64(val)); - arm_smmu_sync_cd(smmu_domain, ssid, true); + arm_smmu_sync_cd(master, ssid, true); return 0; } @@ -1138,7 +1131,7 @@ static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain, int ret; size_t l1size; size_t max_contexts; - struct arm_smmu_device *smmu = smmu_domain->smmu; + struct arm_smmu_device *smmu = master->smmu; struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->cd_table; cdcfg->stall_enabled = master->stall_enabled; @@ -2137,12 +2130,7 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, CTXDESC_CD_0_TCR_EPD1 | CTXDESC_CD_0_AA64; cd->mair = pgtbl_cfg->arm_lpae_s1_cfg.mair; - /* - * Note that this will end up calling arm_smmu_sync_cd() before - * the master has been added to the devices list for this domain. - * This isn't an issue because the STE hasn't been installed yet. - */ - ret = arm_smmu_write_ctx_desc(smmu_domain, 0, cd); + ret = arm_smmu_write_ctx_desc(master, 0, cd); if (ret) goto out_free_cd_tables; @@ -2460,8 +2448,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) ret = -EINVAL; goto out_unlock; } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1 && - smmu_domain->cd_table.stall_enabled != - master->stall_enabled) { + smmu_domain->cd_table.stall_enabled != master->stall_enabled) { ret = -EINVAL; goto out_unlock; } diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 05b1f0ee6080..6066a09c0199 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -744,7 +744,7 @@ extern struct xarray arm_smmu_asid_xa; extern struct mutex arm_smmu_asid_lock; extern struct arm_smmu_ctx_desc quiet_cd; -int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, +int arm_smmu_write_ctx_desc(struct arm_smmu_master *smmu_master, int ssid, struct arm_smmu_ctx_desc *cd); void arm_smmu_tlb_inv_asid(struct arm_smmu_device *smmu, u16 asid); void arm_smmu_tlb_inv_range_asid(unsigned long iova, size_t size, int asid, From patchwork Wed Aug 2 16:32:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Shavit X-Patchwork-Id: 129992 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp598199vqx; Wed, 2 Aug 2023 10:03:24 -0700 (PDT) X-Google-Smtp-Source: APBJJlEbrtGD9d7pBvV3/PGIzGp8IsfGi+12mXMNsoEPMm5Cf1Dq0IP8lP+PYK8lcYe5Coeb8A24 X-Received: by 2002:a05:6a00:218d:b0:63d:3339:e967 with SMTP id h13-20020a056a00218d00b0063d3339e967mr15686828pfi.19.1690995803956; Wed, 02 Aug 2023 10:03:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690995803; cv=none; d=google.com; s=arc-20160816; b=NtrQ/0ZMIkRUgKMqPdt8YK+LliXDCfunT9OvKpFt143KgCg0bS1iTE6ALzxwFGbXL6 Poe5qOZt45+9Vl0r33VU37S9HK3UqK/rUqpE0sUt16j8NHNStr+JkMyHO744cpKBNGad PeVBSSRh/KZGH3vYwN0FlzIyW2/YDrubze6akJvDZm3A9Qp9F6GPfFqDgIPprVwK1sJ1 L5qY6F0KxRAQ4DuhRV7Hi0u9LVjNRcAU+YOn2yEZV1bdgs+eh7agDMHYaTtnIpp37J7m OjeuNUSG8eCeli8N7EN0P2H9mn0Iu6RsTbCcoWOU57O9V2IK9PW4+bXrmIHBUb2uaz9k 0fOQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:dkim-signature; bh=CzAFxyJDXJsx0hZ+hbsCVkJECtcH8fWndodY3u5zpmw=; fh=51loh+OS6vr0QdvTi7t7xEP2VSRDvSfeMVfkb8abBBs=; b=J30b9UXFfbf4rH1CEvjtfYNsYquDWoPk4r9q6r0ON74PnsOFMO+u2LZWZgPBXGVXad DiDBGyxBka1pw4sJo76xY5C07wZ4nMyZUFzK1wmGhpxhG/V7V2tmeJOmCZSYYfB/k06G UC7fU4C28UK8/QL8MCvHVZ9Rpme5NJLxPQESO0xYg2OyBWwwkDkHXmx80pRwHVsUwmuD yKRDAK124d68UYx9j1Ho4nrTCgy32VJCSjx98AGO564qpZoLpgh0dfe9uAQPRaIgqLsk 2WGh/EfPBBlR1B6FzeLnMvLutXCnImLAJafbhsLf8wI8UT+kcJq+7ZDWmaq954nQoelt 6OEQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b=cEDNdOI8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z33-20020a056a001da100b006870878c6dbsi2116299pfw.191.2023.08.02.10.02.56; Wed, 02 Aug 2023 10:03:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b=cEDNdOI8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233005AbjHBQew (ORCPT + 99 others); Wed, 2 Aug 2023 12:34:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234097AbjHBQeU (ORCPT ); Wed, 2 Aug 2023 12:34:20 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 11D60358B for ; Wed, 2 Aug 2023 09:34:03 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-d1d9814b89fso16117276.0 for ; Wed, 02 Aug 2023 09:34:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1690994043; x=1691598843; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=CzAFxyJDXJsx0hZ+hbsCVkJECtcH8fWndodY3u5zpmw=; b=cEDNdOI8JNpc2QWjId+mul5PAIF12jDtATLJGhmIRCTsPeUo6cGzEcWxs46simEVZ2 HK7L8OdNkwNNAh9A/cMVFKC5hH+qISXl5IWtI5ueMmqEP+1Zi9tR2zeF8I/CEoxcsX1L 3v1z8gGpNg9SUYBA7DNdYXx4v7DHN5lh4v7e60ZaGaVCpm2/Pta6lB6QlYmzFnzkpMFF 26oNUBPAI5nbvLD9kfWhKyX6SsUHv3sbf2a4MjbTlV3F+CdUWI/waDwa3bnTkU4qSbnC 6yvAv7E76YYabnZSzVEBTQHSdN7tmcu2ofH4fFb9fk/7gHn0Kj41CpycgMjrYrZvo4Bw V1ZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690994043; x=1691598843; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=CzAFxyJDXJsx0hZ+hbsCVkJECtcH8fWndodY3u5zpmw=; b=QGsE6dwbrduj/IFUqVV68EeLBKgTnop1imQCXMx2+RGpQ2n4Hph1p2i7WJvaU/h+fl Lw0i4Jomzhq/YKA8sG90X3oXJyQVxRe3cPh0YVvPhf9sLZyh1s/6mlLGzCbVnzm9Hv5k D/U5PmodnXV7ndLolbQBUO0zZZFSo0NDVr8gWGcUD3PVBMSr56G/poVa0zkGbyPdFr8U Iyu46y+TOxB4DAYTs8dbnrxqBbaH2BlRqmL34v+ltkdhayLB1NkwG1APSPZivggj9RyR aAO+AZ/TpsWwBsAP4XPSQL1su9S3KBlze/BXN7q376LiVDcCd2BRvC47uWtiDDzn+ENj b3aQ== X-Gm-Message-State: ABy/qLZCcDkXKmALAgGsrP8cgwMwndqMDZJcQ0/04A7LS9qaSz6dqd29 qxDprXvxZUBxfeEFsKJ/Tr/msHcsdZY+ X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:39d1:8774:b733:6210]) (user=mshavit job=sendgmr) by 2002:a25:2311:0:b0:d07:e80c:412e with SMTP id j17-20020a252311000000b00d07e80c412emr111717ybj.12.1690994043019; Wed, 02 Aug 2023 09:34:03 -0700 (PDT) Date: Thu, 3 Aug 2023 00:32:34 +0800 In-Reply-To: <20230802163328.2623773-1-mshavit@google.com> Mime-Version: 1.0 References: <20230802163328.2623773-1-mshavit@google.com> X-Mailer: git-send-email 2.41.0.585.gd2178a4bd4-goog Message-ID: <20230803003234.v4.6.Ice063dcf87d1b777a72e008d9e3406d2bcf6d876@changeid> Subject: [PATCH v4 6/8] iommu/arm-smmu-v3: Move CD table to arm_smmu_master From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: will@kernel.org, robin.murphy@arm.com, nicolinc@nvidia.com, jgg@nvidia.com, jean-philippe@linaro.org, Michael Shavit X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773137616047682034 X-GMAIL-MSGID: 1773137616047682034 With this change, each master will now own its own CD table instead of sharing one with other masters attached to the same domain. Attaching a stage 1 domain installs CD entries into the master's CD table. SVA writes its CD entries into each master's CD table if the domain is shared across masters. Signed-off-by: Michael Shavit Reviewed-by: Jason Gunthorpe --- Changes in v4: - Added comment about the cd_table's dependency on the iommu core's group mutex. - Narrowed the range of code for which the domain's init_mutex is held on attach since it now only protects the arm_smmu_domain_finalise call. Changes in v2: - Allocate CD table when it's first needed instead of on probe. Changes in v1: - The master's CD table allocation was previously split to a different commit. This change now atomically allocates the new CD table, uses it, and removes the old one. drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 82 +++++++++------------ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 7 +- 2 files changed, 39 insertions(+), 50 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 34bd7815aeb8..e2c33024ad85 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1025,7 +1025,7 @@ static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_master *master, u32 ssid) unsigned int idx; struct arm_smmu_l1_ctx_desc *l1_desc; struct arm_smmu_device *smmu = master->smmu; - struct arm_smmu_ctx_desc_cfg *cdcfg = &master->domain->cd_table; + struct arm_smmu_ctx_desc_cfg *cdcfg = &master->cd_table; if (!cdcfg->l1_desc) return cdcfg->cdtab + ssid * CTXDESC_CD_DWORDS; @@ -1062,7 +1062,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid, u64 val; bool cd_live; __le64 *cdptr; - struct arm_smmu_ctx_desc_cfg *cd_table = &master->domain->cd_table; + struct arm_smmu_ctx_desc_cfg *cd_table = &master->cd_table; if (WARN_ON(ssid >= (1 << cd_table->max_cds_bits))) return -E2BIG; @@ -1125,14 +1125,13 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid, return 0; } -static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain, - struct arm_smmu_master *master) +static int arm_smmu_alloc_cd_tables(struct arm_smmu_master *master) { int ret; size_t l1size; size_t max_contexts; struct arm_smmu_device *smmu = master->smmu; - struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->cd_table; + struct arm_smmu_ctx_desc_cfg *cdcfg = &master->cd_table; cdcfg->stall_enabled = master->stall_enabled; cdcfg->max_cds_bits = master->ssid_bits; @@ -1174,12 +1173,12 @@ static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain, return ret; } -static void arm_smmu_free_cd_tables(struct arm_smmu_domain *smmu_domain) +static void arm_smmu_free_cd_tables(struct arm_smmu_master *master) { int i; size_t size, l1size; - struct arm_smmu_device *smmu = smmu_domain->smmu; - struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->cd_table; + struct arm_smmu_device *smmu = master->smmu; + struct arm_smmu_ctx_desc_cfg *cdcfg = &master->cd_table; if (cdcfg->l1_desc) { size = CTXDESC_L2_ENTRIES * (CTXDESC_CD_DWORDS << 3); @@ -1287,7 +1286,7 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, if (smmu_domain) { switch (smmu_domain->stage) { case ARM_SMMU_DOMAIN_S1: - cd_table = &smmu_domain->cd_table; + cd_table = &master->cd_table; break; case ARM_SMMU_DOMAIN_S2: case ARM_SMMU_DOMAIN_NESTED: @@ -2077,14 +2076,10 @@ static void arm_smmu_domain_free(struct iommu_domain *domain) free_io_pgtable_ops(smmu_domain->pgtbl_ops); - /* Free the CD and ASID, if we allocated them */ + /* Free the ASID or VMID */ if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { - struct arm_smmu_ctx_desc_cfg *cd_table = &smmu_domain->cd_table; - /* Prevent SVA from touching the CD while we're freeing it */ mutex_lock(&arm_smmu_asid_lock); - if (cd_table->cdtab) - arm_smmu_free_cd_tables(smmu_domain); arm_smmu_free_asid(&smmu_domain->cd); mutex_unlock(&arm_smmu_asid_lock); } else { @@ -2096,7 +2091,7 @@ static void arm_smmu_domain_free(struct iommu_domain *domain) kfree(smmu_domain); } -static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, +static int arm_smmu_domain_finalise_cd(struct arm_smmu_domain *smmu_domain, struct arm_smmu_master *master, struct io_pgtable_cfg *pgtbl_cfg) { @@ -2115,10 +2110,6 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, if (ret) goto out_unlock; - ret = arm_smmu_alloc_cd_tables(smmu_domain, master); - if (ret) - goto out_free_asid; - cd->asid = (u16)asid; cd->ttbr = pgtbl_cfg->arm_lpae_s1_cfg.ttbr; cd->tcr = FIELD_PREP(CTXDESC_CD_0_TCR_T0SZ, tcr->tsz) | @@ -2130,17 +2121,9 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, CTXDESC_CD_0_TCR_EPD1 | CTXDESC_CD_0_AA64; cd->mair = pgtbl_cfg->arm_lpae_s1_cfg.mair; - ret = arm_smmu_write_ctx_desc(master, 0, cd); - if (ret) - goto out_free_cd_tables; - mutex_unlock(&arm_smmu_asid_lock); return 0; -out_free_cd_tables: - arm_smmu_free_cd_tables(smmu_domain); -out_free_asid: - arm_smmu_free_asid(cd); out_unlock: mutex_unlock(&arm_smmu_asid_lock); return ret; @@ -2203,7 +2186,7 @@ static int arm_smmu_domain_finalise(struct iommu_domain *domain, ias = min_t(unsigned long, ias, VA_BITS); oas = smmu->ias; fmt = ARM_64_LPAE_S1; - finalise_stage_fn = arm_smmu_domain_finalise_s1; + finalise_stage_fn = arm_smmu_domain_finalise_cd; break; case ARM_SMMU_DOMAIN_NESTED: case ARM_SMMU_DOMAIN_S2: @@ -2436,22 +2419,14 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) if (!smmu_domain->smmu) { smmu_domain->smmu = smmu; ret = arm_smmu_domain_finalise(domain, master); - if (ret) { + if (ret) smmu_domain->smmu = NULL; - goto out_unlock; - } - } else if (smmu_domain->smmu != smmu) { + } else if (smmu_domain->smmu != smmu) ret = -EINVAL; - goto out_unlock; - } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1 && - master->ssid_bits != smmu_domain->cd_table.max_cds_bits) { - ret = -EINVAL; - goto out_unlock; - } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1 && - smmu_domain->cd_table.stall_enabled != master->stall_enabled) { - ret = -EINVAL; - goto out_unlock; - } + + mutex_unlock(&smmu_domain->init_mutex); + if (ret) + return ret; master->domain = smmu_domain; @@ -2465,6 +2440,22 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) if (smmu_domain->stage != ARM_SMMU_DOMAIN_BYPASS) master->ats_enabled = arm_smmu_ats_supported(master); + if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { + if (!master->cd_table.cdtab) { + ret = arm_smmu_alloc_cd_tables(master); + if (ret) { + master->domain = NULL; + return ret; + } + } + + ret = arm_smmu_write_ctx_desc(master, 0, &smmu_domain->cd); + if (ret) { + master->domain = NULL; + return ret; + } + } + arm_smmu_install_ste_for_dev(master); spin_lock_irqsave(&smmu_domain->devices_lock, flags); @@ -2472,10 +2463,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); arm_smmu_enable_ats(master); - -out_unlock: - mutex_unlock(&smmu_domain->init_mutex); - return ret; + return 0; } static int arm_smmu_map_pages(struct iommu_domain *domain, unsigned long iova, @@ -2719,6 +2707,8 @@ static void arm_smmu_release_device(struct device *dev) arm_smmu_detach_dev(master); arm_smmu_disable_pasid(master); arm_smmu_remove_master(master); + if (master->cd_table.cdtab_dma) + arm_smmu_free_cd_tables(master); kfree(master); } diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 6066a09c0199..1f3b37025777 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -694,6 +694,8 @@ struct arm_smmu_master { struct arm_smmu_domain *domain; struct list_head domain_head; struct arm_smmu_stream *streams; + /* Locked by the iommu core using the group mutex */ + struct arm_smmu_ctx_desc_cfg cd_table; unsigned int num_streams; bool ats_enabled; bool stall_enabled; @@ -720,11 +722,8 @@ struct arm_smmu_domain { enum arm_smmu_domain_stage stage; union { - struct { struct arm_smmu_ctx_desc cd; - struct arm_smmu_ctx_desc_cfg cd_table; - }; - struct arm_smmu_s2_cfg s2_cfg; + struct arm_smmu_s2_cfg s2_cfg; }; struct iommu_domain domain; From patchwork Wed Aug 2 16:32:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Shavit X-Patchwork-Id: 129995 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp599265vqx; Wed, 2 Aug 2023 10:04:51 -0700 (PDT) X-Google-Smtp-Source: APBJJlFRKj3CBzWwOIWDpw8Nng74mtmmijaUFTW5UBrERbZ2WauvF77SgnpdhTJGG52Pm2jENJyQ X-Received: by 2002:a05:6a00:22d3:b0:687:536a:2e5b with SMTP id f19-20020a056a0022d300b00687536a2e5bmr5937430pfj.26.1690995890791; Wed, 02 Aug 2023 10:04:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690995890; cv=none; d=google.com; s=arc-20160816; b=yaoP4stYsJVnFnC0KV3aGHDv1QCdOJ3jBUohKDLO4htX+Pfxe+q0qZawwNfrX1tnCb TqB4ozRaQtXEDCCI4i09iL+q/gKQeHWaGyl/TlpLeajLRRaPdVNRIESR4U2AK4FCAc8o 56VAMcrQAvrRvJGydQx1Gg3RdiyPdFBcyzw0U97nf02YdraOz+OAP5BrgY+jnkWIsJ3p A4EqeecJPA7zobIW+MUevi6Vuss8NP2Qgs6c4VePgR324Az6zou2+fiFQap/HNajZymZ 2zn4atwmQy8TXaRsAXpgb0kqcfXue5BnbJEfJkQRkDyNuXYJ0fF2YaGvR/DzOC/6QbbP 5OhA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:dkim-signature; bh=yNDoyQCVv3of8CbzD7UrBZ/J064WuiNsrQAu+4gPoJw=; fh=51loh+OS6vr0QdvTi7t7xEP2VSRDvSfeMVfkb8abBBs=; b=m0G1+B9x2+Zg0HecT+Xr0x5zFAjuTPMdorcZXfmf22qTagWYLdL8TFLOd4HiufMgtU V2pKpfYkp6AgFERMrrck7veRnarw6jJr3T8sznKjkcD3SHoHakgeHpRoFtmsU6u54lG7 6OWVrvTY81noe1nSjEMX3KCrYiTSd0MiqmDDGYxWZnRCxhU7GOkMrW1EgZGVcrrUMCC+ SGQGopTlz+gKNq7Grh60Ae1ykwvqxWOhN+KRaHzFQlUm0gyBlqCCGoIVxin2N1xctb4/ 0pZQtq55lBj/UlVvdCXlkBpHQ5r3/7I0uzt6yQQrbl2n1s0aXH9O/sFKdUcFYkex5c/u 92lA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b="COmmzr/Z"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id cw5-20020a056a00450500b006870b9bddbdsi9511481pfb.62.2023.08.02.10.04.20; Wed, 02 Aug 2023 10:04:50 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b="COmmzr/Z"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232466AbjHBQe7 (ORCPT + 99 others); Wed, 2 Aug 2023 12:34:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38906 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232777AbjHBQee (ORCPT ); Wed, 2 Aug 2023 12:34:34 -0400 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ADF4D35BC for ; Wed, 2 Aug 2023 09:34:08 -0700 (PDT) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-584126c65d1so82150427b3.3 for ; Wed, 02 Aug 2023 09:34:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1690994047; x=1691598847; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=yNDoyQCVv3of8CbzD7UrBZ/J064WuiNsrQAu+4gPoJw=; b=COmmzr/ZrzYU67GXsaAkeCXcFTbuJ4N8bt6e/ulY4MJB1st5jFNkRFhT/96mRMHlz+ nDJ0CKW6+HGNxd2G2NDaa+3+cbydrawx8InWmB8xrO4E/yMJBV42TKmhqE/Ydulfwzbc 5f7EkEk6lU0H1/tArBx2LsVPEdl45hoKc0tDzDQTGPcORkHWZw3ESp1OUVk4MGPkpZ17 xuz4LlVY+3IgMv9G21YFJ66iibwnU+0jp2Le7P3y3olqcOEoYLoh/sWwhQ/C5wY0w5wu reRZS2ocDr1HijC+xabhRJy5L71w9aKwcLgE52nPKM9ig6A8G87EtLRFx5j9s10DvhTM OdFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690994047; x=1691598847; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=yNDoyQCVv3of8CbzD7UrBZ/J064WuiNsrQAu+4gPoJw=; b=UTc7Cg6K6ZfbdgahMpoPFJ6gSe5ubb0PlaMUDqXUu5wWExOT8sSU8hEU6KM9Pzhoyu n8hbV3hyUF429doxR3xdSRVXyqJbMMpZ1unfszvPRv7+cLY8LsLWWFcXogljhW1pHu1+ FoVBameCtWm6DLe7oFvWIgWAcc5GYezMJHcmMzaCXpAm0QhakWZGFMYzgukbnRVufcQH w+S0PFQ2tKWEcRIqTxw4dj4b0FfefFU+E01g870pgiKyTDKyTF7ChjnWXD/dUsdLg3pD 0yokhsOFhKfeTTITJ9zDKyRkzrUG9VyCW3veyHOrcREooJUa5TQuV+BTph3l7Toi0Iuy aP7w== X-Gm-Message-State: ABy/qLY99Ogesb9e4wyLmfptt1Z9iKS3qHG9GPo1Su0elD1weroFbrdo n7keGZ0HTWmCCBOWvOBtgymY10B77R01 X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:39d1:8774:b733:6210]) (user=mshavit job=sendgmr) by 2002:a05:6902:160e:b0:d09:6ba9:69ec with SMTP id bw14-20020a056902160e00b00d096ba969ecmr129159ybb.4.1690994047546; Wed, 02 Aug 2023 09:34:07 -0700 (PDT) Date: Thu, 3 Aug 2023 00:32:35 +0800 In-Reply-To: <20230802163328.2623773-1-mshavit@google.com> Mime-Version: 1.0 References: <20230802163328.2623773-1-mshavit@google.com> X-Mailer: git-send-email 2.41.0.585.gd2178a4bd4-goog Message-ID: <20230803003234.v4.7.Idedc0f496231e2faab3df057219c5e2d937bbfe4@changeid> Subject: [PATCH v4 7/8] iommu/arm-smmu-v3: Skip cd sync if CD table isn't active From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: will@kernel.org, robin.murphy@arm.com, nicolinc@nvidia.com, jgg@nvidia.com, jean-philippe@linaro.org, Michael Shavit X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773137707436833181 X-GMAIL-MSGID: 1773137707436833181 This commit explicitly keeps track of whether a CD table is installed in an STE so that arm_smmu_sync_cd can skip the sync when unnecessary. This was previously achieved through the domain->devices list, but we are moving to a model where arm_smmu_sync_cd directly operates on a master and the master's CD table instead of a domain. Signed-off-by: Michael Shavit Reviewed-by: Jason Gunthorpe Reviewed-by: Nicolin Chen --- (no changes since v3) Changes in v3: - Flip the cd_table.installed bit back off when table is detached - re-order the commit later in the series since flipping the installed bit to off isn't obvious when the cd_table is still shared by multiple masters. Changes in v2: - Store field as a bit instead of a bool. Fix comment about STE being live before the sync in write_ctx_desc(). drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 8 +++++++- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 ++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index e2c33024ad85..00b602ae9636 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -985,6 +985,9 @@ static void arm_smmu_sync_cd(struct arm_smmu_master *master, }, }; + if (!master->cd_table.installed) + return; + cmds.num = 0; for (i = 0; i < master->num_streams; i++) { cmd.cfgi.sid = master->streams[i].id; @@ -1091,7 +1094,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid, cdptr[3] = cpu_to_le64(cd->mair); /* - * STE is live, and the SMMU might read dwords of this CD in any + * STE may be live, and the SMMU might read dwords of this CD in any * order. Ensure that it observes valid values before reading * V=1. */ @@ -1360,6 +1363,9 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, cd_table->l1_desc ? STRTAB_STE_0_S1FMT_64K_L2 : STRTAB_STE_0_S1FMT_LINEAR); + cd_table->installed = true; + } else { + master->cd_table.installed = false; } if (s2_cfg) { diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 1f3b37025777..e76452e735a0 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -599,6 +599,8 @@ struct arm_smmu_ctx_desc_cfg { u8 max_cds_bits; /* Whether CD entries in this table have the stall bit set. */ u8 stall_enabled:1; + /* Whether this CD table is installed in any STE */ + u8 installed:1; }; struct arm_smmu_s2_cfg { From patchwork Wed Aug 2 16:32:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Shavit X-Patchwork-Id: 129994 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp598820vqx; Wed, 2 Aug 2023 10:04:13 -0700 (PDT) X-Google-Smtp-Source: APBJJlFCnv0Ezcf/xVR5bjFKZzCF9pA7XAd8P6z5Afg38E9cSzrkc7ZNEpXW2GSzG8/6bZIXS9CD X-Received: by 2002:ac2:47f7:0:b0:4fd:c84f:30d4 with SMTP id b23-20020ac247f7000000b004fdc84f30d4mr4902250lfp.36.1690995832278; Wed, 02 Aug 2023 10:03:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690995832; cv=none; d=google.com; s=arc-20160816; b=x0X8IYtwOw2kQuyCT0aD8bjPydG/SMqZjmaPn1+z6/BG+jCSvqtkBv3eEcCYqJgxv9 UWhFAgSJ0IsQz+rRhjFBpu920DqtlgKw+bsWRNznvgZ4tUyEZMB3EHqmhuu28lRrod+6 f+8eDrMP5CvSCGLj25W3L+ZI1Ut/P1DTgWzHhxnzpH523FW1/yfs43Mkh7Ogbu1lOUdp Aab3bR9GKAw/33emYmvPnAeIefqSQ/S8ffPNPa1y1Fo4VlZwA4Xd4Vntt5N4000benqf OQ7ouupg4o+7iJ9gt6Rp+Xv1Ed6SVzWFaIDlzMEqb1Isj7lt8Xeq8bVB5Off7D4X+y+8 +auw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:dkim-signature; bh=SX+2RilXbghvKGSDcU4l4pSTUg8nkB5V07mKjGHD9zU=; fh=51loh+OS6vr0QdvTi7t7xEP2VSRDvSfeMVfkb8abBBs=; b=xLVLPwSGrPy+eNnZBMz1XUoA/lNaWd8Y+Oeq3Yjggwfcud5Nliz43mNPMXXT6smsUC LKD+v37Q5b6dajCl17sQJhWVqsi0Hlds8HmxfmNUnro2p3X84uZqEH/e4V59C0h3drYF yTHABoa8j7Q3FtePzoGc3Hw33ISO8kB+2f3dPUVPe6Kmv90ZD+7exmsR/8uiLTO9DAI8 n28nh4f6ujFYGIOD8t8KHOPwCe4y2G2qiXpnt4r/ArLEgznCSJxYjJW2AzAyKuSAVZkp 3L7eekFovgnYgUII8zk2Ir3b2HKx3xjM3EtmIfDbi4q4Ry5adFdQ7YtvAvaEytphBbEg sDhg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b="fmu/wq+j"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id r23-20020a056402035700b005221e4af120si7472268edw.84.2023.08.02.10.03.13; Wed, 02 Aug 2023 10:03:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b="fmu/wq+j"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234403AbjHBQfG (ORCPT + 99 others); Wed, 2 Aug 2023 12:35:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39786 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233883AbjHBQeo (ORCPT ); Wed, 2 Aug 2023 12:34:44 -0400 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 24F2E2D61 for ; Wed, 2 Aug 2023 09:34:13 -0700 (PDT) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-583a89cccf6so64602467b3.1 for ; Wed, 02 Aug 2023 09:34:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1690994051; x=1691598851; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=SX+2RilXbghvKGSDcU4l4pSTUg8nkB5V07mKjGHD9zU=; b=fmu/wq+j9XJamWtxak49+VY4i4wA2bpndlx+SuvJLUzuyQMgduoha1xv5yDw7EjQmH hYwFC5Dp3ghD80jI55zMLNMB300EShX/vDYkeOuVlO+tWwRzAL0G8vPFXjxcoJvx90Nw +oDyX1su5nDPZPhGL4RondzIp9Rpb0Np2iOgsBBcV8RZSQVg+cn33X3Hhw/noDCPo0Sd pGvmMrQvN9ULN4OBjNPxWoErEXF7uRE1GSrkkoM14g7hSbJl7ABYgIHvjjnbe9KXNmwA 6pZ/zqPfh8eUhUH0SPxSKkpMGTMURuUb48mxPoXxPo4feGyHztBWBWZPYNw0sV2TOVhR 3MAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690994051; x=1691598851; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=SX+2RilXbghvKGSDcU4l4pSTUg8nkB5V07mKjGHD9zU=; b=lKCqO7suIdvrjyHB1hgSWPwDHA0K4PYP9SvHxrYi7bgF8kj6HvD4ade/6/2MYZv1nb beN7h0ic2iiO2LE2Gw6ZQ9BetuBSFGgUGtB31gQvLk/0Pk0mbx68ml/TYpnqCPUjD1F+ ohiWmdpHsYhw5jehU+xluLUBjj/gChXkDUbR23muKQPM4SDkm1aoMhXg1EXvn8hIXC0l PG7Tt7U759WCsxIi/5s3RI4mEsG2c/zEPr5rQ3boCKUkgvNFsP3V2mKeePs0WCEMX11U VmuAnzmBu2DrG54tk26dqpeCuqU1JzTcSvSGbRzEriEZM2gWlELyAysc0tlHicuiDs3x gJww== X-Gm-Message-State: ABy/qLaCA2d60bh1tmDmiNJixLN+XZr3/g4oZPajtwPYw+S7H5NmjuBl A62iSlxEMcNKMJRheTXk2ext4myvQjZC X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:39d1:8774:b733:6210]) (user=mshavit job=sendgmr) by 2002:a81:af0e:0:b0:579:fa4c:1f22 with SMTP id n14-20020a81af0e000000b00579fa4c1f22mr137586ywh.6.1690994051697; Wed, 02 Aug 2023 09:34:11 -0700 (PDT) Date: Thu, 3 Aug 2023 00:32:36 +0800 In-Reply-To: <20230802163328.2623773-1-mshavit@google.com> Mime-Version: 1.0 References: <20230802163328.2623773-1-mshavit@google.com> X-Mailer: git-send-email 2.41.0.585.gd2178a4bd4-goog Message-ID: <20230803003234.v4.8.I5ee79793b444ddb933e8bc1eb7b77e728d7f8350@changeid> Subject: [PATCH v4 8/8] iommu/arm-smmu-v3: Rename cdcfg to cd_table From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: will@kernel.org, robin.murphy@arm.com, nicolinc@nvidia.com, jgg@nvidia.com, jean-philippe@linaro.org, Michael Shavit X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773137645472708023 X-GMAIL-MSGID: 1773137645472708023 cdcfg is a confusing name, especially given other variables with the cfg suffix in this driver. cd_table more clearly describes what is being operated on. Signed-off-by: Michael Shavit Reviewed-by: Jason Gunthorpe Reviewed-by: Nicolin Chen --- (no changes since v3) Changes in v3: - Commit message update Changes in v2: - New commit drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 66 ++++++++++----------- 1 file changed, 33 insertions(+), 33 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 00b602ae9636..61de66d17a5d 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1028,18 +1028,18 @@ static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_master *master, u32 ssid) unsigned int idx; struct arm_smmu_l1_ctx_desc *l1_desc; struct arm_smmu_device *smmu = master->smmu; - struct arm_smmu_ctx_desc_cfg *cdcfg = &master->cd_table; + struct arm_smmu_ctx_desc_cfg *cd_table = &master->cd_table; - if (!cdcfg->l1_desc) - return cdcfg->cdtab + ssid * CTXDESC_CD_DWORDS; + if (!cd_table->l1_desc) + return cd_table->cdtab + ssid * CTXDESC_CD_DWORDS; idx = ssid >> CTXDESC_SPLIT; - l1_desc = &cdcfg->l1_desc[idx]; + l1_desc = &cd_table->l1_desc[idx]; if (!l1_desc->l2ptr) { if (arm_smmu_alloc_cd_leaf_table(smmu, l1_desc)) return NULL; - l1ptr = cdcfg->cdtab + idx * CTXDESC_L1_DESC_DWORDS; + l1ptr = cd_table->cdtab + idx * CTXDESC_L1_DESC_DWORDS; arm_smmu_write_cd_l1_desc(l1ptr, l1_desc); /* An invalid L1CD can be cached */ arm_smmu_sync_cd(master, ssid, false); @@ -1134,33 +1134,33 @@ static int arm_smmu_alloc_cd_tables(struct arm_smmu_master *master) size_t l1size; size_t max_contexts; struct arm_smmu_device *smmu = master->smmu; - struct arm_smmu_ctx_desc_cfg *cdcfg = &master->cd_table; + struct arm_smmu_ctx_desc_cfg *cd_table = &master->cd_table; - cdcfg->stall_enabled = master->stall_enabled; - cdcfg->max_cds_bits = master->ssid_bits; - max_contexts = 1 << cdcfg->max_cds_bits; + cd_table->stall_enabled = master->stall_enabled; + cd_table->max_cds_bits = master->ssid_bits; + max_contexts = 1 << cd_table->max_cds_bits; if (!(smmu->features & ARM_SMMU_FEAT_2_LVL_CDTAB) || max_contexts <= CTXDESC_L2_ENTRIES) { - cdcfg->num_l1_ents = max_contexts; + cd_table->num_l1_ents = max_contexts; l1size = max_contexts * (CTXDESC_CD_DWORDS << 3); } else { - cdcfg->num_l1_ents = DIV_ROUND_UP(max_contexts, + cd_table->num_l1_ents = DIV_ROUND_UP(max_contexts, CTXDESC_L2_ENTRIES); - cdcfg->l1_desc = devm_kcalloc(smmu->dev, cdcfg->num_l1_ents, - sizeof(*cdcfg->l1_desc), + cd_table->l1_desc = devm_kcalloc(smmu->dev, cd_table->num_l1_ents, + sizeof(*cd_table->l1_desc), GFP_KERNEL); - if (!cdcfg->l1_desc) + if (!cd_table->l1_desc) return -ENOMEM; - l1size = cdcfg->num_l1_ents * (CTXDESC_L1_DESC_DWORDS << 3); + l1size = cd_table->num_l1_ents * (CTXDESC_L1_DESC_DWORDS << 3); } - cdcfg->cdtab = dmam_alloc_coherent(smmu->dev, l1size, &cdcfg->cdtab_dma, + cd_table->cdtab = dmam_alloc_coherent(smmu->dev, l1size, &cd_table->cdtab_dma, GFP_KERNEL); - if (!cdcfg->cdtab) { + if (!cd_table->cdtab) { dev_warn(smmu->dev, "failed to allocate context descriptor\n"); ret = -ENOMEM; goto err_free_l1; @@ -1169,9 +1169,9 @@ static int arm_smmu_alloc_cd_tables(struct arm_smmu_master *master) return 0; err_free_l1: - if (cdcfg->l1_desc) { - devm_kfree(smmu->dev, cdcfg->l1_desc); - cdcfg->l1_desc = NULL; + if (cd_table->l1_desc) { + devm_kfree(smmu->dev, cd_table->l1_desc); + cd_table->l1_desc = NULL; } return ret; } @@ -1181,30 +1181,30 @@ static void arm_smmu_free_cd_tables(struct arm_smmu_master *master) int i; size_t size, l1size; struct arm_smmu_device *smmu = master->smmu; - struct arm_smmu_ctx_desc_cfg *cdcfg = &master->cd_table; + struct arm_smmu_ctx_desc_cfg *cd_table = &master->cd_table; - if (cdcfg->l1_desc) { + if (cd_table->l1_desc) { size = CTXDESC_L2_ENTRIES * (CTXDESC_CD_DWORDS << 3); - for (i = 0; i < cdcfg->num_l1_ents; i++) { - if (!cdcfg->l1_desc[i].l2ptr) + for (i = 0; i < cd_table->num_l1_ents; i++) { + if (!cd_table->l1_desc[i].l2ptr) continue; dmam_free_coherent(smmu->dev, size, - cdcfg->l1_desc[i].l2ptr, - cdcfg->l1_desc[i].l2ptr_dma); + cd_table->l1_desc[i].l2ptr, + cd_table->l1_desc[i].l2ptr_dma); } - devm_kfree(smmu->dev, cdcfg->l1_desc); - cdcfg->l1_desc = NULL; + devm_kfree(smmu->dev, cd_table->l1_desc); + cd_table->l1_desc = NULL; - l1size = cdcfg->num_l1_ents * (CTXDESC_L1_DESC_DWORDS << 3); + l1size = cd_table->num_l1_ents * (CTXDESC_L1_DESC_DWORDS << 3); } else { - l1size = cdcfg->num_l1_ents * (CTXDESC_CD_DWORDS << 3); + l1size = cd_table->num_l1_ents * (CTXDESC_CD_DWORDS << 3); } - dmam_free_coherent(smmu->dev, l1size, cdcfg->cdtab, cdcfg->cdtab_dma); - cdcfg->cdtab_dma = 0; - cdcfg->cdtab = NULL; + dmam_free_coherent(smmu->dev, l1size, cd_table->cdtab, cd_table->cdtab_dma); + cd_table->cdtab_dma = 0; + cd_table->cdtab = NULL; } bool arm_smmu_free_asid(struct arm_smmu_ctx_desc *cd)