From patchwork Wed Aug 2 08:03:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Ghiti X-Patchwork-Id: 129701 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp303890vqx; Wed, 2 Aug 2023 01:39:46 -0700 (PDT) X-Google-Smtp-Source: APBJJlFzk3tlFUULhRMwzFV774mUYsBK1QYUjZg+fUKIsT6W7ERuJ/41xKcdq4LZUoeYI9WZXhqb X-Received: by 2002:a05:651c:233:b0:2b6:d5af:1160 with SMTP id z19-20020a05651c023300b002b6d5af1160mr4068191ljn.28.1690965586492; Wed, 02 Aug 2023 01:39:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690965586; cv=none; d=google.com; s=arc-20160816; b=GwA1J8HdmPCr64BXKxNfYuK6Lk1AJ8HCvo8MWBDnxfIt82R0obY9p8/Q5i0zfbWY8b OuG/YzUAhW9sNBZ7FeX3Xrvzzjhqgls3hBtBLl7jWoawfpv2DBfNnOzxeYGG+0GJs6nd 1TXxpanX1TRVam7Va7s9DKtgXRK87pZN7jhFsGBt+L1sVTsuEbm6n0ecLqhlOixAalMw gd7+qPIHsbjzZOb9rVKCikEJrluHea3jA0d7mDLe+uHqHh2vVkriDXBCSvb/cgaog2yi WhW9dl3qeuqp481JEcn9GWUh+mUPOC4swghWC2OaKXoyV3cgciM6UHcyp0tEaYhKjspK 3sOQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ejdl0KVafWeUDCoat0LuZ8Fy/MsW+LGPGn9twtI85O4=; fh=JaxZGKf0NGxFruMBNweFeRrHWrRBBIwkQ5sLyfk9jAY=; b=oPm3vFQuIMfuJ+13aMcfHRj8vlHZDWWFdGXmrG+FQaUdQDksp1kFoC1lXRYQqfKz1a rG3JjblSvK/whScynKDQEQjOhgyBM2An34SN1JBRi6nTfILqsnEvFLU6zOaHaG2l8j5s /hDSQW0SRq2fkRqKystDY+BmLkBcyj4kBxk2PlV+SN8oCz6gKSq7XEZvZiLJ3UTfFFiA oL5idK09YfuURxF9hLSqMr6cVIt0mntTXMR6NbMMmJXkgJQfZjwcIPxbYd6TDxUz1BSH 8U2lsCUow6JyZCSgWg2EgYPy0TxbFxvVJkxYdMyzTzVYHtKFip+eNYrzgykYWN5dfXJe 0YwA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=HVRel3iy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x15-20020a1709065acf00b00988c64dd7acsi9869713ejs.620.2023.08.02.01.39.20; Wed, 02 Aug 2023 01:39:46 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=HVRel3iy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231765AbjHBIFI (ORCPT + 99 others); Wed, 2 Aug 2023 04:05:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60834 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232022AbjHBIFG (ORCPT ); Wed, 2 Aug 2023 04:05:06 -0400 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [IPv6:2a00:1450:4864:20::434]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0F2C2DE for ; Wed, 2 Aug 2023 01:05:05 -0700 (PDT) Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-3128fcd58f3so6611123f8f.1 for ; Wed, 02 Aug 2023 01:05:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1690963503; x=1691568303; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ejdl0KVafWeUDCoat0LuZ8Fy/MsW+LGPGn9twtI85O4=; b=HVRel3iy2TysbHNmKF4T5Uc3LTv/kACnAUG0vRC18eZOb+FeI1/SOHRmzMrSR+0iuI zDSbXxGB8+I5Bj84nZnHIsY5j1f3zfytixIjpQZ0XXvZ42Zh1JGpuf+WZFKW60ASGN/y qd4szV5SrGTH/31OeXNSR0NV6dLD4tGXg69e96dpajfG1Ra/LqcsE91RhgxmeZagzl3T BH9jEmGUgv3fQLVzMGa56NgW/7UvTP4h6CZNJ8GZ8ti1rX0X/k246dJ9TBssCz5nml5Z HOnKC8VJQXNqZwOcT3RhKkvFmFqokaqSfTEn3fiDasyYFpiigObjmz5O1RwSHFAitIOd OOUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690963503; x=1691568303; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ejdl0KVafWeUDCoat0LuZ8Fy/MsW+LGPGn9twtI85O4=; b=R0eje7bYLYBHzHTNDP2HboJoQ2HrAsfefz/Oo7Hlz4SJoboiNO+sEdgA/j1oY47ZhF cxVbCjDEFArCKgdvUs4TpIrqmsK7Hme33HZu0OUmGGzu8XRySWF+PzJaET+MrTTG+oTS 4dGbkCsGiBvfsEtzo6XBvwR9sT+sSCFLbtumjP+i2pYOBrw0Vqt/ZvoWsye/JGwGznVZ fqoN47sYp4gfJ/Jv7erJQtsiSnLGAdx8zLNGShNBO2IO1xaWUUAhhhteGFdhW5TYR12X W2nOMBH2Yi4UWU4xVyb/0w1p1DjotXHSxNgFezNLV0ZhoERS9xSQWXXLd6R9dHr629Tw 3ICQ== X-Gm-Message-State: ABy/qLYqVzQY4WTEOiyFEqk6kYjAtazkUaGmGYe46rgBnzgi8ficsDMQ sCcqdUgArY1NMCBTvFXc/1jvLQ== X-Received: by 2002:adf:f4d0:0:b0:317:568d:d69f with SMTP id h16-20020adff4d0000000b00317568dd69fmr4264622wrp.12.1690963503254; Wed, 02 Aug 2023 01:05:03 -0700 (PDT) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id a1-20020a056000050100b003141f96ed36sm18369977wrf.0.2023.08.02.01.05.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Aug 2023 01:05:02 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Paul Walmsley , Palmer Dabbelt , Albert Ou , Atish Patra , Anup Patel , Will Deacon , Rob Herring , Andrew Jones , =?utf-8?q?R=C3=A9mi_Denis-Courmont?= , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Cc: Alexandre Ghiti , Atish Patra Subject: [PATCH v6 01/10] perf: Fix wrong comment about default event_idx Date: Wed, 2 Aug 2023 10:03:19 +0200 Message-Id: <20230802080328.1213905-2-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802080328.1213905-1-alexghiti@rivosinc.com> References: <20230802080328.1213905-1-alexghiti@rivosinc.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773105931135447276 X-GMAIL-MSGID: 1773105931135447276 Since commit c719f56092ad ("perf: Fix and clean up initialization of pmu::event_idx"), event_idx default implementation has returned 0, not idx + 1, so fix the comment that can be misleading. Signed-off-by: Alexandre Ghiti Reviewed-by: Andrew Jones Reviewed-by: Atish Patra --- include/linux/perf_event.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 2166a69e3bf2..1269c96bc3b6 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -445,7 +445,8 @@ struct pmu { /* * Will return the value for perf_event_mmap_page::index for this event, - * if no implementation is provided it will default to: event->hw.idx + 1. + * if no implementation is provided it will default to 0 (see + * perf_event_idx_default). */ int (*event_idx) (struct perf_event *event); /*optional */ From patchwork Wed Aug 2 08:03:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Ghiti X-Patchwork-Id: 129714 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp310773vqx; Wed, 2 Aug 2023 01:56:52 -0700 (PDT) X-Google-Smtp-Source: APBJJlH1n6MFlCFcpGMqXwmQIcFc85fPILXZZsij6Ka6j6Ho3yR5Rw6utSfCX9ZilmWnTBKGyt2x X-Received: by 2002:a17:902:988e:b0:1b6:72af:623d with SMTP id s14-20020a170902988e00b001b672af623dmr14009954plp.55.1690966612511; Wed, 02 Aug 2023 01:56:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690966612; cv=none; d=google.com; s=arc-20160816; b=eEeW0FS2uIWMkR8ihIWiaArs109HDbYioGj4/Kams5VQ0pRAEcK9Q80EDDmimyuQj+ Q+SOkf6EQZvGh/8fXnwxI5pu5JR1+0pysFlqNbOMjZK/5WYHNd+qB6NKEXUag1VvEJmZ I17YLNZYmkCSaPMhi26VV+Lc70r4+60Yx2XWvzCFfZ52/0sPKfZu6Q3jmVBEG46Qbk+3 3Bi1SkehgKkKGHnyzEpSdwio2//SJwluC1H7mdMU83ACKVMRzpQ33PdWDFPWo5nn6OCh +s9OPyPJZRW0daloUmFVZ42QXAin4aDKR1tgQv/RxYWcQsZgDGOBOXcQbhkGQfvMixNU EZdA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=nFKT0CCXN0CmmHE2x8MUQw5sccSB1SdakxOhkM1UsG4=; fh=3aasexpimsDctYfRujpMylveySL8uNVvtqQmUTzOO2Q=; b=kssmFz5RNSxk6i2lu3NS1v0vH5D1fIHf1T/6KluHjKj/FYUSWkyrs4Q4Q8NCLCu0Jr H8/gboOUR+AJ2ssjGAM9V2PMS22/2T2rqFTYe6Vwvdc0OzK151BDHZ7PE5funF6sAPZ/ koOo2D9Mn9LaYKy1oA8GhwCtdnOgqn7Otoj9cepwiwlrFuxo7B8N7ePu1xasV8dwI+TF Fng1+I0RJxSHjEcIIW3NTZh8CHk+qQxVJvkZOZMKdTMdCG8rLrGFJzsPv25meLY8q/W6 fXzFM0wruv39NPhoCGJa91wum0UTwliW0QorgbU1AqOa9TTHxtkTlp61IzeLtEIcb6s5 3qnA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=Adz4V7eb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i2-20020a170902c94200b001bb9c2bc8aasi11013024pla.401.2023.08.02.01.56.38; Wed, 02 Aug 2023 01:56:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=Adz4V7eb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231466AbjHBIGJ (ORCPT + 99 others); Wed, 2 Aug 2023 04:06:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33072 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232508AbjHBIGH (ORCPT ); Wed, 2 Aug 2023 04:06:07 -0400 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [IPv6:2a00:1450:4864:20::333]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 10398EC for ; Wed, 2 Aug 2023 01:06:06 -0700 (PDT) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-3fe2048c910so28055125e9.1 for ; Wed, 02 Aug 2023 01:06:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1690963564; x=1691568364; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nFKT0CCXN0CmmHE2x8MUQw5sccSB1SdakxOhkM1UsG4=; b=Adz4V7ebnS4I/sTqKU8RSqQEnKbk+n8KbATevT3pt2JKoSYYQPOQxfDEVEBfvip2nx AngRsIDgef7MaOxkLUmDETDs6o8j015PBBys0v/5d1MMOsHH3wCG0pMzCQ+boByDZJzW WXik2xuDgv/KfsnxBicFvsOoSJVq8bx2MDTxE8SLF1FC9QhLAM1J6Ux9ZeRZzpytge6i JbFsreahsXB+e74yq7ZevOSM9Wiyv+5NvC8D+bdJyNm5uYQd2Jz5DFeO+kjORGPLNy5y 8ND7l4FtK3RsDrDHLAeY5MPDyZWtGoR+6ygXi0vJ9janNWqopEiqBN65X7PN//eY3QbX 7gvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690963564; x=1691568364; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nFKT0CCXN0CmmHE2x8MUQw5sccSB1SdakxOhkM1UsG4=; b=RLNKOaeiUBugh00MTQFz6FI8FdYXem6eYExkkuYqYIO505hYExC25+/H1+zUnQZ94n VHCOloZOHOn8W/QXho70FwLB8sIpFWFFm3/ELkBAlXnj4Pq8+foI0iCBq1iGrYKaM8aM f93YLngBomIjP6yF/P+XRqgdf5ilhst461lkgSc+Nwg9hrk6nZEb4or1MgDfRLPYYi6v QslNsrbDmzwSXxHmb9zpXXrPMyFCFvSOsKibp02oudgBDRQU4LTIhORLgZ/p/Qk2l8pv tJLoTEzv9LMHgVxd5Ld6eWE1HYiPVkpmNIidUYdCuFGDYj+yUG9S4Jf2BErHixoHTHgk P9Vw== X-Gm-Message-State: ABy/qLb1FXks6dhHmNYmFBIjHOayrJLA58cuWZZNzacjNB8LEvHw20Hc u7vV3611GS0tWTdzcwt4aYmfpw== X-Received: by 2002:a5d:654b:0:b0:314:1f6:2c24 with SMTP id z11-20020a5d654b000000b0031401f62c24mr4197414wrv.36.1690963564470; Wed, 02 Aug 2023 01:06:04 -0700 (PDT) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id z8-20020adfec88000000b0031773a8e5c4sm18156602wrn.37.2023.08.02.01.06.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Aug 2023 01:06:04 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Paul Walmsley , Palmer Dabbelt , Albert Ou , Atish Patra , Anup Patel , Will Deacon , Rob Herring , Andrew Jones , =?utf-8?q?R=C3=A9mi_Denis-Courmont?= , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Cc: Alexandre Ghiti , Conor Dooley , Atish Patra Subject: [PATCH v6 02/10] include: riscv: Fix wrong include guard in riscv_pmu.h Date: Wed, 2 Aug 2023 10:03:20 +0200 Message-Id: <20230802080328.1213905-3-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802080328.1213905-1-alexghiti@rivosinc.com> References: <20230802080328.1213905-1-alexghiti@rivosinc.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773107006693063388 X-GMAIL-MSGID: 1773107006693063388 The current include guard prevents the inclusion of asm/perf_event.h which uses the same include guard: fix the one in riscv_pmu.h so that it matches the file name. Signed-off-by: Alexandre Ghiti Reviewed-by: Conor Dooley Reviewed-by: Andrew Jones Reviewed-by: Atish Patra --- include/linux/perf/riscv_pmu.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/linux/perf/riscv_pmu.h b/include/linux/perf/riscv_pmu.h index 43fc892aa7d9..9f70d94942e0 100644 --- a/include/linux/perf/riscv_pmu.h +++ b/include/linux/perf/riscv_pmu.h @@ -6,8 +6,8 @@ * */ -#ifndef _ASM_RISCV_PERF_EVENT_H -#define _ASM_RISCV_PERF_EVENT_H +#ifndef _RISCV_PMU_H +#define _RISCV_PMU_H #include #include @@ -81,4 +81,4 @@ int riscv_pmu_get_hpm_info(u32 *hw_ctr_width, u32 *num_hw_ctr); #endif /* CONFIG_RISCV_PMU */ -#endif /* _ASM_RISCV_PERF_EVENT_H */ +#endif /* _RISCV_PMU_H */ From patchwork Wed Aug 2 08:03:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Ghiti X-Patchwork-Id: 129741 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp350072vqx; Wed, 2 Aug 2023 03:19:45 -0700 (PDT) X-Google-Smtp-Source: APBJJlFs6/Qi4RxGnB+VSwrEH8I49gD56Etm+p/Amjus4mHFWmQleY8K6WOkDvfivFZjbzkEUphl X-Received: by 2002:a17:90a:bf08:b0:268:93d:b936 with SMTP id c8-20020a17090abf0800b00268093db936mr11950251pjs.18.1690971585541; Wed, 02 Aug 2023 03:19:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690971585; cv=none; d=google.com; s=arc-20160816; b=0D4w0hjU4S3V1FfoLTOZ0GmpPWqmIYM2bY4kAkrMIIQya62RaOhEwxV+jtS2Q6eArl co8oo9fpOio99M71HLyQuUCdh/gyTBpMCrRA/XaSRevVM+l43iKkHg0Ux0r62s5SI3Qj hs2AypQLgjiHmlD2ML9oZ9s+i8U/gwnUuFTjd5aJGb7qa+ikd13VZVkWLWd5SNy5HMhq P5XjgMnPcWucMSt1bVa1GGEXjmJsXIGJcJ7nr3rxN4Q6nq/GMcIhb+pjdp7rqMhsyVjn NhzW+3eewD6ydSAox8WfPOgmiCBcmKhk2KTmcI57+EDoHTdgkarfTjCcA+kY0YOUyMZq mFug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=5NmnsqQcLcAcVyns3syLHoHVHQj0n5HXKDOsH4jqkjI=; fh=JaxZGKf0NGxFruMBNweFeRrHWrRBBIwkQ5sLyfk9jAY=; b=trJJzPEwZgLHBQ1XtMGPpe9qWE0a54AjVbmeo53obpU9swnRcM4NrqhFDjaDptlygM 3avXagLPhjSohtJHx2PHOdMCdbz68tdbg4b1PRwbjmRKVgGvRM+0HNQu+C9WmqKd7sKV Or4UtLFzOkJnLyYk4K3X0mIvnWSPhTw5hp3APcGTndmruzUdZNMbB3VKADspeA2K+DgF zoTCw5GfNDdpCPp9SmWvRuPfepZgOCjjckyv2qI3vqD+VkFPNZlg9j8ZULC+ClgN/wRm Y0swv+p25xlgJ3qoWlqWzx1PwQp8oCGgspfZshhVBMiIgceoDQI3aqnB4tG67kkoklsV yMmQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=EqQKZOT6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u11-20020a6540cb000000b0052cbf501db2si10616158pgp.68.2023.08.02.03.19.32; Wed, 02 Aug 2023 03:19:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=EqQKZOT6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232756AbjHBIHK (ORCPT + 99 others); Wed, 2 Aug 2023 04:07:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34144 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232240AbjHBIHI (ORCPT ); Wed, 2 Aug 2023 04:07:08 -0400 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4B247189 for ; Wed, 2 Aug 2023 01:07:07 -0700 (PDT) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-3fe110de3b6so3800425e9.1 for ; Wed, 02 Aug 2023 01:07:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1690963626; x=1691568426; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5NmnsqQcLcAcVyns3syLHoHVHQj0n5HXKDOsH4jqkjI=; b=EqQKZOT61wkw+20RF7X+vngIlAAxYuK9F0GA2VouTd7oFXT5ntfwtYpZ65vElTzBEI wH5WqXLM2utEn/AVCcSCea1hsOXZ8i3aXn/w842xXxrNUKm32EQa5fLaIVpl0cNMIHBA +c2LELxLXrtMirm1rF9berVJ2KtHsRaITSeS1M+KdFJXVYpYmPPuTeo7FTB3bGGLyEz2 i0dJ001MWYG3LvzqQo33rZeJbqO6lwB9NkntoRVG3eabn/XookqijpJlrXimCR/5xZOn nVj+mtm78nD/FUE0hkiICkuXb0btj6HPYkJZmMIVvrmByMgFSyjvHWpuR/Ph7oszmYH9 NC2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690963626; x=1691568426; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5NmnsqQcLcAcVyns3syLHoHVHQj0n5HXKDOsH4jqkjI=; b=HIDlANFjewvh5Kcayv31DxG3GspBTB55yYZw2EjfPgZPm/Q3/UwylrArJLIhQnL1As No9nanIU3gaNLR0h0DpnrN2+XYChlTVEPgwmx1L64Osn6pD8qvEerK8M3kycmlHL/cAL FhiU7xWlJJ1HQClU/9zHcpHn27pvXDt1Tn23fiwvnQnmdgdHoZ7MbjS0aRyJMab4bcis 2RZcfeZOmt1uC/fk/2LyrNFWCAPNKjCL+uVPtZ41wzn2rvfe10TdN4/lyRARGhOIZ77c OzysRfEB0OuR62kb4UTDHbuFFSZrRhe8y3k20ZZsl9rgt6dE4yVS0nm7mXpJNyIVqEJa HS5w== X-Gm-Message-State: ABy/qLZAY1H1CuY+Y+/8J7GQ9RFPAD/ipWz/mNtOAFW4aJMZGwR2Wj7/ kgAQL6jeSUvgr9Yt/HzRrYdaUg== X-Received: by 2002:a05:600c:4d0d:b0:3fe:2120:eb7c with SMTP id u13-20020a05600c4d0d00b003fe2120eb7cmr4595794wmp.0.1690963625700; Wed, 02 Aug 2023 01:07:05 -0700 (PDT) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id r6-20020adfce86000000b003179b3fd837sm11037093wrn.33.2023.08.02.01.07.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Aug 2023 01:07:05 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Paul Walmsley , Palmer Dabbelt , Albert Ou , Atish Patra , Anup Patel , Will Deacon , Rob Herring , Andrew Jones , =?utf-8?q?R=C3=A9mi_Denis-Courmont?= , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Cc: Alexandre Ghiti , Atish Patra Subject: [PATCH v6 03/10] riscv: Make legacy counter enum match the HW numbering Date: Wed, 2 Aug 2023 10:03:21 +0200 Message-Id: <20230802080328.1213905-4-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802080328.1213905-1-alexghiti@rivosinc.com> References: <20230802080328.1213905-1-alexghiti@rivosinc.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773112221006430923 X-GMAIL-MSGID: 1773112221006430923 RISCV_PMU_LEGACY_INSTRET used to be set to 1 whereas the offset of this hardware counter from CSR_CYCLE is actually 2: make this offset match the real hw offset so that we can directly expose those values to userspace. Signed-off-by: Alexandre Ghiti Reviewed-by: Andrew Jones Reviewed-by: Atish Patra --- drivers/perf/riscv_pmu_legacy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c index ca9e20bfc7ac..6a000abc28bb 100644 --- a/drivers/perf/riscv_pmu_legacy.c +++ b/drivers/perf/riscv_pmu_legacy.c @@ -13,7 +13,7 @@ #include #define RISCV_PMU_LEGACY_CYCLE 0 -#define RISCV_PMU_LEGACY_INSTRET 1 +#define RISCV_PMU_LEGACY_INSTRET 2 static bool pmu_init_done; From patchwork Wed Aug 2 08:03:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Ghiti X-Patchwork-Id: 129700 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp302463vqx; Wed, 2 Aug 2023 01:36:10 -0700 (PDT) X-Google-Smtp-Source: APBJJlGITViUm/h8iBUoeFcnLJl2gNI9fJVVhVzjXontwTy2yDsbq4SpXMM8w+sH6QePAyGngKOZ X-Received: by 2002:a05:6402:7c3:b0:522:3cf5:84b2 with SMTP id u3-20020a05640207c300b005223cf584b2mr4776809edy.30.1690965370139; Wed, 02 Aug 2023 01:36:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690965370; cv=none; d=google.com; s=arc-20160816; b=IdYinbGI5iiZxnWF6OolWuNfGBfsOpnYqLUrAG2tYp6j70wxaDtXwyrpQhI8FiXAVz GWZl2ZlqZsdoeoccEZwnaOmjDxC0q2MBorusT5DE2e79CPySYUV+y67z9W2uICSTIwtZ J5/r8dAyhUeXQRbay2+hkuBtRQwj1m9C6E2F+t79iE39DIwjg81KzL7WIos4/OZtOqAT wa1Sjw069weTozbbpkBJCQmJXyzXyNPoIX/5pNr4mT3p13drwYMTYtu5E9Va8Wwi/Db4 JPfZXR9f7a9GF5lHguVNqY2FjRmEBcdIOdxdAWSPVlUDUcbFuGcgfbGjd4dDCJ9PIi/X aoTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=TYevbpqWo7vfFaWnhd9GizwhPV+tk9zz00ActpJaBGA=; fh=JaxZGKf0NGxFruMBNweFeRrHWrRBBIwkQ5sLyfk9jAY=; b=Hd1zx50at6naNewrKyl3nqn1M1k8xHUi259KkX9z2DXdynACJsaUtvk9GUDwYLkY1R mDasJGRzSSpzPprhJnqqC2lhNskcDOed+TzaxzNvyoX6HtjaBSVLHo69nf0Vo51bEdQy 1pN6Li7rsJ6BcEszAG5qUlwP0jnguXjxTSMiNIGvDQ1q3Qs1TYSe6x/eWef85CZ62nX8 sgjsp9NBkXTTCGCXX6q1TG/bIh8RAg9l3DrMpnfDAYjOTpJ9bHqWEq0/nNK8QLYBx99s 164ico6iaQGNzo1H+WhP8O78tXGLCelSHktT5sYvv23pDOzZajuoF7lLe65nX15pn3oN GDIw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=C7xv7Yyt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b3-20020aa7c903000000b005221dccb65csi10126521edt.391.2023.08.02.01.35.46; Wed, 02 Aug 2023 01:36:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=C7xv7Yyt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230489AbjHBIIM (ORCPT + 99 others); Wed, 2 Aug 2023 04:08:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35088 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232900AbjHBIIK (ORCPT ); Wed, 2 Aug 2023 04:08:10 -0400 Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BEFABDF for ; Wed, 2 Aug 2023 01:08:08 -0700 (PDT) Received: by mail-lj1-x230.google.com with SMTP id 38308e7fff4ca-2b9dc1bff38so62033391fa.1 for ; Wed, 02 Aug 2023 01:08:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1690963687; x=1691568487; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TYevbpqWo7vfFaWnhd9GizwhPV+tk9zz00ActpJaBGA=; b=C7xv7YytwoR4uq7JIdhqZuJEkUTXlgAK8JHUJmTCCPtBiKU4xgvR7g4saOc5fR/eUi 9v0d5p/9jcPbnZqTuBT2wl+C1J0cd8A7wqLULFvLvLOoFzh58uKt6CegTBYXnRQMlTJq UQVg5kvuetK1K9IEmMvGmkReA+pcjWnjUS2zXkWXT3C2mSMrqvJJS5G8sgGzIdZrfNRm f2Zf/sRlkU1+aiyhp7tww9itJbUfT0bciaWjqyZn7C477eevRSxmbICRZdx09GeJX70T GGfAvuHm0TI2u9eBd+hP8mafHOqR2C7stZ/pEq72HC7hbBj2xt04rk2Pwh86yl1AAQtI tOmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690963687; x=1691568487; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TYevbpqWo7vfFaWnhd9GizwhPV+tk9zz00ActpJaBGA=; b=dG5HgnAg2SNVuW1EujTm9RbxP9+kJ7FqNcYGErDm2CxSct2hCCLYcYjkfgsybucRhA U522VbtXZPxL2Jqx6jBHQFrOIwFeIAWU1Fm0SySEB0YRLGIdnnyRFu3ok4lX53g4QLPS EIujWt93L+aeXLbbGztN9KjPK3SlBQ0IwJpRvSLHfw5hFj69Kb3UynAAk+LnoB6CQqiT WIQLHxt0XzuQn5DNkMuAnnMgVxx4rFdYawnG1K5COpjDUGk1GvzlF4q+6z2JModbTqdm WqF7U3gD8KTVmPH1EaECsN541N2Pdvpb23NzfszzkIm/0vync2peFz4v2TjgWjpKzBPn RImA== X-Gm-Message-State: ABy/qLY6URy2/rpPOAXINSyts9MO6ViHrlikkQ13g5rGI4E1IjfJ8rwE 9g5O1D5RCYC41p4quzdom0mWPg== X-Received: by 2002:a2e:9ec1:0:b0:2b9:acad:b4b8 with SMTP id h1-20020a2e9ec1000000b002b9acadb4b8mr3835806ljk.52.1690963687046; Wed, 02 Aug 2023 01:08:07 -0700 (PDT) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id p26-20020a05600c205a00b003fe15c466f3sm3667960wmg.0.2023.08.02.01.08.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Aug 2023 01:08:06 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Paul Walmsley , Palmer Dabbelt , Albert Ou , Atish Patra , Anup Patel , Will Deacon , Rob Herring , Andrew Jones , =?utf-8?q?R=C3=A9mi_Denis-Courmont?= , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Cc: Alexandre Ghiti , Atish Patra Subject: [PATCH v6 04/10] drivers: perf: Rename riscv pmu sbi driver Date: Wed, 2 Aug 2023 10:03:22 +0200 Message-Id: <20230802080328.1213905-5-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802080328.1213905-1-alexghiti@rivosinc.com> References: <20230802080328.1213905-1-alexghiti@rivosinc.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773105703916482137 X-GMAIL-MSGID: 1773105703916482137 That's just cosmetic, no functional changes. Signed-off-by: Alexandre Ghiti Reviewed-by: Andrew Jones Reviewed-by: Atish Patra --- drivers/perf/riscv_pmu_sbi.c | 4 ++-- include/linux/perf/riscv_pmu.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c index 4163ff517471..760eb2afcf82 100644 --- a/drivers/perf/riscv_pmu_sbi.c +++ b/drivers/perf/riscv_pmu_sbi.c @@ -907,7 +907,7 @@ static int pmu_sbi_device_probe(struct platform_device *pdev) static struct platform_driver pmu_sbi_driver = { .probe = pmu_sbi_device_probe, .driver = { - .name = RISCV_PMU_PDEV_NAME, + .name = RISCV_PMU_SBI_PDEV_NAME, }, }; @@ -934,7 +934,7 @@ static int __init pmu_sbi_devinit(void) if (ret) return ret; - pdev = platform_device_register_simple(RISCV_PMU_PDEV_NAME, -1, NULL, 0); + pdev = platform_device_register_simple(RISCV_PMU_SBI_PDEV_NAME, -1, NULL, 0); if (IS_ERR(pdev)) { platform_driver_unregister(&pmu_sbi_driver); return PTR_ERR(pdev); diff --git a/include/linux/perf/riscv_pmu.h b/include/linux/perf/riscv_pmu.h index 9f70d94942e0..5deeea0be7cb 100644 --- a/include/linux/perf/riscv_pmu.h +++ b/include/linux/perf/riscv_pmu.h @@ -21,7 +21,7 @@ #define RISCV_MAX_COUNTERS 64 #define RISCV_OP_UNSUPP (-EOPNOTSUPP) -#define RISCV_PMU_PDEV_NAME "riscv-pmu" +#define RISCV_PMU_SBI_PDEV_NAME "riscv-pmu-sbi" #define RISCV_PMU_LEGACY_PDEV_NAME "riscv-pmu-legacy" #define RISCV_PMU_STOP_FLAG_RESET 1 From patchwork Wed Aug 2 08:03:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Ghiti X-Patchwork-Id: 129699 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp302041vqx; Wed, 2 Aug 2023 01:35:04 -0700 (PDT) X-Google-Smtp-Source: APBJJlEVo2bEDbciWIgmSQDkrNzudrKQ7lVoUYoDPwGPhJBGcOspLFsAnfFlofe+MEK7aiORmiOu X-Received: by 2002:a05:6a20:7355:b0:116:d935:f742 with SMTP id v21-20020a056a20735500b00116d935f742mr16091860pzc.20.1690965303643; Wed, 02 Aug 2023 01:35:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690965303; cv=none; d=google.com; s=arc-20160816; b=KifkiYAbtrX2SobwRXb1d+zBLqJq5+FqqZxa/1lYgNTFRfYJE7GnIwSMXAb1JUYwXZ pu1xSIG/8UggsZ8fJrOz1kymwANMs47cw6yROhhUEPjXiJr3Hx+16/fQH99MnAN3pPxy G3PwgfyLCQo0vitCzb7CBnU9wMgQ+rhv026eZ08Xx/+cCEE+/mEfNaLia4YT/1EjRb5d ceRNjER/IhAbL0flKNbtzLN/AcGrxXzlHeNymVd8mqSJGwsG7oIe4H9kxJ2P/QCWbCHq lhYaEVzRQUhq77T6X5EUvrAgr6Gz05LisrqFBmpc9E4WGrr8MULfImwLMBhst8q81n4l O18Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=R45KJ8XHyzPlJWiJBpBPEEo2H/ciDziDBY6xvMQUNYU=; fh=JaxZGKf0NGxFruMBNweFeRrHWrRBBIwkQ5sLyfk9jAY=; b=pwOWniNr5vZR5n088kShxDmTiJVAeVxVpnSGJ0lwrBdGzm/wFtkXWXtqMIqXVIgsU2 3p70AUwIu+Rj6su7CS2hDdFcrgpk4hIHkbtZN3Qy4JnSHGtuJVUoq99ipyw5v2vXvi2C vFln4a9as0cEAp0R93HFfEStx5QoRTelS7vp+T57919/7/F4+mNxEKxTaQMQJroC/bMz A1rr1ZomoADGlFvKez6/D2ywhkoXkmgGdwKSNROFZobYKuGAAV6rMsOnWHWSK87vgBOc K59DEeAAjkaA0TNoYlURIbpMFP4g2yOq+EF7IUY52jUcJkIbOJM05jPGdAP4coBJTyMF 8d9A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=2tDCQHcA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h2-20020a635302000000b005633776f01csi10067249pgb.793.2023.08.02.01.34.49; Wed, 02 Aug 2023 01:35:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=2tDCQHcA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233508AbjHBIJN (ORCPT + 99 others); Wed, 2 Aug 2023 04:09:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35678 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230239AbjHBIJL (ORCPT ); Wed, 2 Aug 2023 04:09:11 -0400 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [IPv6:2a00:1450:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B5AAEE7D for ; Wed, 2 Aug 2023 01:09:09 -0700 (PDT) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-3fe1e1142caso32925195e9.0 for ; Wed, 02 Aug 2023 01:09:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1690963748; x=1691568548; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=R45KJ8XHyzPlJWiJBpBPEEo2H/ciDziDBY6xvMQUNYU=; b=2tDCQHcAPyll8azBJd6dT6utA3BsWAqg/oeFquak3rYJTTSVdo+7F+w2jLC0HXv8rP pSILAnhEcZPi6VbP6zEsHBU5f3qTJQHP3EE2PXKQXjx5fTw9kDg4LFayCR5OAAO+z2gm U/X7Dyo5P3qgMxrRek/+0NJb2+XAYK88dRSmw8MDbWma56fqnwgGDE7DnLD5qCS605sb yT3BVqmCRrTtQFQCn5Ws5VAlqKeqBN3E2tD0LfFdsejHXyXCNZKrWWATMGw+cdvnrzG6 zLHkbblQ35KnzPs3j1UkRmD6kXTA1rGz0Twg+Z48zziL+KDgO0SrapKM01E9D0C6Oklu NcoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690963748; x=1691568548; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=R45KJ8XHyzPlJWiJBpBPEEo2H/ciDziDBY6xvMQUNYU=; b=OqIzgE3nebDur0FxCsJUfLiZVpK5fA55EqSHSb2yiuWLzInN+fduJHB/65rWD7v3FP bR9qAyWcQsvzZgY/xxSR/GZExpABZ1d3XCJ29ngu7zDM0NTfY6QpXRB8a8MXqR7CGg9V wX8Pw/DXqIWag5S2Vwpa7R/wJ3ulUTGOPyDX7t3I3nmZDPWngHzPdUluqsFqTaHB0daB 5BjXnWC3DhszDBsq6CwiS53PU/FRjQRlwIN2fxuNKVsQCUU5RYA41TVrfqN/AxvKrLSQ ef4CC31K8xYzeTsNqDt1JkHCTSJ4WONkoHE0wFAS7pbgWiAuEIBQsuWPaQwHg9v6yBvo /16Q== X-Gm-Message-State: ABy/qLYhqhw7KqICwAr+Aho9iRezQz/IKdORDH/7fw0w0BcOTnaC9Eb8 VKxwIocwM3oYBSuhrkzZgiqrJg== X-Received: by 2002:a7b:c010:0:b0:3fe:12a2:7d25 with SMTP id c16-20020a7bc010000000b003fe12a27d25mr4060313wmb.23.1690963748207; Wed, 02 Aug 2023 01:09:08 -0700 (PDT) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id 22-20020a05600c22d600b003fbb618f7adsm1006803wmg.15.2023.08.02.01.09.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Aug 2023 01:09:07 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Paul Walmsley , Palmer Dabbelt , Albert Ou , Atish Patra , Anup Patel , Will Deacon , Rob Herring , Andrew Jones , =?utf-8?q?R=C3=A9mi_Denis-Courmont?= , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Cc: Alexandre Ghiti , Atish Patra Subject: [PATCH v6 05/10] riscv: Prepare for user-space perf event mmap support Date: Wed, 2 Aug 2023 10:03:23 +0200 Message-Id: <20230802080328.1213905-6-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802080328.1213905-1-alexghiti@rivosinc.com> References: <20230802080328.1213905-1-alexghiti@rivosinc.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773105634270554519 X-GMAIL-MSGID: 1773105634270554519 Provide all the necessary bits in the generic riscv pmu driver to be able to mmap perf events in userspace: the heavy lifting lies in the driver backend, namely the legacy and sbi implementations. Note that arch_perf_update_userpage is almost a copy of arm64 code. Signed-off-by: Alexandre Ghiti Reviewed-by: Andrew Jones Reviewed-by: Atish Patra --- drivers/perf/riscv_pmu.c | 105 +++++++++++++++++++++++++++++++++ include/linux/perf/riscv_pmu.h | 4 ++ 2 files changed, 109 insertions(+) diff --git a/drivers/perf/riscv_pmu.c b/drivers/perf/riscv_pmu.c index ebca5eab9c9b..432ad2e80ce3 100644 --- a/drivers/perf/riscv_pmu.c +++ b/drivers/perf/riscv_pmu.c @@ -14,9 +14,73 @@ #include #include #include +#include #include +static bool riscv_perf_user_access(struct perf_event *event) +{ + return ((event->attr.type == PERF_TYPE_HARDWARE) || + (event->attr.type == PERF_TYPE_HW_CACHE) || + (event->attr.type == PERF_TYPE_RAW)) && + !!(event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT); +} + +void arch_perf_update_userpage(struct perf_event *event, + struct perf_event_mmap_page *userpg, u64 now) +{ + struct clock_read_data *rd; + unsigned int seq; + u64 ns; + + userpg->cap_user_time = 0; + userpg->cap_user_time_zero = 0; + userpg->cap_user_time_short = 0; + userpg->cap_user_rdpmc = riscv_perf_user_access(event); + + userpg->pmc_width = 64; + + do { + rd = sched_clock_read_begin(&seq); + + userpg->time_mult = rd->mult; + userpg->time_shift = rd->shift; + userpg->time_zero = rd->epoch_ns; + userpg->time_cycles = rd->epoch_cyc; + userpg->time_mask = rd->sched_clock_mask; + + /* + * Subtract the cycle base, such that software that + * doesn't know about cap_user_time_short still 'works' + * assuming no wraps. + */ + ns = mul_u64_u32_shr(rd->epoch_cyc, rd->mult, rd->shift); + userpg->time_zero -= ns; + + } while (sched_clock_read_retry(seq)); + + userpg->time_offset = userpg->time_zero - now; + + /* + * time_shift is not expected to be greater than 31 due to + * the original published conversion algorithm shifting a + * 32-bit value (now specifies a 64-bit value) - refer + * perf_event_mmap_page documentation in perf_event.h. + */ + if (userpg->time_shift == 32) { + userpg->time_shift = 31; + userpg->time_mult >>= 1; + } + + /* + * Internal timekeeping for enabled/running/stopped times + * is always computed with the sched_clock. + */ + userpg->cap_user_time = 1; + userpg->cap_user_time_zero = 1; + userpg->cap_user_time_short = 1; +} + static unsigned long csr_read_num(int csr_num) { #define switchcase_csr_read(__csr_num, __val) {\ @@ -171,6 +235,8 @@ int riscv_pmu_event_set_period(struct perf_event *event) local64_set(&hwc->prev_count, (u64)-left); + perf_event_update_userpage(event); + return overflow; } @@ -267,6 +333,9 @@ static int riscv_pmu_event_init(struct perf_event *event) hwc->idx = -1; hwc->event_base = mapped_event; + if (rvpmu->event_init) + rvpmu->event_init(event); + if (!is_sampling_event(event)) { /* * For non-sampling runs, limit the sample_period to half @@ -283,6 +352,39 @@ static int riscv_pmu_event_init(struct perf_event *event) return 0; } +static int riscv_pmu_event_idx(struct perf_event *event) +{ + struct riscv_pmu *rvpmu = to_riscv_pmu(event->pmu); + + if (!(event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT)) + return 0; + + if (rvpmu->csr_index) + return rvpmu->csr_index(event) + 1; + + return 0; +} + +static void riscv_pmu_event_mapped(struct perf_event *event, struct mm_struct *mm) +{ + struct riscv_pmu *rvpmu = to_riscv_pmu(event->pmu); + + if (rvpmu->event_mapped) { + rvpmu->event_mapped(event, mm); + perf_event_update_userpage(event); + } +} + +static void riscv_pmu_event_unmapped(struct perf_event *event, struct mm_struct *mm) +{ + struct riscv_pmu *rvpmu = to_riscv_pmu(event->pmu); + + if (rvpmu->event_unmapped) { + rvpmu->event_unmapped(event, mm); + perf_event_update_userpage(event); + } +} + struct riscv_pmu *riscv_pmu_alloc(void) { struct riscv_pmu *pmu; @@ -307,6 +409,9 @@ struct riscv_pmu *riscv_pmu_alloc(void) } pmu->pmu = (struct pmu) { .event_init = riscv_pmu_event_init, + .event_mapped = riscv_pmu_event_mapped, + .event_unmapped = riscv_pmu_event_unmapped, + .event_idx = riscv_pmu_event_idx, .add = riscv_pmu_add, .del = riscv_pmu_del, .start = riscv_pmu_start, diff --git a/include/linux/perf/riscv_pmu.h b/include/linux/perf/riscv_pmu.h index 5deeea0be7cb..43282e22ebe1 100644 --- a/include/linux/perf/riscv_pmu.h +++ b/include/linux/perf/riscv_pmu.h @@ -55,6 +55,10 @@ struct riscv_pmu { void (*ctr_start)(struct perf_event *event, u64 init_val); void (*ctr_stop)(struct perf_event *event, unsigned long flag); int (*event_map)(struct perf_event *event, u64 *config); + void (*event_init)(struct perf_event *event); + void (*event_mapped)(struct perf_event *event, struct mm_struct *mm); + void (*event_unmapped)(struct perf_event *event, struct mm_struct *mm); + uint8_t (*csr_index)(struct perf_event *event); struct cpu_hw_events __percpu *hw_events; struct hlist_node node; From patchwork Wed Aug 2 08:03:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Ghiti X-Patchwork-Id: 129709 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp308861vqx; Wed, 2 Aug 2023 01:52:04 -0700 (PDT) X-Google-Smtp-Source: APBJJlEaxM00ztd4NBpFaEfaqugA4cVbtdE71a9DuiFiyqkuGn9oGZpScIrEa91cn0lIlCBLXgB7 X-Received: by 2002:a05:6a00:2e98:b0:67b:8602:aa1e with SMTP id fd24-20020a056a002e9800b0067b8602aa1emr20650391pfb.28.1690966323868; Wed, 02 Aug 2023 01:52:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690966323; cv=none; d=google.com; s=arc-20160816; b=rC39yb7Tw6/cTODLv6WhuXRwrstFqP4Mz2zGXavR9Sd4L3yVTbrHTVpXH6Pfrkyo92 EgvcOM36ayktzSeKKf4tu5m+Uuf0vBc4exOU3y0+ZHgTjjWxAn6+rxdESEtJIYT6B4wu OWfW7Ha8Z/ikfwZLJJeYQZ4D9i24flrL9Naq0btUN3kr+IFGm7tIVaNfOKVze1vZ1gYF PcOXAq+YaIC0IGn6hYO//NQS9ToF6QaIxalJ3k1QU8PwjX6H331uBloYZdtgvIJvVkxo kFG7IwBuvbKDTlS9C6EK071E1q5turGF4QDR8+3HQUwq6/52/h/ySnhQ4wQm9HVuQreT 6Drw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7afbVzdz7i3XV0LSy+5KsI/iNIynDErY3gG58bPEFNo=; fh=JaxZGKf0NGxFruMBNweFeRrHWrRBBIwkQ5sLyfk9jAY=; b=W3CTZQ/vWc0MwpXwQHdQDusTtaKLo62YhdYmAClA6C3wcrQldm7Em40nfDvPndqtTR SJHanxGOT9mkY/Bu5za+r2Am0mQ5f3yVxN1K6bAZLb8xKr57QKyrab+oTrSQ1Gem/vAg E/Vsvq4mvTdxX8Dm2L0bFEmL/ZWWQgUDAYPlhzk98+bLaqzIjzoWse2DVo8VL/bI/iOI kDee3klhflG+FRNHcQ8t151VwHjZ4mSUS7/h4TMFLQN0hDm0LDkP/5Rl25n3A5FgKKxo b2JgvFJ0Pp+DIhVdcJCqJqDqPmOtUb5+X84FXPHVDyJaqrj+FgoDVZ6hwAeDEthxbTOU le6Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=qifnnd1m; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id l16-20020a056a0016d000b0066e4ceca385si8498175pfc.247.2023.08.02.01.51.50; Wed, 02 Aug 2023 01:52:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=qifnnd1m; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233734AbjHBIKN (ORCPT + 99 others); Wed, 2 Aug 2023 04:10:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36516 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233730AbjHBIKM (ORCPT ); Wed, 2 Aug 2023 04:10:12 -0400 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DC178E5F for ; Wed, 2 Aug 2023 01:10:10 -0700 (PDT) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-3fc0aecf15bso69873505e9.1 for ; Wed, 02 Aug 2023 01:10:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1690963809; x=1691568609; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7afbVzdz7i3XV0LSy+5KsI/iNIynDErY3gG58bPEFNo=; b=qifnnd1mKlQIbmFMQtnxa9WqcewBxOF1/ulkKZ0PlwvTFCAGuQxSgo1kcwBebXtHjM rpmSpxRKelVFPrBiLJFe6TQ/HsCgwCo4mpuiYtYIYNnDyIOebL6tMHLAyw9pigfIdHHi xWN6KuEvcE6ua4CybzZrL4imUKgHHO9F7J6YzHT1QIOUgi1nqmPKRxp2h0G8Sofwog8U gU3grY1tQXjUv6WVst3cwIliB/fUUp/K0iLvsma3syDq4RkO9KvWY5Ve6RUBV0YkrSuf 7rRQGfdNGtkkGsEX0dcr4Wp00mu9hOiOsCxFOWmXWX6hTlpNnA8n4hoeTtME5dj7noaR p8kg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690963809; x=1691568609; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7afbVzdz7i3XV0LSy+5KsI/iNIynDErY3gG58bPEFNo=; b=M9R2kwlTbWtla30MuPRyFKIUdEQcto2yNCpObhOOFOT+KHZGCZUN8wWrTOFymEOm0e 60SYHrvEk1GZjAn3s493gpZ84lvGCQmMvPfjneLHvdI20Iw132EfwZUNk1VDoKifjCXV ghNFdPtai5NjEvCGy5D/nMbvpYs9WxJv6HTykS9kohSPiQRRJopGc51phXYRgsMqiMwy sA3Ct0sp8AmIx8qXqBpInRRJDjsUdWX0wKMXwd7KN+in3YtuhMBaFT7Db7Ub/bBYvr+E Bs+rlu8kdt6nuQUIbWmuEJoJdZybOQRLhISVXPTKLOSEVET+l2ds8HLVaxXnZsxRJ8GM sjOw== X-Gm-Message-State: ABy/qLZcV+ZLdLVoimtxqs9BeG/diToLo7GerlUVyEqSrwYb5IfOUsct jzna16MaXBbN51dl8eZ0K3fZng== X-Received: by 2002:a7b:c855:0:b0:3fc:616:b0db with SMTP id c21-20020a7bc855000000b003fc0616b0dbmr4218529wml.9.1690963809354; Wed, 02 Aug 2023 01:10:09 -0700 (PDT) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id w12-20020a5d404c000000b0031411b7087dsm18316163wrp.20.2023.08.02.01.10.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Aug 2023 01:10:09 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Paul Walmsley , Palmer Dabbelt , Albert Ou , Atish Patra , Anup Patel , Will Deacon , Rob Herring , Andrew Jones , =?utf-8?q?R=C3=A9mi_Denis-Courmont?= , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Cc: Alexandre Ghiti , Atish Patra Subject: [PATCH v6 06/10] drivers: perf: Implement perf event mmap support in the legacy backend Date: Wed, 2 Aug 2023 10:03:24 +0200 Message-Id: <20230802080328.1213905-7-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802080328.1213905-1-alexghiti@rivosinc.com> References: <20230802080328.1213905-1-alexghiti@rivosinc.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773106704139201226 X-GMAIL-MSGID: 1773106704139201226 Implement the needed callbacks in the legacy driver so that we can directly access the counters through perf in userspace. Signed-off-by: Alexandre Ghiti Reviewed-by: Andrew Jones Reviewed-by: Atish Patra --- drivers/perf/riscv_pmu_legacy.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c index 6a000abc28bb..79fdd667922e 100644 --- a/drivers/perf/riscv_pmu_legacy.c +++ b/drivers/perf/riscv_pmu_legacy.c @@ -71,6 +71,29 @@ static void pmu_legacy_ctr_start(struct perf_event *event, u64 ival) local64_set(&hwc->prev_count, initial_val); } +static uint8_t pmu_legacy_csr_index(struct perf_event *event) +{ + return event->hw.idx; +} + +static void pmu_legacy_event_mapped(struct perf_event *event, struct mm_struct *mm) +{ + if (event->attr.config != PERF_COUNT_HW_CPU_CYCLES && + event->attr.config != PERF_COUNT_HW_INSTRUCTIONS) + return; + + event->hw.flags |= PERF_EVENT_FLAG_USER_READ_CNT; +} + +static void pmu_legacy_event_unmapped(struct perf_event *event, struct mm_struct *mm) +{ + if (event->attr.config != PERF_COUNT_HW_CPU_CYCLES && + event->attr.config != PERF_COUNT_HW_INSTRUCTIONS) + return; + + event->hw.flags &= ~PERF_EVENT_FLAG_USER_READ_CNT; +} + /* * This is just a simple implementation to allow legacy implementations * compatible with new RISC-V PMU driver framework. @@ -91,6 +114,9 @@ static void pmu_legacy_init(struct riscv_pmu *pmu) pmu->ctr_get_width = NULL; pmu->ctr_clear_idx = NULL; pmu->ctr_read = pmu_legacy_read_ctr; + pmu->event_mapped = pmu_legacy_event_mapped; + pmu->event_unmapped = pmu_legacy_event_unmapped; + pmu->csr_index = pmu_legacy_csr_index; perf_pmu_register(&pmu->pmu, "cpu", PERF_TYPE_RAW); } From patchwork Wed Aug 2 08:03:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Ghiti X-Patchwork-Id: 129707 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp305699vqx; Wed, 2 Aug 2023 01:44:07 -0700 (PDT) X-Google-Smtp-Source: APBJJlHZ3rcm7WMvq72bF78GGcLQHKiSxaVHdZKbOw+MN/z+Kei5RfisRUWYw1e47XiW5f533d+b X-Received: by 2002:a05:6358:6f09:b0:134:c984:ab74 with SMTP id r9-20020a0563586f0900b00134c984ab74mr5345878rwn.9.1690965847480; Wed, 02 Aug 2023 01:44:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690965847; cv=none; d=google.com; s=arc-20160816; b=BQswZkLLbBx8kjtt8KGj4rjpRJymoqKxWB5ZG6v1oMcwGwP84B+TSDbvH9LV8RnH/I qoaoAkQU/UKuBfg5Q205QB+Ku9ur77XM29GfzRwr1fGvN4haQmDYi3GQuyC71eyMeWIa BWKmpN9wk2Xdb0ga4NRYFeRwq4Qe+HIg3j82QrPj9KM54c6KFMVqj9XCY4S/b9kIpzr9 Irbflf4UeOZt5UTBfK3i5bSA3QEJbrmYueoRYdwkzpBa5iVysFwJKJrwvuiqNSQnoYjW ACiQeSDVSQzQyjTPyXC1O5cAaNYS+jiJM9wfWl0a8e3jYz+8iFzSLIsoCxuQ5SoqUx0+ bblQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=/MKFqCwYK7bNxNWkoizVyevtJvJbU46+II0XaU6/CZ0=; fh=nNJyTk/ugcKLLr+prU1/fE/iglwY5VvSzzFBFZJUGQI=; b=Fq9ArsMJ1U4/uLwlTcBYNovBueAs2x8F/B2ZYT/Yyqn9HB1CTOdwbI3KNRLxcpNrZ4 pLTwL9IcDGjKCxJ5c2MpDPRNXRx5uZrQIc77FbBKF6xigYPqAb0IYD3pAafkga1L/HLt JToT2PLNi8+DCKueaTxqO0jHBt/ug20MGf/PbFXEezTqOtbVmfu6eT0NZwUDW9TNFCYt scEPsiAj4QfNWw9c/biBtyfoQWG3tXOzBnfmFSi3NpTJf+qvDRJRAcmGY8fVPAJhBgDa hcWBZYDx67kH46N5KtsUs+5bl0pY9OKVnheyks0B9IjwzOlzpD8/BoFRm/T/BX/i9nKh 1CPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b="Tt/65dnL"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z16-20020a634c10000000b005533cf1fdbfsi8733310pga.629.2023.08.02.01.43.54; Wed, 02 Aug 2023 01:44:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b="Tt/65dnL"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233802AbjHBILX (ORCPT + 99 others); Wed, 2 Aug 2023 04:11:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37200 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232508AbjHBILP (ORCPT ); Wed, 2 Aug 2023 04:11:15 -0400 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [IPv6:2a00:1450:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8BBCCE75 for ; Wed, 2 Aug 2023 01:11:12 -0700 (PDT) Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-31771bb4869so6621057f8f.0 for ; Wed, 02 Aug 2023 01:11:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1690963871; x=1691568671; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/MKFqCwYK7bNxNWkoizVyevtJvJbU46+II0XaU6/CZ0=; b=Tt/65dnLhOj96Ylr6mQUfp9BvDBZIUBbOJt7NkdnsVFgCwIQbCtpM/VD8zoluNxb9l er3a3pEVgtqvAtXOoqko7+csXq0FckSMyacA8z5KO6xzX7lWKebcUsJ+Ns6qyFUwRlPr P+K5unTIsag/1a3WZ77FptTX2Fj3FQAouJS0gx5ZJ770QEVTJqsPLTmxO5U0d1MO6Oig LfBVpZXQtamfTWhGOktMgOl4TAoLiPsrBxLtg2hqfuZtK6SvWd5NIrRYNc//a38a6sED hlMBnO22IDc75Kmqg3kenHBzPWU8/vxNAI+8bI8b9YcfzaF1t2gQclfoVAFK11PidGtK a36g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690963871; x=1691568671; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/MKFqCwYK7bNxNWkoizVyevtJvJbU46+II0XaU6/CZ0=; b=ZDs6N3rmOTNlSOzimkkXchGl9sANtl0qp3o1z+bLZ3O7C8QNE6jZz8IVSElhzgexBY lu3KXeAK2ycBpYvr/vSRHvGY9UvuuSwV815iXrRFkc9NVUaG9hUa9GxqXVns8pFYBFs7 Z8y0hsbY2/PS++WPSLzPUcuM9vrE+lzZkETyGt8+4yyZptiH1o6FgiahyrFrZQt1JS9k GRd8QueKQK1EuT4f+ipxJIBu9yIbB5Uv9dORMn5NjQ6RHUDYilzq3FM45B5QuCii/zau fEv/0TUylaUyLZrOiuwJje0KNUIeg8H4rSQaCKwP+TO7FOsijQWlxbnkidfKVM+HtMQl jJtA== X-Gm-Message-State: ABy/qLZ8HVYJwBgMIkcbOB8L+jfHkh8T3FvYGYDRKjee/1xCq1+5mopI 0phMev6C25+HyPW8n91eCq3z6g== X-Received: by 2002:adf:fec4:0:b0:314:1aed:8f5f with SMTP id q4-20020adffec4000000b003141aed8f5fmr4429190wrs.34.1690963870614; Wed, 02 Aug 2023 01:11:10 -0700 (PDT) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id e10-20020a5d65ca000000b00317b0155502sm3624573wrw.8.2023.08.02.01.11.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Aug 2023 01:11:10 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Paul Walmsley , Palmer Dabbelt , Albert Ou , Atish Patra , Anup Patel , Will Deacon , Rob Herring , Andrew Jones , =?utf-8?q?R=C3=A9mi_Denis-Courmont?= , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Cc: Alexandre Ghiti Subject: [PATCH v6 07/10] drivers: perf: Implement perf event mmap support in the SBI backend Date: Wed, 2 Aug 2023 10:03:25 +0200 Message-Id: <20230802080328.1213905-8-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802080328.1213905-1-alexghiti@rivosinc.com> References: <20230802080328.1213905-1-alexghiti@rivosinc.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773106204161731971 X-GMAIL-MSGID: 1773106204161731971 We used to unconditionnally expose the cycle and instret csrs to userspace, which gives rise to security concerns. So now we only allow access to hw counters from userspace through the perf framework which will handle context switches, per-task events...etc. A sysctl allows to revert the behaviour to the legacy mode so that userspace applications which are not ready for this change do not break. But the default value is to allow userspace only through perf: this will break userspace applications which rely on direct access to rdcycle. This choice was made for security reasons [1][2]: most of the applications which use rdcycle can instead use rdtime to count the elapsed time. [1] https://groups.google.com/a/groups.riscv.org/g/sw-dev/c/REWcwYnzsKE?pli=1 [2] https://www.youtube.com/watch?v=3-c4C_L2PRQ&ab_channel=IEEESymposiumonSecurityandPrivacy Signed-off-by: Alexandre Ghiti Reviewed-by: Andrew Jones --- drivers/perf/riscv_pmu.c | 10 +- drivers/perf/riscv_pmu_sbi.c | 192 +++++++++++++++++++++++++++++++++-- 2 files changed, 195 insertions(+), 7 deletions(-) diff --git a/drivers/perf/riscv_pmu.c b/drivers/perf/riscv_pmu.c index 432ad2e80ce3..80c052e93f9e 100644 --- a/drivers/perf/riscv_pmu.c +++ b/drivers/perf/riscv_pmu.c @@ -38,7 +38,15 @@ void arch_perf_update_userpage(struct perf_event *event, userpg->cap_user_time_short = 0; userpg->cap_user_rdpmc = riscv_perf_user_access(event); - userpg->pmc_width = 64; +#ifdef CONFIG_RISCV_PMU + /* + * The counters are 64-bit but the priv spec doesn't mandate all the + * bits to be implemented: that's why, counter width can vary based on + * the cpu vendor. + */ + if (userpg->cap_user_rdpmc) + userpg->pmc_width = to_riscv_pmu(event->pmu)->ctr_get_width(event->hw.idx) + 1; +#endif do { rd = sched_clock_read_begin(&seq); diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c index 760eb2afcf82..9a51053b1f99 100644 --- a/drivers/perf/riscv_pmu_sbi.c +++ b/drivers/perf/riscv_pmu_sbi.c @@ -24,6 +24,14 @@ #include #include +#define SYSCTL_NO_USER_ACCESS 0 +#define SYSCTL_USER_ACCESS 1 +#define SYSCTL_LEGACY 2 + +#define PERF_EVENT_FLAG_NO_USER_ACCESS BIT(SYSCTL_NO_USER_ACCESS) +#define PERF_EVENT_FLAG_USER_ACCESS BIT(SYSCTL_USER_ACCESS) +#define PERF_EVENT_FLAG_LEGACY BIT(SYSCTL_LEGACY) + PMU_FORMAT_ATTR(event, "config:0-47"); PMU_FORMAT_ATTR(firmware, "config:63"); @@ -43,6 +51,9 @@ static const struct attribute_group *riscv_pmu_attr_groups[] = { NULL, }; +/* Allow user mode access by default */ +static int sysctl_perf_user_access __read_mostly = SYSCTL_USER_ACCESS; + /* * RISC-V doesn't have heterogeneous harts yet. This need to be part of * per_cpu in case of harts with different pmu counters @@ -301,6 +312,11 @@ int riscv_pmu_get_hpm_info(u32 *hw_ctr_width, u32 *num_hw_ctr) } EXPORT_SYMBOL_GPL(riscv_pmu_get_hpm_info); +static uint8_t pmu_sbi_csr_index(struct perf_event *event) +{ + return pmu_ctr_list[event->hw.idx].csr - CSR_CYCLE; +} + static unsigned long pmu_sbi_get_filter_flags(struct perf_event *event) { unsigned long cflags = 0; @@ -329,18 +345,34 @@ static int pmu_sbi_ctr_get_idx(struct perf_event *event) struct cpu_hw_events *cpuc = this_cpu_ptr(rvpmu->hw_events); struct sbiret ret; int idx; - uint64_t cbase = 0; + uint64_t cbase = 0, cmask = rvpmu->cmask; unsigned long cflags = 0; cflags = pmu_sbi_get_filter_flags(event); + + /* + * In legacy mode, we have to force the fixed counters for those events + * but not in the user access mode as we want to use the other counters + * that support sampling/filtering. + */ + if (hwc->flags & PERF_EVENT_FLAG_LEGACY) { + if (event->attr.config == PERF_COUNT_HW_CPU_CYCLES) { + cflags |= SBI_PMU_CFG_FLAG_SKIP_MATCH; + cmask = 1; + } else if (event->attr.config == PERF_COUNT_HW_INSTRUCTIONS) { + cflags |= SBI_PMU_CFG_FLAG_SKIP_MATCH; + cmask = 1UL << (CSR_INSTRET - CSR_CYCLE); + } + } + /* retrieve the available counter index */ #if defined(CONFIG_32BIT) ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_CFG_MATCH, cbase, - rvpmu->cmask, cflags, hwc->event_base, hwc->config, + cmask, cflags, hwc->event_base, hwc->config, hwc->config >> 32); #else ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_CFG_MATCH, cbase, - rvpmu->cmask, cflags, hwc->event_base, hwc->config, 0); + cmask, cflags, hwc->event_base, hwc->config, 0); #endif if (ret.error) { pr_debug("Not able to find a counter for event %lx config %llx\n", @@ -474,6 +506,22 @@ static u64 pmu_sbi_ctr_read(struct perf_event *event) return val; } +static void pmu_sbi_set_scounteren(void *arg) +{ + struct perf_event *event = (struct perf_event *)arg; + + csr_write(CSR_SCOUNTEREN, + csr_read(CSR_SCOUNTEREN) | (1 << pmu_sbi_csr_index(event))); +} + +static void pmu_sbi_reset_scounteren(void *arg) +{ + struct perf_event *event = (struct perf_event *)arg; + + csr_write(CSR_SCOUNTEREN, + csr_read(CSR_SCOUNTEREN) & ~(1 << pmu_sbi_csr_index(event))); +} + static void pmu_sbi_ctr_start(struct perf_event *event, u64 ival) { struct sbiret ret; @@ -490,6 +538,10 @@ static void pmu_sbi_ctr_start(struct perf_event *event, u64 ival) if (ret.error && (ret.error != SBI_ERR_ALREADY_STARTED)) pr_err("Starting counter idx %d failed with error %d\n", hwc->idx, sbi_err_map_linux_errno(ret.error)); + + if ((hwc->flags & PERF_EVENT_FLAG_USER_ACCESS) && + (hwc->flags & PERF_EVENT_FLAG_USER_READ_CNT)) + pmu_sbi_set_scounteren((void *)event); } static void pmu_sbi_ctr_stop(struct perf_event *event, unsigned long flag) @@ -497,6 +549,10 @@ static void pmu_sbi_ctr_stop(struct perf_event *event, unsigned long flag) struct sbiret ret; struct hw_perf_event *hwc = &event->hw; + if ((hwc->flags & PERF_EVENT_FLAG_USER_ACCESS) && + (hwc->flags & PERF_EVENT_FLAG_USER_READ_CNT)) + pmu_sbi_reset_scounteren((void *)event); + ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP, hwc->idx, 1, flag, 0, 0, 0); if (ret.error && (ret.error != SBI_ERR_ALREADY_STOPPED) && flag != SBI_PMU_STOP_FLAG_RESET) @@ -704,10 +760,13 @@ static int pmu_sbi_starting_cpu(unsigned int cpu, struct hlist_node *node) struct cpu_hw_events *cpu_hw_evt = this_cpu_ptr(pmu->hw_events); /* - * Enable the access for CYCLE, TIME, and INSTRET CSRs from userspace, - * as is necessary to maintain uABI compatibility. + * We keep enabling userspace access to CYCLE, TIME and INSTRET via the + * legacy option but that will be removed in the future. */ - csr_write(CSR_SCOUNTEREN, 0x7); + if (sysctl_perf_user_access == SYSCTL_LEGACY) + csr_write(CSR_SCOUNTEREN, 0x7); + else + csr_write(CSR_SCOUNTEREN, 0x2); /* Stop all the counters so that they can be enabled from perf */ pmu_sbi_stop_all(pmu); @@ -838,6 +897,121 @@ static void riscv_pmu_destroy(struct riscv_pmu *pmu) cpuhp_state_remove_instance(CPUHP_AP_PERF_RISCV_STARTING, &pmu->node); } +static void pmu_sbi_event_init(struct perf_event *event) +{ + /* + * The permissions are set at event_init so that we do not depend + * on the sysctl value that can change. + */ + if (sysctl_perf_user_access == SYSCTL_NO_USER_ACCESS) + event->hw.flags |= PERF_EVENT_FLAG_NO_USER_ACCESS; + else if (sysctl_perf_user_access == SYSCTL_USER_ACCESS) + event->hw.flags |= PERF_EVENT_FLAG_USER_ACCESS; + else + event->hw.flags |= PERF_EVENT_FLAG_LEGACY; +} + +static void pmu_sbi_event_mapped(struct perf_event *event, struct mm_struct *mm) +{ + if (event->hw.flags & PERF_EVENT_FLAG_NO_USER_ACCESS) + return; + + if (event->hw.flags & PERF_EVENT_FLAG_LEGACY) { + if (event->attr.config != PERF_COUNT_HW_CPU_CYCLES && + event->attr.config != PERF_COUNT_HW_INSTRUCTIONS) { + return; + } + } + + /* + * The user mmapped the event to directly access it: this is where + * we determine based on sysctl_perf_user_access if we grant userspace + * the direct access to this event. That means that within the same + * task, some events may be directly accessible and some other may not, + * if the user changes the value of sysctl_perf_user_accesss in the + * meantime. + */ + + event->hw.flags |= PERF_EVENT_FLAG_USER_READ_CNT; + + /* + * We must enable userspace access *before* advertising in the user page + * that it is possible to do so to avoid any race. + * And we must notify all cpus here because threads that currently run + * on other cpus will try to directly access the counter too without + * calling pmu_sbi_ctr_start. + */ + if (event->hw.flags & PERF_EVENT_FLAG_USER_ACCESS) + on_each_cpu_mask(mm_cpumask(mm), + pmu_sbi_set_scounteren, (void *)event, 1); +} + +static void pmu_sbi_event_unmapped(struct perf_event *event, struct mm_struct *mm) +{ + if (event->hw.flags & PERF_EVENT_FLAG_NO_USER_ACCESS) + return; + + if (event->hw.flags & PERF_EVENT_FLAG_LEGACY) { + if (event->attr.config != PERF_COUNT_HW_CPU_CYCLES && + event->attr.config != PERF_COUNT_HW_INSTRUCTIONS) { + return; + } + } + + /* + * Here we can directly remove user access since the user does not have + * access to the user page anymore so we avoid the racy window where the + * user could have read cap_user_rdpmc to true right before we disable + * it. + */ + event->hw.flags &= ~PERF_EVENT_FLAG_USER_READ_CNT; + + if (event->hw.flags & PERF_EVENT_FLAG_USER_ACCESS) + on_each_cpu_mask(mm_cpumask(mm), + pmu_sbi_reset_scounteren, (void *)event, 1); +} + +static void riscv_pmu_update_counter_access(void *info) +{ + if (sysctl_perf_user_access == SYSCTL_LEGACY) + csr_write(CSR_SCOUNTEREN, 0x7); + else + csr_write(CSR_SCOUNTEREN, 0x2); +} + +static int riscv_pmu_proc_user_access_handler(struct ctl_table *table, + int write, void *buffer, + size_t *lenp, loff_t *ppos) +{ + int prev = sysctl_perf_user_access; + int ret = proc_dointvec_minmax(table, write, buffer, lenp, ppos); + + /* + * Test against the previous value since we clear SCOUNTEREN when + * sysctl_perf_user_access is set to SYSCTL_USER_ACCESS, but we should + * not do that if that was already the case. + */ + if (ret || !write || prev == sysctl_perf_user_access) + return ret; + + on_each_cpu(riscv_pmu_update_counter_access, NULL, 1); + + return 0; +} + +static struct ctl_table sbi_pmu_sysctl_table[] = { + { + .procname = "perf_user_access", + .data = &sysctl_perf_user_access, + .maxlen = sizeof(unsigned int), + .mode = 0644, + .proc_handler = riscv_pmu_proc_user_access_handler, + .extra1 = SYSCTL_ZERO, + .extra2 = SYSCTL_TWO, + }, + { } +}; + static int pmu_sbi_device_probe(struct platform_device *pdev) { struct riscv_pmu *pmu = NULL; @@ -881,6 +1055,10 @@ static int pmu_sbi_device_probe(struct platform_device *pdev) pmu->ctr_get_width = pmu_sbi_ctr_get_width; pmu->ctr_clear_idx = pmu_sbi_ctr_clear_idx; pmu->ctr_read = pmu_sbi_ctr_read; + pmu->event_init = pmu_sbi_event_init; + pmu->event_mapped = pmu_sbi_event_mapped; + pmu->event_unmapped = pmu_sbi_event_unmapped; + pmu->csr_index = pmu_sbi_csr_index; ret = cpuhp_state_add_instance(CPUHP_AP_PERF_RISCV_STARTING, &pmu->node); if (ret) @@ -894,6 +1072,8 @@ static int pmu_sbi_device_probe(struct platform_device *pdev) if (ret) goto out_unregister; + register_sysctl("kernel", sbi_pmu_sysctl_table); + return 0; out_unregister: From patchwork Wed Aug 2 08:03:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Ghiti X-Patchwork-Id: 129710 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp309476vqx; Wed, 2 Aug 2023 01:53:43 -0700 (PDT) X-Google-Smtp-Source: APBJJlFA7j92wm5yVWc3glBzNklfUNP9/9L8IdDOzzTzfgT9+3JE4bxhSnUg0W/FCpk2N/wyDbBP X-Received: by 2002:a17:902:eccc:b0:1b8:1335:b775 with SMTP id a12-20020a170902eccc00b001b81335b775mr20171904plh.0.1690966423106; Wed, 02 Aug 2023 01:53:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690966423; cv=none; d=google.com; s=arc-20160816; b=mLzKz4vxwvGd7rsuZ7OTaunr2IjtLKkeDRZn9dttSUa0GhZ7azr/mT1l/G0heIpZSV DiXU5bEQZx3i263abjBUnzNWyuoQZ3B4AaOzqnID+6pmGeOWKWsr8zuT1PFZpv4Mx60v pK/t+kNgAA0wBkWTR+VaJFiX4zT5P4nZ1xasNOAYg7hKMDwWBE+X3EaQtJJCUBiQ41u4 ygJZrmD0pJrFY8zgNBYqJUWbKH7zbYOnljuXhGvYw0a8YcjouIo+Wa+Nq0W6xQT+p8eQ lLjhaAM9yHD5TWQiGiGULa8N7YywgOmpQNbv3XkUwacS9lyjrk3iP/x8xYIh8oeu1PfY eKRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4cSgJAHYTUnT7EM82v2w304ZdRWAgN6wEFUjF/hB87M=; fh=nNJyTk/ugcKLLr+prU1/fE/iglwY5VvSzzFBFZJUGQI=; b=Hd8qCUFyym1Fo1eaYC1YWf/4YCqtsELJ0AzZZFnWRvzHyO+lIYuaiPp96dwHnl+Ros e1a2exNHJgLzkn7KWIj+OasvhsZfRsfY/9cE00mvWQ5t1mXtaPakjvlqmUXmG0Iemf/r 09J0Z8IQqSbBUHgtp04tLas5HvBQuM0kfsUbqhMf3rlYp3kVZX6ylWLyS1JtHzwCSBco 3m1bgldskVqIBrNzJSPoShqbQn2HlxE+81t6z6VBSKN2FJE5uKVatDnm/TSG/MYDvH/I 7+WE+Z4hqAbBGgjf+7Vw9B3EXG3NJ+4RSNrkQINeqf426Cj+NN4OT5hs5KCjgJAHJGYA P31g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=ZY45fPle; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z14-20020a170903018e00b001b9be39eaa8si10658765plg.348.2023.08.02.01.53.28; Wed, 02 Aug 2023 01:53:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=ZY45fPle; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233828AbjHBIMQ (ORCPT + 99 others); Wed, 2 Aug 2023 04:12:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233826AbjHBIMP (ORCPT ); Wed, 2 Aug 2023 04:12:15 -0400 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7BDC11716 for ; Wed, 2 Aug 2023 01:12:13 -0700 (PDT) Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-3fb4146e8ceso60233325e9.0 for ; Wed, 02 Aug 2023 01:12:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1690963932; x=1691568732; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4cSgJAHYTUnT7EM82v2w304ZdRWAgN6wEFUjF/hB87M=; b=ZY45fPleIMseKM4cyfGJi+sI4NPdRTXruHiC2M15hOTi+UE4Bf2pB9Z9MVAI4IBQF/ BbMvcTvkB7VZKimvVYxFY2XWlber5/H8MaKOH//zydx6HH45VnqXhuFLywrrQ0zaRUnL Ptqi0H9fU7/oLemakiWSI3CFeW53PivDuvpUxYu0x2rWtIw2VE7waNFLqu+42jJQhn3u dBNwDsBVQk6TZhy8KsveIxKeHIQWbdizzvg8yt9CP7dywSzDVzMaSz1+elrSSjlBVVGF m7X3irDoPLF+saps91kRPqpUGnUWvgkOdLFqgKIj0sPaatw7YetpNJcoZk16pvdtJNkv SM1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690963932; x=1691568732; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4cSgJAHYTUnT7EM82v2w304ZdRWAgN6wEFUjF/hB87M=; b=SPXIh6WB6gKMb0D2vdg5d/mT4a6v8bY5jslaCooK3KAUbFBPoW4wbgr6FmBaqY88/1 fW44tQgyhsS//8vWKrnyDE583ZEYf+R1R2+RtZoMgKQ30O6JTemsmofJi2PE/IVhoevk uMDHXYTaagQ9v8tkf0QCbaAzS22yyHMbl0COV+Mt6Ms289EJZiN5cOj4Duui8pitoNg0 29hHF38wPpH9UBY7z/OBTuMFCKql82zeq4/sz1+h76ZcG5/ZCq1bH6WxZufQpguL/pbG QyQnFRl9WupZa+cFEC5CMtvmHqUfMGZb84wnIylFznCEkde7wFnHJrgnrH0x9gdVkiRR GS+Q== X-Gm-Message-State: ABy/qLa12nDx9jvcKGWmvJ9BZKRalcRyHpGfUkbVxtZcKY80V+vmt9jg zu8ZRBUsQyi4Sz9e+Ml45zflvA== X-Received: by 2002:a7b:ce14:0:b0:3fc:a8:dc3c with SMTP id m20-20020a7bce14000000b003fc00a8dc3cmr4134949wmc.37.1690963931776; Wed, 02 Aug 2023 01:12:11 -0700 (PDT) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id p9-20020a5d48c9000000b0031433443265sm18269448wrs.53.2023.08.02.01.12.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Aug 2023 01:12:11 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Paul Walmsley , Palmer Dabbelt , Albert Ou , Atish Patra , Anup Patel , Will Deacon , Rob Herring , Andrew Jones , =?utf-8?q?R=C3=A9mi_Denis-Courmont?= , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Cc: Alexandre Ghiti Subject: [PATCH v6 08/10] Documentation: admin-guide: Add riscv sysctl_perf_user_access Date: Wed, 2 Aug 2023 10:03:26 +0200 Message-Id: <20230802080328.1213905-9-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802080328.1213905-1-alexghiti@rivosinc.com> References: <20230802080328.1213905-1-alexghiti@rivosinc.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773106808345626221 X-GMAIL-MSGID: 1773106808345626221 riscv now uses this sysctl so document its usage for this architecture. Signed-off-by: Alexandre Ghiti --- Documentation/admin-guide/sysctl/kernel.rst | 27 ++++++++++++++++++--- 1 file changed, 23 insertions(+), 4 deletions(-) diff --git a/Documentation/admin-guide/sysctl/kernel.rst b/Documentation/admin-guide/sysctl/kernel.rst index 3800fab1619b..8019103aac10 100644 --- a/Documentation/admin-guide/sysctl/kernel.rst +++ b/Documentation/admin-guide/sysctl/kernel.rst @@ -941,16 +941,35 @@ enabled, otherwise writing to this file will return ``-EBUSY``. The default value is 8. -perf_user_access (arm64 only) -================================= +perf_user_access (arm64 and riscv only) +======================================= + +Controls user space access for reading perf event counters. -Controls user space access for reading perf event counters. When set to 1, -user space can read performance monitor counter registers directly. +arm64 +===== The default value is 0 (access disabled). +When set to 1, user space can read performance monitor counter registers +directly. + See Documentation/arch/arm64/perf.rst for more information. +riscv +===== + +When set to 0, user space access is disabled. + +The default value is 1, user space can read performance monitor counter +registers through perf, any direct access without perf intervention will trigger +an illegal instruction. + +When set to 2, which enables legacy mode (user space has direct access to cycle +and insret CSRs only). Note that this legacy value is deprecated and will be +removed once all user space applications are fixed. + +Note that the time CSR is always directly accessible to all modes. pid_max ======= From patchwork Wed Aug 2 08:03:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Ghiti X-Patchwork-Id: 129750 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp352613vqx; Wed, 2 Aug 2023 03:25:14 -0700 (PDT) X-Google-Smtp-Source: APBJJlEQtpqdzbf9hyxgmkr3USH+iHtIZuQ/IOkeKicVY2NPzQoj/L4sS74nj5p1oa1wuHsKYVOi X-Received: by 2002:a17:90a:cb17:b0:268:a61:ba86 with SMTP id z23-20020a17090acb1700b002680a61ba86mr13200768pjt.16.1690971913970; Wed, 02 Aug 2023 03:25:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690971913; cv=none; d=google.com; s=arc-20160816; b=VLOk4/gvcoQKQE/SAlc3iM7J/5V+g5q+jZCNVrtUHAUbTnPij9pdKeytzms0h2tMMq xX5H5gsOXsx977g5J10WK0KIqRXLN7coJxF36JZeUasd2Y1e7QD0K9MvljcdGachyDcV r17ACoAbzy+dPrmAGmSGYgcSgH1CEdbXwaQLIswZ7JD3FFjcNyQzwlC1OYULoCN00P0L GbF+bZdhXNgCJhyTpoeHXPoWEEfVyCsOREIXGfUmNx5YG0vaDAuk3GfurgyZuqaSpqop 1Y/ZM1WTQwWME8ADTkhyQKLnQBxFPC5UtcW/ynf6cE02/E+vB8uQ4zvave4zdpOEStli Eq9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=+y/bQQbBFHXNw50XUcOgOJzdcwsaF1ZFeXZB2P7FgjM=; fh=JaxZGKf0NGxFruMBNweFeRrHWrRBBIwkQ5sLyfk9jAY=; b=tPCjhdC6nX667nNnHkKoUc2/CcLpDoXdKO57sSLtIsKc9tnYEc3KgIqxRTWctr3El7 LIgYx7/eSMfHt79y3viDgV0FzE4lu4uFZIz6V6NwWv1l0SbR6aHQKjbWJBcPeHDpGBBT pvMLqsOUFVjaVVtXpAnraEIEb5ErlCnmSU0YI/WJVw/8+r/z1fkLvWoY3FvNk2wsjdfb dnJ1dJUg9PEz8gtebEH3OIiBOj5xpikUS3GLKSrKJ+CHPW0tEp+yb6HlTvwpx+DTvujZ TqEWmZHVx37UB7qKC0n5BJkkgIIDYT06IJiFRTIiwbfje7ee3mDJocs2MCmD24WJ2I1u h1WQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=csnH5qnZ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id bt17-20020a17090af01100b0025ea4dd9071si973989pjb.61.2023.08.02.03.25.00; Wed, 02 Aug 2023 03:25:13 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=csnH5qnZ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233574AbjHBINm (ORCPT + 99 others); Wed, 2 Aug 2023 04:13:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39090 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234060AbjHBINd (ORCPT ); Wed, 2 Aug 2023 04:13:33 -0400 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BAA7C2689 for ; Wed, 2 Aug 2023 01:13:14 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id 2adb3069b0e04-4fdd14c1fbfso10820296e87.1 for ; Wed, 02 Aug 2023 01:13:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1690963993; x=1691568793; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+y/bQQbBFHXNw50XUcOgOJzdcwsaF1ZFeXZB2P7FgjM=; b=csnH5qnZNRgQkg/B+nfGz7zVemQT+gGvFMobtlHK8PmLj2NEIk81Dg1RgIwrPOKQaF CSSKfKgqiGXCHTcvCB4092k4CCD2O0Yz0o5XK7jr/ehZ6cP8627jVZPHIBULuypRWVFY 5lUgUrOIicnA4Iw17NOSQVQaEztdbIuo1oEcbFWwNzjCCSocKLRSxjqsmwLLmFRdukUA iRqIq6Bx+LSNbAsz2enAsWsiIId0DXiC71Gh6ZIzE9NdmeUrnMwZAJgXVFHNmpw4eI/j 3G88B6BQ4jh10ED3tPMqUumWi4nrcVzf3tb5mXl2952Ta2ry99uBPObhwLudwC8K90T8 CxzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690963993; x=1691568793; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+y/bQQbBFHXNw50XUcOgOJzdcwsaF1ZFeXZB2P7FgjM=; b=DRhzH2oVLM8RODmKNTq8kif9tq2aK1CcM8B6kf71hEN5xau2BJC+wk3nE1n26kdIOe soSrkKfZIfspKpm6wu1xMGdM5Ih3yRLKt5OfS3SybOsScSEEWcOzl9wad0anssqD0kAv Qs7Mwv+nUEaeWQXp/KTK75q0FhTqcsaZQXmoYifsneCJFrcrUEXMzL8CV0kY/va7Gfeo fFcEmHPr17WBLi3e1r1uAA7TFFI58f4mU9Grc5U/YJTLgiLb8gfJibriuMaaJ9uHkerM ZtIcDCYjHzMgG8jMeE1wTomrDI2jmgqS2qO6/JzEXjxI6/2x/JmxcWIEJipzrPClbX5y FHHw== X-Gm-Message-State: ABy/qLZJ72ozLpSWO9LAtH6t2ZWGaC7D0eequorE+hX8QrfWST/9n8sv uELcHdYItCZStFuzV5ZfX1wQ9w== X-Received: by 2002:a05:6512:4003:b0:4f8:7055:6f7e with SMTP id br3-20020a056512400300b004f870556f7emr3111543lfb.44.1690963992981; Wed, 02 Aug 2023 01:13:12 -0700 (PDT) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id f21-20020a7bcc15000000b003fc01f7b415sm1013823wmh.39.2023.08.02.01.13.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Aug 2023 01:13:12 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Paul Walmsley , Palmer Dabbelt , Albert Ou , Atish Patra , Anup Patel , Will Deacon , Rob Herring , Andrew Jones , =?utf-8?q?R=C3=A9mi_Denis-Courmont?= , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Cc: Alexandre Ghiti , Atish Patra Subject: [PATCH v6 09/10] tools: lib: perf: Implement riscv mmap support Date: Wed, 2 Aug 2023 10:03:27 +0200 Message-Id: <20230802080328.1213905-10-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802080328.1213905-1-alexghiti@rivosinc.com> References: <20230802080328.1213905-1-alexghiti@rivosinc.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773110963309660053 X-GMAIL-MSGID: 1773112565584708129 riscv now supports mmaping hardware counters so add what's needed to take advantage of that in libperf. Signed-off-by: Alexandre Ghiti Reviewed-by: Andrew Jones Reviewed-by: Atish Patra Reviewed-by: Ian Rogers --- tools/lib/perf/mmap.c | 66 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/tools/lib/perf/mmap.c b/tools/lib/perf/mmap.c index 0d1634cedf44..2184814b37dd 100644 --- a/tools/lib/perf/mmap.c +++ b/tools/lib/perf/mmap.c @@ -392,6 +392,72 @@ static u64 read_perf_counter(unsigned int counter) static u64 read_timestamp(void) { return read_sysreg(cntvct_el0); } +/* __riscv_xlen contains the witdh of the native base integer, here 64-bit */ +#elif defined(__riscv) && __riscv_xlen == 64 + +/* TODO: implement rv32 support */ + +#define CSR_CYCLE 0xc00 +#define CSR_TIME 0xc01 + +#define csr_read(csr) \ +({ \ + register unsigned long __v; \ + __asm__ __volatile__ ("csrr %0, %1" \ + : "=r" (__v) \ + : "i" (csr) : ); \ + __v; \ +}) + +static unsigned long csr_read_num(int csr_num) +{ +#define switchcase_csr_read(__csr_num, __val) {\ + case __csr_num: \ + __val = csr_read(__csr_num); \ + break; } +#define switchcase_csr_read_2(__csr_num, __val) {\ + switchcase_csr_read(__csr_num + 0, __val) \ + switchcase_csr_read(__csr_num + 1, __val)} +#define switchcase_csr_read_4(__csr_num, __val) {\ + switchcase_csr_read_2(__csr_num + 0, __val) \ + switchcase_csr_read_2(__csr_num + 2, __val)} +#define switchcase_csr_read_8(__csr_num, __val) {\ + switchcase_csr_read_4(__csr_num + 0, __val) \ + switchcase_csr_read_4(__csr_num + 4, __val)} +#define switchcase_csr_read_16(__csr_num, __val) {\ + switchcase_csr_read_8(__csr_num + 0, __val) \ + switchcase_csr_read_8(__csr_num + 8, __val)} +#define switchcase_csr_read_32(__csr_num, __val) {\ + switchcase_csr_read_16(__csr_num + 0, __val) \ + switchcase_csr_read_16(__csr_num + 16, __val)} + + unsigned long ret = 0; + + switch (csr_num) { + switchcase_csr_read_32(CSR_CYCLE, ret) + default: + break; + } + + return ret; +#undef switchcase_csr_read_32 +#undef switchcase_csr_read_16 +#undef switchcase_csr_read_8 +#undef switchcase_csr_read_4 +#undef switchcase_csr_read_2 +#undef switchcase_csr_read +} + +static u64 read_perf_counter(unsigned int counter) +{ + return csr_read_num(CSR_CYCLE + counter); +} + +static u64 read_timestamp(void) +{ + return csr_read_num(CSR_TIME); +} + #else static u64 read_perf_counter(unsigned int counter __maybe_unused) { return 0; } static u64 read_timestamp(void) { return 0; } From patchwork Wed Aug 2 08:03:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Ghiti X-Patchwork-Id: 129739 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp345898vqx; Wed, 2 Aug 2023 03:11:29 -0700 (PDT) X-Google-Smtp-Source: APBJJlFSFdL0a4BiCxdFMszeaRY/7h4aVlYwfzoSM2SjYbM1LsnEbAyMhQG0py6aboZ64NZ1yvhU X-Received: by 2002:a2e:3307:0:b0:2b6:ba54:cc8 with SMTP id d7-20020a2e3307000000b002b6ba540cc8mr4595159ljc.30.1690971089435; Wed, 02 Aug 2023 03:11:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690971089; cv=none; d=google.com; s=arc-20160816; b=DRu9yxpBt62cn8i3ldnB3FNnYoc2wrc0r0cWhYCCVrpBucNF5VVZi/13pCWcAe77aB M2C2TX7UOuUXeSYrxUttATc1T/5P/BF+DPO9Gu3jakMbG9DD6e5+ZFrblXkBsaad1el8 bh5lI0ok7OUW8s3Oc46u/7Tv6V4KoB/fSIqNG6NSnc2y3zC7xOweKPxCWH8lXT/rpIcX fXneBhhLai0aujDr3Uy2Mn/C5hCjIWy8BvYBISO0d3n4MSnpQb+4+UQKlJyN87T2B79H V8N2X1UtiTHNAmxGd74z6+CYyBy3uSVWAZw7i1eOeWpAbz57Z8SIjht3g/xzon8b5kRV Jjvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vjQVCQzw/foc3dsQkAiySfY58yT/va7beD4yh0w30/c=; fh=JaxZGKf0NGxFruMBNweFeRrHWrRBBIwkQ5sLyfk9jAY=; b=WOTVGVK+RnyvpAa87xLzQsWDOtfVYX2ghA2JlIlkDiiwSQzbi1y56n49BsoSh3qScC ybDtre2vyeNIoFikXNZx7wogp92mJ3qmp9O6ogaIqeTxtVAkdP1VmA6Mm9p6oyqZO+1h F0Wv5oxgm01mxCLT1SB4AITcfctvtAgrCtqcZYnrM9yTwAiv+ppYskTIO72maDA3nqT/ T/FE+Sy/I9gilfnDjrcGEI4CBwdoWZg21RaTVqEcs8NNruXCnFYle5J3/ZnzkEKSVa3F PQGq9q8oq/qF2V9uq3cB1bb8F5/KkTaOldBDPoMhlzZNggy4wKYxcOG7GdnXiUNwIxqt ODzg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=LVFQ2dZG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id bq6-20020a170906d0c600b00992e0f4e861si10157926ejb.236.2023.08.02.03.11.01; Wed, 02 Aug 2023 03:11:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=LVFQ2dZG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233838AbjHBIOT (ORCPT + 99 others); Wed, 2 Aug 2023 04:14:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39694 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232559AbjHBIOR (ORCPT ); Wed, 2 Aug 2023 04:14:17 -0400 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CF7681BE for ; Wed, 2 Aug 2023 01:14:15 -0700 (PDT) Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-3fba8e2aa52so70101645e9.1 for ; Wed, 02 Aug 2023 01:14:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1690964054; x=1691568854; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vjQVCQzw/foc3dsQkAiySfY58yT/va7beD4yh0w30/c=; b=LVFQ2dZGP21fC/kUACk7CYGiwQnTmTdEMNpsVOwilpWSU+otD0Tl3tdGDllj7tXr1W jhKu7YfUMIsWFCxb+4ETnF5P6/3sgg3A8MZYT7Q9MQPJDOZDjk8/0XpWOjlQJpGFGSxn rcYkG6fylsTc+/K5y38AtKdbl/emEf0U9Jzni7oIVRNeq4OSYQnuEaK3bZU/4qMEESW0 PwrTdMeseO38VBX2C4ycjFvlxVegWLgWpMQkROEpwdsUzl2Yrhzufa8Oc76mYFKCFdwo +7al1faTYq/Z4RNiHU+SgKQQJVzCV2A97XGxIZam5EIhhXwTzkvb71s8vWM97pDy60+Y t09Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690964054; x=1691568854; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vjQVCQzw/foc3dsQkAiySfY58yT/va7beD4yh0w30/c=; b=dhTmZO+1z7H23/oOfSQmwqMWPy5FH/JRqg4iVeMYs+5Fzup+ts3wajQkX9o5dhVdzW i28LZujZVvgrGI/+s9QtjBHSVSpaz6+bx/QcNk2FUTNvYhBLOvZQkEnSqDY3Y2aza2eI qcffbXRVJZyUuiOfYE7kekrkehHDQdtsJUFbCeYgaXUwcR/riFfe04Twht5j4s/7aMwQ QP2Mai65F4NaFHN8S5j+BgOKjqwJCEEKdUhwa4F2H51fB07aEuaqMFCTj9Hi62rvRMr4 PrKVtbJe/fjLFBSiIIrLiyNheGQ8BEg883BFtaYt0LLHVsYgucDo8AN94G5hquwaObm6 8hFQ== X-Gm-Message-State: ABy/qLZIgMYw5/eFY3rM3y2O+FeXae5/zVTgVw7lvGxxZZbq8n21QAiH ziw+J7XyZEvzi4Yi0v8YFoQU+w== X-Received: by 2002:a05:600c:214d:b0:3fe:20b6:41b2 with SMTP id v13-20020a05600c214d00b003fe20b641b2mr4228012wml.4.1690964054306; Wed, 02 Aug 2023 01:14:14 -0700 (PDT) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id o10-20020a1c750a000000b003fe2f3a89d4sm1040419wmc.7.2023.08.02.01.14.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Aug 2023 01:14:14 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Paul Walmsley , Palmer Dabbelt , Albert Ou , Atish Patra , Anup Patel , Will Deacon , Rob Herring , Andrew Jones , =?utf-8?q?R=C3=A9mi_Denis-Courmont?= , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Cc: Alexandre Ghiti , Atish Patra Subject: [PATCH v6 10/10] perf: tests: Adapt mmap-basic.c for riscv Date: Wed, 2 Aug 2023 10:03:28 +0200 Message-Id: <20230802080328.1213905-11-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802080328.1213905-1-alexghiti@rivosinc.com> References: <20230802080328.1213905-1-alexghiti@rivosinc.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773111700666751443 X-GMAIL-MSGID: 1773111700666751443 riscv now supports mmaping hardware counters to userspace so adapt the test to run on this architecture. Signed-off-by: Alexandre Ghiti Reviewed-by: Andrew Jones Reviewed-by: Atish Patra --- tools/perf/tests/mmap-basic.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tools/perf/tests/mmap-basic.c b/tools/perf/tests/mmap-basic.c index e68ca6229756..886a13a77a16 100644 --- a/tools/perf/tests/mmap-basic.c +++ b/tools/perf/tests/mmap-basic.c @@ -284,7 +284,8 @@ static struct test_case tests__basic_mmap[] = { "permissions"), TEST_CASE_REASON("User space counter reading of instructions", mmap_user_read_instr, -#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) +#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) || \ + (defined(__riscv) && __riscv_xlen == 64) "permissions" #else "unsupported" @@ -292,7 +293,8 @@ static struct test_case tests__basic_mmap[] = { ), TEST_CASE_REASON("User space counter reading of cycles", mmap_user_read_cycles, -#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) +#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) || \ + (defined(__riscv) && __riscv_xlen == 64) "permissions" #else "unsupported"