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[2620:137:e000::1:20]) by mx.google.com with ESMTP id l3-20020a170906078300b00992bbdebdbesi1074411ejc.785.2023.07.27.08.23.27; Thu, 27 Jul 2023 08:24:30 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b="yP+N/GlB"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231882AbjG0PAQ (ORCPT + 99 others); Thu, 27 Jul 2023 11:00:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45740 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233337AbjG0PAL (ORCPT ); Thu, 27 Jul 2023 11:00:11 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 778F3B6; Thu, 27 Jul 2023 08:00:08 -0700 (PDT) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 36RA9Ies027858; Thu, 27 Jul 2023 16:59:47 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=4QX9Z5N4IBM3jR26vAY1wmUBBclNiX7yJiB7oyvXpaY=; b=yP+N/GlBOlK1/ufli5zYvaBrvT7SWuDBVH3qGKysJWdfo0N8rAD/qVecg04R6iy+2E3W r9Mlj7FuQuXXm2I9ZMLnO/40PcE8GD0KC0G9RaS45t2Dt0CI/JFhXbAcoeHvJQygWBBe V7NVsfmePv8NnlalqwtOXyTqBZ9/hnF6hgE6r/a4XRV/hKhHnDcJIblNayU6oKAq0/oq N+rJqY+sB0XIggO2TjgLsX4f/u/JJSXjQiw+4mnXoFWRrvcwOXBMPCYrx4SpSbwAFZGo BYRTugOgCcsrwWYax+6m4YLH6QCPqK5E8jX0N7aB+o6vmykaFBl4sKhM24ticQHWZ4iz KQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3s3kn2b15m-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 27 Jul 2023 16:59:47 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5FD8910002A; Thu, 27 Jul 2023 16:59:47 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 579CF209721; Thu, 27 Jul 2023 16:59:47 +0200 (CEST) Received: from localhost (10.201.20.178) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 27 Jul 2023 16:59:47 +0200 From: Olivier Moysan To: Jonathan Cameron , Lars-Peter Clausen CC: Olivier Moysan , , Subject: [RFC v2 01/11] iio: introduce iio backend device Date: Thu, 27 Jul 2023 16:59:27 +0200 Message-ID: <20230727145939.1157607-2-olivier.moysan@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230727145939.1157607-1-olivier.moysan@foss.st.com> References: <20230727145939.1157607-1-olivier.moysan@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.20.178] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-27_07,2023-07-26_01,2023-05-22_02 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772587812638132913 X-GMAIL-MSGID: 1772587812638132913 Add a new device type in IIO framework. This backend device does not compute channel attributes and does not expose them through sysfs, as done typically in iio-rescale frontend device. Instead, it allows to report information applying to channel attributes through callbacks. These backend devices can be cascaded to represent chained components. An IIO device configured as a consumer of a backend device can compute the channel attributes of the whole chain. Signed-off-by: Olivier Moysan --- drivers/iio/Makefile | 1 + drivers/iio/industrialio-backend.c | 107 +++++++++++++++++++++++++++++ include/linux/iio/backend.h | 56 +++++++++++++++ 3 files changed, 164 insertions(+) create mode 100644 drivers/iio/industrialio-backend.c create mode 100644 include/linux/iio/backend.h diff --git a/drivers/iio/Makefile b/drivers/iio/Makefile index 9622347a1c1b..9b59c6ab1738 100644 --- a/drivers/iio/Makefile +++ b/drivers/iio/Makefile @@ -5,6 +5,7 @@ obj-$(CONFIG_IIO) += industrialio.o industrialio-y := industrialio-core.o industrialio-event.o inkern.o +industrialio-$(CONFIG_IIO_BACKEND) += industrialio-backend.o industrialio-$(CONFIG_IIO_BUFFER) += industrialio-buffer.o industrialio-$(CONFIG_IIO_TRIGGER) += industrialio-trigger.o diff --git a/drivers/iio/industrialio-backend.c b/drivers/iio/industrialio-backend.c new file mode 100644 index 000000000000..7d0625889873 --- /dev/null +++ b/drivers/iio/industrialio-backend.c @@ -0,0 +1,107 @@ +// SPDX-License-Identifier: GPL-2.0 +/* The industrial I/O core, backend handling functions + * + */ + +#include +#include +#include +#include +#include + +static DEFINE_IDA(iio_backend_ida); + +#define to_iio_backend(_device) container_of((_device), struct iio_backend, dev) + +static void iio_backend_release(struct device *device) +{ + struct iio_backend *backend = to_iio_backend(device); + + kfree(backend->name); + kfree(backend); +} + +static const struct device_type iio_backend_type = { + .release = iio_backend_release, + .name = "iio_backend_device", +}; + +struct iio_backend *iio_backend_alloc(struct device *parent) +{ + struct iio_backend *backend; + + backend = devm_kzalloc(parent, sizeof(*backend), GFP_KERNEL); + + backend->dev.parent = parent; + backend->dev.type = &iio_backend_type; + backend->dev.bus = &iio_bus_type; + device_initialize(&backend->dev); + + return backend; +}; +EXPORT_SYMBOL(iio_backend_alloc); + +void iio_backend_free(struct device *dev) +{ + if (dev) + put_device(dev); +} +EXPORT_SYMBOL(iio_backend_free); + +int iio_backend_register(struct iio_backend *backend) +{ + struct fwnode_handle *fwnode; + int id; + + id = ida_alloc(&iio_backend_ida, GFP_KERNEL); + if (id < 0) + return id; + backend->id = id; + + dev_set_name(&backend->dev, "backend%d", backend->id); + + if (dev_fwnode(&backend->dev)) + fwnode = dev_fwnode(&backend->dev); + else + fwnode = dev_fwnode(backend->dev.parent); + device_set_node(&backend->dev, fwnode); + + return device_add(&backend->dev); +}; +EXPORT_SYMBOL(iio_backend_register); + +void iio_backend_unregister(struct iio_backend *backend) +{ + device_del(&backend->dev); +}; +EXPORT_SYMBOL(iio_backend_unregister); + +struct iio_backend *fwnode_iio_backend_get(struct fwnode_handle *fwnode, int index) +{ + struct iio_backend *backend; + struct fwnode_reference_args iiospec; + struct device *bdev; + int ret; + + if (index < 0) + return ERR_PTR(-EINVAL); + + ret = fwnode_property_get_reference_args(fwnode, "io-backends", + "#io-backend-cells", 0, + index, &iiospec); + if (ret) + return ERR_PTR(ret); + + bdev = bus_find_device_by_fwnode(&iio_bus_type, iiospec.fwnode); + if (!bdev) { + fwnode_handle_put(iiospec.fwnode); + return ERR_PTR(-EPROBE_DEFER); + } + + backend = to_iio_backend(bdev); + + fwnode_handle_put(iiospec.fwnode); + + return backend; +}; +EXPORT_SYMBOL(fwnode_iio_backend_get); diff --git a/include/linux/iio/backend.h b/include/linux/iio/backend.h new file mode 100644 index 000000000000..d90d345a4625 --- /dev/null +++ b/include/linux/iio/backend.h @@ -0,0 +1,56 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * The industrial I/O core, backend handling functions + * + * Author: Olivier Moysan . + */ + +#ifndef _IIO_BACKEND_H_ +#define _IIO_BACKEND_H_ +#include + +struct iio_backend_ops; +struct iio_backend; + +/** + * struct iio_backend_ops - operations structure for an iio_backend + * @enable: switch on backend + * @disable: switch off backend + * @read_raw: read data from backend + **/ +struct iio_backend_ops { + int (*enable)(struct iio_backend *backend); + int (*disable)(struct iio_backend *backend); + int (*read_raw)(struct iio_backend *backend, int *val, int *val2, long mask); +}; + +/** + * truct iio_backend - industrial I/O backend device + * @ops: operations structure + * @module: owner of this driver module + * @id: unique id number + * @name: unique name + * @dev: associated device + * @priv: private data pointer + **/ +struct iio_backend { + const struct iio_backend_ops *ops; + struct module *owner; + int id; + const char *name; + struct device dev; + struct list_head list; + void *priv; +}; + +struct iio_backend *iio_backend_alloc(struct device *parent); + +void iio_backend_free(struct device *dev); + +int iio_backend_register(struct iio_backend *backend); + +void iio_backend_unregister(struct iio_backend *backend); + +struct iio_backend *fwnode_iio_backend_get(struct fwnode_handle *fwnode, int index); + +#endif /* _IIO_BACKEND_H_ */ From patchwork Thu Jul 27 15:03:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier MOYSAN X-Patchwork-Id: 127027 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a985:0:b0:3e4:2afc:c1 with SMTP id t5csp1180515vqo; Thu, 27 Jul 2023 08:30:06 -0700 (PDT) X-Google-Smtp-Source: APBJJlFsgDSHhgXblzL66Ts7x1C3jvWD8vRvQJ4Eh0VF+RGWaP1PBMMOqzCjVf/LZgqtq5LBk8xX X-Received: by 2002:a17:906:64c6:b0:99b:65fa:fc24 with SMTP id p6-20020a17090664c600b0099b65fafc24mr2658715ejn.36.1690471805716; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id pg25-20020a170907205900b00989623654c0si1063603ejb.823.2023.07.27.08.29.39; Thu, 27 Jul 2023 08:30:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=I4TEnSw0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234210AbjG0PDx (ORCPT + 99 others); Thu, 27 Jul 2023 11:03:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234241AbjG0PDv (ORCPT ); Thu, 27 Jul 2023 11:03:51 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 157C3B5; Thu, 27 Jul 2023 08:03:47 -0700 (PDT) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 36RCaNnw025960; Thu, 27 Jul 2023 17:03:38 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=kgwPhXs1Maa25udKJpXQZWNhB3KaaHj5JLRCEEzOU1U=; b=I4TEnSw0wcy0ori4+4VXxUOZq+V9oYq0Ohc/rzs9UIX9h+7Dx8b7qMrth6Ax5bwYaVQl rb5CvSXYbisiBDEnan20dLUR7f0AEVKDX1+Nx0PmbksPcBK6p9XCV6k7f8YMDJqc9Dzd miQRg4g3Ig/mzaMKu9vpts6BYShTY/90BmE3ntr3XlPx8b8FkcqjovrS2wxSmczEqEWt 8eSu/v85886gyMh0LcHqWH2a6zpGTu1toUdwv5k3Yba1OFovPdiNG1TEoriPqJqomRoK HBBylzkU4HUXMq63mH76re+phXeDDOIjs1s+b9lGDuU83rlcsx6zGd8lLLLGzPkHDnXV Bg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3s3n7wtbr3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 27 Jul 2023 17:03:38 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2993310002A; Thu, 27 Jul 2023 17:03:38 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 231A9209BA0; Thu, 27 Jul 2023 17:03:38 +0200 (CEST) Received: from localhost (10.201.20.178) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 27 Jul 2023 17:03:37 +0200 From: Olivier Moysan To: Rob Herring , Frank Rowand CC: Olivier Moysan , , Subject: [RFC v2 02/11] of: property: add device link support for io-backends Date: Thu, 27 Jul 2023 17:03:13 +0200 Message-ID: <20230727150324.1157933-3-olivier.moysan@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230727150324.1157933-1-olivier.moysan@foss.st.com> References: <20230727150324.1157933-1-olivier.moysan@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.20.178] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-27_07,2023-07-26_01,2023-05-22_02 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772588164228700293 X-GMAIL-MSGID: 1772588164228700293 Add support for creating device links out of more DT properties. Signed-off-by: Olivier Moysan --- drivers/of/property.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/of/property.c b/drivers/of/property.c index ddc75cd50825..864e29e4707c 100644 --- a/drivers/of/property.c +++ b/drivers/of/property.c @@ -1244,6 +1244,7 @@ DEFINE_SIMPLE_PROP(interconnects, "interconnects", "#interconnect-cells") DEFINE_SIMPLE_PROP(iommus, "iommus", "#iommu-cells") DEFINE_SIMPLE_PROP(mboxes, "mboxes", "#mbox-cells") DEFINE_SIMPLE_PROP(io_channels, "io-channel", "#io-channel-cells") +DEFINE_SIMPLE_PROP(io_backends, "io-backend", "#io-backend-cells") DEFINE_SIMPLE_PROP(interrupt_parent, "interrupt-parent", NULL) DEFINE_SIMPLE_PROP(dmas, "dmas", "#dma-cells") DEFINE_SIMPLE_PROP(power_domains, "power-domains", "#power-domain-cells") @@ -1332,6 +1333,7 @@ static const struct supplier_bindings of_supplier_bindings[] = { { .parse_prop = parse_iommu_maps, .optional = true, }, { .parse_prop = parse_mboxes, }, { .parse_prop = parse_io_channels, }, + { .parse_prop = parse_io_backends, }, { .parse_prop = parse_interrupt_parent, }, { .parse_prop = parse_dmas, .optional = true, }, { .parse_prop = parse_power_domains, }, From patchwork Thu Jul 27 15:03:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier MOYSAN X-Patchwork-Id: 127018 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a985:0:b0:3e4:2afc:c1 with SMTP id t5csp1179047vqo; Thu, 27 Jul 2023 08:27:32 -0700 (PDT) X-Google-Smtp-Source: APBJJlFKdPfC/436iJXA/rPxoDMDGUUkx8XlbCCa7CWO9xpdxGFz8lusn1egy+atUHjQz7Xy16ei X-Received: by 2002:a05:6512:14b:b0:4fd:c23b:959d with SMTP id m11-20020a056512014b00b004fdc23b959dmr2048007lfo.34.1690471652320; Thu, 27 Jul 2023 08:27:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690471652; cv=none; d=google.com; s=arc-20160816; b=Xi5G/VLh9n9/jbo7rPC5gxB4zMI/6bCzHkM2/sUwJvaUtkS+J8dODeH3891EPcemvf RUFPltcyf8t0CRV4gzrADJB9hN73OEr9Lw/4Y1JLdlADjVTj2WVYmA0DQ5vgN1sokr05 Rt4fl0Ssq5CmrIMiyhSzT5RPherxEDbO5irxL+60bjnVV/1ze7qDzZJcHOTETjY9NDGY a9FMpKWH4JVxBJDLuHD1+ofLkSvdXmPSpGiFwh9YPsX70TiQzNQenckpuCVX55H+FyVt 65SKX6NXJ+3/XrsGJxkFfNjbUkIXdZHwfO92JXi3YwQLPOQPPAe8gdTsNMQXaEz6OLDI R5bw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=54e2m5OKuocPe4dp4QsV6CEA9XKHKLdL/q4eaLhIrXU=; fh=2vMhnbiw60wqdbLfOiz+c35NT9X5ypy3q0CsI/pKjNI=; b=cG+3KbOM7CXaMoAVH1vFXeBv3lHCylvyJ1mIh83+PYM9aBM7qRz9gmViiykwgRPnP/ poB5JqIj5r7bZViUqJCW9ud0FKVnt8q6cA1cZNiSNmN1UX0duZ0CuBKLJ9oAwF89p2WS W4O0PKGy3kFgzSGYqOiAupAeMgw1tEV/b5lF1I69W1dCC9kSzi6R3h67/ECQJCUmX3Gv FVn7NaQI+NS3g7jy36UyzE+oONZK1KYGQFJSGmBUReT5i77+rEImT1tknEG8LMWwH4ep MvTFPZwPCvNgscr6ZE8eIdsD8Z9rMlNMDaC1U2C5DMlz5BDvJ1i7NB120u/oQtpqpHH/ iV8g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=MQkN1j5N; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: from out1.vger.email (out1.vger.email. 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This introduces the following changes: - Add ADC generic channel binding and remove support of deprecated channel bindings. - DFSDM is now implemented as a channel provider, so remove io-channels properties. - Add iio-backend property to connect DFSDM to an SD modulator. Signed-off-by: Olivier Moysan --- .../bindings/iio/adc/st,stm32-dfsdm-adc.yaml | 189 ++++++------------ 1 file changed, 63 insertions(+), 126 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml index 1970503389aa..128545cedc7f 100644 --- a/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml @@ -85,22 +85,14 @@ patternProperties: description: Specifies the DFSDM filter instance used. maxItems: 1 - interrupts: - maxItems: 1 + '#address-cells': + const: 1 - st,adc-channels: - description: | - List of single-ended channels muxed for this ADC. - On stm32h7 and stm32mp1: - - For st,stm32-dfsdm-adc: up to 8 channels numbered from 0 to 7. - - For st,stm32-dfsdm-dmic: 1 channel numbered from 0 to 7. - $ref: /schemas/types.yaml#/definitions/uint32-array - items: - minimum: 0 - maximum: 7 + '#size-cells': + const: 0 - st,adc-channel-names: - description: List of single-ended channel names. + interrupts: + maxItems: 1 st,filter-order: description: | @@ -111,39 +103,6 @@ patternProperties: $ref: /schemas/types.yaml#/definitions/uint32 maximum: 5 - "#io-channel-cells": - const: 1 - - st,adc-channel-types: - description: | - Single-ended channel input type. - - "SPI_R": SPI with data on rising edge (default) - - "SPI_F": SPI with data on falling edge - - "MANCH_R": manchester codec, rising edge = logic 0, falling edge = logic 1 - - "MANCH_F": manchester codec, rising edge = logic 1, falling edge = logic 0 - items: - enum: [ SPI_R, SPI_F, MANCH_R, MANCH_F ] - $ref: /schemas/types.yaml#/definitions/non-unique-string-array - - st,adc-channel-clk-src: - description: | - Conversion clock source. - - "CLKIN": external SPI clock (CLKIN x) - - "CLKOUT": internal SPI clock (CLKOUT) (default) - - "CLKOUT_F": internal SPI clock divided by 2 (falling edge). - - "CLKOUT_R": internal SPI clock divided by 2 (rising edge). - items: - enum: [ CLKIN, CLKOUT, CLKOUT_F, CLKOUT_R ] - $ref: /schemas/types.yaml#/definitions/non-unique-string-array - - st,adc-alt-channel: - description: - Must be defined if two sigma delta modulators are - connected on same SPI input. - If not set, channel n is connected to SPI input n. - If set, channel n is connected to SPI input n + 1. - type: boolean - st,filter0-sync: description: Set to 1 to synchronize with DFSDM filter instance 0. @@ -157,14 +116,68 @@ patternProperties: items: - const: rx + patternProperties: + "^channel@([0-9]|1[0-9])$": + type: object + $ref: "adc.yaml" + description: Represents the external channels which are connected to the DFSDM. + + properties: + reg: + items: + minimum: 0 + maximum: 19 + + label: + description: | + Unique name to identify channel. + + st,adc-channel-types: + description: | + Single-ended channel input type. + - "SPI_R": SPI with data on rising edge (default) + - "SPI_F": SPI with data on falling edge + - "MANCH_R": manchester codec, rising edge = logic 0, falling edge = logic 1 + - "MANCH_F": manchester codec, rising edge = logic 1, falling edge = logic 0 + items: + enum: [ SPI_R, SPI_F, MANCH_R, MANCH_F ] + $ref: /schemas/types.yaml#/definitions/non-unique-string-array + + st,adc-channel-clk-src: + description: | + Conversion clock source. + - "CLKIN": external SPI clock (CLKIN x) + - "CLKOUT": internal SPI clock (CLKOUT) (default) + - "CLKOUT_F": internal SPI clock divided by 2 (falling edge). + - "CLKOUT_R": internal SPI clock divided by 2 (rising edge). + items: + enum: [ CLKIN, CLKOUT, CLKOUT_F, CLKOUT_R ] + $ref: /schemas/types.yaml#/definitions/non-unique-string-array + + st,adc-alt-channel: + description: + Must be defined if two sigma delta modulators are + connected on same SPI input. + If not set, channel n is connected to SPI input n. + If set, channel n is connected to SPI input n + 1. + type: boolean + + io-backends: + description: | + phandle to an external sigma delta modulator or internal ADC output. + $ref: /schemas/types.yaml#/definitions/phandle + + required: + - reg + - io-backends + + additionalProperties: false + required: - compatible - reg - interrupts - - st,adc-channels - - st,adc-channel-names - st,filter-order - - "#io-channel-cells" allOf: - if: @@ -175,14 +188,6 @@ patternProperties: then: properties: - st,adc-channels: - minItems: 1 - maxItems: 8 - - st,adc-channel-names: - minItems: 1 - maxItems: 8 - st,adc-channel-types: minItems: 1 maxItems: 8 @@ -191,14 +196,6 @@ patternProperties: minItems: 1 maxItems: 8 - io-channels: - description: - From common IIO binding. Used to pipe external sigma delta - modulator or internal ADC output to DFSDM channel. - - required: - - io-channels - - if: properties: compatible: @@ -207,12 +204,6 @@ patternProperties: then: properties: - st,adc-channels: - maxItems: 1 - - st,adc-channel-names: - maxItems: 1 - st,adc-channel-types: maxItems: 1 @@ -237,15 +228,9 @@ patternProperties: "#sound-dai-cells": const: 0 - io-channels: - description: - From common IIO binding. Used to pipe external sigma delta - modulator or internal ADC output to DFSDM channel. - required: - compatible - "#sound-dai-cells" - - io-channels allOf: - if: @@ -278,52 +263,4 @@ allOf: minimum: 0 maximum: 5 -examples: - - | - #include - #include - dfsdm: dfsdm@4400d000 { - compatible = "st,stm32mp1-dfsdm"; - reg = <0x4400d000 0x800>; - clocks = <&rcc DFSDM_K>, <&rcc ADFSDM_K>; - clock-names = "dfsdm", "audio"; - #address-cells = <1>; - #size-cells = <0>; - - dfsdm0: filter@0 { - compatible = "st,stm32-dfsdm-dmic"; - reg = <0>; - interrupts = ; - dmas = <&dmamux1 101 0x400 0x01>; - dma-names = "rx"; - #io-channel-cells = <1>; - st,adc-channels = <1>; - st,adc-channel-names = "dmic0"; - st,adc-channel-types = "SPI_R"; - st,adc-channel-clk-src = "CLKOUT"; - st,filter-order = <5>; - - asoc_pdm0: dfsdm-dai { - compatible = "st,stm32h7-dfsdm-dai"; - #sound-dai-cells = <0>; - io-channels = <&dfsdm0 0>; - }; - }; - - dfsdm_pdm1: filter@1 { - compatible = "st,stm32-dfsdm-adc"; - reg = <1>; - interrupts = ; - dmas = <&dmamux1 102 0x400 0x01>; - dma-names = "rx"; - #io-channel-cells = <1>; - st,adc-channels = <2 3>; - st,adc-channel-names = "in2", "in3"; - st,adc-channel-types = "SPI_R", "SPI_R"; - st,adc-channel-clk-src = "CLKOUT_F", "CLKOUT_F"; - io-channels = <&sd_adc2 &sd_adc3>; - st,filter-order = <1>; - }; - }; - ... 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Signed-off-by: Olivier Moysan --- .../bindings/iio/adc/sigma-delta-modulator.yaml | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.yaml b/Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.yaml index cab0d425eaa4..bcc446c6428c 100644 --- a/Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.yaml +++ b/Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.yaml @@ -18,12 +18,15 @@ properties: - sd-modulator - ads1201 - '#io-channel-cells': + '#io-backend-cells': const: 0 + vref-supply: + description: Phandle to the SD modulator reference voltage. + required: - compatible - - '#io-channel-cells' + - '#io-backend-cells' additionalProperties: false @@ -31,7 +34,7 @@ examples: - | ads1202: adc { compatible = "sd-modulator"; - #io-channel-cells = <0>; + #io-backend-cells = <0>; }; ... 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id l19-20020a056a0016d300b00686e01db946si1576463pfc.64.2023.07.27.08.21.59; Thu, 27 Jul 2023 08:22:12 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=keUKRDlc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234010AbjG0PFS (ORCPT + 99 others); Thu, 27 Jul 2023 11:05:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234285AbjG0PFP (ORCPT ); Thu, 27 Jul 2023 11:05:15 -0400 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B880D2D6A; Thu, 27 Jul 2023 08:05:02 -0700 (PDT) Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 36RDwsH6003283; Thu, 27 Jul 2023 17:04:42 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=1HexxHO3uTDqpGlWTz+VbBPKNGXF+V4IZdmqjKDA/WM=; b=keUKRDlcIWr/doP4QvHqbpQfbh0mjl1KQZI2PhDswc0ahFkiPnGzQtLzFKgnQs1hODzz 19/VuqFRJ1LYFyx7IC1L9WGfuJghbwFfbU/af+Z9arh0smggBP0Vnw/A3VgXTOpu5rUj txA+fzhQ4Q7/A4mac0jvkY/9JsahJg1KS8QXJ5iZeEMCe5ZCldRar1C1j1hwYBbPA87S k7Bx3jM3tFmmwqKkG8qJD1PTX1sbn8XQUK1z683+4vndHuI3ZW3HpTkTBY6WKhrUkJZN Iip5rwlMAkZktwHxu6cZfHz+BC5tEu6kv26S39X2nu8tQJLt0ZrEBPnfDtJ3mwrXYvxS /g== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3s3nyg9x5p-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 27 Jul 2023 17:04:42 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 515F310002A; Thu, 27 Jul 2023 17:04:42 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 4A5C1209BA2; Thu, 27 Jul 2023 17:04:42 +0200 (CEST) Received: from localhost (10.201.20.178) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 27 Jul 2023 17:04:41 +0200 From: Olivier Moysan To: Jonathan Cameron , Lars-Peter Clausen , Maxime Coquelin , Alexandre Torgue CC: Olivier Moysan , , , , Subject: [RFC v2 05/11] iio: adc: stm32-dfsdm: manage dfsdm as a channel provider Date: Thu, 27 Jul 2023 17:03:16 +0200 Message-ID: <20230727150324.1157933-6-olivier.moysan@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230727150324.1157933-1-olivier.moysan@foss.st.com> References: <20230727150324.1157933-1-olivier.moysan@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.20.178] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-27_07,2023-07-26_01,2023-05-22_02 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772587667837334298 X-GMAIL-MSGID: 1772587667837334298 The STM32 is currently implemented as a channels consumer of the sigma delta modulator. Change the topology to expose a single IIO device for DFSDM and remove the IIO device associated to the SD modulator. Manage the DFSDM as a channel provider to allow this change. Signed-off-by: Olivier Moysan --- drivers/iio/adc/stm32-dfsdm-adc.c | 19 ------------------- 1 file changed, 19 deletions(-) diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c b/drivers/iio/adc/stm32-dfsdm-adc.c index b5cc43d12b6f..20f7dffcecdd 100644 --- a/drivers/iio/adc/stm32-dfsdm-adc.c +++ b/drivers/iio/adc/stm32-dfsdm-adc.c @@ -77,7 +77,6 @@ struct stm32_dfsdm_adc { /* ADC specific */ unsigned int oversamp; - struct iio_hw_consumer *hwc; struct completion completion; u32 *buffer; @@ -1007,12 +1006,6 @@ static int stm32_dfsdm_postenable(struct iio_dev *indio_dev) /* Reset adc buffer index */ adc->bufi = 0; - if (adc->hwc) { - ret = iio_hw_consumer_enable(adc->hwc); - if (ret < 0) - return ret; - } - ret = stm32_dfsdm_start_dfsdm(adc->dfsdm); if (ret < 0) goto err_stop_hwc; @@ -1036,8 +1029,6 @@ static int stm32_dfsdm_postenable(struct iio_dev *indio_dev) stop_dfsdm: stm32_dfsdm_stop_dfsdm(adc->dfsdm); err_stop_hwc: - if (adc->hwc) - iio_hw_consumer_disable(adc->hwc); return ret; } @@ -1052,9 +1043,6 @@ static int stm32_dfsdm_predisable(struct iio_dev *indio_dev) stm32_dfsdm_stop_dfsdm(adc->dfsdm); - if (adc->hwc) - iio_hw_consumer_disable(adc->hwc); - return 0; } @@ -1231,7 +1219,6 @@ static int stm32_dfsdm_read_raw(struct iio_dev *indio_dev, ret = iio_device_claim_direct_mode(indio_dev); if (ret) return ret; - ret = iio_hw_consumer_enable(adc->hwc); if (ret < 0) { dev_err(&indio_dev->dev, "%s: IIO enable failed (channel %d)\n", @@ -1240,7 +1227,6 @@ static int stm32_dfsdm_read_raw(struct iio_dev *indio_dev, return ret; } ret = stm32_dfsdm_single_conv(indio_dev, chan, val); - iio_hw_consumer_disable(adc->hwc); if (ret < 0) { dev_err(&indio_dev->dev, "%s: Conversion failed (channel %d)\n", @@ -1450,11 +1436,6 @@ static int stm32_dfsdm_adc_init(struct device *dev, struct iio_dev *indio_dev) return num_ch < 0 ? num_ch : -EINVAL; } - /* Bind to SD modulator IIO device */ - adc->hwc = devm_iio_hw_consumer_alloc(&indio_dev->dev); - if (IS_ERR(adc->hwc)) - return -EPROBE_DEFER; - ch = devm_kcalloc(&indio_dev->dev, num_ch, sizeof(*ch), GFP_KERNEL); if (!ch) From patchwork Thu Jul 27 15:03:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier MOYSAN X-Patchwork-Id: 127029 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a985:0:b0:3e4:2afc:c1 with SMTP id t5csp1181268vqo; Thu, 27 Jul 2023 08:31:07 -0700 (PDT) X-Google-Smtp-Source: APBJJlHaGJNjOUlQNP7yzlhKVXYr4grZI3X5e2PPYHXU5MYUqz4eHd4vduu71s6lxflcp77WkBkJ X-Received: by 2002:a05:6a20:8f06:b0:133:fd64:8d48 with SMTP id b6-20020a056a208f0600b00133fd648d48mr6069321pzk.4.1690471867289; Thu, 27 Jul 2023 08:31:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690471867; cv=none; d=google.com; s=arc-20160816; b=ZPTDCfR4P6t3E3qJ7loGMPMd6JmUwkLSxeIiVwC6j73/g1QmIUBAhf/hNhOzSE69g9 z2J1TaYLpksiHoTqe61mIhwmyZKUqQy11xG6AmPLPoCyGO83jAGZ9821fTl9iDlGV+TB kNTpNf+oeF4cZQtJjkDR/f7rpKozjZGF0RhrWecM4uAxkgasTOvP89N3iJAFbB6NeJOq FwvpowXVBfLMir/4s4wgekSnd2MnLZ2tkz9YE8nPDl8Oh9nsSW+BKEUV3LH0/QDya6Qh W7tPpZD+FMRWavTyL6X8xEVzMj54pX6xe5cn00cZRpwcD1/ZfghJXAkScFS5AvCprrj8 HT+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=zmIPHW6iVYvOYi7oMUl9xnnwWipA141Ebb8TXiBkQXc=; fh=42jSwuUdQgIFjVywY++Ia2km8UzOxzzola+DfXSc5DA=; b=bcZH8QAHe+qW1sE5oN2ExTe2uTwmCI+jimeUu2l7nJEOmxemZ/30JtTclr+ljTsiQc U/Mnu1CY+2xGZ+RsTENdxll1YDk+6th2Rfiqpz49SvF4zjryfqju76seM60sHEjEy+Xj IgC1CGm0Wjpi2v+r4aBArnPnE9cWie90yoNBwovm+ofowUiqxl8CQHaVp6YZUxntqEOD gnRPr2Rl16TufKwd/wDEAzPeWswq04Q2ApUi+Ih4oFAfLl/ABBNUTXUknyoriTUh8vN+ 0PyP25gbsP/sAKRzvT5ZlO7IQb7m5fwziHa2QMHlc9miB9vx/xFgLobqR90X9ngBJ+UZ 7Pyg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=6QX4TiYS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: from out1.vger.email (out1.vger.email. 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Also adopt unified device property API in the same patch for this RFC. Signed-off-by: Olivier Moysan --- drivers/iio/adc/stm32-dfsdm-adc.c | 93 ++++++++++++++++--------------- 1 file changed, 49 insertions(+), 44 deletions(-) diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c b/drivers/iio/adc/stm32-dfsdm-adc.c index 20f7dffcecdd..96f4e0c64cdc 100644 --- a/drivers/iio/adc/stm32-dfsdm-adc.c +++ b/drivers/iio/adc/stm32-dfsdm-adc.c @@ -596,45 +596,35 @@ static int stm32_dfsdm_filter_configure(struct iio_dev *indio_dev, static int stm32_dfsdm_channel_parse_of(struct stm32_dfsdm *dfsdm, struct iio_dev *indio_dev, + struct fwnode_handle *node, struct iio_chan_spec *ch) { struct stm32_dfsdm_channel *df_ch; const char *of_str; - int chan_idx = ch->scan_index; int ret, val; - ret = of_property_read_u32_index(indio_dev->dev.of_node, - "st,adc-channels", chan_idx, - &ch->channel); + ret = fwnode_property_read_u32(node, "reg", &ch->channel); if (ret < 0) { - dev_err(&indio_dev->dev, - " Error parsing 'st,adc-channels' for idx %d\n", - chan_idx); + dev_err(&indio_dev->dev, "Missing channel index %d\n", ret); return ret; } if (ch->channel >= dfsdm->num_chs) { - dev_err(&indio_dev->dev, - " Error bad channel number %d (max = %d)\n", + dev_err(&indio_dev->dev, " Error bad channel number %d (max = %d)\n", ch->channel, dfsdm->num_chs); return -EINVAL; } - ret = of_property_read_string_index(indio_dev->dev.of_node, - "st,adc-channel-names", chan_idx, - &ch->datasheet_name); + ret = fwnode_property_read_string(node, "label", &ch->datasheet_name); if (ret < 0) { dev_err(&indio_dev->dev, - " Error parsing 'st,adc-channel-names' for idx %d\n", - chan_idx); + " Error parsing 'label' for idx %d\n", ch->channel); return ret; } df_ch = &dfsdm->ch_list[ch->channel]; df_ch->id = ch->channel; - ret = of_property_read_string_index(indio_dev->dev.of_node, - "st,adc-channel-types", chan_idx, - &of_str); + ret = fwnode_property_read_string(node, "st,adc-channel-types", &of_str); if (!ret) { val = stm32_dfsdm_str2val(of_str, stm32_dfsdm_chan_type); if (val < 0) @@ -644,9 +634,7 @@ static int stm32_dfsdm_channel_parse_of(struct stm32_dfsdm *dfsdm, } df_ch->type = val; - ret = of_property_read_string_index(indio_dev->dev.of_node, - "st,adc-channel-clk-src", chan_idx, - &of_str); + ret = fwnode_property_read_string(node, "st,adc-channel-clk-src", &of_str); if (!ret) { val = stm32_dfsdm_str2val(of_str, stm32_dfsdm_chan_src); if (val < 0) @@ -656,10 +644,8 @@ static int stm32_dfsdm_channel_parse_of(struct stm32_dfsdm *dfsdm, } df_ch->src = val; - ret = of_property_read_u32_index(indio_dev->dev.of_node, - "st,adc-alt-channel", chan_idx, - &df_ch->alt_si); - if (ret < 0) + ret = fwnode_property_read_u32(node, "st,adc-alt-channel", &df_ch->alt_si); + if (ret != -EINVAL) df_ch->alt_si = 0; return 0; @@ -1354,17 +1340,21 @@ static int stm32_dfsdm_dma_request(struct device *dev, } static int stm32_dfsdm_adc_chan_init_one(struct iio_dev *indio_dev, + struct fwnode_handle *child, struct iio_chan_spec *ch) { struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); int ret; - ret = stm32_dfsdm_channel_parse_of(adc->dfsdm, indio_dev, ch); - if (ret < 0) + ret = stm32_dfsdm_channel_parse_of(adc->dfsdm, indio_dev, child, ch); + if (ret < 0) { + dev_err(&indio_dev->dev, "Failed to parse channel\n"); return ret; + } ch->type = IIO_VOLTAGE; ch->indexed = 1; + ch->scan_index = ch->channel; /* * IIO_CHAN_INFO_RAW: used to compute regular conversion @@ -1387,6 +1377,30 @@ static int stm32_dfsdm_adc_chan_init_one(struct iio_dev *indio_dev, &adc->dfsdm->ch_list[ch->channel]); } +static int stm32_dfsdm_generic_chan_init(struct iio_dev *indio_dev, struct stm32_dfsdm_adc *adc, + struct iio_chan_spec *channels) +{ + struct fwnode_handle *child; + int chan_idx = 0, ret; + + device_for_each_child_node(&indio_dev->dev, child) { + ret = stm32_dfsdm_adc_chan_init_one(indio_dev, child, &channels[chan_idx]); + if (ret < 0) { + dev_err(&indio_dev->dev, "Channels init failed\n"); + goto err; + } + + chan_idx++; + } + + return chan_idx; + +err: + fwnode_handle_put(child); + + return ret; +} + static int stm32_dfsdm_audio_init(struct device *dev, struct iio_dev *indio_dev) { struct iio_chan_spec *ch; @@ -1400,7 +1414,7 @@ static int stm32_dfsdm_audio_init(struct device *dev, struct iio_dev *indio_dev) ch->scan_index = 0; - ret = stm32_dfsdm_adc_chan_init_one(indio_dev, ch); + ret = stm32_dfsdm_generic_chan_init(indio_dev, adc, ch); if (ret < 0) { dev_err(&indio_dev->dev, "Channels init failed\n"); return ret; @@ -1422,33 +1436,24 @@ static int stm32_dfsdm_adc_init(struct device *dev, struct iio_dev *indio_dev) struct iio_chan_spec *ch; struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); int num_ch; - int ret, chan_idx; + int ret; adc->oversamp = DFSDM_DEFAULT_OVERSAMPLING; ret = stm32_dfsdm_compute_all_osrs(indio_dev, adc->oversamp); if (ret < 0) return ret; - num_ch = of_property_count_u32_elems(indio_dev->dev.of_node, - "st,adc-channels"); - if (num_ch < 0 || num_ch > adc->dfsdm->num_chs) { - dev_err(&indio_dev->dev, "Bad st,adc-channels\n"); - return num_ch < 0 ? num_ch : -EINVAL; - } + num_ch = device_get_child_node_count(&indio_dev->dev); + if (!num_ch) + return -EINVAL; - ch = devm_kcalloc(&indio_dev->dev, num_ch, sizeof(*ch), - GFP_KERNEL); + ch = devm_kcalloc(&indio_dev->dev, num_ch, sizeof(*ch), GFP_KERNEL); if (!ch) return -ENOMEM; - for (chan_idx = 0; chan_idx < num_ch; chan_idx++) { - ch[chan_idx].scan_index = chan_idx; - ret = stm32_dfsdm_adc_chan_init_one(indio_dev, &ch[chan_idx]); - if (ret < 0) { - dev_err(&indio_dev->dev, "Channels init failed\n"); - return ret; - } - } + stm32_dfsdm_generic_chan_init(indio_dev, adc, ch); + if (ret < 0) + return ret; indio_dev->num_channels = num_ch; indio_dev->channels = ch; From patchwork Thu Jul 27 15:03:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier MOYSAN X-Patchwork-Id: 127021 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a985:0:b0:3e4:2afc:c1 with SMTP id t5csp1179553vqo; Thu, 27 Jul 2023 08:28:26 -0700 (PDT) X-Google-Smtp-Source: APBJJlFVldOay+yLJqtWg+dUAIzQsZpTOVuIBWEJag9KNHT0Oy6aRUA/Ib/0az86P2S36ZvH/k1s X-Received: by 2002:a2e:380b:0:b0:2b5:974f:385 with SMTP id f11-20020a2e380b000000b002b5974f0385mr2201190lja.9.1690471706334; Thu, 27 Jul 2023 08:28:26 -0700 (PDT) ARC-Seal: i=1; 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Signed-off-by: Olivier Moysan --- drivers/iio/adc/stm32-dfsdm-adc.c | 77 +++++++++++++++++++++++++++++-- 1 file changed, 73 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c b/drivers/iio/adc/stm32-dfsdm-adc.c index 96f4e0c64cdc..dba1a8ef5451 100644 --- a/drivers/iio/adc/stm32-dfsdm-adc.c +++ b/drivers/iio/adc/stm32-dfsdm-adc.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -77,6 +78,7 @@ struct stm32_dfsdm_adc { /* ADC specific */ unsigned int oversamp; + struct iio_backend **backend; struct completion completion; u32 *buffer; @@ -600,6 +602,8 @@ static int stm32_dfsdm_channel_parse_of(struct stm32_dfsdm *dfsdm, struct iio_chan_spec *ch) { struct stm32_dfsdm_channel *df_ch; + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); + struct iio_backend *backend; const char *of_str; int ret, val; @@ -648,6 +652,12 @@ static int stm32_dfsdm_channel_parse_of(struct stm32_dfsdm *dfsdm, if (ret != -EINVAL) df_ch->alt_si = 0; + backend = fwnode_iio_backend_get(node, 0); + if (IS_ERR(backend)) + return dev_err_probe(&indio_dev->dev, PTR_ERR(backend), "Failed to get backend\n"); + + adc->backend[df_ch->id] = backend; + return 0; } @@ -1091,7 +1101,7 @@ static int stm32_dfsdm_single_conv(struct iio_dev *indio_dev, { struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); long timeout; - int ret; + int ret, idx = chan->scan_index; reinit_completion(&adc->completion); @@ -1101,6 +1111,13 @@ static int stm32_dfsdm_single_conv(struct iio_dev *indio_dev, if (ret < 0) return ret; + if (!adc->backend[idx]->ops->enable) + return -EINVAL; + + ret = adc->backend[idx]->ops->enable(adc->backend[idx]); + if (ret < 0) + return ret; + ret = regmap_update_bits(adc->dfsdm->regmap, DFSDM_CR2(adc->fl_id), DFSDM_CR2_REOCIE_MASK, DFSDM_CR2_REOCIE(1)); if (ret < 0) @@ -1134,6 +1151,8 @@ static int stm32_dfsdm_single_conv(struct iio_dev *indio_dev, stm32_dfsdm_process_data(adc, res); stop_dfsdm: + ret = adc->backend[idx]->ops->disable(adc->backend[idx]); + stm32_dfsdm_stop_dfsdm(adc->dfsdm); return ret; @@ -1198,7 +1217,14 @@ static int stm32_dfsdm_read_raw(struct iio_dev *indio_dev, int *val2, long mask) { struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); - int ret; + + struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[adc->fl_id]; + struct stm32_dfsdm_filter_osr *flo = &fl->flo[fl->fast]; + u32 max = flo->max << (flo->lshift - chan->scan_type.shift); + int ret, idx = chan->scan_index; + + if (flo->lshift < chan->scan_type.shift) + max = flo->max >> (chan->scan_type.shift - flo->lshift); switch (mask) { case IIO_CHAN_INFO_RAW: @@ -1232,6 +1258,41 @@ static int stm32_dfsdm_read_raw(struct iio_dev *indio_dev, *val = adc->sample_freq; return IIO_VAL_INT; + + case IIO_CHAN_INFO_SCALE: + /* + * Scale is expressed in mV. + * When fast mode is disabled, actual resolution may be lower + * than 2^n, where n=realbits-1. + * This leads to underestimating input voltage. To + * compensate this deviation, the voltage reference can be + * corrected with a factor = realbits resolution / actual max + */ + adc->backend[idx]->ops->read_raw(adc->backend[idx], val, val2, mask); + + *val = div_u64((u64)*val * (u64)BIT(DFSDM_DATA_RES - 1), max); + *val2 = chan->scan_type.realbits; + if (chan->differential) + *val *= 2; + return IIO_VAL_FRACTIONAL_LOG2; + + case IIO_CHAN_INFO_OFFSET: + /* + * DFSDM output data are in the range [-2^n,2^n], + * with n=realbits-1. + * - Differential modulator: + * Offset correspond to SD modulator offset. + * - Single ended modulator: + * Input is in [0V,Vref] range, where 0V corresponds to -2^n, and Vref to 2^n. + * Add 2^n to offset. (i.e. middle of input range) + * offset = offset(sd) * vref / res(sd) * max / vref. + */ + adc->backend[idx]->ops->read_raw(adc->backend[idx], val, val2, mask); + + *val = div_u64((u64)max * *val, BIT(*val2 - 1)); + if (!chan->differential) + *val += max; + return IIO_VAL_INT; } return -EINVAL; @@ -1360,7 +1421,10 @@ static int stm32_dfsdm_adc_chan_init_one(struct iio_dev *indio_dev, * IIO_CHAN_INFO_RAW: used to compute regular conversion * IIO_CHAN_INFO_OVERSAMPLING_RATIO: used to set oversampling */ - ch->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); + ch->info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE) | + BIT(IIO_CHAN_INFO_OFFSET); + ch->info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO) | BIT(IIO_CHAN_INFO_SAMP_FREQ); @@ -1451,7 +1515,12 @@ static int stm32_dfsdm_adc_init(struct device *dev, struct iio_dev *indio_dev) if (!ch) return -ENOMEM; - stm32_dfsdm_generic_chan_init(indio_dev, adc, ch); + adc->backend = devm_kzalloc(&indio_dev->dev, sizeof(*adc->backend) * adc->dfsdm->num_chs, + GFP_KERNEL); + if (!adc->backend) + return -ENOMEM; + + ret = stm32_dfsdm_generic_chan_init(indio_dev, adc, ch); if (ret < 0) return ret; From patchwork Thu Jul 27 15:03:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier MOYSAN X-Patchwork-Id: 127023 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a985:0:b0:3e4:2afc:c1 with SMTP id t5csp1180035vqo; Thu, 27 Jul 2023 08:29:13 -0700 (PDT) X-Google-Smtp-Source: APBJJlE2mONYkmp8+IoboIt/Nc+gNuPy44K+Z0uPsdZ1i/FGvS4FnTbqSB1lcjOvDYJjHI/jDCIv X-Received: by 2002:a2e:8751:0:b0:2b9:c8fb:8df6 with SMTP id q17-20020a2e8751000000b002b9c8fb8df6mr877924ljj.33.1690471753371; Thu, 27 Jul 2023 08:29:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690471753; cv=none; d=google.com; s=arc-20160816; b=tuVL4LO0YX+P8NOLBOS8M86wtPsmSTZmp1gKUU2a4UxqlO9Oiv4zKd9zvKRqOD3g23 fHFvJoVuaQGb0J+As+6XT5gSXyVfvcM3LZjBSq6+PO1jzDuMzAE0uGwtcj1hPi6iAo8n uKbN6lNZGFb5MUsLc9mHaBAuCI32VgLIclw/Gmwb3mizhZPASiFQZjU7BFQfkdIZmnxA NQV+XBNpV3SLIMCNDMDmo8jhNs653wX+pDXexmwaIykLTSG+O4yqNzJx3ZpZMmJk7rMM /ZoShIorfmOhsS36zyY92AabpHRE5fP/3rrQvqQjurUjhJdcAZY1rZOaj3wGbPdLU+Ml YgoA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Pt5jUqqdSOoqnjMTkcAHM3VXQXCIBKFvR/ivoinfamw=; fh=vilCLOZi4yx25FrNNONIv48CG1ps2oXYOAPQR4WJ75Y=; b=lk5qjOX/5gupQBau5Bh+blfGNcTwsNLMMC2zA5sTlIf4/Ktv6EPp67niPspm+6jN05 x/4MEEmXJJUFic9aiXaUI2Q/lz0VJfPZzIqhY34yJN2nLM5vP2YbXejjC47dvjHaiEbV 8z59PRB8cgcSqWp/rtyWnPI1Y8nRfZJXmCbLgpuP8LqlImxgRq+3R+J8PEZbfc0QC3e6 hoRE8v6vZwV3dlesM8I4tQSM209q2TAKoNhYJ4/aaWHZY01ZO6gJA2UsxfKcGEP5J2ej Pk3hb3sjqkVKYUC1tjayjjrPPoWInjfeQDwffZ29939wUW24LS0o/g4X1YZjGRGHohbN R68g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=zymx3FJu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: from out1.vger.email (out1.vger.email. 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Expose scale and offset information to IIO backend consumer. Signed-off-by: Olivier Moysan --- drivers/iio/adc/sd_adc_modulator.c | 106 +++++++++++++++++++++++------ 1 file changed, 86 insertions(+), 20 deletions(-) diff --git a/drivers/iio/adc/sd_adc_modulator.c b/drivers/iio/adc/sd_adc_modulator.c index 327cc2097f6c..e77e7884c403 100644 --- a/drivers/iio/adc/sd_adc_modulator.c +++ b/drivers/iio/adc/sd_adc_modulator.c @@ -6,44 +6,110 @@ * Author: Arnaud Pouliquen . */ +#include #include #include #include #include #include +#include -static const struct iio_info iio_sd_mod_iio_info; +struct iio_sd_mod_priv { + struct regulator *vref; + int vref_mv; +}; -static const struct iio_chan_spec iio_sd_mod_ch = { - .type = IIO_VOLTAGE, - .indexed = 1, - .scan_type = { - .sign = 'u', - .realbits = 1, - .shift = 0, - }, +static int sd_mod_enable(struct iio_backend *backend) +{ + struct iio_sd_mod_priv *priv = backend->priv; + int ret; + + ret = regulator_enable(priv->vref); + if (ret) { + dev_err(&backend->dev, "Failed to enable regulator: %d\n", ret); + return ret; + } + + ret = regulator_get_voltage(priv->vref); + priv->vref_mv = ret / 1000; + + return 0; +}; + +static int sd_mod_disable(struct iio_backend *backend) +{ + struct iio_sd_mod_priv *priv = backend->priv; + + return regulator_disable(priv->vref); +}; + +static int sd_mod_read(struct iio_backend *backend, int *val, int *val2, long mask) +{ + struct iio_sd_mod_priv *priv = backend->priv; + + switch (mask) { + case IIO_CHAN_INFO_SCALE: + *val = priv->vref_mv; + *val2 = 0; + return IIO_VAL_INT; + + case IIO_CHAN_INFO_OFFSET: + *val = 0; + *val2 = 0; + return IIO_VAL_INT; + } + + return -EINVAL; +}; + +static const struct iio_backend_ops sd_mod_ops = { + .enable = sd_mod_enable, + .disable = sd_mod_disable, + .read_raw = sd_mod_read, }; static int iio_sd_mod_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct iio_dev *iio; + struct regulator *vref; + struct iio_backend *backend; + struct iio_sd_mod_priv *priv; + int ret; - iio = devm_iio_device_alloc(dev, 0); - if (!iio) + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) return -ENOMEM; - iio->name = dev_name(dev); - iio->info = &iio_sd_mod_iio_info; - iio->modes = INDIO_BUFFER_HARDWARE; + vref = devm_regulator_get_optional(dev, "vref"); + if (IS_ERR(vref)) { + if (PTR_ERR(vref) != -ENODEV) + return dev_err_probe(dev, PTR_ERR(vref), "Failed to get vref\n"); + } else { + priv->vref = vref; + } - iio->num_channels = 1; - iio->channels = &iio_sd_mod_ch; + backend = iio_backend_alloc(dev); + if (!backend) { + dev_err(dev, "Failed to allocate sd modulator backend data\n"); + return -ENOMEM; + } + + backend->priv = priv; + backend->ops = &sd_mod_ops; + + ret = iio_backend_register(backend); + if (ret) { + dev_err(dev, "Failed to register backend: %d\n", ret); + goto err_free_backend; + } - platform_set_drvdata(pdev, iio); + return 0; - return devm_iio_device_register(&pdev->dev, iio); -} +err_free_backend: + iio_backend_free(&backend->dev); + + return ret; +}; static const struct of_device_id sd_adc_of_match[] = { { .compatible = "sd-modulator" }, From patchwork Thu Jul 27 15:03:20 2023 Content-Type: text/plain; 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Signed-off-by: Olivier Moysan --- arch/arm/boot/dts/st/stm32mp151.dtsi | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/stm32mp151.dtsi index 61508917521c..338457357248 100644 --- a/arch/arm/boot/dts/st/stm32mp151.dtsi +++ b/arch/arm/boot/dts/st/stm32mp151.dtsi @@ -970,7 +970,8 @@ dfsdm: dfsdm@4400d000 { dfsdm0: filter@0 { compatible = "st,stm32-dfsdm-adc"; - #io-channel-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; reg = <0>; interrupts = ; dmas = <&dmamux1 101 0x400 0x01>; @@ -980,7 +981,8 @@ dfsdm0: filter@0 { dfsdm1: filter@1 { compatible = "st,stm32-dfsdm-adc"; - #io-channel-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; reg = <1>; interrupts = ; dmas = <&dmamux1 102 0x400 0x01>; @@ -990,7 +992,8 @@ dfsdm1: filter@1 { dfsdm2: filter@2 { compatible = "st,stm32-dfsdm-adc"; - #io-channel-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; reg = <2>; interrupts = ; dmas = <&dmamux1 103 0x400 0x01>; @@ -1000,7 +1003,8 @@ dfsdm2: filter@2 { dfsdm3: filter@3 { compatible = "st,stm32-dfsdm-adc"; - #io-channel-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; reg = <3>; interrupts = ; dmas = <&dmamux1 104 0x400 0x01>; @@ -1010,7 +1014,8 @@ dfsdm3: filter@3 { dfsdm4: filter@4 { compatible = "st,stm32-dfsdm-adc"; - #io-channel-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; reg = <4>; interrupts = ; dmas = <&dmamux1 91 0x400 0x01>; @@ -1020,7 +1025,8 @@ dfsdm4: filter@4 { dfsdm5: filter@5 { compatible = "st,stm32-dfsdm-adc"; - #io-channel-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; reg = <5>; interrupts = ; dmas = <&dmamux1 92 0x400 0x01>; From patchwork Thu Jul 27 15:03:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier MOYSAN X-Patchwork-Id: 127034 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a985:0:b0:3e4:2afc:c1 with SMTP id t5csp1194738vqo; Thu, 27 Jul 2023 08:53:22 -0700 (PDT) X-Google-Smtp-Source: APBJJlEvJbtONi5Y5pdsryu7ZRA+IPXHBajG5V4md6h22l9spFL1kJ+YJ8BD+/MMNZYtsoHYWxkT X-Received: by 2002:a17:902:7882:b0:1b8:59f0:c748 with SMTP id q2-20020a170902788200b001b859f0c748mr4791552pll.2.1690473202363; Thu, 27 Jul 2023 08:53:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690473202; cv=none; d=google.com; s=arc-20160816; b=IkWWupg7lgw6A03cR/vOyXZ8Ka0h+6C/411daoYQtz4qfvSlG9BiI44KlRR7fF51EE eMZyaJ+1DLYxxLI3OTg2cMfy9hsVDrGl22n1G3L6wo2WGPem8SvvuKEmeTdkCD0qofz/ Stv5xMgc/GJVowK8VWXOlLv+FWYjV8rTu/EcFp0UPt1b/C+cnJOluqbwMvSVa8oSmROd 65zEm5iTWtWV90WD2toJe1esO2iPxGRJFeFvrnuoTmkaGHfXq1m+Hl5lZsgiauBVW1B9 dThm91aX75+EaVoIk1nI3rIqiRkQAz5gUF+REBWqU8DTVJW1IWApOvisoH/fl4yu4P3a fZjw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=8ilBa9ENL6W8qkN0huPj8difUZwDj7XXO0BtfO8LZt0=; fh=POSsKpNvTcL6GBQhnQK60pm6bVsYjGpLqir7MqXV0LM=; b=Up8aPrABJZtGRQglKxzYVFLG6RD0sGM/qlUm+ZV621FjESd7wCpm5Earu/AqNQIPBq YNoP08Dd4/pw0v/VjDeq/XtihX7k8Qi+1ZXTN1GkGT0BWAE+Lginl73zLUYavOIKlZQQ w7ypAj2Uzm9/HFbXoY9Ge5kyChnI9w48iErMpnarVl5YvjwO2p9fm5IRv/AUXiDgwgBb E7KZ0XDzocgXCBqZ/FrCSD/xKO2efrvpnXnANtzV6Spm2DdjVIwCcJk1CCYcHbaPPBnC /SjGIfxCIxLLE1GdFwOeBm2IljBBZf082DUi8xVUAn7L3wSgmhY04K0Czlo4LRt94CbX YopQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=TrOjk7VS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Olivier Moysan --- arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi | 39 +++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi index 05c9c4f8064c..f4dd46c176f9 100644 --- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi @@ -188,6 +188,45 @@ pins { }; }; + dfsdm_clkout_pins_a: dfsdm-clkout-pins-0 { + pins { + pinmux = ; /* DFSDM_CKOUT */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + }; + + dfsdm_clkout_sleep_pins_a: dfsdm-clkout-sleep-pins-0 { + pins { + pinmux = ; /* DFSDM_CKOUT */ + }; + }; + + dfsdm_data1_pins_a: dfsdm-data1-pins-0 { + pins { + pinmux = ; /* DFSDM_DATA1 */ + }; + }; + + dfsdm_data1_sleep_pins_a: dfsdm-data1-sleep-pins-0 { + pins { + pinmux = ; /* DFSDM_DATA1 */ + }; + }; + + dfsdm_data3_pins_a: dfsdm-data3-pins-0 { + pins { + pinmux = ; /* DFSDM_DATA3 */ + }; + }; + + dfsdm_data3_sleep_pins_a: dfsdm-data3-sleep-pins-0 { + pins { + pinmux = ; /* DFSDM_DATA3 */ + }; + }; + ethernet0_rgmii_pins_a: rgmii-0 { pins1 { pinmux = , /* ETH_RGMII_CLK125 */ From patchwork Thu Jul 27 15:03:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier MOYSAN X-Patchwork-Id: 127010 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a985:0:b0:3e4:2afc:c1 with SMTP id t5csp1175418vqo; Thu, 27 Jul 2023 08:21:03 -0700 (PDT) X-Google-Smtp-Source: APBJJlHgCQDKlPu1Jbky+/k8doW5W/o2FjlVUozrSoTiTjz5DNB3YOaHbDOYKtYiep9w1QVfPwj6 X-Received: by 2002:a17:902:b412:b0:1bb:8a8f:53cb with SMTP id x18-20020a170902b41200b001bb8a8f53cbmr4166093plr.35.1690471262920; Thu, 27 Jul 2023 08:21:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690471262; cv=none; d=google.com; s=arc-20160816; b=fzDcq8ZTFjSP1VFiW0FD8iGDloRgQKr0/fS3UoM6fJabJbzXjgfeX1ao9ZVIbpSj4g KHYB4DtgkGAJL/tUCT/iTlgOjrcKt6dJwk3in0TBBsQyL5jNKas+WRc/1ytcM/oGYu3t wiuJLvJt40O+g+d6ed8j5/j6jvPz2QzEoVJFbFvf9qc68xDxVZQWQtvbKZc77GpI/D9j nSUXtr1Hh4J0Zo8qtCaQjoDQ9IGHahmXRuYni9D/A5ZsG6Bf342wOgRcncWAe/JPrQHJ 64tg6YjtCegjtyOYsexCbn/Baqe9i1htorsp0msoD/7q7ibFiYnqMJxULE8DaI+YvnZt 2HQg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=8kootPtuej1akXRgIZj40uYTNZjB/maQQhJwmvSicyU=; fh=POSsKpNvTcL6GBQhnQK60pm6bVsYjGpLqir7MqXV0LM=; b=aYFr3HtAfnahRbzRgRcTuuwb/4jLO0cNrXwwnA8+2nt9wA8YmogugLI4mzZp9ZZISq A4IgSSIBfDjL9PzZ21pPpY9rm+tgR+cX/GaDEHGulD3Jsn9ldcy9CKqaZ2iRlbtlaP5u cDbizqgJKmJ4T/jEd6z6f8cN774rAK9HuLwoQlqJnGEk29n5NW8Gax89Fb5cfmc3sPTK IUWX/sHnZzNKEMz8O5svZExR+mFaFp6YbQzFscXFar54lixUyX5pQ9pI+vpDPBz+NTqZ 4nDhUY2gzXhVdhWP0pFp9bczrjKGmOxqt4NvzZhwTLAUUDoHxY780MmBmqdGGpK94Rg6 IhIg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=ukz8m6iJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c2-20020a170902d48200b001b9d335180dsi1466956plg.618.2023.07.27.08.20.45; Thu, 27 Jul 2023 08:21:02 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=ukz8m6iJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234410AbjG0PHe (ORCPT + 99 others); Thu, 27 Jul 2023 11:07:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53602 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234384AbjG0PHa (ORCPT ); Thu, 27 Jul 2023 11:07:30 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4DB433583; Thu, 27 Jul 2023 08:07:06 -0700 (PDT) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 36RF3OLG027833; Thu, 27 Jul 2023 17:06:51 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=8kootPtuej1akXRgIZj40uYTNZjB/maQQhJwmvSicyU=; b=ukz8m6iJxzBb3Iryqt8KSx1TdcAXmPHXaXAnow3s4oMHhq4vyctKF8FRhPUc4weEnZhr egQPpPvzivCZQdhWOlR3B5ND4PUcUisSUzgcXbiqcgjrTsIrQqp0n29/5csw44YzeuxF j7pfEXdLbd6Aqe1AYrMCS5TL2WZZt5LBXmVc/loMIrsiLUCQzy1tUTwC2c73GcKMVLBN C2qzboWQ9hKtk6i2PRzkbCGsMgHkw1FxsTEvFFsCbMLnSV88fNJhMtMYpXhAYsBU/29X FCwJ3HesQuO9tQzkvATT1ZfzeTAQ6qXls61BSH75XYf0F/8TQ/tPA/Y6lnf/2RtTLZNB lQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3s3kn2b2b8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 27 Jul 2023 17:06:51 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 6E06D100049; Thu, 27 Jul 2023 17:06:50 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 65852209BA8; Thu, 27 Jul 2023 17:06:50 +0200 (CEST) Received: from localhost (10.201.20.178) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 27 Jul 2023 17:06:50 +0200 From: Olivier Moysan To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue CC: Olivier Moysan , , , , Subject: [RFC v2 11/11] ARM: dts: stm32: add dfsdm iio support on stm32mp157c-ev Date: Thu, 27 Jul 2023 17:03:22 +0200 Message-ID: <20230727150324.1157933-12-olivier.moysan@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230727150324.1157933-1-olivier.moysan@foss.st.com> References: <20230727150324.1157933-1-olivier.moysan@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.20.178] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-27_07,2023-07-26_01,2023-05-22_02 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772587595065453815 X-GMAIL-MSGID: 1772587595065453815 This DT is an example of backend iio device used for STM32 DFSDM. DFSDM filter1 has a single input channel, while filter0 is configured to support scan mode with two input channels. Signed-off-by: Olivier Moysan --- arch/arm/boot/dts/st/stm32mp157c-ev1.dts | 68 ++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp157c-ev1.dts b/arch/arm/boot/dts/st/stm32mp157c-ev1.dts index af3800501875..edeac26f39a4 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ev1.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ev1.dts @@ -73,6 +73,27 @@ panel_backlight: panel-backlight { default-on; status = "okay"; }; + + sd_adc0: sd-adc0 { + compatible = "sd-modulator"; + #io-backend-cells = <0>; + vref-supply = <&v3v3>; + status = "okay"; + }; + + sd_adc1: sd-adc1 { + compatible = "sd-modulator"; + #io-backend-cells = <0>; + vref-supply = <&v3v3>; + status = "okay"; + }; + + sd_adc2: sd-adc2 { + compatible = "sd-modulator"; + #io-backend-cells = <0>; + vref-supply = <&v3v3>; + status = "okay"; + }; }; &cec { @@ -99,6 +120,53 @@ dcmi_0: endpoint { }; }; +&dfsdm { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&dfsdm_clkout_pins_a + &dfsdm_data1_pins_a &dfsdm_data3_pins_a>; + pinctrl-1 = <&dfsdm_clkout_sleep_pins_a + &dfsdm_data1_sleep_pins_a &dfsdm_data3_sleep_pins_a>; + spi-max-frequency = <2048000>; + status = "okay"; + + dfsdm0: filter@0 { + compatible = "st,stm32-dfsdm-adc"; + st,filter-order = <3>; + status = "okay"; + + channel@0 { + reg = <0>; + label = "in0"; + st,adc-channel-types = "SPI_F"; + st,adc-channel-clk-src = "CLKOUT"; + st,adc-alt-channel; + io-backends = <&sd_adc0>; + }; + + channel@1 { + reg = <1>; + label = "in1"; + st,adc-channel-types = "SPI_R"; + st,adc-channel-clk-src = "CLKOUT"; + io-backends = <&sd_adc1>; + }; + }; + + dfsdm1: filter@1 { + compatible = "st,stm32-dfsdm-adc"; + st,filter-order = <3>; + status = "okay"; + + channel@3 { + reg = <3>; + label = "in3"; + st,adc-channel-types = "SPI_R"; + st,adc-channel-clk-src = "CLKOUT"; + io-backends = <&sd_adc2>; + }; + }; +}; + &dsi { phy-dsi-supply = <®18>; #address-cells = <1>;