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[2620:137:e000::1:20]) by mx.google.com with ESMTP id i9-20020a170906850900b009933071fdd7si6543560ejx.680.2023.07.24.06.48.23; Mon, 24 Jul 2023 06:48:47 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=sbgH5INm; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229840AbjGXNdv (ORCPT + 99 others); Mon, 24 Jul 2023 09:33:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36488 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229437AbjGXNdu (ORCPT ); Mon, 24 Jul 2023 09:33:50 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BADAA1B3 for ; Mon, 24 Jul 2023 06:33:48 -0700 (PDT) Message-ID: <20230724132044.644384974@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205626; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=b1myCBgZLHok+K09N26MfWzhxCP4cilngo+YbfwnshU=; b=sbgH5INmkXJN1scV1wuwa2IDrW+L3YWqwDablFeq9IOSSAKhoKXvqU6oB/hYlAnfh1cOEn yVQBvjadZkgW5Kz1AGfrFCd7+U9gPZ0k25xwOto3q0f5utuAHAOqtah8BMpb/seyCzsrQv qTa0n6N/G24aUETPhz+eO5iTUMwpDXLIpqEMZSEdrquupWtRUhdatxEwHoJDndZ2Llbj20 odNXn+nA41FbhntQI96pN+HjxQavwPQGZy6vG6LwN+LODn++yTa0R69VFeu+8PPfL8tAPN bmRlwkVHAwIWlpFUJKIvHwZMdbHYLpbhoVWERETwlMyD4qkXq+imWy4W+1Dvfw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205626; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=b1myCBgZLHok+K09N26MfWzhxCP4cilngo+YbfwnshU=; b=UUbRnNLZ28GzPTcU3O4ZzUOV9Xtzul1DA5Q0Kp9VtM+ScXCh4WuH9TPo5TujJSfEwoUNTG WPnrSYZaYJDE8xBw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 01/58] x86/cpu: Make identify_boot_cpu() static References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:33:46 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772309999876923051 X-GMAIL-MSGID: 1772309999876923051 It's not longer used outside the source file. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/processor.h | 1 - arch/x86/kernel/cpu/common.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -190,7 +190,6 @@ static inline unsigned long long l1tf_pf } extern void early_cpu_init(void); -extern void identify_boot_cpu(void); extern void identify_secondary_cpu(struct cpuinfo_x86 *); extern void print_cpu_info(struct cpuinfo_x86 *); void print_cpu_msr(struct cpuinfo_x86 *); --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1937,7 +1937,7 @@ void enable_sep_cpu(void) } #endif -void __init identify_boot_cpu(void) +static __init void identify_boot_cpu(void) { identify_cpu(&boot_cpu_data); if (HAS_KERNEL_IBT && cpu_feature_enabled(X86_FEATURE_IBT)) From patchwork Mon Jul 24 13:33:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124989 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1813160vqg; Mon, 24 Jul 2023 06:51:12 -0700 (PDT) X-Google-Smtp-Source: APBJJlGSF9+bk7kRaKOla7V8ER64JOiMdZyK1V5lQMbEyK/eCpbRCclM33+fl8ImflHFX88UZgWV X-Received: by 2002:a17:906:77d9:b0:99b:4edc:8a00 with SMTP id m25-20020a17090677d900b0099b4edc8a00mr10156948ejn.37.1690206671910; Mon, 24 Jul 2023 06:51:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206671; cv=none; d=google.com; s=arc-20160816; b=k5+ebZu5iXalcq2XIqIfLFUV6ktG8bZQQSE5UOBE14Pr7ii74Z8wG0ySsn3hpysqxh qqV7vlsKz6+YbqXsglRn5PLYPI02Ui+xir0guPBEvmuGrJg59Lauwy6AfyQqmAGlYmMZ Z6IE5q7WFzKiUTK4rMlDzA070DfIQcPsbL7NvpWEu4NNmOzy1Iy+f4oxkqKZxLJ+0zAy wWTiqvYHKNc3FhZ5XxvwA1YAIvhyeUA5FmICEK/zUs7fOqugZi/Ag17Q5vWwrVbotygc Ur3Ecbb31Yl038SjHefyk1iiETDSkreImUI9ovmr1GO3XiSxBfbuXFnxpGLvHD6CIXlY SSpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=m8e6Afq1AsXnY+J/aZyhI7sMOyGQSw3ozTHH0I0x4W4=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=0M0efOETP04g90YhMeL1IrQgGfKNR8svGisM2UZCOw9IdxtMwicWi7UdmauCyFWr2Z iWs6J+JPL9tpzz4cMAgmFPb9q6Sn+oMoIla/VSgvJL2GeB5JG/0CxLfqBxfHlwIvfwYi CFLvzkwzf1h52jHKm6WLJLFQw8NqTAUMWNn9dSY8n8b7KQhCvG4zgfn+1s/KhVxFgyVP hQlbhYklk5Kbg32Y7mrgJsiZKe7GCTO3lzLVL2mwt4vm1tiMfX+7izSspb5Q06oNdX3B YZ1eYIHFxRZUHm3U9V4Rp2pxURj01sEU/q/14/l1IGq5if8FmtkzKA5kgPrUXgbS5uS0 rKtA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=NRpQPH0J; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=LBEMXwzI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/mpspec.h | 26 -------------------------- 1 file changed, 26 deletions(-) --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h @@ -87,13 +87,7 @@ struct physid_mask { typedef struct physid_mask physid_mask_t; #define physid_set(physid, map) set_bit(physid, (map).mask) -#define physid_clear(physid, map) clear_bit(physid, (map).mask) #define physid_isset(physid, map) test_bit(physid, (map).mask) -#define physid_test_and_set(physid, map) \ - test_and_set_bit(physid, (map).mask) - -#define physids_and(dst, src1, src2) \ - bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC) #define physids_or(dst, src1, src2) \ bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC) @@ -101,29 +95,9 @@ typedef struct physid_mask physid_mask_t #define physids_clear(map) \ bitmap_zero((map).mask, MAX_LOCAL_APIC) -#define physids_complement(dst, src) \ - bitmap_complement((dst).mask, (src).mask, MAX_LOCAL_APIC) - #define physids_empty(map) \ bitmap_empty((map).mask, MAX_LOCAL_APIC) -#define physids_equal(map1, map2) \ - bitmap_equal((map1).mask, (map2).mask, MAX_LOCAL_APIC) - -#define physids_weight(map) \ - bitmap_weight((map).mask, MAX_LOCAL_APIC) - -#define physids_shift_right(d, s, n) \ - bitmap_shift_right((d).mask, (s).mask, n, MAX_LOCAL_APIC) - -#define physids_shift_left(d, s, n) \ - bitmap_shift_left((d).mask, (s).mask, n, MAX_LOCAL_APIC) - -static inline unsigned long physids_coerce(physid_mask_t *map) -{ - return map->mask[0]; -} - static inline void physids_promote(unsigned long physids, physid_mask_t *map) { physids_clear(*map); From patchwork Mon Jul 24 13:33:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124968 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1808489vqg; Mon, 24 Jul 2023 06:43:04 -0700 (PDT) X-Google-Smtp-Source: APBJJlG6YI38gn2VkQ3+0yOdC3TjZtUi4BvDZW+YdrR/Zx3G2hgmApjwGHrgJctjMMzus87ecYli X-Received: by 2002:ac2:4569:0:b0:4fd:d044:cb5b with SMTP id k9-20020ac24569000000b004fdd044cb5bmr4733256lfm.55.1690206183874; Mon, 24 Jul 2023 06:43:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206183; cv=none; d=google.com; s=arc-20160816; b=V7lj2V4fK271VdvSiIjvs22pwyc2+fB5QyakSRcBtHYx7wun0miOy3OKjZdgefh5N9 hprJAPDsBJi1AUDTSIFgtRRR3LPLiEzZ+K8CtlDLneDHkSWvk/f63q4MER3qAnJWYnk2 +WZVvBVdjzbwhYLanOJRmjUfpocrltUtdWEeIO8Xsb3Dj+aKgbiyW2emUESuQ3hgQ22+ vbV3qCniXIp4jGmNMyspbHuce5QCGOafagJ0K70rwda4rmYmLqI2T1v4ISKaaH3sUySz SX6qw2bVwSiihtJyHYZFAhALaWKtxC99QcvQfJeiUyQCaxktD4da9TiTDY7P/W3Ah4ec 3KQg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=N2qRiZb8v2jTNGf2U89OytfeZ4DEwa0WFTfs8zeFafY=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=yRizgGwvfqreBZ2vtGwH4e9Zn4+wbEAvD0nOfOXE4ORW2c4zHo+BLjgaVkxSP6l94Z 4ZjRZ6VFrQIYSHlwhXfqkGPPU3bloJo2kFPoQXq8+24FL0winbt5nUzH+yxT2yNiw2iX spT7oUyBjKw3nAd8kgiHzBZ+xayxy6dcrSUJh3YMjGEm2p29W7WMg6QsP6N86LfxS4HE RaCEOniDLOcKJDfHQf8uXBabzYv6d354l9E0L+5ecOuwS79hy90vIoBipre8FB7if8gi 19aG4FuYOvW2m54VNOkbkPbes2gyYjJ/gzpKmaABDT9Sr22+AaSQnj6ctJd1VNTXyOLl QizA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=ZtCMDmh9; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id lu19-20020a170906fad300b0099b94cd668bsi1350837ejb.298.2023.07.24.06.42.37; Mon, 24 Jul 2023 06:43:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=ZtCMDmh9; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229664AbjGXNeA (ORCPT + 99 others); Mon, 24 Jul 2023 09:34:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36506 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229899AbjGXNdw (ORCPT ); Mon, 24 Jul 2023 09:33:52 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8534490 for ; Mon, 24 Jul 2023 06:33:51 -0700 (PDT) Message-ID: <20230724132044.765449490@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205630; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=N2qRiZb8v2jTNGf2U89OytfeZ4DEwa0WFTfs8zeFafY=; b=ZtCMDmh9Xsk2egFLNUn2vGgbVEk/Yifal/hrz/ZQoSBuyqsKUfXL0lBATBBZ43hVRCILtp LTRILAYcJgVxctNEZJwdn9unA6++BoXwVgBS90KOxEsJ9/eOJIN3H+FgapGy2coCq74Iei JsJC7k/V9IYFJNHKrv6d8Jm6Aj8vAlRH+TklooBm+DUZKZrqHXAamZ+G6ebirULgG5d+rD JDiLgGOoA7MlftuQ9rU1ICe7AzYwp3X+QZZPP6dRGukUgsYsgOB3XFXSYZgaccag6TCi+N YBVTILKqc6/7C4nEGflDhp6YPxphPPL4du3dGcLEcePMn3ulJj2UJhUrtKP7gA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205630; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=N2qRiZb8v2jTNGf2U89OytfeZ4DEwa0WFTfs8zeFafY=; b=mgh5cr12/Iufcc5mWikiuWj8o/ih+wsAA2d5lhFpZdcvNINw6wVHXKRh1RNs9xMRZ7M+FV NMBBQx4e7KeOMlCA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 03/58] x86/apic: Rename disable_apic References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:33:49 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772309639280039352 X-GMAIL-MSGID: 1772309639280039352 It reflects a state and not a command. Make it bool while at it. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 4 ++-- arch/x86/kernel/apic/apic.c | 22 +++++++++++----------- arch/x86/kernel/apic/apic_noop.c | 6 +++--- arch/x86/kernel/apic/msi.c | 2 +- arch/x86/kernel/apic/vector.c | 2 +- arch/x86/kernel/setup.c | 2 +- arch/x86/pci/xen.c | 2 +- 7 files changed, 20 insertions(+), 20 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -52,7 +52,7 @@ static inline void generic_apic_probe(vo extern int apic_verbosity; extern int local_apic_timer_c2_ok; -extern int disable_apic; +extern bool apic_is_disabled; extern unsigned int lapic_timer_period; extern int cpuid_to_apicid[]; @@ -90,7 +90,7 @@ static inline void default_inquire_remot */ static inline bool apic_from_smp_config(void) { - return smp_found_config && !disable_apic; + return smp_found_config && !apic_is_disabled; } /* --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -180,7 +180,7 @@ static __init int setup_apicpmtimer(char #endif unsigned long mp_lapic_addr __ro_after_init; -int disable_apic __ro_after_init; +bool apic_is_disabled __ro_after_init; /* Disable local APIC timer from the kernel commandline or via dmi quirk */ static int disable_apic_timer __initdata; /* Local APIC timer works in C2 */ @@ -810,7 +810,7 @@ bool __init apic_needs_pit(void) return true; /* Is there an APIC at all or is it disabled? */ - if (!boot_cpu_has(X86_FEATURE_APIC) || disable_apic) + if (!boot_cpu_has(X86_FEATURE_APIC) || apic_is_disabled) return true; /* @@ -1299,7 +1299,7 @@ enum apic_intr_mode_id apic_intr_mode __ static int __init __apic_intr_mode_select(void) { /* Check kernel option */ - if (disable_apic) { + if (apic_is_disabled) { pr_info("APIC disabled via kernel command line\n"); return APIC_PIC; } @@ -1308,7 +1308,7 @@ static int __init __apic_intr_mode_selec #ifdef CONFIG_X86_64 /* On 64-bit, the APIC must be integrated, Check local APIC only */ if (!boot_cpu_has(X86_FEATURE_APIC)) { - disable_apic = 1; + apic_is_disabled = true; pr_info("APIC disabled by BIOS\n"); return APIC_PIC; } @@ -1317,14 +1317,14 @@ static int __init __apic_intr_mode_selec /* Neither 82489DX nor integrated APIC ? */ if (!boot_cpu_has(X86_FEATURE_APIC) && !smp_found_config) { - disable_apic = 1; + apic_is_disabled = true; return APIC_PIC; } /* If the BIOS pretends there is an integrated APIC ? */ if (!boot_cpu_has(X86_FEATURE_APIC) && APIC_INTEGRATED(boot_cpu_apic_version)) { - disable_apic = 1; + apic_is_disabled = true; pr_err(FW_BUG "Local APIC %d not detected, force emulation\n", boot_cpu_physical_apicid); return APIC_PIC; @@ -1567,7 +1567,7 @@ static void setup_local_APIC(void) int cpu = smp_processor_id(); unsigned int value; - if (disable_apic) { + if (apic_is_disabled) { disable_ioapic_support(); return; } @@ -1943,7 +1943,7 @@ void __init check_x2apic(void) pr_err("Kernel does not support x2APIC, please recompile with CONFIG_X86_X2APIC.\n"); pr_err("Disabling APIC, expect reduced performance and functionality.\n"); - disable_apic = 1; + apic_is_disabled = true; setup_clear_cpu_cap(X86_FEATURE_APIC); } @@ -2037,7 +2037,7 @@ int __init apic_force_enable(unsigned lo { u32 h, l; - if (disable_apic) + if (apic_is_disabled) return -1; /* @@ -2064,7 +2064,7 @@ int __init apic_force_enable(unsigned lo static int __init detect_init_APIC(void) { /* Disabled by kernel option? */ - if (disable_apic) + if (apic_is_disabled) return -1; switch (boot_cpu_data.x86_vendor) { @@ -2919,7 +2919,7 @@ int apic_is_clustered_box(void) */ static int __init setup_disableapic(char *arg) { - disable_apic = 1; + apic_is_disabled = true; setup_clear_cpu_cap(X86_FEATURE_APIC); return 0; } --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -71,13 +71,13 @@ static int noop_apic_id_registered(void) static u32 noop_apic_read(u32 reg) { - WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_APIC) && !disable_apic); + WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_APIC) && !apic_is_disabled); return 0; } -static void noop_apic_write(u32 reg, u32 v) +static void noop_apic_write(u32 reg, u32 val) { - WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_APIC) && !disable_apic); + WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_APIC) && !apic_is_disabled); } #ifdef CONFIG_X86_32 --- a/arch/x86/kernel/apic/msi.c +++ b/arch/x86/kernel/apic/msi.c @@ -269,7 +269,7 @@ static const struct msi_parent_ops x86_v struct irq_domain * __init native_create_pci_msi_domain(void) { - if (disable_apic) + if (apic_is_disabled) return NULL; x86_vector_domain->flags |= IRQ_DOMAIN_FLAG_MSI_PARENT; --- a/arch/x86/kernel/apic/vector.c +++ b/arch/x86/kernel/apic/vector.c @@ -536,7 +536,7 @@ static int x86_vector_alloc_irqs(struct struct irq_data *irqd; int i, err, node; - if (disable_apic) + if (apic_is_disabled) return -ENXIO; /* --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -1020,7 +1020,7 @@ void __init setup_arch(char **cmdline_p) if (acpi_mps_check()) { #ifdef CONFIG_X86_LOCAL_APIC - disable_apic = 1; + apic_is_disabled = true; #endif setup_clear_cpu_cap(X86_FEATURE_APIC); } --- a/arch/x86/pci/xen.c +++ b/arch/x86/pci/xen.c @@ -517,7 +517,7 @@ int __init pci_xen_init(void) #ifdef CONFIG_PCI_MSI static void __init xen_hvm_msi_init(void) { - if (!disable_apic) { + if (!apic_is_disabled) { /* * If hardware supports (x2)APIC virtualization (as indicated * by hypervisor's leaf 4) then we don't need to use pirqs/ From patchwork Mon Jul 24 13:33:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 125042 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1841176vqg; Mon, 24 Jul 2023 07:33:59 -0700 (PDT) X-Google-Smtp-Source: APBJJlGqPsSCB75i8Wuh8wR/bC/PwJbE4JnEYa93HaYoNaSJo2+NqCSZEbuVTqcjNbl1MbL7wfdt X-Received: by 2002:a05:6512:230e:b0:4fb:9e1a:e592 with SMTP id o14-20020a056512230e00b004fb9e1ae592mr6336217lfu.4.1690209239457; Mon, 24 Jul 2023 07:33:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690209239; cv=none; d=google.com; s=arc-20160816; b=BAE+azuPbpLWg+SrxwVo9Dnr72m3JFyb15pj+mAvAMIecv5sZl5AZ+I/CYNhDMTPtW HQK7h+hfPjpVAlOO68CR2H74kxHpT47GdKpwzOg8kEOAA0F1C06XmIvN+z8UZYzgMBZH /EFeOwz/veIT7RPH5VklXhZXkCsUTG1qAxvaUuZ3gXFLfMqXpfzzWg/1DuFJI/fQgHdm xSmei1NJhGw8Gb27+02v3n1mrNRUzRg6AMZT5B4+opnDgQTP9wrO9qGOrse9ZR/qduAo 7PDsDhs8k0pBQw0WYe4ec1KerUXDmKQd7SxVpgjRHBQuNSgbQB278S+qImQOfahW/CDW ZcNQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=tcMO4j7nWxW6U4cF/hN8bFLKuWgR9Qfu6PLPNlHZoXg=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=cdOcWjjo80ijauAS2OxwxxGottcckjwB2V4EUPgpmZhTZsNdVP6/9YMe97uo+ijNBi TQKNtQ1Qp4JBgXHj7wgfyegb8ZqYz2pqTiqxWEWOE2fufUS2XtDZnLNhp3vEYBpYL0nU w7Glcp7K+m2FJx3rYCQ5Ohg6rhGun2rkC+ahV91NwRJGDZPU0htkDe+XC58aOtVk7qsU 1pz9vkFhOA3BDOjuNuwRgdIIkcNya3IlZ4k2OqdFjIrWOVHgN4UB1yjt0139YRg0Jk64 M8Wf43QgpalgaHMjk2OgfYqX5faRbPSDNLSqTLiVNkd2pWfkfaKmglW0JEQR82mrwRYH Ec5A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=ySY2Dg9N; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=hcJZDJ1I; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Convert to bool. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/io_apic.h | 7 ++++--- arch/x86/kernel/acpi/boot.c | 2 +- arch/x86/kernel/apic/apic.c | 12 ++++++------ arch/x86/kernel/apic/io_apic.c | 12 ++++++------ arch/x86/xen/smp_pv.c | 2 +- 5 files changed, 18 insertions(+), 17 deletions(-) --- a/arch/x86/include/asm/io_apic.h +++ b/arch/x86/include/asm/io_apic.h @@ -109,8 +109,8 @@ extern int mp_irq_entries; /* MP IRQ source entries */ extern struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES]; -/* 1 if "noapic" boot option passed */ -extern int skip_ioapic_setup; +/* True if "noapic" boot option passed */ +extern bool ioapic_is_disabled; /* 1 if "noapic" boot option passed */ extern int noioapicquirk; @@ -129,7 +129,7 @@ extern unsigned long io_apic_irqs; * assignment of PCI IRQ's. */ #define io_apic_assign_pci_irqs \ - (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs) + (mp_irq_entries && !ioapic_is_disabled && io_apic_irqs) struct irq_cfg; extern void ioapic_insert_resources(void); @@ -179,6 +179,7 @@ extern void print_IO_APICs(void); #define IO_APIC_IRQ(x) 0 #define io_apic_assign_pci_irqs 0 #define setup_ioapic_ids_from_mpc x86_init_noop +#define nr_ioapics (0) static inline void ioapic_insert_resources(void) { } static inline int arch_early_ioapic_init(void) { return 0; } static inline void print_IO_APICs(void) {} --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c @@ -1275,7 +1275,7 @@ static int __init acpi_parse_madt_ioapic /* * if "noapic" boot option, don't look for IO-APICs */ - if (skip_ioapic_setup) { + if (ioapic_is_disabled) { pr_info("Skipping IOAPIC probe due to 'noapic' option.\n"); return -ENODEV; } --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1691,7 +1691,7 @@ static void setup_local_APIC(void) * TODO: set up through-local-APIC from through-I/O-APIC? --macro */ value = apic_read(APIC_LVT0) & APIC_LVT_MASKED; - if (!cpu && (pic_mode || !value || skip_ioapic_setup)) { + if (!cpu && (pic_mode || !value || ioapic_is_disabled)) { value = APIC_DM_EXTINT; apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n", cpu); } else { @@ -1956,7 +1956,7 @@ void __init enable_IR_x2apic(void) unsigned long flags; int ret, ir_stat; - if (skip_ioapic_setup) { + if (ioapic_is_disabled) { pr_info("Not enabling interrupt remapping due to skipped IO-APIC setup\n"); return; } @@ -2956,11 +2956,11 @@ early_param("nolapic_timer", parse_nolap static int __init apic_set_verbosity(char *arg) { if (!arg) { -#ifdef CONFIG_X86_64 - skip_ioapic_setup = 0; + if (IS_ENABLED(CONFIG_X86_32)) + return -EINVAL; + + ioapic_is_disabled = false; return 0; -#endif - return -EINVAL; } if (strcmp("debug", arg) == 0) --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -178,7 +178,7 @@ int mp_bus_id_to_type[MAX_MP_BUSSES]; DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); -int skip_ioapic_setup; +bool ioapic_is_disabled __ro_after_init; /** * disable_ioapic_support() - disables ioapic support at runtime @@ -189,7 +189,7 @@ void disable_ioapic_support(void) noioapicquirk = 1; noioapicreroute = -1; #endif - skip_ioapic_setup = 1; + ioapic_is_disabled = true; } static int __init parse_noapic(char *str) @@ -831,7 +831,7 @@ static int __acpi_get_override_irq(u32 g { int ioapic, pin, idx; - if (skip_ioapic_setup) + if (ioapic_is_disabled) return -1; ioapic = mp_find_ioapic(gsi); @@ -1366,7 +1366,7 @@ void __init enable_IO_APIC(void) int i8259_apic, i8259_pin; int apic, pin; - if (skip_ioapic_setup) + if (ioapic_is_disabled) nr_ioapics = 0; if (!nr_legacy_irqs() || !nr_ioapics) @@ -2399,7 +2399,7 @@ void __init setup_IO_APIC(void) { int ioapic; - if (skip_ioapic_setup || !nr_ioapics) + if (ioapic_is_disabled || !nr_ioapics) return; io_apic_irqs = nr_legacy_irqs() ? ~PIC_IRQS : ~0UL; @@ -2715,7 +2715,7 @@ void __init io_apic_init_mappings(void) "address found in MPTABLE, " "disabling IO/APIC support!\n"); smp_found_config = 0; - skip_ioapic_setup = 1; + ioapic_is_disabled = true; goto fake_ioapic_page; } #endif --- a/arch/x86/xen/smp_pv.c +++ b/arch/x86/xen/smp_pv.c @@ -209,7 +209,7 @@ static void __init xen_pv_smp_prepare_cp { unsigned cpu; - if (skip_ioapic_setup) { + if (ioapic_is_disabled) { char *m = (max_cpus == 0) ? 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id c11-20020a170906154b00b0098dea0a1eb4si5808260ejd.700.2023.07.24.06.54.22; Mon, 24 Jul 2023 06:54:47 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=tbMKtwTW; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231319AbjGXNeH (ORCPT + 99 others); Mon, 24 Jul 2023 09:34:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229552AbjGXNdz (ORCPT ); Mon, 24 Jul 2023 09:33:55 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B4D7D1B3 for ; Mon, 24 Jul 2023 06:33:54 -0700 (PDT) Message-ID: <20230724132044.883726935@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205633; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=SEdHGmVEi1bYp03gPNqEFMS5i4ouVhk/JVGxKX8FQ3E=; b=tbMKtwTWRTTYej8k/jAQUohfMhZ/T+McvSkCmo+G7hSdk2KufN74F0K4iBv28H/LIYe/NA 7YfAe6lX1wU+Kz2Ga7Dr41zN9yG0PLuY9+Rwvs/YNUc5a0JNdGCUQq6z2UFYB47bndkq1D oASP4Qaidithyf5u260BFlJKSiECV87MFIYfFjqa2dX3TV9T3ulOarE5jw39Rh4etcxkrm dUH0UYcOOuaIl2O4N1LsfnelXywCw7B22SzOWSXirc5S8BPbYU3WQQyervIn8nEjK/XEHw 2BFDg1h1B9ktS5AsFYWPGtjx9vPitUMR66zpiaHe/XDIlRfVDBBf6jOL/Eny7A== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205633; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=SEdHGmVEi1bYp03gPNqEFMS5i4ouVhk/JVGxKX8FQ3E=; b=Hdc4FudNrw8+t2jSmeYCBhXdv45w9l7iw0CNbD9XEIH3Lst8MlrQcK2Hle1BrSoRs6Czee AT1RyAsNHuYQiuAg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 05/58] x86/apic: Remove pointless x86_bios_cpu_apicid References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:33:52 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310377504614058 X-GMAIL-MSGID: 1772310377504614058 It's a useless copy of x86_cpu_to_apicid. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 2 -- arch/x86/include/asm/smp.h | 1 - arch/x86/kernel/apic/apic.c | 5 +---- arch/x86/kernel/apic/apic_common.c | 2 +- arch/x86/kernel/apic/bigsmp_32.c | 2 +- arch/x86/kernel/apic/probe_64.c | 4 +--- arch/x86/kernel/setup_percpu.c | 3 --- 7 files changed, 4 insertions(+), 15 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -477,8 +477,6 @@ extern void generic_bigsmp_probe(void); #define APIC_DFR_VALUE (APIC_DFR_FLAT) -DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid); - extern struct apic apic_noop; static inline unsigned int read_apic_id(void) --- a/arch/x86/include/asm/smp.h +++ b/arch/x86/include/asm/smp.h @@ -22,7 +22,6 @@ DECLARE_PER_CPU_READ_MOSTLY(u16, cpu_l2c DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_cpu_to_apicid); DECLARE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_acpiid); -DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid); #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) DECLARE_EARLY_PER_CPU_READ_MOSTLY(int, x86_cpu_to_logical_apicid); #endif --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -108,10 +108,8 @@ unsigned long apic_mmio_base __ro_after_ * Map cpu index to physical APIC ID */ DEFINE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_cpu_to_apicid, BAD_APICID); -DEFINE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid, BAD_APICID); DEFINE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_acpiid, U32_MAX); EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_apicid); -EXPORT_EARLY_PER_CPU_SYMBOL(x86_bios_cpu_apicid); EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_acpiid); #ifdef CONFIG_X86_32 @@ -2511,7 +2509,7 @@ int generic_processor_info(int apicid, i if (apicid == boot_cpu_physical_apicid) { /* - * x86_bios_cpu_apicid is required to have processors listed + * x86_cpu_to_apicid is required to have processors listed * in same order as logical cpu numbers. Hence the first * entry is BSP, and so on. * boot_cpu_init() already hold bit 0 in cpu_present_mask @@ -2548,7 +2546,6 @@ int generic_processor_info(int apicid, i #if defined(CONFIG_SMP) || defined(CONFIG_X86_64) early_per_cpu(x86_cpu_to_apicid, cpu) = apicid; - early_per_cpu(x86_bios_cpu_apicid, cpu) = apicid; #endif #ifdef CONFIG_X86_32 early_per_cpu(x86_cpu_to_logical_apicid, cpu) = --- a/arch/x86/kernel/apic/apic_common.c +++ b/arch/x86/kernel/apic/apic_common.c @@ -29,7 +29,7 @@ void default_ioapic_phys_id_map(physid_m int default_cpu_present_to_apicid(int mps_cpu) { if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu)) - return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu); + return (int)per_cpu(x86_cpu_to_apicid, mps_cpu); else return BAD_APICID; } --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -52,7 +52,7 @@ static void bigsmp_setup_apic_routing(vo static int bigsmp_cpu_present_to_apicid(int mps_cpu) { if (mps_cpu < nr_cpu_ids) - return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu); + return (int) per_cpu(x86_cpu_to_apicid, mps_cpu); return BAD_APICID; } --- a/arch/x86/kernel/apic/probe_64.c +++ b/arch/x86/kernel/apic/probe_64.c @@ -13,9 +13,7 @@ #include "local.h" -/* - * Check the APIC IDs in bios_cpu_apicid and choose the APIC mode. - */ +/* Select the appropriate APIC driver */ void __init default_setup_apic_routing(void) { struct apic **drv; --- a/arch/x86/kernel/setup_percpu.c +++ b/arch/x86/kernel/setup_percpu.c @@ -181,8 +181,6 @@ void __init setup_per_cpu_areas(void) #ifdef CONFIG_X86_LOCAL_APIC per_cpu(x86_cpu_to_apicid, cpu) = early_per_cpu_map(x86_cpu_to_apicid, cpu); - per_cpu(x86_bios_cpu_apicid, cpu) = - early_per_cpu_map(x86_bios_cpu_apicid, cpu); per_cpu(x86_cpu_to_acpiid, cpu) = early_per_cpu_map(x86_cpu_to_acpiid, cpu); #endif @@ -214,7 +212,6 @@ void __init setup_per_cpu_areas(void) /* indicate the early static arrays will soon be gone */ #ifdef CONFIG_X86_LOCAL_APIC early_per_cpu_ptr(x86_cpu_to_apicid) = NULL; - early_per_cpu_ptr(x86_bios_cpu_apicid) = NULL; early_per_cpu_ptr(x86_cpu_to_acpiid) = NULL; #endif #ifdef CONFIG_X86_32 From patchwork Mon Jul 24 13:33:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124982 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1812598vqg; Mon, 24 Jul 2023 06:50:10 -0700 (PDT) X-Google-Smtp-Source: APBJJlH6ntWzJjGVM8xlr0gAOuVUiDK1bf6GJd8SDWmNXAreU1MGMJ21LlMwaXd12vr1ihOQ8l2X X-Received: by 2002:a05:6402:54d:b0:522:1e85:1c65 with SMTP id i13-20020a056402054d00b005221e851c65mr5074420edx.11.1690206610004; Mon, 24 Jul 2023 06:50:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206609; cv=none; d=google.com; s=arc-20160816; b=qV7mYwXswq0xQ3Ls0raFqpXEaP9/3lNv1pOBC+f8YiEMTUUJkpLPMHe2osxPUUT+QC vyY+CnJOmHrfkyN1phHL8Khy71FnJUUwhV2j6qmPeQEwdXjIMTKlIBPuQZhV7rQiI1+L XgOOGOGEJdxeMgCYhA2HhSLD7JSPtvfXhYesHEKf5/Hcy1kjkzIH8TIJiTx6kkNSQ4as ThZn2gCxnh5YsvPqvZoCqgPmmTn3M6BWHGaYj60dXXXzuunzKV+adBDutkZLHNzqU2wq ujnyP9a5kh2dj7cMlrXqVq1mH6pDt1L7qIjPIBmtBBdLKooky5qeFgu5zmOK16Oi5Cse RPMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=w+6TyYrLF2RT85aC+yUd6AtExsVROY5NcF6dtBByybw=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=KRPrvGDMJFgSNiPHOHV/EplDBGFcl/k1CI/pGGTjBmvgenUA+qnKglbHgGxpPvHWH4 KFxMAuywXf4N/jzGypdSyNJKNBqv9FHXMoaPpfmtSwr6GtNo7URgIx8waUyMO+Cj8Q/0 oDCD0e9AXa2P7EnsOaj7SSyT8RU/iO505nFsxJHSBI1+l74c7ZacpmJZ/Rt7//m0F01A GoCC5Dmo8tw/m39VD4wZ4ipmOg+LRuUS05aP/hlXW06AukEhPnZoojjObuc3e0e6uR7x iT2/vFRX+ifqsPSxJwqwILCkR5bODR6uefucJfA84/ygfNbLWjTTTmCC8nYVdFk6BFiu 9rZQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=RxwaE6Qs; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 6 +++++- arch/x86/include/asm/smp.h | 7 ------- arch/x86/kernel/apic/apic.c | 5 ----- arch/x86/kernel/apic/io_apic.c | 2 +- arch/x86/kernel/apic/ipi.c | 2 +- arch/x86/kernel/apic/vector.c | 2 +- arch/x86/kernel/cpu/amd.c | 2 +- arch/x86/kernel/cpu/hygon.c | 3 ++- arch/x86/kernel/smpboot.c | 10 +++++----- arch/x86/kernel/vsmp_64.c | 2 +- 10 files changed, 17 insertions(+), 24 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -503,7 +503,11 @@ extern void default_ioapic_phys_id_map(p extern int default_cpu_present_to_apicid(int mps_cpu); extern int default_check_phys_apicid_present(int phys_apicid); -#endif /* CONFIG_X86_LOCAL_APIC */ +#else /* CONFIG_X86_LOCAL_APIC */ + +static inline unsigned int read_apic_id(void) { return 0; } + +#endif /* !CONFIG_X86_LOCAL_APIC */ #ifdef CONFIG_SMP void apic_smt_update(void); --- a/arch/x86/include/asm/smp.h +++ b/arch/x86/include/asm/smp.h @@ -185,13 +185,6 @@ static inline struct cpumask *cpu_llc_sh extern unsigned disabled_cpus; -#ifdef CONFIG_X86_LOCAL_APIC -extern int hard_smp_processor_id(void); - -#else /* CONFIG_X86_LOCAL_APIC */ -#define hard_smp_processor_id() 0 -#endif /* CONFIG_X86_LOCAL_APIC */ - #ifdef CONFIG_DEBUG_NMI_SELFTEST extern void nmi_selftest(void); #else --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -2562,11 +2562,6 @@ int generic_processor_info(int apicid, i return cpu; } -int hard_smp_processor_id(void) -{ - return read_apic_id(); -} - void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg, bool dmar) { --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -2095,7 +2095,7 @@ static inline void __init unlock_ExtINT_ entry0 = ioapic_read_entry(apic, pin); clear_IO_APIC_pin(apic, pin); - apic_id = hard_smp_processor_id(); + apic_id = read_apic_id(); memset(&entry1, 0, sizeof(entry1)); entry1.dest_mode_logical = true; --- a/arch/x86/kernel/apic/ipi.c +++ b/arch/x86/kernel/apic/ipi.c @@ -320,7 +320,7 @@ int safe_smp_processor_id(void) if (!boot_cpu_has(X86_FEATURE_APIC)) return 0; - apicid = hard_smp_processor_id(); + apicid = read_apic_id(); if (apicid == BAD_APICID) return 0; --- a/arch/x86/kernel/apic/vector.c +++ b/arch/x86/kernel/apic/vector.c @@ -1150,7 +1150,7 @@ static void __init print_local_APIC(void u64 icr; pr_debug("printing local APIC contents on CPU#%d/%d:\n", - smp_processor_id(), hard_smp_processor_id()); + smp_processor_id(), read_apic_id()); v = apic_read(APIC_ID); pr_info("... APIC ID: %08x (%01x)\n", v, read_apic_id()); v = apic_read(APIC_LVR); --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -934,7 +934,7 @@ static void init_amd(struct cpuinfo_x86 set_cpu_cap(c, X86_FEATURE_FSRS); /* get apicid instead of initial apic id from cpuid */ - c->apicid = hard_smp_processor_id(); + c->apicid = read_apic_id(); /* K6s reports MCEs but don't actually have all the MSRs */ if (c->x86 < 6) --- a/arch/x86/kernel/cpu/hygon.c +++ b/arch/x86/kernel/cpu/hygon.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include @@ -300,7 +301,7 @@ static void init_hygon(struct cpuinfo_x8 set_cpu_cap(c, X86_FEATURE_REP_GOOD); /* get apicid instead of initial apic id from cpuid */ - c->apicid = hard_smp_processor_id(); + c->apicid = read_apic_id(); /* * XXX someone from Hygon needs to confirm this DTRT --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -1220,11 +1220,11 @@ static void __init smp_sanity_check(void } #endif - if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) { + if (!physid_isset(read_apic_id(), phys_cpu_present_map)) { pr_warn("weird, boot CPU (#%d) not listed by the BIOS\n", - hard_smp_processor_id()); + read_apic_id()); - physid_set(hard_smp_processor_id(), phys_cpu_present_map); + physid_set(read_apic_id(), phys_cpu_present_map); } /* @@ -1234,7 +1234,7 @@ static void __init smp_sanity_check(void if (!apic->check_phys_apicid_present(boot_cpu_physical_apicid)) { pr_notice("weird, boot CPU (#%d) not listed by the BIOS\n", boot_cpu_physical_apicid); - physid_set(hard_smp_processor_id(), phys_cpu_present_map); + physid_set(read_apic_id(), phys_cpu_present_map); } preempt_enable(); } @@ -1431,7 +1431,7 @@ early_param("possible_cpus", _setup_poss if (!num_processors) { if (boot_cpu_has(X86_FEATURE_APIC)) { int apicid = boot_cpu_physical_apicid; - int cpu = hard_smp_processor_id(); + int cpu = read_apic_id(); pr_warn("Boot CPU (id %d) not listed by BIOS\n", cpu); --- a/arch/x86/kernel/vsmp_64.c +++ b/arch/x86/kernel/vsmp_64.c @@ -129,7 +129,7 @@ static void __init vsmp_cap_cpus(void) static int apicid_phys_pkg_id(int initial_apic_id, int index_msb) { - return hard_smp_processor_id() >> index_msb; + return read_apic_id() >> index_msb; } static void vsmp_apic_post_init(void) From patchwork Mon Jul 24 13:33:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124983 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1812630vqg; Mon, 24 Jul 2023 06:50:16 -0700 (PDT) X-Google-Smtp-Source: APBJJlFf+DtWmQWNyb3KklAxqmAVnSXhFflUMp2NafTosc7NbU3iat7SHtQZP8ddblVzXHE/8j57 X-Received: by 2002:a17:906:538b:b0:99b:627f:9c0d with SMTP id g11-20020a170906538b00b0099b627f9c0dmr9701120ejo.27.1690206615837; Mon, 24 Jul 2023 06:50:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206615; cv=none; d=google.com; s=arc-20160816; b=JNErl0WZ4zHyHp/P7ZytSkhLJhcpfdXGsV75DTADIL/ix5I0BpllzeLdBrZmDZTbE5 5J5B6TJk0d+J7nzNdrmSXVAFeWU4dBgYZJMl0frTmi3K12wxEy2X7Np/LwuJu9tphnAj kx3Ebrt3Ho1XepAWXTR/KFErjReUFIh76mibBfXwD/SprbiKvOFYdHclHFw8xd8SKnxc J9eAw4Zqq9gWHnZ8qvThiiktvACAjE7skbS+nq/fLbs8ti1ExUUMTlrGE2uUVHXV2ECA rLN/GBJIZXm7UTCiAif76EdmlFtAPmvTP8dJEAx7VtIajMqHlY3nNcL3AXaxmStvqvGP eFRg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=ubhxg5lHvUPqEcRAdngDyy9xlfFoerwPBN8zo0sYJDE=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=Lx+d2UOh8Jrn9mZL0mpQNZrzRUvJ/Dgghw18nI1PdO3g4RkONrDFq+YfklTfb0ZGHr AusvfGNLKgiWZziSGhPdSDWWLarAt8xKvsXKKMMK0gSIqXJbZz3hwuVf8QG3w+o1nwIS ZrMc+nNW4czb3rzL1lYeNVLk4raYJDiFWy/hugKHdavMCtQXIv2YPQfHv/sMdth5M/hH 2y57xZ/tBk0R7yuC7Dg8/7yQNx8ztUauSiaHNBuXvWtSWI6+VtdwLyDLgohLv5KCtVQ4 1DSUZBl6qT8yQ6GsakJkGR5UiTeRGO6aSCsG5bW9U6oCbu05DzZXriAFLmVQQFT8KSjO JJag== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=Dhq4ahlm; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=6le5v9sT; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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/* - * The highest APIC ID seen during enumeration. - */ -static unsigned int max_physical_apicid; - -/* * Bitmask of physically existing CPUs: */ physid_mask_t phys_cpu_present_map; @@ -2541,9 +2536,6 @@ int generic_processor_info(int apicid, i boot_cpu_apic_version, cpu, version); } - if (apicid > max_physical_apicid) - max_physical_apicid = apicid; - #if defined(CONFIG_SMP) || defined(CONFIG_X86_64) early_per_cpu(x86_cpu_to_apicid, cpu) = apicid; #endif From patchwork Mon Jul 24 13:33:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124981 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1812341vqg; Mon, 24 Jul 2023 06:49:42 -0700 (PDT) X-Google-Smtp-Source: APBJJlFAne74IvW6/lUmBGE5Xfflv/0lK4LW9XjrTc6rv9vFpgWgB7jwFsXu+RmEx0ZRDE/E94cw X-Received: by 2002:a17:906:64d2:b0:993:c48f:184c with SMTP id p18-20020a17090664d200b00993c48f184cmr9722419ejn.10.1690206581997; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id k8-20020a170906680800b00988a210d8a3si6430927ejr.239.2023.07.24.06.49.17; Mon, 24 Jul 2023 06:49:41 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=qwygnyi6; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231446AbjGXNeQ (ORCPT + 99 others); Mon, 24 Jul 2023 09:34:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36776 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231422AbjGXNeG (ORCPT ); Mon, 24 Jul 2023 09:34:06 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 30A92E66 for ; Mon, 24 Jul 2023 06:34:00 -0700 (PDT) Message-ID: <20230724132045.059890995@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205638; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=42hY1z4hgQj4e7JMNLbJLEjJil1FgDJ29QawyO0o/c8=; b=qwygnyi6VN/B6P3lRCPK25ddFW1n+PNYEBb4ISpWprXLABFnnVTYL4Ez1e2JGyJpodoaAj qZrVQja4Do1Tv3c0WlD58ZwxfKyouRVZmwHRyVG7fxL6vHKAkmk4VGVg3Md0X7IDGRRiYB LP0znMsLtsw3me66c1Kd7lG35k5QEX4uvVpjFk37B9ZEOAQNNJAEFOfiLauLDE/xGrLM8K teZIuttV7FBZSqcsYOdZRL1ae6vR7RBQP3SnHlsGH7oRUkeG7uBTbA58g2t4gwmQgZaPNf AHNrNqOVbVBsham57TJyokY0JlWjpNG2za+x9wEbR2Y4rVNusvL7nn4UBwWQ2Q== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205638; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=42hY1z4hgQj4e7JMNLbJLEjJil1FgDJ29QawyO0o/c8=; b=t2rzb0O4w38tNROYKOPJxGVzrz7G8UAvR/lCXxWVVry84W227VftvUMkR3PKNXKxBWN1ur 0XixiVtnoZubdYBg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 08/58] x86/apic: Nuke unused apic::inquire_remote_apic() References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:33:58 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310056845374644 X-GMAIL-MSGID: 1772310056845374644 Put it to the other historical leftovers. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 16 -------------- arch/x86/kernel/apic/apic_flat_64.c | 4 --- arch/x86/kernel/apic/apic_noop.c | 2 - arch/x86/kernel/apic/apic_numachip.c | 2 - arch/x86/kernel/apic/bigsmp_32.c | 2 - arch/x86/kernel/apic/probe_32.c | 2 - arch/x86/kernel/apic/x2apic_cluster.c | 2 - arch/x86/kernel/apic/x2apic_phys.c | 2 - arch/x86/kernel/apic/x2apic_uv_x.c | 1 arch/x86/kernel/smpboot.c | 38 ---------------------------------- arch/x86/xen/apic.c | 7 ------ 11 files changed, 78 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -66,20 +66,6 @@ enum apic_intr_mode_id { APIC_SYMMETRIC_IO_NO_ROUTING }; -#ifdef CONFIG_SMP -extern void __inquire_remote_apic(int apicid); -#else /* CONFIG_SMP */ -static inline void __inquire_remote_apic(int apicid) -{ -} -#endif /* CONFIG_SMP */ - -static inline void default_inquire_remote_apic(int apicid) -{ - if (apic_verbosity >= APIC_DEBUG) - __inquire_remote_apic(apicid); -} - /* * With 82489DX we can't rely on apic feature bit * retrieved via cpuid but still have to deal with @@ -330,8 +316,6 @@ struct apic { /* wakeup secondary CPU using 64-bit wakeup point */ int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip); - void (*inquire_remote_apic)(int apicid); - #ifdef CONFIG_X86_32 /* * Called very early during boot from get_smp_config(). It should --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -139,8 +139,6 @@ static struct apic apic_flat __ro_after_ .send_IPI_all = default_send_IPI_all, .send_IPI_self = default_send_IPI_self, - .inquire_remote_apic = default_inquire_remote_apic, - .read = native_apic_mem_read, .write = native_apic_mem_write, .eoi_write = native_apic_mem_write, @@ -230,8 +228,6 @@ static struct apic apic_physflat __ro_af .send_IPI_all = default_send_IPI_all, .send_IPI_self = default_send_IPI_self, - .inquire_remote_apic = default_inquire_remote_apic, - .read = native_apic_mem_read, .write = native_apic_mem_write, .eoi_write = native_apic_mem_write, --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -125,8 +125,6 @@ struct apic apic_noop __ro_after_init = .wakeup_secondary_cpu = noop_wakeup_secondary_cpu, - .inquire_remote_apic = NULL, - .read = noop_apic_read, .write = noop_apic_write, .eoi_write = noop_apic_write, --- a/arch/x86/kernel/apic/apic_numachip.c +++ b/arch/x86/kernel/apic/apic_numachip.c @@ -273,7 +273,6 @@ static const struct apic apic_numachip1 .send_IPI_self = numachip_send_IPI_self, .wakeup_secondary_cpu = numachip_wakeup_secondary, - .inquire_remote_apic = NULL, /* REMRD not supported */ .read = native_apic_mem_read, .write = native_apic_mem_write, @@ -320,7 +319,6 @@ static const struct apic apic_numachip2 .send_IPI_self = numachip_send_IPI_self, .wakeup_secondary_cpu = numachip_wakeup_secondary, - .inquire_remote_apic = NULL, /* REMRD not supported */ .read = native_apic_mem_read, .write = native_apic_mem_write, --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -153,8 +153,6 @@ static struct apic apic_bigsmp __ro_afte .send_IPI_all = bigsmp_send_IPI_all, .send_IPI_self = default_send_IPI_self, - .inquire_remote_apic = default_inquire_remote_apic, - .read = native_apic_mem_read, .write = native_apic_mem_write, .eoi_write = native_apic_mem_write, --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -95,8 +95,6 @@ static struct apic apic_default __ro_aft .send_IPI_all = default_send_IPI_all, .send_IPI_self = default_send_IPI_self, - .inquire_remote_apic = default_inquire_remote_apic, - .read = native_apic_mem_read, .write = native_apic_mem_write, .eoi_write = native_apic_mem_write, --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c @@ -265,8 +265,6 @@ static struct apic apic_x2apic_cluster _ .send_IPI_all = x2apic_send_IPI_all, .send_IPI_self = x2apic_send_IPI_self, - .inquire_remote_apic = NULL, - .read = native_apic_msr_read, .write = native_apic_msr_write, .eoi_write = native_apic_msr_eoi_write, --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -189,8 +189,6 @@ static struct apic apic_x2apic_phys __ro .send_IPI_all = x2apic_send_IPI_all, .send_IPI_self = x2apic_send_IPI_self, - .inquire_remote_apic = NULL, - .read = native_apic_msr_read, .write = native_apic_msr_write, .eoi_write = native_apic_msr_eoi_write, --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -862,7 +862,6 @@ static struct apic apic_x2apic_uv_x __ro .send_IPI_self = uv_send_IPI_self, .wakeup_secondary_cpu = uv_wakeup_secondary, - .inquire_remote_apic = NULL, .read = native_apic_msr_read, .write = native_apic_msr_write, --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -774,44 +774,6 @@ static void impress_friends(void) pr_debug("Before bogocount - setting activated=1\n"); } -void __inquire_remote_apic(int apicid) -{ - unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 }; - const char * const names[] = { "ID", "VERSION", "SPIV" }; - int timeout; - u32 status; - - pr_info("Inquiring remote APIC 0x%x...\n", apicid); - - for (i = 0; i < ARRAY_SIZE(regs); i++) { - pr_info("... APIC 0x%x %s: ", apicid, names[i]); - - /* - * Wait for idle. - */ - status = safe_apic_wait_icr_idle(); - if (status) - pr_cont("a previous APIC delivery may have failed\n"); - - apic_icr_write(APIC_DM_REMRD | regs[i], apicid); - - timeout = 0; - do { - udelay(100); - status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK; - } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000); - - switch (status) { - case APIC_ICR_RR_VALID: - status = apic_read(APIC_RRR); - pr_cont("%08x\n", status); - break; - default: - pr_cont("failed\n"); - } - } -} - /* * The Multiprocessor Specification 1.4 (1997) example code suggests * that there should be a 10ms delay between the BSP asserting INIT --- a/arch/x86/xen/apic.c +++ b/arch/x86/xen/apic.c @@ -129,10 +129,6 @@ static void xen_noop(void) { } -static void xen_silent_inquire(int apicid) -{ -} - static int xen_cpu_present_to_apicid(int cpu) { if (cpu_present(cpu)) @@ -173,9 +169,6 @@ static struct apic xen_pv_apic = { .send_IPI_all = xen_send_IPI_all, .send_IPI_self = xen_send_IPI_self, #endif - /* .wait_for_init_deassert- used by AP bootup - smp_callin which we don't use */ - .inquire_remote_apic = xen_silent_inquire, - .read = xen_apic_read, .write = xen_apic_write, .eoi_write = xen_apic_write, From patchwork Mon Jul 24 13:33:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124975 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1811927vqg; Mon, 24 Jul 2023 06:48:55 -0700 (PDT) X-Google-Smtp-Source: APBJJlGZQ+EGniAKspOJM77CL6JnPWYwzfSS6n6p7gHcWZkFIC2DfWG9WHFolQejrKOy7OYEmfRT X-Received: by 2002:a05:6402:1349:b0:51b:d567:cfed with SMTP id y9-20020a056402134900b0051bd567cfedmr9370603edw.5.1690206534990; Mon, 24 Jul 2023 06:48:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206534; cv=none; d=google.com; s=arc-20160816; b=aI7joUOdwI+OslwxSQgU1Hgt7bIwbjbqj51W1GMTCAF/WwE3ss2B79uDPkrrTbfUco daNKQIYHGTXK0LBf+tmXmVt8iwcAAUEeI2OrMxcEpUehbOofwaNdPj4zPd3ZAEVq8f5g FspEaqsNBKT165+Bj1i8aTRTGieDo8M4C8tc+fSmFLrjcaXp7cvsVmWavmYvhy2rqckJ PpVcu/QUOW5HIB1vU/PLwi9mXlkJoLzw/xDMDmfK0zE805N492sBwBS9RO8JcuACqlza llJoc2RKD5cGafTh0iClEpWqTbKmAotVcWMlUa0gLzrrnIv1gTkyhuo518uMAHJIHRld l8EA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=eoSypAN2UkpamuEPl9Sov61uZb2Xz+SJDJBt/P4aUAg=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=hn6n1jpeQe6/agHhhAePfH6zdYnEqUxPgidwqKXXyU4nKjS7KZWF6dLdpFDkiTSJ9l m2H8C9Rz3aVtVHGbCp4YWXGm0opO8cgt8e+i120WFbFm7CDuIYc7RmjpBsYBnxB7oLbW 5X4cSKtnwYthpoGm2PR12KEKKnVkgqdNEjFONOD7iaT30HdatxjEj5s28YE+8yyMKG71 US4tv1G7XgxETCXsavUIagGrdCWJwGoPHIbrXktUNG1JjLqZ78geE9Vjn2lhtqPL4FVZ InK3D7sN3jcmCE3n6kwZEy5OyA3l/VDLo7bjjfKFtVMCiw8PaPOluUrhUEqW1SPSDNQS Zdaw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=I01m2Xqs; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v16-20020aa7cd50000000b0051e0ef8936asi6640945edw.291.2023.07.24.06.48.31; Mon, 24 Jul 2023 06:48:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=I01m2Xqs; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231287AbjGXNeV (ORCPT + 99 others); Mon, 24 Jul 2023 09:34:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231315AbjGXNeH (ORCPT ); Mon, 24 Jul 2023 09:34:07 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1BD1CE7A for ; Mon, 24 Jul 2023 06:34:01 -0700 (PDT) Message-ID: <20230724132045.121120600@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205640; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=eoSypAN2UkpamuEPl9Sov61uZb2Xz+SJDJBt/P4aUAg=; b=I01m2XqsbSGMYeP6KsDwD2uu2pJHgMPLCocGjaol9Ym2woVOjYzvpbZS0hkJ3AhYk4gGti YZHeGMKORjtrLRNcgv/FW8B7+yMbrqRMgLLUU2BrpNV2FrUD5Ds5LlSIFBxX8WLkQsxkqb ern3QfDSKGDXSwkK7O3iaW2811HIL3CSoN2+FEuM0U/vR6DoQkXG6CFWSbRyduLRRVmxM4 tQExjVZj5pxm39+et57p3ykvNcS8ZfbYY5TJf5VndcBJ5+lmyY73UkZCOIvVFvJX2VQp3o rSk6jDN3AuZ2ftE8faF6yWWasngaQa04olOHrEmf7UT/UsxEmGHtiQJD4PG8yQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205640; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=eoSypAN2UkpamuEPl9Sov61uZb2Xz+SJDJBt/P4aUAg=; b=OifZhmn1k785bNh1ipE1rCCwwiJHgtZ9gIhseDQseP9W4lg6DM40vcqLuJyQeoNlk77iwY 0sjGnrzMCb1OpQAA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 09/58] x86/apic: Get rid of boot_cpu_physical_apicid madness References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:33:59 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310007372498347 X-GMAIL-MSGID: 1772310007372498347 boot_cpu_physical_apicid is written in random places and in the last consequence filled with the APIC ID read from the local APIC. That causes it to have inconsistent state when the MPTABLE is broken. As a consequence tons of moronic checks are sprinkled all over the place. Consolidate the code and read it exactly once when either X2APIC mode is detected early or when the APIC mapping is established. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 2 arch/x86/kernel/apic/apic.c | 102 +++++++++++++------------------------------- arch/x86/kernel/mpparse.c | 4 - 3 files changed, 34 insertions(+), 74 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -247,7 +247,7 @@ static inline int x2apic_enabled(void) #else /* !CONFIG_X86_X2APIC */ static inline void x2apic_setup(void) { } static inline int x2apic_enabled(void) { return 0; } - +static inline u32 native_apic_msr_read(u32 reg) { BUG(); } #define x2apic_mode (0) #define x2apic_supported() (0) #endif /* !CONFIG_X86_X2APIC */ --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1318,8 +1318,7 @@ static int __init __apic_intr_mode_selec if (!boot_cpu_has(X86_FEATURE_APIC) && APIC_INTEGRATED(boot_cpu_apic_version)) { apic_is_disabled = true; - pr_err(FW_BUG "Local APIC %d not detected, force emulation\n", - boot_cpu_physical_apicid); + pr_err(FW_BUG "Local APIC not detected, force emulation\n"); return APIC_PIC; } #endif @@ -1340,12 +1339,6 @@ static int __init __apic_intr_mode_selec pr_info("APIC: SMP mode deactivated\n"); return APIC_SYMMETRIC_IO_NO_ROUTING; } - - if (read_apic_id() != boot_cpu_physical_apicid) { - panic("Boot APIC ID in local APIC unexpected (%d vs %d)", - read_apic_id(), boot_cpu_physical_apicid); - /* Or can we switch back to PIC here? */ - } #endif return APIC_SYMMETRIC_IO; @@ -1741,6 +1734,23 @@ void apic_ap_setup(void) end_local_APIC_setup(); } +static __init void apic_read_boot_cpu_id(bool x2apic) +{ + /* + * This can be invoked from check_x2apic() before the APIC has been + * selected. But that code knows for sure that the BIOS enabled + * X2APIC. + */ + if (x2apic) { + boot_cpu_physical_apicid = native_apic_msr_read(APIC_ID); + boot_cpu_apic_version = GET_APIC_VERSION(native_apic_msr_read(APIC_LVR)); + } else { + boot_cpu_physical_apicid = read_apic_id(); + boot_cpu_apic_version = GET_APIC_VERSION(apic_read(APIC_LVR)); + } +} + + #ifdef CONFIG_X86_X2APIC int x2apic_mode; EXPORT_SYMBOL_GPL(x2apic_mode); @@ -1921,6 +1931,7 @@ void __init check_x2apic(void) x2apic_state = X2APIC_ON_LOCKED; else x2apic_state = X2APIC_ON; + apic_read_boot_cpu_id(true); } else if (!boot_cpu_has(X86_FEATURE_X2APIC)) { x2apic_state = X2APIC_DISABLED; } @@ -2109,15 +2120,11 @@ static int __init detect_init_APIC(void) */ void __init init_apic_mappings(void) { - unsigned int new_apicid; - if (apic_validate_deadline_timer()) pr_info("TSC deadline timer available\n"); - if (x2apic_mode) { - boot_cpu_physical_apicid = read_apic_id(); + if (x2apic_mode) return; - } /* If no local APIC can be found return early */ if (!smp_found_config && detect_init_APIC()) { @@ -2134,39 +2141,19 @@ void __init init_apic_mappings(void) if (!acpi_lapic && !smp_found_config) register_lapic_address(apic_phys); } - - /* - * Fetch the APIC ID of the BSP in case we have a - * default configuration (or the MP table is broken). - */ - new_apicid = read_apic_id(); - if (boot_cpu_physical_apicid != new_apicid) { - boot_cpu_physical_apicid = new_apicid; - /* - * yeah -- we lie about apic_version - * in case if apic was disabled via boot option - * but it's not a problem for SMP compiled kernel - * since apic_intr_mode_select is prepared for such - * a case and disable smp mode - */ - boot_cpu_apic_version = GET_APIC_VERSION(apic_read(APIC_LVR)); - } } void __init register_lapic_address(unsigned long address) { mp_lapic_addr = address; - if (!x2apic_mode) { - set_fixmap_nocache(FIX_APIC_BASE, address); - apic_mmio_base = APIC_BASE; - apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n", - APIC_BASE, address); - } - if (boot_cpu_physical_apicid == -1U) { - boot_cpu_physical_apicid = read_apic_id(); - boot_cpu_apic_version = GET_APIC_VERSION(apic_read(APIC_LVR)); - } + if (x2apic_mode) + return; + + set_fixmap_nocache(FIX_APIC_BASE, address); + apic_mmio_base = APIC_BASE; + apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n", APIC_BASE, address); + apic_read_boot_cpu_id(false); } /* @@ -2446,31 +2433,15 @@ int generic_processor_info(int apicid, i phys_cpu_present_map); /* - * boot_cpu_physical_apicid is designed to have the apicid - * returned by read_apic_id(), i.e, the apicid of the - * currently booting-up processor. However, on some platforms, - * it is temporarily modified by the apicid reported as BSP - * through MP table. Concretely: - * - * - arch/x86/kernel/mpparse.c: MP_processor_info() - * - arch/x86/mm/amdtopology.c: amd_numa_init() - * - * This function is executed with the modified - * boot_cpu_physical_apicid. So, disabled_cpu_apicid kernel - * parameter doesn't work to disable APs on kdump 2nd kernel. - * - * Since fixing handling of boot_cpu_physical_apicid requires - * another discussion and tests on each platform, we leave it - * for now and here we use read_apic_id() directly in this - * function, generic_processor_info(). + * boot_cpu_physical_apicid is guaranteed to contain the boot CPU + * APIC ID read from the local APIC when this function is invoked. */ - if (disabled_cpu_apicid != BAD_APICID && - disabled_cpu_apicid != read_apic_id() && + if (disabled_cpu_apicid != boot_cpu_physical_apicid && disabled_cpu_apicid == apicid) { int thiscpu = num_processors + disabled_cpus; - pr_warn("APIC: Disabling requested cpu." - " Processor %d/0x%x ignored.\n", thiscpu, apicid); + pr_warn("APIC: Disabling requested cpu. Processor %d/0x%x ignored.\n", + thiscpu, apicid); disabled_cpus++; return -ENODEV; @@ -2626,15 +2597,6 @@ static void __init apic_bsp_up_setup(voi { #ifdef CONFIG_X86_64 apic_write(APIC_ID, apic->set_apic_id(boot_cpu_physical_apicid)); -#else - /* - * Hack: In case of kdump, after a crash, kernel might be booting - * on a cpu with non-zero lapic id. But boot_cpu_physical_apicid - * might be zero if read from MP tables. Get it from LAPIC. - */ -# ifdef CONFIG_CRASH_DUMP - boot_cpu_physical_apicid = read_apic_id(); -# endif #endif physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map); } --- a/arch/x86/kernel/mpparse.c +++ b/arch/x86/kernel/mpparse.c @@ -58,10 +58,8 @@ static void __init MP_processor_info(str apicid = m->apicid; - if (m->cpuflag & CPU_BOOTPROCESSOR) { + if (m->cpuflag & CPU_BOOTPROCESSOR) bootup_cpu = " (Bootup-CPU)"; - boot_cpu_physical_apicid = m->apicid; - } pr_info("Processor #%d%s\n", m->apicid, bootup_cpu); generic_processor_info(apicid, m->apicver); From patchwork Mon Jul 24 13:34:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 125000 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1814891vqg; Mon, 24 Jul 2023 06:54:21 -0700 (PDT) X-Google-Smtp-Source: APBJJlHW6IXGVuBr/FRDplIqBquZFVhX5ygLxxBzZDuGbTiikti7Z2mXsnHCE3f3q9Yzk1r1GTrC X-Received: by 2002:aa7:d607:0:b0:522:3b94:c6f8 with SMTP id c7-20020aa7d607000000b005223b94c6f8mr804519edr.37.1690206861208; Mon, 24 Jul 2023 06:54:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206861; cv=none; d=google.com; s=arc-20160816; b=y7wQEsFJtozQNyAWuAmD11TL5FWwXYd6d1pojGh9CHCHF0Ro3T6VsWYtshfKXm/cri m8p7eiB6m2jR2PyomvguSfFC5mSXgioKY7YMC+i6NZqFk3sqCvwa27kGJKrF4+hSN2K3 95fdDhLptywGCaL5OL6Cg78orN3j2qg53fN6iuEmK1kiiEqKvqXxYlNdLaaptlBpB7p6 /jOslYTph5oRNN82oUjToTE0HFYiWiFHfp7N0z/AIAmUo6/JEWYxuM/1fw8hy4G4fvZV FzKYY7/lrSTenjV2SLAaQvgTXah7Qyh8vG8d6y8j6nU3B3NgEcbrG0X/4v+XQD+jgQAO 48eg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=tXQKKwpyD/5KWCvdmuzL9UCOi5F812bKdsX6A+OvjaI=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=OXlr4jmEUeozmB8DBw2WOD9ij7kETmR6JTORlTzgI0v6wF0Jej1CRinsHQTgX/ynHL AIKlTctmTtwgXZOUYXqJ8gvh5hJw0E9IZG8bA9g/c+rLoDDh5k79eBGS6LFf8jQK18zj PcXpOwouZst5GC8Zavamn/kLSH15MJX5sR6fs8eNppmY7xsGQCdoL8QRn9EMftdPRAiF spFQpGtwFu8VvLEkPtcXGbjqZl6IAzeAxvcd2to1XRwn044zVCzA9TyjpNH6Nlh/AlDd RTapu0T7g/p2hdStaXqSAOV8t7vGihbkRuMjTJeFOCv/xO2IL0Uoua8OxXHBXTlpwOj8 R/sQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="qu/uLZGs"; dkim=neutral (no key) header.i=@linutronix.de header.b=lWG8PeG3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b4-20020aa7cd04000000b0051bec40640bsi6128931edw.603.2023.07.24.06.53.57; Mon, 24 Jul 2023 06:54:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="qu/uLZGs"; dkim=neutral (no key) header.i=@linutronix.de header.b=lWG8PeG3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231529AbjGXNec (ORCPT + 99 others); Mon, 24 Jul 2023 09:34:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36966 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231443AbjGXNeN (ORCPT ); Mon, 24 Jul 2023 09:34:13 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0CBC710F4 for ; Mon, 24 Jul 2023 06:34:03 -0700 (PDT) Message-ID: <20230724132045.182274971@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205642; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=tXQKKwpyD/5KWCvdmuzL9UCOi5F812bKdsX6A+OvjaI=; b=qu/uLZGsIHTOYPyW3BNj60UaMpH5tVJnr5cGQVqfuJGD4X3QTjRygADKR+lNWneb3whWzl m1Altvj4evlW5BDrrxvuBBIxwBH4p6sC6hzEpdjBTdf8i3aYzjXlKC51dtWIW711r3JZjS PW0+rZgR+yAS0ekjuEH3ZuOdJ26xnVW1niFOG42RizfOILAOFdbLYtWssaiQrfIySP4GsQ U4d+buy4xgh7HZ5knGm/XOBzWreU9zZc9KfPyXtn1BuTrwNot1CQaIKcADWF2fzrrFle1p oYIMQVQCsFioiNO78UbvgvpYIo/moec5waA3FtqLdQeASQl9njKXeURXDTFEyQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205642; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=tXQKKwpyD/5KWCvdmuzL9UCOi5F812bKdsX6A+OvjaI=; b=lWG8PeG3uo8cTLRie60rChiunJX7gfa7K7qVCGiUCWt8YZTDny2AJlhb3nCU13IOtcSZSF BGsN96mD9mP5WYDw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 10/58] x86/apic: Register boot CPU APIC early References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:01 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310349336078961 X-GMAIL-MSGID: 1772310349336078961 Register the boot CPU APIC right when the boot CPUs APIC is read from the hardware. No point is doing this on random places and having wild heuristics to save the boot CPU APIC ID slot and CPU number 0 reserved. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/kernel/apic/apic.c | 120 ++++++++++++++++++-------------------------- 1 file changed, 50 insertions(+), 70 deletions(-) --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1734,6 +1734,8 @@ void apic_ap_setup(void) end_local_APIC_setup(); } +static __init void cpu_set_boot_apic(void); + static __init void apic_read_boot_cpu_id(bool x2apic) { /* @@ -1748,9 +1750,9 @@ static __init void apic_read_boot_cpu_id boot_cpu_physical_apicid = read_apic_id(); boot_cpu_apic_version = GET_APIC_VERSION(apic_read(APIC_LVR)); } + cpu_set_boot_apic(); } - #ifdef CONFIG_X86_X2APIC int x2apic_mode; EXPORT_SYMBOL_GPL(x2apic_mode); @@ -2426,76 +2428,8 @@ static int allocate_logical_cpuid(int ap return nr_logical_cpuids++; } -int generic_processor_info(int apicid, int version) +static void cpu_update_apic(int cpu, int apicid, int version) { - int cpu, max = nr_cpu_ids; - bool boot_cpu_detected = physid_isset(boot_cpu_physical_apicid, - phys_cpu_present_map); - - /* - * boot_cpu_physical_apicid is guaranteed to contain the boot CPU - * APIC ID read from the local APIC when this function is invoked. - */ - if (disabled_cpu_apicid != boot_cpu_physical_apicid && - disabled_cpu_apicid == apicid) { - int thiscpu = num_processors + disabled_cpus; - - pr_warn("APIC: Disabling requested cpu. Processor %d/0x%x ignored.\n", - thiscpu, apicid); - - disabled_cpus++; - return -ENODEV; - } - - /* - * If boot cpu has not been detected yet, then only allow upto - * nr_cpu_ids - 1 processors and keep one slot free for boot cpu - */ - if (!boot_cpu_detected && num_processors >= nr_cpu_ids - 1 && - apicid != boot_cpu_physical_apicid) { - int thiscpu = max + disabled_cpus - 1; - - pr_warn("APIC: NR_CPUS/possible_cpus limit of %i almost" - " reached. Keeping one slot for boot cpu." - " Processor %d/0x%x ignored.\n", max, thiscpu, apicid); - - disabled_cpus++; - return -ENODEV; - } - - if (num_processors >= nr_cpu_ids) { - int thiscpu = max + disabled_cpus; - - pr_warn("APIC: NR_CPUS/possible_cpus limit of %i reached. " - "Processor %d/0x%x ignored.\n", max, thiscpu, apicid); - - disabled_cpus++; - return -EINVAL; - } - - if (apicid == boot_cpu_physical_apicid) { - /* - * x86_cpu_to_apicid is required to have processors listed - * in same order as logical cpu numbers. Hence the first - * entry is BSP, and so on. - * boot_cpu_init() already hold bit 0 in cpu_present_mask - * for BSP. - */ - cpu = 0; - - /* Logical cpuid 0 is reserved for BSP. */ - cpuid_to_apicid[0] = apicid; - } else { - cpu = allocate_logical_cpuid(apicid); - if (cpu < 0) { - disabled_cpus++; - return -EINVAL; - } - } - - /* - * Validate version - */ if (version == 0x0) { pr_warn("BIOS bug: APIC version is 0 for CPU %d/0x%x, fixing up to 0x10\n", cpu, apicid); @@ -2521,10 +2455,56 @@ int generic_processor_info(int apicid, i if (system_state != SYSTEM_BOOTING) cpu_mark_primary_thread(cpu, apicid); +} + +static __init void cpu_set_boot_apic(void) +{ + cpuid_to_apicid[0] = boot_cpu_physical_apicid; + cpu_update_apic(0, boot_cpu_physical_apicid, boot_cpu_apic_version); +} + +int generic_processor_info(int apicid, int version) +{ + int cpu, max = nr_cpu_ids; + + /* The boot CPU must be set before MADT/MPTABLE parsing happens */ + if (cpuid_to_apicid[0] == BAD_APICID) + panic("Boot CPU APIC not registered yet\n"); + + if (apicid == boot_cpu_physical_apicid) + return 0; + + if (disabled_cpu_apicid == apicid) { + int thiscpu = num_processors + disabled_cpus; + + pr_warn("APIC: Disabling requested cpu. Processor %d/0x%x ignored.\n", + thiscpu, apicid); + disabled_cpus++; + return -ENODEV; + } + + if (num_processors >= nr_cpu_ids) { + int thiscpu = max + disabled_cpus; + + pr_warn("APIC: NR_CPUS/possible_cpus limit of %i reached. " + "Processor %d/0x%x ignored.\n", max, thiscpu, apicid); + + disabled_cpus++; + return -EINVAL; + } + + cpu = allocate_logical_cpuid(apicid); + if (cpu < 0) { + disabled_cpus++; + return -EINVAL; + } + + cpu_update_apic(cpu, apicid, version); return cpu; } + void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg, bool dmar) { From patchwork Mon Jul 24 13:34:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124994 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1813461vqg; Mon, 24 Jul 2023 06:51:47 -0700 (PDT) X-Google-Smtp-Source: APBJJlFjw9ENp8O5zbakiQEOYUzkuqsGQb/Z0Rq1VSgV++1d8gdi4MhgbMAUJyD9Dgfb9/r32EA0 X-Received: by 2002:a17:907:7714:b0:988:8be0:3077 with SMTP id kw20-20020a170907771400b009888be03077mr9421592ejc.31.1690206707148; Mon, 24 Jul 2023 06:51:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206707; cv=none; d=google.com; s=arc-20160816; b=0cNqn6vy03dJrJJSNetk3ngV8LLGkqsTxIMzKv1po2J7UcFME9s3Uh1TVHipWg3xJA hNELJsmd7VQ66Kn1TLraWugVviCIHOnsoQjwEBxWur87EFQaCD7sAuJw5bHjpC/NJWny dbL4As7u5TnxavDaqu0y8MCotM7Fp2Kvgj1N9FrjWgPiFANfV/C+W43scjKahKDDLMw6 ptuU3iIMnK5dMkBc7iSLoctM9KaUuy7EBYbjJjG3BITYH/hFb56mKfHdUO9ATVuVkkNh 8AbJ3GQjfhEjKGJlS6JtkyVtC7G3vyRwyPdsw6vwFazzOUbyZWow9XNG9Tzc3b8ln/0L 9RyA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=Fur2MYcjwG+kKe1RtThBHG7Ea2Bvm6lkExJ+ZubmnJg=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=siIDZ93vfXZ5x07YGY50sWgDae/rcSOPuKdT56ouxVW8gd1qhMrcOz2ZimKGnb8mzq KeJMT/Aui/KFYY4TuKqM7rAty/BuLo3qbyejlr0duEtZ2M84qqkSXzXj7BZTcbhd9GUn X/I/zBxQKjOFlfMoznozJ5P+/0RXXxUb3xRLXf25LD9SSf1+ABEuXvcX619cHwD/N5bm fkZHmngfo0K4LmBH6GOIG4IBH//INfc/+y4ZuqPknczj/IzE/TNPqVtQ8mzv/CwCutjx QvYLxRiTkq6N0GGV1Hd6GlE1LnR2K4P27dprKBT5cBb9o9AwwQNs4GJ1UBaOcUn9hicl SZng== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=fgZLvl8v; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id s23-20020a1709066c9700b00991c20fd371si6746940ejr.9.2023.07.24.06.51.22; Mon, 24 Jul 2023 06:51:47 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=fgZLvl8v; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231465AbjGXNef (ORCPT + 99 others); Mon, 24 Jul 2023 09:34:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230422AbjGXNeT (ORCPT ); Mon, 24 Jul 2023 09:34:19 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A49A2199B for ; Mon, 24 Jul 2023 06:34:05 -0700 (PDT) Message-ID: <20230724132045.242775204@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205643; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=Fur2MYcjwG+kKe1RtThBHG7Ea2Bvm6lkExJ+ZubmnJg=; b=fgZLvl8vHcuLGC1PX+3zzGjQxP948eMa0UrSmx3TfvQKWTrxpFr+Gr8J3pmKlJhvEZf2kp epmi7YHW5E5VXSqhYne8cPVwWMUQcTSnOjCV6WlMbq+ZvfFjFHw+mM8W8NjiyB5HvI1JXB KQKAJmc7YVE13XBzg/JUHrICVx6j7xOGGoX/YDTZTXRtw0oZnysFlraMCy7WL6h4YopTHF de2ExKU/OT1ciqV5JkNMQCj+nP37zHwk9PRwZEuDZe803odskoVl6Ji97fEDP+AHflK4an YfYyV2Pm3Be+j+C8x8D35rzO1NY4qVHtmW2cnWEnfLzSddWYlgarLMKuATaGNg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205643; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=Fur2MYcjwG+kKe1RtThBHG7Ea2Bvm6lkExJ+ZubmnJg=; b=k6VZXFlgLIOrdb0mZ6bLe6eTtOxBey+zy2LCCxDPxekoS7FYB/yDuLhYSQs+BW9l2CTmw/ j6z/0oVGCkL96yDA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 11/58] x86/apic: Remove the pointless APIC version check References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:03 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310188027155963 X-GMAIL-MSGID: 1772310188027155963 This historical leftover is really uninteresting today. Whatever MPTABLE or MADT delivers we only trust the hardware anyway. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/mpspec.h | 2 +- arch/x86/kernel/acpi/boot.c | 6 +----- arch/x86/kernel/apic/apic.c | 19 ++++--------------- arch/x86/kernel/devicetree.c | 5 ++--- arch/x86/kernel/jailhouse.c | 6 ++---- arch/x86/kernel/mpparse.c | 2 +- arch/x86/kernel/smpboot.c | 4 ++-- 7 files changed, 13 insertions(+), 31 deletions(-) --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h @@ -76,7 +76,7 @@ static inline void e820__memblock_alloc_ #define default_get_smp_config x86_init_uint_noop #endif -int generic_processor_info(int apicid, int version); +int generic_processor_info(int apicid); #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_LOCAL_APIC) --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c @@ -169,7 +169,6 @@ static int __init acpi_parse_madt(struct */ static int acpi_register_lapic(int id, u32 acpiid, u8 enabled) { - unsigned int ver = 0; int cpu; if (id >= MAX_LOCAL_APIC) { @@ -182,10 +181,7 @@ static int acpi_register_lapic(int id, u return -EINVAL; } - if (boot_cpu_physical_apicid != -1U) - ver = boot_cpu_apic_version; - - cpu = generic_processor_info(id, ver); + cpu = generic_processor_info(id); if (cpu >= 0) early_per_cpu(x86_cpu_to_acpiid, cpu) = acpiid; --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -2428,19 +2428,8 @@ static int allocate_logical_cpuid(int ap return nr_logical_cpuids++; } -static void cpu_update_apic(int cpu, int apicid, int version) +static void cpu_update_apic(int cpu, int apicid) { - if (version == 0x0) { - pr_warn("BIOS bug: APIC version is 0 for CPU %d/0x%x, fixing up to 0x10\n", - cpu, apicid); - version = 0x10; - } - - if (version != boot_cpu_apic_version) { - pr_warn("BIOS bug: APIC version mismatch, boot CPU: %x, CPU %d: version %x\n", - boot_cpu_apic_version, cpu, version); - } - #if defined(CONFIG_SMP) || defined(CONFIG_X86_64) early_per_cpu(x86_cpu_to_apicid, cpu) = apicid; #endif @@ -2460,10 +2449,10 @@ static void cpu_update_apic(int cpu, int static __init void cpu_set_boot_apic(void) { cpuid_to_apicid[0] = boot_cpu_physical_apicid; - cpu_update_apic(0, boot_cpu_physical_apicid, boot_cpu_apic_version); + cpu_update_apic(0, boot_cpu_physical_apicid); } -int generic_processor_info(int apicid, int version) +int generic_processor_info(int apicid) { int cpu, max = nr_cpu_ids; @@ -2500,7 +2489,7 @@ int generic_processor_info(int apicid, i return -EINVAL; } - cpu_update_apic(cpu, apicid, version); + cpu_update_apic(cpu, apicid); return cpu; } --- a/arch/x86/kernel/devicetree.c +++ b/arch/x86/kernel/devicetree.c @@ -128,16 +128,15 @@ static void __init dtb_setup_hpet(void) static void __init dtb_cpu_setup(void) { struct device_node *dn; - u32 apic_id, version; + u32 apic_id; - version = GET_APIC_VERSION(apic_read(APIC_LVR)); for_each_of_cpu_node(dn) { apic_id = of_get_cpu_hwid(dn, 0); if (apic_id == ~0U) { pr_warn("%pOF: missing local APIC ID\n", dn); continue; } - generic_processor_info(apic_id, version); + generic_processor_info(apic_id); } } --- a/arch/x86/kernel/jailhouse.c +++ b/arch/x86/kernel/jailhouse.c @@ -101,10 +101,8 @@ static void __init jailhouse_get_smp_con register_lapic_address(0xfee00000); - for (cpu = 0; cpu < setup_data.v1.num_cpus; cpu++) { - generic_processor_info(setup_data.v1.cpu_ids[cpu], - boot_cpu_apic_version); - } + for (cpu = 0; cpu < setup_data.v1.num_cpus; cpu++) + generic_processor_info(setup_data.v1.cpu_ids[cpu]); smp_found_config = 1; --- a/arch/x86/kernel/mpparse.c +++ b/arch/x86/kernel/mpparse.c @@ -62,7 +62,7 @@ static void __init MP_processor_info(str bootup_cpu = " (Bootup-CPU)"; pr_info("Processor #%d%s\n", m->apicid, bootup_cpu); - generic_processor_info(apicid, m->apicver); + generic_processor_info(apicid); } #ifdef CONFIG_X86_IO_APIC --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -1389,7 +1389,7 @@ early_param("possible_cpus", _setup_poss { int i, possible; - /* No boot processor was found in mptable or ACPI MADT */ + /* No processor was found in mptable or ACPI MADT */ if (!num_processors) { if (boot_cpu_has(X86_FEATURE_APIC)) { int apicid = boot_cpu_physical_apicid; @@ -1400,7 +1400,7 @@ early_param("possible_cpus", _setup_poss /* Make sure boot cpu is enumerated */ if (apic->cpu_present_to_apicid(0) == BAD_APICID && apic->apic_id_valid(apicid)) - generic_processor_info(apicid, boot_cpu_apic_version); + generic_processor_info(apicid); } if (!num_processors) From patchwork Mon Jul 24 13:34:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124969 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1809735vqg; Mon, 24 Jul 2023 06:45:15 -0700 (PDT) X-Google-Smtp-Source: APBJJlE0vVK61KjwcODaVhCuWUvvAUiBNJtHcwoe//6V5Zo7zAv6yyxD5FQxorSRKsJg4okBL8x3 X-Received: by 2002:a17:906:15b:b0:993:e9b8:90f4 with SMTP id 27-20020a170906015b00b00993e9b890f4mr10884001ejh.8.1690206314849; Mon, 24 Jul 2023 06:45:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206314; cv=none; d=google.com; s=arc-20160816; b=Cb4CQg0M7VU2HwK/O++B6UCY4z5eX5eAdgW+N4rRm0CnNbEKEPJjrgNgMYDDoZvToD N4xwhKNcQkllI0YuHTqVkkIm+LNGvTblASNoG28RRhUKxzW4jo/iin1Qip+tfpvdFNf8 QnXFf3Ogd9h3vGsnXJgYZnwDJshsqybumEMDBWWuNg0RHWEGc04QX//mYQQtR6bd6PEe clVq/Ok0dHQiSD3upj/6FJ1N6rcYdbBalAtgDwVwcswVgDO2GVkylpnph62HDDr7aY59 wqPxKvoD5+kMTVR+CG3YtI7h5ouv8SKdY8gaDX4y83PwUNpisxeNA5FSon7nFrfXqdlL RYCQ== ARC-Message-Signature: i=1; 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If that succeeds then dtb_lapic_setup() registers the local APIC again eventually with a different address. Rewrite the code so that it only registers it once. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/kernel/devicetree.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) --- a/arch/x86/kernel/devicetree.c +++ b/arch/x86/kernel/devicetree.c @@ -157,19 +157,15 @@ static void __init dtb_lapic_setup(void) /* Did the boot loader setup the local APIC ? */ if (!boot_cpu_has(X86_FEATURE_APIC)) { + /* Try force enabling, which registers the APIC address */ if (apic_force_enable(lapic_addr)) return; - } - smp_found_config = 1; - if (of_property_read_bool(dn, "intel,virtual-wire-mode")) { - pr_info("Virtual Wire compatibility mode.\n"); - pic_mode = 0; } else { - pr_info("IMCR and PIC compatibility mode.\n"); - pic_mode = 1; + register_lapic_address(lapic_addr); } - - register_lapic_address(lapic_addr); + smp_found_config = 1; + pic_mode = !of_property_read_bool(dn, "intel,virtual-wire-mode"); + pr_info("%s compatibility mode.\n", pic_mode ? "IMCR and PIC" : "Virtual Wire"); } #endif /* CONFIG_X86_LOCAL_APIC */ From patchwork Mon Jul 24 13:34:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124960 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1805435vqg; Mon, 24 Jul 2023 06:37:26 -0700 (PDT) X-Google-Smtp-Source: APBJJlHc5DYEtgfX8+1ylA3ytpiHBnkzA3qgj3Mwsi/5azHhQM2G8TndTCl5ols+Avil9bt2m4rU X-Received: by 2002:a05:6870:f713:b0:1b4:7191:6d62 with SMTP id ej19-20020a056870f71300b001b471916d62mr10315911oab.35.1690205846454; Mon, 24 Jul 2023 06:37:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690205846; cv=none; d=google.com; s=arc-20160816; b=LK41c0b/TC0wZ11owc0wtxMkWcEz1jzKrIrSDwmkosBxBmsXHVwPScO+6Nh4bhnE5K BkfQcUMEGcLfy7+6dN9UfFONOJ46y4D9HiuCiaG2ytvKnqrZrON01WnOnbii/tDuckhN iZnsW7K+5iGqagcoZGjqTyKmK+Ogg4qqD2vzIXtMwXqBisJwfc2+dbq1jIQt6xBS5BA2 ZQdVPOp29Zx/gXT7aD6BzX5c9ef60fDDUO3Y9A8Bu3qATP7uFQ5d4Bwac89w+mbo9Evc XGbGqe41jgOF4EZxp7DvwPd3+q/mZ5Ia6LU8/CleUASkZMmkZE19iDs8hueM7PzqWNqG 1Rug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=ny7Fxu7g7PBQMTLhRl8hSl0RLxzChrJ0DtIsWugH0fI=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=W20qpjJtWRD0CXOvn9bxZRHSN6Nr63s2BuIJWdjgDMYayfAd+KTABNEJZVPr5SbzqF J7Eh6UTJhzwEAuTN4DgaBc5ooWydGYuYTIVr/rXX7130znqjAFicVPbdCLTeamr5rCw+ t3Cpoiwdz8ZoTgtJ1YLvTaJmIU+XtrnKuSwSNG5F9IuMn24xhvY+cn/TeuC9W0Ar/LFz MiUhlxHmR90qnUY2NxRX4MTNEZxSQz4i9yUvVBVbzffp+mGsZB+Npu9P2ASmlWAQU2Kl oNBypf0YhOqN5JFJgjDpdo4xEESEPYFkFnhzc7qx2DwlXg4sJX/E8AN4R41sP7Ia3QmJ hXLQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=UYKFq2eV; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i1-20020a63d441000000b0055ffed90cc9si8945441pgj.609.2023.07.24.06.37.12; Mon, 24 Jul 2023 06:37:26 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=UYKFq2eV; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231512AbjGXNer (ORCPT + 99 others); Mon, 24 Jul 2023 09:34:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36948 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231567AbjGXNea (ORCPT ); Mon, 24 Jul 2023 09:34:30 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B6221BCD for ; Mon, 24 Jul 2023 06:34:08 -0700 (PDT) Message-ID: <20230724132045.361461564@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205647; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ny7Fxu7g7PBQMTLhRl8hSl0RLxzChrJ0DtIsWugH0fI=; b=UYKFq2eVSj6AOmPTSVltR0cAd7r1HY4xZMlg7KasidxrQeHBZT/+kyYoKHIgmneHZsb01q 7t029ehZZUBnkIhz19oNda3IV4mkrkZkNbPleGevUsTQLpsQMFS8KmW5SskjSQLz04Yf0o sIWWfE3+Hpil2wCXH2j6xEzqmBDKA+zwh5H4jnxnByWrDUaB8mhPNDEkijB/OgWT7tPoPr 3/bvtM+buu4oruNkwgtnqp9oDkdaxG0TRq1+sLLU4AwB0RdXhry6/QR/NFjIbzgny9m3Ad O0OEl5oAGZVVAxRyB/tYPrqEE1Zx8tf/XFNDRw+ijRN4NyOQr94IM5Di+PrZdQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205647; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ny7Fxu7g7PBQMTLhRl8hSl0RLxzChrJ0DtIsWugH0fI=; b=HLzz1DJCmQ830YC+0xiySYwEqQszPcXyt3grCF9HHtD+uTsrzrrDMG8jqywzDpsoVFidja RbO45lgaWF8vzZBg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 13/58] x86/apic: Make some APIC init functions bool References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:06 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772309285403653919 X-GMAIL-MSGID: 1772309285403653919 Quite some APIC init functions are pure boolean, but use the success = 0, fail < 0 model. That's confusing as hell when reading through the code. Convert them to boolean. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 6 +++--- arch/x86/kernel/apic/apic.c | 36 ++++++++++++++++++------------------ arch/x86/kernel/devicetree.c | 2 +- 3 files changed, 22 insertions(+), 22 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -135,12 +135,12 @@ extern void setup_secondary_APIC_clock(v extern void lapic_update_tsc_freq(void); #ifdef CONFIG_X86_64 -static inline int apic_force_enable(unsigned long addr) +static inline bool apic_force_enable(unsigned long addr) { - return -1; + return false; } #else -extern int apic_force_enable(unsigned long addr); +extern bool apic_force_enable(unsigned long addr); #endif extern void apic_ap_setup(void); --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -2000,19 +2000,19 @@ void __init enable_IR_x2apic(void) * On AMD64 we trust the BIOS - if it says no APIC it is likely * not correctly set up (usually the APIC timer won't work etc.) */ -static int __init detect_init_APIC(void) +static bool __init detect_init_APIC(void) { if (!boot_cpu_has(X86_FEATURE_APIC)) { pr_info("No local APIC present\n"); - return -1; + return false; } mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; - return 0; + return true; } #else -static int __init apic_verify(void) +static bool __init apic_verify(void) { u32 features, h, l; @@ -2023,7 +2023,7 @@ static int __init apic_verify(void) features = cpuid_edx(1); if (!(features & (1 << X86_FEATURE_APIC))) { pr_warn("Could not enable APIC!\n"); - return -1; + return false; } set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; @@ -2036,15 +2036,15 @@ static int __init apic_verify(void) } pr_info("Found and enabled local APIC!\n"); - return 0; + return true; } -int __init apic_force_enable(unsigned long addr) +bool __init apic_force_enable(unsigned long addr) { u32 h, l; if (apic_is_disabled) - return -1; + return false; /* * Some BIOSes disable the local APIC in the APIC_BASE @@ -2067,11 +2067,11 @@ int __init apic_force_enable(unsigned lo /* * Detect and initialize APIC */ -static int __init detect_init_APIC(void) +static bool __init detect_init_APIC(void) { /* Disabled by kernel option? */ if (apic_is_disabled) - return -1; + return false; switch (boot_cpu_data.x86_vendor) { case X86_VENDOR_AMD: @@ -2098,22 +2098,22 @@ static int __init detect_init_APIC(void) if (!force_enable_local_apic) { pr_info("Local APIC disabled by BIOS -- " "you can enable it with \"lapic\"\n"); - return -1; + return false; } - if (apic_force_enable(APIC_DEFAULT_PHYS_BASE)) - return -1; + if (!apic_force_enable(APIC_DEFAULT_PHYS_BASE)) + return false; } else { - if (apic_verify()) - return -1; + if (!apic_verify()) + return false; } apic_pm_activate(); - return 0; + return true; no_apic: pr_info("No local APIC present or hardware disabled\n"); - return -1; + return false; } #endif @@ -2129,7 +2129,7 @@ void __init init_apic_mappings(void) return; /* If no local APIC can be found return early */ - if (!smp_found_config && detect_init_APIC()) { + if (!smp_found_config && !detect_init_APIC()) { /* lets NOP'ify apic operations */ pr_info("APIC: disable apic facility\n"); apic_disable(); --- a/arch/x86/kernel/devicetree.c +++ b/arch/x86/kernel/devicetree.c @@ -158,7 +158,7 @@ static void __init dtb_lapic_setup(void) /* Did the boot loader setup the local APIC ? */ if (!boot_cpu_has(X86_FEATURE_APIC)) { /* Try force enabling, which registers the APIC address */ - if (apic_force_enable(lapic_addr)) + if (!apic_force_enable(lapic_addr)) return; } else { register_lapic_address(lapic_addr); From patchwork Mon Jul 24 13:34:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124958 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1805324vqg; Mon, 24 Jul 2023 06:37:15 -0700 (PDT) X-Google-Smtp-Source: APBJJlH193pTAPkf2TQivcw0pv5+Z6/ztJuXb/idwFmCRdF0cdpfLyzx9ddENPPDtWCqQaE88SUG X-Received: by 2002:a05:6a20:12d3:b0:12f:bc36:4c67 with SMTP id v19-20020a056a2012d300b0012fbc364c67mr13915516pzg.61.1690205835049; Mon, 24 Jul 2023 06:37:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690205835; cv=none; d=google.com; s=arc-20160816; b=ltLXnwMiVTKqJ5NV+6OpmX3SPAT0zMlpbwGu23QAmJS6L9EhxqcGkFD7z/2WD/Osbq 1lAgfQNQ+jd4sMCIKo2HyFS/DoXPbPMV5MesSFUx8sF0CfVPBSMJ9dDed+rJiLMFrHw6 2f0XM6Nwg07+29YcAezgXgh36IvNXuq25rrkED2XRsY/abS/aOEu2ckoUz1vjt80LP+1 r/aZzWNr4ekayl0hI4LIshTn2WgNriVIf+cvdvPGCqMApXFtoCMCSuWrC43advUXIaOl ntysGnP77y1CuxQHneVZUH2lIPOnsRAW74Z44ytA/14Lz0uVPzikfxwS+GRGHgKSndqn 0IkA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=EJkw3wmb0xhqWNonEGYegw1kbsCG+7tuReZsQsrarng=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=vOJoQpnpN7d3eV6HeUuI+p0lGBlXXGH3sKendJmYzNLEJbRhsRJuT0oXG72IGGaoZ7 cSPcI+mj3K4D5Fv36914O2+QKYJIoc2QObH8fmxXeF5qrGTYt7FRl7U93e6OlcSFHN7V BJcA1Ghj4QDFKUTbtK73nTOPnlJ6vj2ZWny1PdfiyUPStSRkig4/9h1KVwpZY5cr92ke 12WGNs1m1wX6b7mABX+nbU+Z1aPiSATVqTIJRMfmnPw0Dl07gc02AEOwqHfH7iLeRkqd zMDgiN0b/+Ewbc3p2l7obK1vBXX/Q0yU8RULqfFTy0FHGuVKGCi695uJMB/GUPPGaAd1 j7Pg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=Kyiv3T1j; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u15-20020a056a00124f00b0065ee6c40f91si9161728pfi.159.2023.07.24.06.37.01; Mon, 24 Jul 2023 06:37:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=Kyiv3T1j; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231670AbjGXNe4 (ORCPT + 99 others); Mon, 24 Jul 2023 09:34:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37152 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231599AbjGXNec (ORCPT ); Mon, 24 Jul 2023 09:34:32 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A79B51BF1 for ; Mon, 24 Jul 2023 06:34:10 -0700 (PDT) Message-ID: <20230724132045.434855520@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205648; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=EJkw3wmb0xhqWNonEGYegw1kbsCG+7tuReZsQsrarng=; b=Kyiv3T1joglVmzf6J56J1lTfa+Jalt2vb2QpjzFy/28THUaEiuQVpcgvUdLUiAV8p4MWhE bH4GgH0YGoO6nUuiXr3vhkv5Mu0PX+orFE+7gslHVsUkNr87zS37uzoydhgEPhIA3HaiRB GCyg3+jVZSOh0bYoKYGK6gCblPwSG/es5vv7IyMDGlWovMOM3/6u76NoNUCdcOvZrNQ3b/ JbPGHRsTL3GaUl5DAx5YXQY10kdh7vastronQsdO4K2FDADbaNjjco0SGMB0SEe2wROZOC C0I92gH8usC92EJTjHYtFcWTq17KKBizs5s9xKHrsVXRO5UFgKrumBScIO5Q6w== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205648; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=EJkw3wmb0xhqWNonEGYegw1kbsCG+7tuReZsQsrarng=; b=YAdf/YGLep1yAK7cFLYNYVlMFi9OoBc3sTKs1TjW/NIly0HoutTMn0Y+8cnEao5C4hn3N3 Pi3WaC7HU5wg5AAw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 14/58] x86/apic: Split register_apic_address() References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:08 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772309273471837029 X-GMAIL-MSGID: 1772309273471837029 Split the fixmap setup out of register_lapic_address() and reuse it when the X2APIC is disabled during setup. This avoids that the APIC ID is registered twice. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/kernel/apic/apic.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1852,6 +1852,8 @@ void x2apic_setup(void) __x2apic_enable(); } +static __init void apic_set_fixmap(void); + static __init void x2apic_disable(void) { u32 x2apic_id, state = x2apic_state; @@ -1872,7 +1874,7 @@ static __init void x2apic_disable(void) } __x2apic_disable(); - register_lapic_address(mp_lapic_addr); + apic_set_fixmap(); } static __init void x2apic_enable(void) @@ -2145,17 +2147,21 @@ void __init init_apic_mappings(void) } } +static __init void apic_set_fixmap(void) +{ + set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr); + apic_mmio_base = APIC_BASE; + apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n", + apic_mmio_base, mp_lapic_addr); + apic_read_boot_cpu_id(false); +} + void __init register_lapic_address(unsigned long address) { mp_lapic_addr = address; - if (x2apic_mode) - return; - - set_fixmap_nocache(FIX_APIC_BASE, address); - apic_mmio_base = APIC_BASE; - apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n", APIC_BASE, address); - apic_read_boot_cpu_id(false); + if (!x2apic_mode) + apic_set_fixmap(); } /* From patchwork Mon Jul 24 13:34:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124959 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1805333vqg; Mon, 24 Jul 2023 06:37:17 -0700 (PDT) X-Google-Smtp-Source: APBJJlF054hd9tKY2j0bkIe4fWr5VtnU3k6eku24G7SQNXMTecfjf6dBj9zsf8lbsIMq2HvfKRQ8 X-Received: by 2002:a17:902:d481:b0:1b8:9225:4367 with SMTP id c1-20020a170902d48100b001b892254367mr13610744plg.65.1690205836727; Mon, 24 Jul 2023 06:37:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690205836; cv=none; d=google.com; s=arc-20160816; b=IWBUuBcBXNpMYkaCjwq8inyfn5Btg94flvgvRmY/0k6qK331UeeZeDWsqpq5RNv6fb ID73t/FkVtcVvg9XA2Z8U2nZQNN9ALDo+hgDiFd1MYPRWrio16c04yb24ooD+iTKYiIk jyqJnfSYCWsIqM+aAP/NSbXlCeWxbIaezRt7CLzvu5oht3E+otXxrxi1Tf8tJUn1uze5 YMhh/06RZQzIFlpbDf6FDy/q7OG2TrafxMsihaf6+em8XQ7cYqZ4XCzHdyqdNRjln+Jg 33A57TTpUjLc4i4CtIAwcrW0cXXN7qQ88a2fAS2BXZTbbePC96TKpvinHcuvOzqpXrRQ 9C4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=855ZylECG6DnmhUb4ZnT7LjFoXWMj2iP75o58u/ioxI=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=xtfY0CQaknaGWFd9+A3TgW+kZv92EAKTN3voGBPSZdHKKTogJcoXeIljmRRYhvYa5D xyuzkeviyp263l1E7EFnvKGsafyX8xwruO0vSvh7MH3mQgyZ4bGHZWGd+Au/FNvFTCeC BvP3U8xdXLPOYumltGxvdS8CAMeW9YhtUEt86jjnfyJu+QjaS/+r2g1o7JdvK5p8BUii Urr6Y3LNZXIlYj0yaUGK9NY2j7o0AOBrhj05t+ngS/uNZdJdDRLYCipyZ60kybCHw3jK VOz0RrJN1h09jKrAC1vJ0f2ZWmLwKpz1SljnxkLOJVrxUI5tNCd5AlbtjzKVTu3PEMsb B9lw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=dVJ3eX+Q; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b="KMDrSLi/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id s18-20020a17090330d200b001b9f091a08dsi8482525plc.635.2023.07.24.06.37.03; Mon, 24 Jul 2023 06:37:16 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=dVJ3eX+Q; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b="KMDrSLi/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231408AbjGXNfG (ORCPT + 99 others); Mon, 24 Jul 2023 09:35:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37564 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231548AbjGXNem (ORCPT ); Mon, 24 Jul 2023 09:34:42 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D2173E68 for ; Mon, 24 Jul 2023 06:34:12 -0700 (PDT) Message-ID: <20230724132045.495798090@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205650; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=855ZylECG6DnmhUb4ZnT7LjFoXWMj2iP75o58u/ioxI=; b=dVJ3eX+QvuZ1A7zMTwCC2eVOYUAq6PYX2wzus/4VUWggcR36DPQqZWDtqyI/ncQv1QiQ80 7cBEYB7Ef9aP60VXWBdCvGwZ+Bd1Est1fLJ6H9MZRVJgCIx0ehDkOsps+uzMY7Z3BhwlDY Mbe1ZAovp+jSUcxbxQ2zu0k1OFpZBDsCo+kl2vhAeVVKWHIihO0wciyPEv7RkRuhfngrbj ieeF7Yj889pnqXbk1Z/mobwIVn6rrV8gENOVo+TpNGgXUKYdINtTZ3fjaMeER7pP149HQC umhgDlvAPHVMnHnSCsLSZTqKF2a0nqN/iUYlWcuSpP94aAQMFv5XZFyVLr46yA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205650; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=855ZylECG6DnmhUb4ZnT7LjFoXWMj2iP75o58u/ioxI=; b=KMDrSLi/jcRXToshqI8TKgoy5gWMkkFsIuA7q6yalGrTWE8AyD8pDjm4sCHTg6TGhNmZ7T VQDPJcTGIE6zvpDA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 15/58] x86/apic: Sanitize APIC address setup References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:09 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772309275457786864 X-GMAIL-MSGID: 1772309275457786864 Convert places which just write mp_lapic_addr and let them register the local APIC address directly instead of relying on magic other code to do so. Add a WARN_ON() into register_lapic_address() which is raised when register_lapic_address() is invoked more than once during boot. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/mpspec.h | 1 - arch/x86/kernel/apic/apic.c | 29 ++++++++++------------------- arch/x86/kernel/mpparse.c | 11 ++--------- 3 files changed, 12 insertions(+), 29 deletions(-) --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h @@ -41,7 +41,6 @@ extern DECLARE_BITMAP(mp_bus_not_pci, MA extern unsigned int boot_cpu_physical_apicid; extern u8 boot_cpu_apic_version; -extern unsigned long mp_lapic_addr; #ifdef CONFIG_X86_LOCAL_APIC extern int smp_found_config; --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -172,7 +172,7 @@ static __init int setup_apicpmtimer(char __setup("apicpmtimer", setup_apicpmtimer); #endif -unsigned long mp_lapic_addr __ro_after_init; +static unsigned long mp_lapic_addr __ro_after_init; bool apic_is_disabled __ro_after_init; /* Disable local APIC timer from the kernel commandline or via dmi quirk */ static int disable_apic_timer __initdata; @@ -2009,12 +2009,12 @@ static bool __init detect_init_APIC(void return false; } - mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; + register_lapic_address(APIC_DEFAULT_PHYS_BASE); return true; } #else -static bool __init apic_verify(void) +static bool __init apic_verify(unsigned long addr) { u32 features, h, l; @@ -2028,15 +2028,15 @@ static bool __init apic_verify(void) return false; } set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); - mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; /* The BIOS may have set up the APIC at some other address */ if (boot_cpu_data.x86 >= 6) { rdmsr(MSR_IA32_APICBASE, l, h); if (l & MSR_IA32_APICBASE_ENABLE) - mp_lapic_addr = l & MSR_IA32_APICBASE_BASE; + addr = l & MSR_IA32_APICBASE_BASE; } + register_lapic_address(addr); pr_info("Found and enabled local APIC!\n"); return true; } @@ -2063,7 +2063,7 @@ bool __init apic_force_enable(unsigned l enabled_via_apicbase = 1; } } - return apic_verify(); + return apic_verify(addr); } /* @@ -2105,7 +2105,7 @@ static bool __init detect_init_APIC(void if (!apic_force_enable(APIC_DEFAULT_PHYS_BASE)) return false; } else { - if (!apic_verify()) + if (!apic_verify(APIC_DEFAULT_PHYS_BASE)) return false; } @@ -2130,27 +2130,16 @@ void __init init_apic_mappings(void) if (x2apic_mode) return; - /* If no local APIC can be found return early */ if (!smp_found_config && !detect_init_APIC()) { - /* lets NOP'ify apic operations */ pr_info("APIC: disable apic facility\n"); apic_disable(); - } else { - apic_phys = mp_lapic_addr; - - /* - * If the system has ACPI MADT tables or MP info, the LAPIC - * address is already registered. - */ - if (!acpi_lapic && !smp_found_config) - register_lapic_address(apic_phys); } } static __init void apic_set_fixmap(void) { set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr); - apic_mmio_base = APIC_BASE; + apic_phys = apic_mmio_base = APIC_BASE; apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n", apic_mmio_base, mp_lapic_addr); apic_read_boot_cpu_id(false); @@ -2158,6 +2147,8 @@ static __init void apic_set_fixmap(void) void __init register_lapic_address(unsigned long address) { + /* This should only happen once */ + WARN_ON_ONCE(mp_lapic_addr); mp_lapic_addr = address; if (!x2apic_mode) --- a/arch/x86/kernel/mpparse.c +++ b/arch/x86/kernel/mpparse.c @@ -378,11 +378,6 @@ static inline void __init construct_defa int i; /* - * local APIC has default address - */ - mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; - - /* * 2 CPUs, numbered 0 & 1. */ processor.type = MP_PROCESSOR; @@ -523,10 +518,8 @@ void __init default_get_smp_config(unsig */ if (mpf->feature1) { if (early) { - /* - * local APIC has default address - */ - mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; + /* Local APIC has default address */ + register_lapic_address(APIC_DEFAULT_PHYS_BASE); goto out; } From patchwork Mon Jul 24 13:34:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 125022 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1835607vqg; Mon, 24 Jul 2023 07:25:19 -0700 (PDT) X-Google-Smtp-Source: APBJJlHb+ehlA4sFgrXI5/M7sCr7kf1HglhN/w/dJNfSkRmZaD1VM23R9vlEX6QETmbWbvd+7ah9 X-Received: by 2002:a05:6402:2039:b0:522:1e24:afb6 with SMTP id ay25-20020a056402203900b005221e24afb6mr5638179edb.0.1690208718790; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id y8-20020aa7d508000000b005221f9a302csi3001102edq.678.2023.07.24.07.24.54; Mon, 24 Jul 2023 07:25:18 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="Zdsd/qAk"; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231502AbjGXNfJ (ORCPT + 99 others); Mon, 24 Jul 2023 09:35:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36794 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231558AbjGXNeo (ORCPT ); Mon, 24 Jul 2023 09:34:44 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0B5821FFE for ; Mon, 24 Jul 2023 06:34:18 -0700 (PDT) Message-ID: <20230724132045.555787669@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205652; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=c71eHbYg+VP7OJhjZCVHVzp0AtRxO5V4C+TDLxCJHes=; b=Zdsd/qAkSfkyv7R28hxTmnj8gmeJl+Sk5X2N8xiveIMJFkd8XPmRlQrXnd/6VX5U+F2lIF kNXiNRZdmjiuN3l4BMGRZifB9vSb3+pwS/9cMLK1WALqkQa1l8cTRQQ0FmQQ/XXnhnaeod Y3ImaBtA0xH3dmU7EECqoF+Us6O2qG2htggxB3Y6+CHulp/UcO7ton+jsg09i0B3d2Cuxb XiL49T9wHAWaofWRJs5bEJHbPgev7b90L66QjmYnGAQNmuYIkQz3essgRe6hO9mPOgJan3 KWrDU9HCFkFxZghZOCw4JFX8yNzFja2B7eDgJc4F8mD8LsI17fnZbkWD+4F07w== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205652; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=c71eHbYg+VP7OJhjZCVHVzp0AtRxO5V4C+TDLxCJHes=; b=ZeJdIWWQ5lDzV+3Aicl/OcNNEhnGtBOTGMXALhCu54bgHHASFrWxy2Obb3Ogq3bHihKxoB pJbSvCno/WGeh7CA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 16/58] x86/apic: Sanitize num_processors handling References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:11 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772312297432407223 X-GMAIL-MSGID: 1772312297432407223 num_processors is 0 by default and only gets incremented when local APICs are registered. Make init_apic_mappings(), which tries to enable the local APIC in the case that no SMP configuration was found set num_processors to 1. This allows to remove yet another check for the local APIC and yet another place which registers the boot CPUs local APIC ID. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/kernel/apic/apic.c | 9 ++++++--- arch/x86/kernel/smpboot.c | 18 ------------------ 2 files changed, 6 insertions(+), 21 deletions(-) --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -2130,9 +2130,12 @@ void __init init_apic_mappings(void) if (x2apic_mode) return; - if (!smp_found_config && !detect_init_APIC()) { - pr_info("APIC: disable apic facility\n"); - apic_disable(); + if (!smp_found_config) { + if (!detect_init_APIC()) { + pr_info("APIC: disable apic facility\n"); + apic_disable(); + } + num_processors = 1; } } --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -1397,24 +1397,6 @@ early_param("possible_cpus", _setup_poss { int i, possible; - /* No processor was found in mptable or ACPI MADT */ - if (!num_processors) { - if (boot_cpu_has(X86_FEATURE_APIC)) { - int apicid = boot_cpu_physical_apicid; - int cpu = read_apic_id(); - - pr_warn("Boot CPU (id %d) not listed by BIOS\n", cpu); - - /* Make sure boot cpu is enumerated */ - if (apic->cpu_present_to_apicid(0) == BAD_APICID && - apic->apic_id_valid(apicid)) - generic_processor_info(apicid); - } - - if (!num_processors) - num_processors = 1; - } - i = setup_max_cpus ?: 1; if (setup_possible_cpus == -1) { possible = num_processors; From patchwork Mon Jul 24 13:34:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124971 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1811226vqg; Mon, 24 Jul 2023 06:47:39 -0700 (PDT) X-Google-Smtp-Source: APBJJlFsGXKxR+yGWKbLznGJ9nYStGAxfX5+IBTavT81STXiCOkcRXjoxF1hSkTcTyJbOPSTjgK3 X-Received: by 2002:a17:906:3082:b0:99b:4aa3:6480 with SMTP id 2-20020a170906308200b0099b4aa36480mr10208810ejv.40.1690206459469; Mon, 24 Jul 2023 06:47:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206459; cv=none; d=google.com; s=arc-20160816; b=J/lgSKmxGRfkXEtvzod/TM7XHDXCaGxbVYKkq133XeS3cWSaXear1rT89NyB61iiPs uc+s73ktKvyG16hlwEVuqDmRBLNQAK0GgsHi2zId8SzEoeHdmwLO6irdeCXiHXCB5nCT rioveqizHVFdTSziMg4EOWTAJgQv8BBmGCoMB4W8Y6Z+Qhd7wOeb765CERCIeDNEJYC/ ipyRRB0cXsxj2Tiikz5PiDMoQdsUvU1pCyTEt0NfasUPnZtO+Gqbfu5l/Fx2SZfCJmup Z4zJuHJjz4H6kAyfLTZrZDIguTAOeIHDiLOztiQSVHShKD5LPVtmvGWFLUNCtWWeImSA Gp9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=6qIRs7n/9rrrflFIJeawzXHaVLgyJbrokbfl4taony4=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=KOZrp6/cPi5loJuj09MKit4YHGfaXBhkEwNGjqxMkVWMfBa/uRfGrHpYsYaNQdlj2O u2MVlTaEGwKVF/2qtUw8AFRBMlOX7D070UXK3Pt4OgtsQYEI/4KKZzHoOG1heGfQM2F8 8RNOO9zcQdZBG2CUJ1G7KP6dQPYnffsQKduNhc0O1MGghy9S93klvFPo59JCNCoMezw6 SrarRezWZsacsF1I9TF2yu6KtvotSDzOzQDeLYos9iw2tULPZcrSiOFqIx+FaCBizdEd 4uEudpK64Cq1FEHR0GfPKO34RYrkDmaNTCYFjK6567ODcQhwQsLprlWSbweJRyXs9kZr ioog== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=yeHEihXy; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=hS+QON+p; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ov9-20020a170906fc0900b00992ca771e71si6331449ejb.138.2023.07.24.06.47.13; Mon, 24 Jul 2023 06:47:39 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=yeHEihXy; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=hS+QON+p; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231669AbjGXNfP (ORCPT + 99 others); Mon, 24 Jul 2023 09:35:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37386 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231575AbjGXNer (ORCPT ); Mon, 24 Jul 2023 09:34:47 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2EB05211E for ; Mon, 24 Jul 2023 06:34:22 -0700 (PDT) Message-ID: <20230724132045.614331630@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205653; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=6qIRs7n/9rrrflFIJeawzXHaVLgyJbrokbfl4taony4=; b=yeHEihXy381bMxg0/berhdUeLmV4Qg9sbpFO01ntVycKkAtyqwA9OJJ58t8UxqG9i8dtaz gge4YJEyfgQnvji8/cElTBmP/j2g94LqLZrUadi3aOTwJxhYc5te42NXdt7zRv2HX3BcEU 5TAYlvp3rSXNpW6b+YSkFkD0PuvGME1PimooGOk4PQ3z9jqQwxFAJaHsQn9GmaNHthdhhn ZAnxIpYfmvv5IK1niDrCuhRbr+8/ViWGkkZZzJwoKIb4c8Rup6Q0WoJt0TYzDfqUZ8ngjJ H/6O86YehJaqRfRksiE5cTtdQAM95dN9G2Lv/FH2iPBRA+lQdpYKVCqnDQ6EsA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205653; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=6qIRs7n/9rrrflFIJeawzXHaVLgyJbrokbfl4taony4=; b=hS+QON+pKFsEgAFNZ2BSK1ClN3+9JScu5V9ULvbIxew7wwmdyIbbotKCCHnd8mRlvyqZz9 3r6T1Z04/+H87NCw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 17/58] x86/apic: Nuke another processor check References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:13 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772309928707596327 X-GMAIL-MSGID: 1772309928707596327 The boot CPUs local APIC is now always registered, so there is no point to have another unreadable validatation for it. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/kernel/smpboot.c | 17 ----------------- 1 file changed, 17 deletions(-) --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -1181,23 +1181,6 @@ static void __init smp_sanity_check(void set_nr_cpu_ids(8); } #endif - - if (!physid_isset(read_apic_id(), phys_cpu_present_map)) { - pr_warn("weird, boot CPU (#%d) not listed by the BIOS\n", - read_apic_id()); - - physid_set(read_apic_id(), phys_cpu_present_map); - } - - /* - * Should not be necessary because the MP table should list the boot - * CPU too, but we do it for the sake of robustness anyway. - */ - if (!apic->check_phys_apicid_present(boot_cpu_physical_apicid)) { - pr_notice("weird, boot CPU (#%d) not listed by the BIOS\n", - boot_cpu_physical_apicid); - physid_set(read_apic_id(), phys_cpu_present_map); - } preempt_enable(); } From patchwork Mon Jul 24 13:34:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124984 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1812765vqg; Mon, 24 Jul 2023 06:50:28 -0700 (PDT) X-Google-Smtp-Source: APBJJlF2TyJCbLHOQZZT+7ucXJQyegG99U7aiofBRL77vVv2iZj3Ako6Ch7ex5F6ErK+jbtd2FPK X-Received: by 2002:aa7:d58e:0:b0:51d:f5bd:5a88 with SMTP id r14-20020aa7d58e000000b0051df5bd5a88mr9954412edq.38.1690206627927; Mon, 24 Jul 2023 06:50:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206627; cv=none; d=google.com; s=arc-20160816; b=uIOaajpLzyxoa0LfoGBCx3lefzsNFQbC+b/opVQrjx/UzuvH/25rhJqno61/xU91x2 tjxdBP1xeVCCiyQb1/1LtiPj8mwVYt2vyOBiPizvYVWrMGd88JgG9la6AiV3OSnr9etp W2zhf1bhJ3LceODLMbZWQCmY3I85dNah6yRWj6gzywTaud028zmrd+nBUqQdTkfrGKX9 IHdSwRyWuf+G2z1APlNhQ72RGi5Z9EXrNPYBMypBKw0bvk2efjTq6yt3IOskEobaEU+t 5O/X/3SkjD609geXhMuwxGI4YbgSgg5BJKZFtpNPPb/2LUNWhB9GU6noBGsOs0Xa7bh0 y5mg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=xYutxZ9rMLywIqqTjqfZZaF9PJm3LP88T/JNH/GhwYU=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=nWme2yFf66ZTucQ0SV/yXW2M8JBzVtgy+CMBHGWOz+8o+oAlZ5KDQhpMS31CfAYADn P4FhZjDJwCz77N2N/bEZ5p9Jj5IuwSFoBRQY+PCOZj58m2AarWq4ZkoNsvZUaI7EPwjx o9dr5ei/z8Z9FXCxg+WNzx5XiTdyk13oGVGPN1RF8iYfvYNKeBs1b6avu2P5LdU2C/67 wokHf77r+w3DEBK9IHj+EIhfVsUi5st9qKP54JroQ3EW/LRRIolLo5x17FZo8JvmH0Ua OSVfgqktUwlRmX2lyDD1YndK2R6tQp2xBJn6GIhysCnTg5XaV4JB8Y4q0Z7QBLftWIgf Sfrw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=yEhbpxdZ; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b3-20020aa7df83000000b005221b1fc559si3561227edy.295.2023.07.24.06.50.03; Mon, 24 Jul 2023 06:50:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=yEhbpxdZ; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231537AbjGXNfZ (ORCPT + 99 others); Mon, 24 Jul 2023 09:35:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231616AbjGXNe4 (ORCPT ); Mon, 24 Jul 2023 09:34:56 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 29F242683 for ; Mon, 24 Jul 2023 06:34:26 -0700 (PDT) Message-ID: <20230724132045.673477506@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205655; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=xYutxZ9rMLywIqqTjqfZZaF9PJm3LP88T/JNH/GhwYU=; b=yEhbpxdZF4G4E66WlkNsz25xLxYxtuM6TKOTmGhCW0gbE0/LAAbSNnmR8WrrxilMcix7GR Mk2d1+dWPMIyDnEHVJtcHdZtrvE7aeR4E6XgDrrCooWX+UqkD+1C9C/7DmRcH59+6kVsqC KX5IsRdAi71fjklAil/MQUJhP0ioRV1SWqyWy6QnCS8OPMBhc9Yavl0AaFv2nr7Kpdw1/h b7opRUA34eZga/UuiFbCZSgq8j0mRjD4HsuZvzjXDiKc8ZHG4MaDo1dEb/5JooeoXIF547 aUPXWHvdgEdPjhjzA8q7TlLAZKWSVpvJIlo1eZwtNQItV6vnjx+77TYEyaUYhQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205655; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=xYutxZ9rMLywIqqTjqfZZaF9PJm3LP88T/JNH/GhwYU=; b=2cu6X8j3VWN1Frn0zPyNqCc3jr3P6ZzpQR+/9fMuPjHJwHUuPxw3UdEd68EinsPSKgTVHn 6SZZRw4q4upzd1Cw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 18/58] x86/apic: Remove check_phys_apicid_present() References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:14 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310105527327822 X-GMAIL-MSGID: 1772310105527327822 The only silly usage site is gone. Remove the gunk which was even outright wrong in the bigsmp_32 case which returned true unconditionally. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 2 -- arch/x86/kernel/apic/apic_common.c | 5 ----- arch/x86/kernel/apic/apic_flat_64.c | 2 -- arch/x86/kernel/apic/apic_noop.c | 2 -- arch/x86/kernel/apic/apic_numachip.c | 2 -- arch/x86/kernel/apic/bigsmp_32.c | 6 ------ arch/x86/kernel/apic/probe_32.c | 1 - arch/x86/kernel/apic/x2apic_cluster.c | 1 - arch/x86/kernel/apic/x2apic_phys.c | 1 - arch/x86/kernel/apic/x2apic_uv_x.c | 1 - arch/x86/xen/apic.c | 1 - 11 files changed, 24 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -305,7 +305,6 @@ struct apic { void (*setup_apic_routing)(void); int (*cpu_present_to_apicid)(int mps_cpu); void (*apicid_to_cpu_present)(int phys_apicid, physid_mask_t *retmap); - int (*check_phys_apicid_present)(int phys_apicid); int (*phys_pkg_id)(int cpuid_apic, int index_msb); u32 (*get_apic_id)(unsigned long x); @@ -485,7 +484,6 @@ extern u32 apic_flat_calc_apicid(unsigne extern bool default_check_apicid_used(physid_mask_t *map, int apicid); extern void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap); extern int default_cpu_present_to_apicid(int mps_cpu); -extern int default_check_phys_apicid_present(int phys_apicid); #else /* CONFIG_X86_LOCAL_APIC */ --- a/arch/x86/kernel/apic/apic_common.c +++ b/arch/x86/kernel/apic/apic_common.c @@ -35,11 +35,6 @@ int default_cpu_present_to_apicid(int mp } EXPORT_SYMBOL_GPL(default_cpu_present_to_apicid); -int default_check_phys_apicid_present(int phys_apicid) -{ - return physid_isset(phys_apicid, phys_cpu_present_map); -} - int default_apic_id_valid(u32 apicid) { return (apicid < 255); --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -124,7 +124,6 @@ static struct apic apic_flat __ro_after_ .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .apicid_to_cpu_present = NULL, - .check_phys_apicid_present = default_check_phys_apicid_present, .phys_pkg_id = flat_phys_pkg_id, .get_apic_id = flat_get_apic_id, @@ -213,7 +212,6 @@ static struct apic apic_physflat __ro_af .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .apicid_to_cpu_present = NULL, - .check_phys_apicid_present = default_check_phys_apicid_present, .phys_pkg_id = flat_phys_pkg_id, .get_apic_id = flat_get_apic_id, --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -107,8 +107,6 @@ struct apic apic_noop __ro_after_init = .cpu_present_to_apicid = default_cpu_present_to_apicid, .apicid_to_cpu_present = physid_set_mask_of_physid, - .check_phys_apicid_present = default_check_phys_apicid_present, - .phys_pkg_id = noop_phys_pkg_id, .get_apic_id = noop_get_apic_id, --- a/arch/x86/kernel/apic/apic_numachip.c +++ b/arch/x86/kernel/apic/apic_numachip.c @@ -257,7 +257,6 @@ static const struct apic apic_numachip1 .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .apicid_to_cpu_present = NULL, - .check_phys_apicid_present = default_check_phys_apicid_present, .phys_pkg_id = numachip_phys_pkg_id, .get_apic_id = numachip1_get_apic_id, @@ -303,7 +302,6 @@ static const struct apic apic_numachip2 .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .apicid_to_cpu_present = NULL, - .check_phys_apicid_present = default_check_phys_apicid_present, .phys_pkg_id = numachip_phys_pkg_id, .get_apic_id = numachip2_get_apic_id, --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -63,11 +63,6 @@ static void bigsmp_ioapic_phys_id_map(ph physids_promote(0xFFL, retmap); } -static int bigsmp_check_phys_apicid_present(int phys_apicid) -{ - return 1; -} - static int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb) { return cpuid_apic >> index_msb; @@ -138,7 +133,6 @@ static struct apic apic_bigsmp __ro_afte .setup_apic_routing = bigsmp_setup_apic_routing, .cpu_present_to_apicid = bigsmp_cpu_present_to_apicid, .apicid_to_cpu_present = physid_set_mask_of_physid, - .check_phys_apicid_present = bigsmp_check_phys_apicid_present, .phys_pkg_id = bigsmp_phys_pkg_id, .get_apic_id = bigsmp_get_apic_id, --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -80,7 +80,6 @@ static struct apic apic_default __ro_aft .setup_apic_routing = setup_apic_flat_routing, .cpu_present_to_apicid = default_cpu_present_to_apicid, .apicid_to_cpu_present = physid_set_mask_of_physid, - .check_phys_apicid_present = default_check_phys_apicid_present, .phys_pkg_id = default_phys_pkg_id, .get_apic_id = default_get_apic_id, --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c @@ -250,7 +250,6 @@ static struct apic apic_x2apic_cluster _ .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .apicid_to_cpu_present = NULL, - .check_phys_apicid_present = default_check_phys_apicid_present, .phys_pkg_id = x2apic_phys_pkg_id, .get_apic_id = x2apic_get_apic_id, --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -174,7 +174,6 @@ static struct apic apic_x2apic_phys __ro .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .apicid_to_cpu_present = NULL, - .check_phys_apicid_present = default_check_phys_apicid_present, .phys_pkg_id = x2apic_phys_pkg_id, .get_apic_id = x2apic_get_apic_id, --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -846,7 +846,6 @@ static struct apic apic_x2apic_uv_x __ro .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .apicid_to_cpu_present = NULL, - .check_phys_apicid_present = default_check_phys_apicid_present, .phys_pkg_id = uv_phys_pkg_id, .get_apic_id = x2apic_get_apic_id, --- a/arch/x86/xen/apic.c +++ b/arch/x86/xen/apic.c @@ -154,7 +154,6 @@ static struct apic xen_pv_apic = { .setup_apic_routing = NULL, .cpu_present_to_apicid = xen_cpu_present_to_apicid, .apicid_to_cpu_present = physid_set_mask_of_physid, /* Used on 32-bit */ - .check_phys_apicid_present = default_check_phys_apicid_present, /* smp_sanity_check needs it */ .phys_pkg_id = xen_phys_pkg_id, /* detect_ht */ .get_apic_id = xen_get_apic_id, From patchwork Mon Jul 24 13:34:16 2023 Content-Type: text/plain; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id u23-20020a170906b11700b0099270bd1b10si5871320ejy.208.2023.07.24.07.29.59; Mon, 24 Jul 2023 07:30:25 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=Ma7S2W6Y; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231206AbjGXNfb (ORCPT + 99 others); Mon, 24 Jul 2023 09:35:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231438AbjGXNe6 (ORCPT ); Mon, 24 Jul 2023 09:34:58 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6DDB110E0 for ; Mon, 24 Jul 2023 06:34:31 -0700 (PDT) Message-ID: <20230724132045.734417851@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205657; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=puds9uet7raznuk9F0PAVBH9TUSCPzyaOfXQkH8xFMc=; b=Ma7S2W6YsGUNRlynq2m6LcyDflsz0YgJZgpNL5x4ZWKRFccuyLqjiImqRwxe0HiiSv6EIH e2pYUmo6DcDAM0bFq/htjv1gtvWUF5pK9LPZQIJ9kwmOhxXrOv88FhtEftRUM/zEofUSd1 fOpTz1LU8MvqThlYm5xVW3vbJqf4CGuNX7vXaICd6WqC94NaxCgyb4oEYFbZyC4V34v7Q2 UNoqqO6bZJly5BgSM8ZtdUhbKi4OyEXz1eFHN9Im/Vzei2oixrI+C7mr941kfGjUPSpxGs ur8EZxJ5agTo37B/FEgc0khiU9UaKOXAkzrefJMSoOxA6PwsNjmU18gQ1Z93Sw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205657; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=puds9uet7raznuk9F0PAVBH9TUSCPzyaOfXQkH8xFMc=; b=7qu7rbCVxICsTyxYNn+Lv2EG63SEVqJl7O6gSGmK8mrLfSYMo9AmBP3pYLfYlUfxI8NcPx n81cQJF86Mp3W1DQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 19/58] x86/apic: Get rid of apic_phys References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:16 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772312618946130622 X-GMAIL-MSGID: 1772312618946130622 No need for an extra variable to find out whether the APIC has been mapped or is accessible (X2APIC mode). Provide an inline for this and check apic_mmio_base which is only set when the local APIC has been mapped. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/kernel/apic/apic.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -99,6 +99,11 @@ static bool virt_ext_dest_id __ro_after_ /* For parallel bootup. */ unsigned long apic_mmio_base __ro_after_init; +static inline bool apic_accessible(void) +{ + return x2apic_mode || apic_mmio_base; +} + /* * Map cpu index to physical APIC ID */ @@ -199,8 +204,6 @@ unsigned int lapic_timer_period = 0; static void apic_pm_activate(void); -static unsigned long apic_phys __ro_after_init; - /* * Get the LAPIC version */ @@ -1127,8 +1130,7 @@ void clear_local_APIC(void) int maxlvt; u32 v; - /* APIC hasn't been mapped yet */ - if (!x2apic_mode && !apic_phys) + if (!apic_accessible()) return; maxlvt = lapic_get_maxlvt(); @@ -1218,8 +1220,7 @@ void apic_soft_disable(void) */ void disable_local_APIC(void) { - /* APIC hasn't been mapped yet */ - if (!x2apic_mode && !apic_phys) + if (!apic_accessible()) return; apic_soft_disable(); @@ -2142,7 +2143,7 @@ void __init init_apic_mappings(void) static __init void apic_set_fixmap(void) { set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr); - apic_phys = apic_mmio_base = APIC_BASE; + apic_mmio_base = APIC_BASE; apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n", apic_mmio_base, mp_lapic_addr); apic_read_boot_cpu_id(false); @@ -2896,11 +2897,11 @@ early_param("apic", apic_set_verbosity); static int __init lapic_insert_resource(void) { - if (!apic_phys) + if (!apic_mmio_base) return -1; /* Put local APIC into the resource map. */ - lapic_resource.start = apic_phys; + lapic_resource.start = apic_mmio_base; lapic_resource.end = lapic_resource.start + PAGE_SIZE - 1; insert_resource(&iomem_resource, &lapic_resource); From patchwork Mon Jul 24 13:34:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124961 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1805546vqg; Mon, 24 Jul 2023 06:37:41 -0700 (PDT) X-Google-Smtp-Source: APBJJlGMDhCJG8An/n7hIrdhKUlPSN3dTYcgh/TvrxjmDbVPEa9KMEX9vP5p5/5qZ8k3PAOou35U X-Received: by 2002:a17:90a:9316:b0:263:129e:80ac with SMTP id p22-20020a17090a931600b00263129e80acmr7441275pjo.38.1690205860932; Mon, 24 Jul 2023 06:37:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690205860; cv=none; d=google.com; s=arc-20160816; b=yGHCwK47x9EbnNlVcKjWYiJmLfYAV5WXDtFjW1R2ZhqPyFKjG/VRh1u19MWrrlAG4P k+Hm5tYlD63Koij4S8owaJXOsnxK/Xf3FA1JLCf3GPTweHIzco7bY7+j3+PTa6HRWPrR FkBzl27jBxP4K72wHJw9lZ4/sU3/FuyzoVarru31lSWXLZg4nkNjNBW2MgwP/AMXe+1q BaUk8FXrFyDFD3KfEC3hP57C4sFkvuBdX6Xy/wuurGASCd5Pn5qZIVzQBUKWx4NsHN1e 2RTRhsdlY60V0PSB4elkQeicdAsLnl/oFE5FeYKT5eWYH6SVIAoZ1uUeB9NhJ/1bHRQH ywbQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=px8ty2iQZiEFzcpK/cPxq1ShjeuaXrZPHQ/rgezGckM=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=zHKSZLESoZkIcIv2JtUjm9JPja2yNKXPcMMikd2frAj5z6DePPcp/xmP2521B0Jl2j WkiF0iVRqC+MNTtnrGBBMcwmhtcym80SXYp8R8BbBrR6i4rcqMuuFwn4klFLepSUzHhL 4/Xfe3xDFu7llCL64Jy5geMgcRMMKuApNFr8k+GvXy1LnMqU8ctLD4LZVn6/qmDHmstW lhj6bZJSyHCJlDzrZvB1o3ZJ+8Jyb9ZDmx+5iz5izNjwft6VnMx5COhEpTy2VtISFadQ rO8WkpbXFtBUE+KurBumJCVOB2bwOZn/oexfff3Td0BFCTx2VVdcxTryhmLjqYgVSdMR zeOQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=jvN3oIIH; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id d8-20020a17090a3b0800b00265817d03b5si9087980pjc.164.2023.07.24.06.37.27; Mon, 24 Jul 2023 06:37:40 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=jvN3oIIH; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231556AbjGXNff (ORCPT + 99 others); Mon, 24 Jul 2023 09:35:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37354 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231660AbjGXNfG (ORCPT ); Mon, 24 Jul 2023 09:35:06 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2E2F01990 for ; Mon, 24 Jul 2023 06:34:40 -0700 (PDT) Message-ID: <20230724132045.795863151@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205659; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=px8ty2iQZiEFzcpK/cPxq1ShjeuaXrZPHQ/rgezGckM=; b=jvN3oIIH2BZlFYNmrnrsJjZ1/xWzQ/NZAgiBHPWzFtxIBQAyQ69v0uCn9sqFOD5ixWD6e3 ttpF2ew+OX5R1WC1fOleKHxL4/qsHk/ST/vTd5YrBAeARUE7skCVfvzK2YnMY8K+W+BDrB WxWPiVbXMLrk2Y+Qxx6ewRq9olgiat4AA/VtsdvCcVHOJWFj9YkkvMbJmhPwpzrITVGzlG 12qtFLEkI/3VANi9tMiWJYlNy7kznEubewOlo9XUNj4eX/TEFMp/GHG1jW/r4kEt6ZIKwX /pa7ySxCcnQLDstTh54Ywt12Gp/kplxsrg2wvWkC5VKhWzeDBmacYR5zu6sSbg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205659; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=px8ty2iQZiEFzcpK/cPxq1ShjeuaXrZPHQ/rgezGckM=; b=T/0y2PTWxS/iatmkPRNm7QBmvvawspLMgP4WI31CyN1/3LpBomIqry9AL1rRySlyIzzZLe 3I0wmFOwinHmpjBg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 20/58] x86/apic/32: Sanitize logical APIC ID handling References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:18 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772309300838309057 X-GMAIL-MSGID: 1772309300838309057 apic::x86_32_early_logical_apicid() is yet another historical joke. It is used to preset the x86_cpu_to_logical_apicid per CPU variable during APIC enumeration with: - 1 shifted left by the CPU number - the physical APIC ID in case of bigsmp The latter is hillarious because bigsmp uses physical destination mode which never can use the logical APIC ID. It gets even worse. As bigsmp can be enforced late in the boot process the probe function overwrites the per CPU variable which is never used for this APIC type once again. Remove that gunk and store 1 << cpunr unconditionally if and only if the CPU number is less than 8, because the default logical destination mode only allows up to 8 CPUs. This is just an intermediate step before removing the per CPU insanity completely. Stay tuned. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 13 ------------- arch/x86/kernel/apic/apic.c | 4 ++-- arch/x86/kernel/apic/apic_noop.c | 11 ----------- arch/x86/kernel/apic/bigsmp_32.c | 18 ------------------ arch/x86/kernel/apic/probe_32.c | 7 ------- 5 files changed, 2 insertions(+), 51 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -315,19 +315,6 @@ struct apic { /* wakeup secondary CPU using 64-bit wakeup point */ int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip); -#ifdef CONFIG_X86_32 - /* - * Called very early during boot from get_smp_config(). It should - * return the logical apicid. x86_[bios]_cpu_to_apicid is - * initialized before this function is called. - * - * If logical apicid can't be determined that early, the function - * may return BAD_APICID. Logical apicid will be configured after - * init_apic_ldr() while bringing up CPUs. Note that NUMA affinity - * won't be applied properly during early boot in this case. - */ - int (*x86_32_early_logical_apicid)(int cpu); -#endif char *name; }; --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -2435,8 +2435,8 @@ static void cpu_update_apic(int cpu, int early_per_cpu(x86_cpu_to_apicid, cpu) = apicid; #endif #ifdef CONFIG_X86_32 - early_per_cpu(x86_cpu_to_logical_apicid, cpu) = - apic->x86_32_early_logical_apicid(cpu); + if (cpu < 8) + early_per_cpu(x86_cpu_to_logical_apicid, cpu) = 1U << cpu; #endif set_cpu_possible(cpu, true); physid_set(apicid, phys_cpu_present_map); --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -80,13 +80,6 @@ static void noop_apic_write(u32 reg, u32 WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_APIC) && !apic_is_disabled); } -#ifdef CONFIG_X86_32 -static int noop_x86_32_early_logical_apicid(int cpu) -{ - return BAD_APICID; -} -#endif - struct apic apic_noop __ro_after_init = { .name = "noop", .probe = noop_probe, @@ -130,8 +123,4 @@ struct apic apic_noop __ro_after_init = .icr_write = noop_apic_icr_write, .wait_icr_idle = noop_apic_wait_icr_idle, .safe_wait_icr_idle = noop_safe_apic_wait_icr_idle, - -#ifdef CONFIG_X86_32 - .x86_32_early_logical_apicid = noop_x86_32_early_logical_apicid, -#endif }; --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -28,12 +28,6 @@ static bool bigsmp_check_apicid_used(phy return false; } -static int bigsmp_early_logical_apicid(int cpu) -{ - /* on bigsmp, logical apicid is the same as physical */ - return early_per_cpu(x86_cpu_to_apicid, cpu); -} - /* * bigsmp enables physical destination mode * and doesn't use LDR and DFR @@ -154,27 +148,15 @@ static struct apic apic_bigsmp __ro_afte .icr_write = native_apic_icr_write, .wait_icr_idle = native_apic_wait_icr_idle, .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, - - .x86_32_early_logical_apicid = bigsmp_early_logical_apicid, }; void __init generic_bigsmp_probe(void) { - unsigned int cpu; - if (!probe_bigsmp()) return; apic = &apic_bigsmp; - for_each_possible_cpu(cpu) { - if (early_per_cpu(x86_cpu_to_logical_apicid, - cpu) == BAD_APICID) - continue; - early_per_cpu(x86_cpu_to_logical_apicid, cpu) = - bigsmp_early_logical_apicid(cpu); - } - pr_info("Overriding APIC driver with %s\n", apic_bigsmp.name); } --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -16,11 +16,6 @@ #include "local.h" -static int default_x86_32_early_logical_apicid(int cpu) -{ - return 1 << cpu; -} - static void setup_apic_flat_routing(void) { #ifdef CONFIG_X86_IO_APIC @@ -101,8 +96,6 @@ static struct apic apic_default __ro_aft .icr_write = native_apic_icr_write, .wait_icr_idle = native_apic_wait_icr_idle, .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, - - .x86_32_early_logical_apicid = default_x86_32_early_logical_apicid, }; apic_driver(apic_default); From patchwork Mon Jul 24 13:34:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124972 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1811520vqg; Mon, 24 Jul 2023 06:48:08 -0700 (PDT) X-Google-Smtp-Source: APBJJlG5/MFx8cNQp/YN8AOe298lHRbnDMPZDzVOl83xhkph+94qbIEFe102NqCBUJpW9tiaVUIt X-Received: by 2002:ac2:46f9:0:b0:4f8:76ba:ad3c with SMTP id q25-20020ac246f9000000b004f876baad3cmr5382871lfo.55.1690206488648; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id q14-20020aa7da8e000000b005223a37a46bsi687660eds.588.2023.07.24.06.47.44; Mon, 24 Jul 2023 06:48:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=SE3kLJyG; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=m0eSt3PN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229597AbjGXNfk (ORCPT + 99 others); Mon, 24 Jul 2023 09:35:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37126 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230013AbjGXNfI (ORCPT ); Mon, 24 Jul 2023 09:35:08 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F91D198E for ; Mon, 24 Jul 2023 06:34:42 -0700 (PDT) Message-ID: <20230724132045.856964404@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205661; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=4wEhoY8ulym22Jw+bKw7ms+1bFblC+QNKvBDCbvuUFo=; b=SE3kLJyGZ5j+hP7B3nd5GKnFOdTkyp8wGsVQNa86/9795WKXSps/WtFVcIvGZWCkVUV8CX Fjzit1c6Hia33VGL6UObHJjuC3/ljrOEUf0tHEKXdJ5sPOASMujAztqHACDWcuJfWC9N3b c2JU0veHBbDzvFtqJiJvwo65eHkMJA4XrD2/m9ldAccIykZwpzVkJCxnLBkEkFxIaSAjWV x4fh7iYwil4BNfh2DmMNKSnJ+IzSLkZ0QQogVWlYET0eMnKoj1bwwZauCU+pqxdHRyvSzJ rnoeDyIJ1FFjx58BMMGJoW2XN5B93qlLqxoFlN0+ty87Rzh1CGYrMzJgHnvrmA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205661; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=4wEhoY8ulym22Jw+bKw7ms+1bFblC+QNKvBDCbvuUFo=; b=m0eSt3PN7Lfn+CnbTX1MHOsZ/dt+uk3asvSwWbTKkGWJoUU7P6IjbbMN2PKKlAgcenYG9V R+x5dbrre95IDpBw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 21/58] x86/apic/32: Remove x86_cpu_to_logical_apicid References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:20 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772309959239537277 X-GMAIL-MSGID: 1772309959239537277 This per CPU variable is just yet another form of voodoo programming. The boot ordering is: per_cpu(x86_cpu_to_logical_apicid, cpu) = 1U << cpu; ..... setup_apic() apic->init_apic_ldr() default_init_apic_ldr() apic_write(SET_APIC_LOGICAL_ID(1UL << smp_processor_id(), APIC_LDR); id = GET_APIC_LOGICAL_ID(apic_read(APIC_LDR); WARN_ON(id != per_cpu(x86_cpu_to_logical_apicid, cpu)); per_cpu(x86_cpu_to_logical_apicid, cpu) = id; So first write the default into LDR and then validate it against the same default which was set up during early boot APIC enumeration. Brilliant, isn't it? The comment above the per CPU variable declaration describes it well: 'Let's keep it ugly for now.' Remove the useless gunk and use '1U << cpu' consistently all over the place. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/smp.h | 3 --- arch/x86/kernel/apic/apic.c | 31 ------------------------------- arch/x86/kernel/apic/ipi.c | 36 +++++++++--------------------------- arch/x86/kernel/setup_percpu.c | 7 ------- 4 files changed, 9 insertions(+), 68 deletions(-) --- a/arch/x86/include/asm/smp.h +++ b/arch/x86/include/asm/smp.h @@ -22,9 +22,6 @@ DECLARE_PER_CPU_READ_MOSTLY(u16, cpu_l2c DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_cpu_to_apicid); DECLARE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_acpiid); -#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) -DECLARE_EARLY_PER_CPU_READ_MOSTLY(int, x86_cpu_to_logical_apicid); -#endif struct task_struct; --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -113,15 +113,6 @@ EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_a EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_acpiid); #ifdef CONFIG_X86_32 - -/* - * On x86_32, the mapping between cpu and logical apicid may vary - * depending on apic in use. The following early percpu variable is - * used for the mapping. This is where the behaviors of x86_64 and 32 - * actually diverge. Let's keep it ugly for now. - */ -DEFINE_EARLY_PER_CPU_READ_MOSTLY(int, x86_cpu_to_logical_apicid, BAD_APICID); - /* Local APIC was disabled by the BIOS and enabled by the kernel */ static int enabled_via_apicbase __ro_after_init; @@ -1589,24 +1580,6 @@ static void setup_local_APIC(void) */ apic->init_apic_ldr(); -#ifdef CONFIG_X86_32 - if (apic->dest_mode_logical) { - int logical_apicid, ldr_apicid; - - /* - * APIC LDR is initialized. If logical_apicid mapping was - * initialized during get_smp_config(), make sure it matches - * the actual value. - */ - logical_apicid = early_per_cpu(x86_cpu_to_logical_apicid, cpu); - ldr_apicid = GET_APIC_LOGICAL_ID(apic_read(APIC_LDR)); - if (logical_apicid != BAD_APICID) - WARN_ON(logical_apicid != ldr_apicid); - /* Always use the value from LDR. */ - early_per_cpu(x86_cpu_to_logical_apicid, cpu) = ldr_apicid; - } -#endif - /* * Set Task Priority to 'accept all except vectors 0-31'. An APIC * vector in the 16-31 range could be delivered if TPR == 0, but we @@ -2433,10 +2406,6 @@ static void cpu_update_apic(int cpu, int #if defined(CONFIG_SMP) || defined(CONFIG_X86_64) early_per_cpu(x86_cpu_to_apicid, cpu) = apicid; #endif -#ifdef CONFIG_X86_32 - if (cpu < 8) - early_per_cpu(x86_cpu_to_logical_apicid, cpu) = 1U << cpu; -#endif set_cpu_possible(cpu, true); physid_set(apicid, phys_cpu_present_map); set_cpu_present(cpu, true); --- a/arch/x86/kernel/apic/ipi.c +++ b/arch/x86/kernel/apic/ipi.c @@ -243,50 +243,32 @@ void default_send_IPI_self(int vector) } #ifdef CONFIG_X86_32 - -void default_send_IPI_mask_sequence_logical(const struct cpumask *mask, - int vector) +void default_send_IPI_mask_sequence_logical(const struct cpumask *mask, int vector) { unsigned long flags; - unsigned int query_cpu; - - /* - * Hack. The clustered APIC addressing mode doesn't allow us to send - * to an arbitrary mask, so I do a unicasts to each CPU instead. This - * should be modified to do 1 message per cluster ID - mbligh - */ + unsigned int cpu; local_irq_save(flags); - for_each_cpu(query_cpu, mask) - __default_send_IPI_dest_field( - early_per_cpu(x86_cpu_to_logical_apicid, query_cpu), - vector, APIC_DEST_LOGICAL); + for_each_cpu(cpu, mask) + __default_send_IPI_dest_field(1U << cpu, vector, APIC_DEST_LOGICAL); local_irq_restore(flags); } void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask, int vector) { + unsigned int cpu, this_cpu = smp_processor_id(); unsigned long flags; - unsigned int query_cpu; - unsigned int this_cpu = smp_processor_id(); - - /* See Hack comment above */ local_irq_save(flags); - for_each_cpu(query_cpu, mask) { - if (query_cpu == this_cpu) + for_each_cpu(cpu, mask) { + if (cpu == this_cpu) continue; - __default_send_IPI_dest_field( - early_per_cpu(x86_cpu_to_logical_apicid, query_cpu), - vector, APIC_DEST_LOGICAL); - } + __default_send_IPI_dest_field(1U << cpu, vector, APIC_DEST_LOGICAL); + } local_irq_restore(flags); } -/* - * This is only used on smaller machines. - */ void default_send_IPI_mask_logical(const struct cpumask *cpumask, int vector) { unsigned long mask = cpumask_bits(cpumask)[0]; --- a/arch/x86/kernel/setup_percpu.c +++ b/arch/x86/kernel/setup_percpu.c @@ -184,10 +184,6 @@ void __init setup_per_cpu_areas(void) per_cpu(x86_cpu_to_acpiid, cpu) = early_per_cpu_map(x86_cpu_to_acpiid, cpu); #endif -#ifdef CONFIG_X86_32 - per_cpu(x86_cpu_to_logical_apicid, cpu) = - early_per_cpu_map(x86_cpu_to_logical_apicid, cpu); -#endif #ifdef CONFIG_NUMA per_cpu(x86_cpu_to_node_map, cpu) = early_per_cpu_map(x86_cpu_to_node_map, cpu); @@ -214,9 +210,6 @@ void __init setup_per_cpu_areas(void) early_per_cpu_ptr(x86_cpu_to_apicid) = NULL; early_per_cpu_ptr(x86_cpu_to_acpiid) = NULL; #endif -#ifdef CONFIG_X86_32 - early_per_cpu_ptr(x86_cpu_to_logical_apicid) = NULL; -#endif #ifdef CONFIG_NUMA early_per_cpu_ptr(x86_cpu_to_node_map) = NULL; #endif From patchwork Mon Jul 24 13:34:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124998 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1814616vqg; Mon, 24 Jul 2023 06:53:52 -0700 (PDT) X-Google-Smtp-Source: APBJJlGKzIlOrSZxs9CT/JOiPoljTB02BjfXXBYBu2BWvG8yNWqvZ3gGs5a7ZoJ/8RVuPX90c3Xz X-Received: by 2002:a05:6402:128f:b0:522:29ee:2ab with SMTP id w15-20020a056402128f00b0052229ee02abmr3727712edv.14.1690206832156; Mon, 24 Jul 2023 06:53:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206832; cv=none; d=google.com; s=arc-20160816; b=oWrROCj5VJ/j0+4mh2uOGkQaTzV9XInLihUlWCjptfgsmjHJGk8Vy0a6bU9BPudaeD i5hP6TLAa4zgFbOiTWeuSH1IXD29bzgbv7/V/k+0cmJKvXS7NBUoP7gKvHgOIPM/i7Mo UA4zHtN6ZPYRV/G/rgacbLfd5K7nRvgYAZe724SDyF2HzYEMrxQYcLjzxRr3z7JQ2SYs whUb3/LFhCuG4dxLRurqyqt707D65Y02dzF4QByrUd1ftXBm2854+TEnSNzaQWW0QK3B tw5YOZSUcfNdfjnG5ktkwaz7EGyzBAmKIPHAgf3SPrke2Q8MBQbYROoTTVzCX59rr/Iy sjmA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=b8Xt5cYn7tsxj5f5GzHs5GjoZDN6ZZKDqaLjg/BbaXY=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=TAP94lGxwky5DxHMBjRaltaLzoNBpFu4QYx+fh+kE96ytJOXYV5z+dc9XkFYQKrV47 LDqd9nbiUPdZYXcGLSVR2EX2kgrt4o6/mQNzLwJqwG8C1r1IIEq/Ci+QTPbb9y9+OTWW zj6iFrDbImTDuL6QYUC9mQVf31QCnzoCE3fdG8Vs2trMtS/gZlcGdjiOFpS6ZAwb2z7D MDcxRr9fE5RmaJElJX0kanYjx7W7RupkUtp9hRTbXbLQLwOA123sbkCG8e99+0NV/p9G XfmI01rkRlB2LZFUyJ0zTxl9MpskbtfJa7SGUqxPWaJkI1RLfprkc+InVByeisqdTkYq v5IA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=hyVDnZMm; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=oNFcrUX9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id k22-20020aa7c396000000b0051e02f601aasi6490558edq.324.2023.07.24.06.53.27; Mon, 24 Jul 2023 06:53:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=hyVDnZMm; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=oNFcrUX9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231389AbjGXNgR (ORCPT + 99 others); Mon, 24 Jul 2023 09:36:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37414 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231588AbjGXNfq (ORCPT ); Mon, 24 Jul 2023 09:35:46 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 204E910D1 for ; Mon, 24 Jul 2023 06:35:10 -0700 (PDT) Message-ID: <20230724132045.915729323@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205662; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=b8Xt5cYn7tsxj5f5GzHs5GjoZDN6ZZKDqaLjg/BbaXY=; b=hyVDnZMm328zZyvf5QBemGKZs+Q2iE0T1EdrVijsFxWqAS2fUUxpP8WALjYfMR+YwppUbY qHAFXvKGC9M8pqE9cI+U/AjvUK1RwJRJbPFlI1hBkqMVOdClqwyBKhMUlZtDEFl5yKtVeS H5QFXU6FiJOW4MocZSvwsBTBvU6ft6bekujhK0qJwclAviiwJf54FzRUWRoHBLf/5jy5XX U3VjGCIrF+y2bzUP1eH7FedSCFuUdr6JJl/TJjhMkRnurmJ+DWLcc/dhgAGuQFovH9jgbD PDhMWjMfw6Nrw28K331XGg+d9wHv/jtn41npDI5DsnwqRnxvI1UlMB9yfgfVxA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205662; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=b8Xt5cYn7tsxj5f5GzHs5GjoZDN6ZZKDqaLjg/BbaXY=; b=oNFcrUX9MSZdx8ndzCs18KMcIfoCWf+qfisJhR231Lqe7MP6altfQ9GLb98G94mZYBp0ul PYJAF/u6OclYjIAw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 22/58] x86/apic/ipi: Code cleanup References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:22 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310319404777614 X-GMAIL-MSGID: 1772310319404777614 Remove completely useless and mindlessly copied comments and tidy up the code which causes eye bleed when looking at it. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/kernel/apic/ipi.c | 23 +++++++---------------- 1 file changed, 7 insertions(+), 16 deletions(-) --- a/arch/x86/kernel/apic/ipi.c +++ b/arch/x86/kernel/apic/ipi.c @@ -184,18 +184,13 @@ void default_send_IPI_single_phys(int cp void default_send_IPI_mask_sequence_phys(const struct cpumask *mask, int vector) { - unsigned long query_cpu; unsigned long flags; + unsigned long cpu; - /* - * Hack. The clustered APIC addressing mode doesn't allow us to send - * to an arbitrary mask, so I do a unicast to each CPU instead. - * - mbligh - */ local_irq_save(flags); - for_each_cpu(query_cpu, mask) { + for_each_cpu(cpu, mask) { __default_send_IPI_dest_field(per_cpu(x86_cpu_to_apicid, - query_cpu), vector, APIC_DEST_PHYSICAL); + cpu), vector, APIC_DEST_PHYSICAL); } local_irq_restore(flags); } @@ -203,18 +198,15 @@ void default_send_IPI_mask_sequence_phys void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask, int vector) { - unsigned int this_cpu = smp_processor_id(); - unsigned int query_cpu; + unsigned int cpu, this_cpu = smp_processor_id(); unsigned long flags; - /* See Hack comment above */ - local_irq_save(flags); - for_each_cpu(query_cpu, mask) { - if (query_cpu == this_cpu) + for_each_cpu(cpu, mask) { + if (cpu == this_cpu) continue; __default_send_IPI_dest_field(per_cpu(x86_cpu_to_apicid, - query_cpu), vector, APIC_DEST_PHYSICAL); + cpu), vector, APIC_DEST_PHYSICAL); } local_irq_restore(flags); } @@ -283,7 +275,6 @@ void default_send_IPI_mask_logical(const local_irq_restore(flags); } -/* must come after the send_IPI functions above for inlining */ static int convert_apicid_to_cpu(int apic_id) { int i; From patchwork Mon Jul 24 13:34:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124963 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1805658vqg; Mon, 24 Jul 2023 06:37:53 -0700 (PDT) X-Google-Smtp-Source: APBJJlFDmgcNWr9nSEDuY2C8qXXhMfkCgMStaU1EeOJ3cr2oenxJEbJGCTStzfChoBDR3wmOBpVZ X-Received: by 2002:a05:6a20:cd:b0:11e:7ced:3391 with SMTP id 13-20020a056a2000cd00b0011e7ced3391mr9062653pzh.43.1690205873569; Mon, 24 Jul 2023 06:37:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690205873; cv=none; d=google.com; s=arc-20160816; b=HYTkOcWbTTAsL73zMX/9Y6voqTs2xyZAn2UhCaCzI5WEUARyEgIjiyvk6aOuDxw0z8 iO9gtAV8/PT42TGmxjR8oUHYZ09ok0yf3R9tLGw6+wPhrdflp6tNbOQzQTkOPmrT3L5u F9TtVBfucnHqO8uRASy/qS21m1qnzrN2BARfN/J2I35pd5YO47k69j8bNu01iiM2N0yw Qr9ziC1iTG60lHgQMazANp+rzHPfWyl/cH8dl2Gxo3jQ1LmgjPqHFfens/JfoS2A/7JY +asxwT6mW1K4Ix/6GZM3tDE4/MSKWups4zpYwDqDNf2GFeuw1x8y3rNTyFrTC6WT5jXZ h30A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=1bhj7lWCPL93WVUL7hHxugShRN0AQvpospwY1BweZqQ=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=GPVFYR3B6bfBhKdESkg0oOrX+gl+S/J9BYwhrL0cxXuerfaAzOsRokBKm3t4qqzang RRzKXeT4+cY0V9puh60lyjpbV6YbPu6IayBwUV+nrKPhhoCPrAh4kPVZBC14DGnAg6h4 c5djCQTYRx4WjXenWG/MRV+PLMRVv88NqM3OUcdYxswjp12WdQIhJwYPHIG0YAgyjQFd mHQX/YCKO9vtDPfs7C7ozc9anKciYrbdoeJ2LRir6ZkkOElutnKMgOC4qG26Wal0PoKv YlXqJyeyf25nhlJv7pTrD7Hptdv3QPrUlAWUQoMPwELn+WcjOf4z/85PoiijgRqYzePV XgMw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=ckVj3JCV; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/kernel/apic/x2apic_uv_x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -1843,7 +1843,7 @@ static void __init uv_system_init_hub(vo /* Initialize per CPU info: */ for_each_possible_cpu(cpu) { - int apicid = early_per_cpu(x86_cpu_to_apicid, cpu); + int apicid = per_cpu(x86_cpu_to_apicid, cpu); unsigned short bid; unsigned short pnode; From patchwork Mon Jul 24 13:34:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124976 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1811932vqg; Mon, 24 Jul 2023 06:48:56 -0700 (PDT) X-Google-Smtp-Source: APBJJlEQXTsXXQ65yB8x/r4oykb0H8qbjiLXn1rFgeK2mtj8IbMC9zYOZGNV33QSChR3ORv9pNxJ X-Received: by 2002:aa7:cd02:0:b0:51b:f669:9df3 with SMTP id b2-20020aa7cd02000000b0051bf6699df3mr8338614edw.4.1690206535801; Mon, 24 Jul 2023 06:48:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206535; cv=none; d=google.com; s=arc-20160816; b=EB8MwbG9aLNek9FvtgVgzGskNhG6sbedfE0kH44MNflAgSVWcYsSSv79JSTzA929d0 I8XuugcoITJ7Zm2IbbFdUmZRTKuIOYxqvptNm0ih5HlOQ6Vl5xwvppl91t8RYwzv6DQF j3jZMjy8k5+WrNdbNTG3SJRMP5X6RVolLhraPU119aRtBwQbPlSyCqn6Ui3WGN3ko585 Yh093MCqfMdRp1TmGXTCGGmmfB5hWGf7T5YQf5n7UWwGEUtyemyu9Uq0X0TPB/H8ja0g mOMX65RKznqZI2EuQd+Y0JoqSwxeQsq5SBRYbpFKhHG0a7HCOgtyucEWka1xYjb2Tvl2 FIDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=XBWDLku2nyQ5/5bJqq7OR3c/AtCppUf/8w42TtOLQ9Q=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=GVMiFpFJmNTFHEH9oyXrddWTBs8uZ+oOO1aYQrAxrB/mXpc3BTQXmAO/YbilqBf7tF LtEABPzYVHxjO/TmeKxBGlWPq3/9RAz+5ko1blJYMjlvzxbgtCGxQGW4bZu4oSfTdA3v W0sfaioNuXuQa7zk3zNdqQce4jd/dBmxAP1wqpWScoei0xmjOVv2hDp82htbFnymStwX DXfL0PvQh2L2IEcHPshLTfVipdtco/955AiIjjWTPI2j9Q6+fxC+WeKLQntYiED3XvXz LSDOoXYMP1hC773v3y168q1S25zonL2tiOYS3zMxjtJwquSN8n/quU2ga9J8fOAhBm8w +ssg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=Rn1RuI4o; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id m4-20020aa7c484000000b0051df225e708si6431249edq.46.2023.07.24.06.48.31; Mon, 24 Jul 2023 06:48:55 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=Rn1RuI4o; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231680AbjGXNfq (ORCPT + 99 others); Mon, 24 Jul 2023 09:35:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37412 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231442AbjGXNfV (ORCPT ); Mon, 24 Jul 2023 09:35:21 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2CBF21B8 for ; Mon, 24 Jul 2023 06:34:47 -0700 (PDT) Message-ID: <20230724132046.033563977@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205666; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=XBWDLku2nyQ5/5bJqq7OR3c/AtCppUf/8w42TtOLQ9Q=; b=Rn1RuI4ok1LNKdo0pSoUsJ8vum8dDf3MJB+pYApITyqT958xUvvroeGHufqwRLSKxfhh1u Pdjp9hDei1bguhaBx4/cPfR1yZbwSPQViCqOgse4llUuagbergyIxZy7MV4evoqlri88Os z35ZOOZlL3jm0jJxibuToAWWurEGpQgOIy55xe3GPcMMZSMq/Fn9ij3feKTHLcQdQ+W3ov bc9BBe7xGuVleG2MwLJvG6DM4bqG9ewg+LHD82lPcXJVjtYsbkT3NXkJ/pmbkfjsoHToeX uW9jqRgjkVQjXyPwjIkfVcoTEyaJO2xgpw6sLYZEbJS7knotbe8bNNdGMYNT+Q== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205666; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=XBWDLku2nyQ5/5bJqq7OR3c/AtCppUf/8w42TtOLQ9Q=; b=TjfLjKbPKwED1Fu6tWBWhB/ljvQL/gtk/WYYh2A0OslVlfyEN2Sl+5rSrftEab67kKAs07 HeXhXzsjVSl3O8Bw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 24/58] x86/apic/32: Remove pointless default_acpi_madt_oem_check() References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:25 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310008517608574 X-GMAIL-MSGID: 1772310008517608574 On 32bit there is no APIC implementing the acpi_madt_oem_check() except XEN PV, but that does not matter at all. generic_apic_probe() runs before ACPI tables are parsed. This selects the XEN APIC if there is no command line override because the XEN APIC driver is the first to be probed. If there is a command line override then the XEN PV driver won't be selected in the MADT OEM check either. As there is no other MADT check implemented for 32bit APICs, this whole excercise is a NOOP and can be removed. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 4 +++- arch/x86/kernel/apic/bigsmp_32.c | 1 - arch/x86/kernel/apic/probe_32.c | 22 ---------------------- 3 files changed, 3 insertions(+), 24 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -459,10 +459,12 @@ static inline unsigned int read_apic_id( #ifdef CONFIG_X86_64 typedef int (*wakeup_cpu_handler)(int apicid, unsigned long start_eip); extern void acpi_wake_cpu_handler_update(wakeup_cpu_handler handler); +extern int default_acpi_madt_oem_check(char *, char *); +#else +static inline int default_acpi_madt_oem_check(char *a, char *b) { return 0; } #endif extern int default_apic_id_valid(u32 apicid); -extern int default_acpi_madt_oem_check(char *, char *); extern void default_setup_apic_routing(void); extern u32 apic_default_calc_apicid(unsigned int cpu); --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -112,7 +112,6 @@ static struct apic apic_bigsmp __ro_afte .name = "bigsmp", .probe = probe_bigsmp, - .acpi_madt_oem_check = NULL, .apic_id_valid = default_apic_id_valid, .apic_id_registered = bigsmp_apic_id_registered, --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -60,7 +60,6 @@ static struct apic apic_default __ro_aft .name = "default", .probe = probe_default, - .acpi_madt_oem_check = NULL, .apic_id_valid = default_apic_id_valid, .apic_id_registered = default_apic_id_registered, @@ -176,24 +175,3 @@ void __init generic_apic_probe(void) } printk(KERN_INFO "Using APIC driver %s\n", apic->name); } - -/* This function can switch the APIC even after the initial ->probe() */ -int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id) -{ - struct apic **drv; - - for (drv = __apicdrivers; drv < __apicdrivers_end; drv++) { - if (!(*drv)->acpi_madt_oem_check) - continue; - if (!(*drv)->acpi_madt_oem_check(oem_id, oem_table_id)) - continue; - - if (!cmdline_apic) { - apic = *drv; - printk(KERN_INFO "Switched to APIC driver `%s'.\n", - apic->name); - } - return 1; - } - return 0; -} From patchwork Mon Jul 24 13:34:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 125016 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1833813vqg; Mon, 24 Jul 2023 07:22:11 -0700 (PDT) X-Google-Smtp-Source: APBJJlGJdLZEy3bPgsF5zMBH20AWxDXEijGoQrohy8IPfXcr/3XbGV6SKc/u4VNlOv8nUGkwWvqJ X-Received: by 2002:a17:90a:e398:b0:263:59a7:8799 with SMTP id b24-20020a17090ae39800b0026359a78799mr5737413pjz.22.1690208531526; Mon, 24 Jul 2023 07:22:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690208531; cv=none; d=google.com; s=arc-20160816; b=eXUXQzSaahBEhdSH5eDr7rCTbEwNi8JADpI4NXk/20pfWZ7OyCGvHQlxZqMVh/GlIH 3/0f0vmtYTm3N22lZSz8IVBP5fT3jLPDjhoBhxPGSqVMyUymEDjO8lReYfDooU7iwJB/ dKbkWUdAztYNV1tQUI8xu/Oy+uy+INQQoJh39YKumNgzip6auzYrsacQAqxWb67fqS9A TaQmC/WFU5jmJi+6rNNkMeNlPlenqrmSNLgor7UPDY6CdyTiSOrhrCKrTNdMaKn/qLse L5MVJpjn3jBxHUn23XwFpt1AUY2MifRU9RNhPj2Sj2iirouoILgyXKMvOm54Re2P0e7k IYVw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=3wzkXh8ox2g+n/hDGbOA8stcRNol0QfZYe+X2pCSlC0=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=U4FPDWzftebjyOPC+EvVuunjwtR+CipsBVU8BKficp4kOt5K+0D96TyxeAbudgEJbJ q22lgZuOEYpzqf2/XRXVMkPzyPjN2IvG+8Zj3PuQ3XcVoCWTxLNVXA59IAk/BbaDAOvU mGRwhDsBJwJCVODGoL24lTaTd8eybP8kIVUm9dsVFBVnuBTcCUDXg67srfFUwRbikplH U5d9EoIb0I6U/5LvAtZgeveu4NZMz0djh76o51jW7RVLSRDOj5fU2n2eEus9Vpnecb8q UB1z4jaJFJRU01f40XVutCUTH/6i0NNyU7EMbKzx/LJQLiXiBQKymcJCRSHeOXGMQ8i1 6gNw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=fgZoX31K; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=DvR9KuVc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id gm11-20020a17090b100b00b00263c7cadb62si5043276pjb.38.2023.07.24.07.21.57; Mon, 24 Jul 2023 07:22:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=fgZoX31K; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=DvR9KuVc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229836AbjGXNgi (ORCPT + 99 others); Mon, 24 Jul 2023 09:36:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37348 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231720AbjGXNfz (ORCPT ); Mon, 24 Jul 2023 09:35:55 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 74B9C26B0 for ; Mon, 24 Jul 2023 06:35:19 -0700 (PDT) Message-ID: <20230724132046.092912858@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205667; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=3wzkXh8ox2g+n/hDGbOA8stcRNol0QfZYe+X2pCSlC0=; b=fgZoX31KVrjxrO+vKtgfpFLDLy76Y2Fh++k6GAeItGc2MCpXQzNFp7UEfRCo8nL3l3URxU u79fzuy4hGtfDlRj8yyeqmGR00Twgp0EyHUNL2JfJeeyKaViZqDWDLDEIwrdCHOYXNeGuZ CH+48k8eeSI6QpkGBElV8ijbErvsQt2uM2mcLPYorsH2DIZwIhYsBGv2+u6mPxrGCvQnDZ INXV+NDc8uzgwP/PJ68V/UIqvvgCsE1UUDAuV3bDD7wQwJFJ7kRGYoWW0JtRrr8N/6PCiV RBMm1wvGMd2YxZDWgkPpXZBYlCNjZZ0jXDtexjnH7OeuWVuOIQWuFCKy8425Kg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205667; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=3wzkXh8ox2g+n/hDGbOA8stcRNol0QfZYe+X2pCSlC0=; b=DvR9KuVckkU/ThO9AxuF6m01QJ35DpXO02cjkDDZOnpscyq8r1MrcuzDkVPWzxOAvYvLl5 L3zrLhri3d4o4pCA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 25/58] x86/apic/32: Decrapify the def_bigsmp mechanism References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:27 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772312101590189893 X-GMAIL-MSGID: 1772312101590189893 If the system has more than 8 CPUs then XAPIC and the bigsmp APIC driver is required. This is ensured via: 1) Enumerating all possible CPUs up to NR_CPUS 2) Checking at boot CPU APIC setup time whether the system has more than 8 CPUs and has an XAPIC. If that's the case then it's attempted to install the bigsmp APIC driver and a magic variable 'def_to_bigsmp' is set to one. 3) If that magic variable is set and CONFIG_X86_BIGSMP=n and the system has more than 8 CPUs smp_sanity_check() removes all CPUs >= #8 from the present and possible mask in the most convoluted way. This logic is completely broken for the case where the bigsmp driver is enabled, but not selected due to a command line option specifying the default APIC. In that case the system boots with default APIC in logical destination mode and fails to reduce the number of CPUs. That aside the above which is sprinkled over 3 different places is yet another piece of art. It would have been too obvious to check the requirements upfront and limit nr_cpu_ids _before_ enumerating tons of CPUs and then removing them again. Implement exactly this. Check the bigsmp requirement when the boot APIC is registered which happens _before_ ACPI/MPTABLE parsing and limit the number of CPUs to 8 if it can't be used. Switch it over when the boot CPU apic is set up if necessary. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/mpspec.h | 2 -- arch/x86/kernel/apic/apic.c | 3 +++ arch/x86/kernel/apic/bigsmp_32.c | 22 ++++++++++------------ arch/x86/kernel/apic/local.h | 11 +++++++++++ arch/x86/kernel/apic/probe_32.c | 35 +++++++++++++++++------------------ arch/x86/kernel/setup.c | 1 - arch/x86/kernel/smpboot.c | 37 ------------------------------------- 7 files changed, 41 insertions(+), 70 deletions(-) --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h @@ -23,8 +23,6 @@ extern int pic_mode; #define MAX_IRQ_SOURCES 256 -extern unsigned int def_to_bigsmp; - #else /* CONFIG_X86_64: */ #define MAX_MP_BUSSES 256 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -63,6 +63,8 @@ #include #include +#include "local.h" + unsigned int num_processors; unsigned disabled_cpus; @@ -2420,6 +2422,7 @@ static __init void cpu_set_boot_apic(voi { cpuid_to_apicid[0] = boot_cpu_physical_apicid; cpu_update_apic(0, boot_cpu_physical_apicid); + x86_32_probe_bigsmp_early(); } int generic_processor_info(int apicid) --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -100,12 +100,7 @@ static const struct dmi_system_id bigsmp static int probe_bigsmp(void) { - if (def_to_bigsmp) - dmi_bigsmp = 1; - else - dmi_check_system(bigsmp_dmi_table); - - return dmi_bigsmp; + return dmi_check_system(bigsmp_dmi_table); } static struct apic apic_bigsmp __ro_after_init = { @@ -149,14 +144,17 @@ static struct apic apic_bigsmp __ro_afte .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, }; -void __init generic_bigsmp_probe(void) +bool __init apic_bigsmp_possible(bool cmdline_override) { - if (!probe_bigsmp()) - return; - - apic = &apic_bigsmp; + return apic == &apic_bigsmp || !cmdline_override; +} - pr_info("Overriding APIC driver with %s\n", apic_bigsmp.name); +void __init apic_bigsmp_force(void) +{ + if (apic != &apic_bigsmp) { + apic = &apic_bigsmp; + pr_info("Overriding APIC driver with bigsmp\n"); + } } apic_driver(apic_bigsmp); --- a/arch/x86/kernel/apic/local.h +++ b/arch/x86/kernel/apic/local.h @@ -66,4 +66,15 @@ void default_send_IPI_self(int vector); void default_send_IPI_mask_sequence_logical(const struct cpumask *mask, int vector); void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask, int vector); void default_send_IPI_mask_logical(const struct cpumask *mask, int vector); +void x86_32_probe_bigsmp_early(void); +#else +static inline void x86_32_probe_bigsmp_early(void) { } +#endif + +#ifdef CONFIG_X86_BIGSMP +bool apic_bigsmp_possible(bool cmdline_selected); +void apic_bigsmp_force(void); +#else +static inline bool apic_bigsmp_possible(bool cmdline_selected) { return false; }; +static inline void apic_bigsmp_force(void) { } #endif --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -10,6 +10,8 @@ #include #include +#include + #include #include #include @@ -123,36 +125,33 @@ static int __init parse_apic(char *arg) } early_param("apic", parse_apic); -void __init default_setup_apic_routing(void) +void __init x86_32_probe_bigsmp_early(void) { - int version = boot_cpu_apic_version; + if (nr_cpu_ids <= 8 || xen_pv_domain()) + return; - if (num_possible_cpus() > 8) { + if (IS_ENABLED(CONFIG_X86_BIGSMP)) { switch (boot_cpu_data.x86_vendor) { case X86_VENDOR_INTEL: - if (!APIC_XAPIC(version)) { - def_to_bigsmp = 0; + if (!APIC_XAPIC(boot_cpu_apic_version)) break; - } /* P4 and above */ fallthrough; case X86_VENDOR_HYGON: case X86_VENDOR_AMD: - def_to_bigsmp = 1; + if (apic_bigsmp_possible(cmdline_apic)) + return; + break; } } + pr_info("Limiting to 8 possible CPUs\n"); + set_nr_cpu_ids(8); +} -#ifdef CONFIG_X86_BIGSMP - /* - * This is used to switch to bigsmp mode when - * - There is no apic= option specified by the user - * - generic_apic_probe() has chosen apic_default as the sub_arch - * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support - */ - - if (!cmdline_apic && apic == &apic_default) - generic_bigsmp_probe(); -#endif +void __init default_setup_apic_routing(void) +{ + if (nr_cpu_ids >= 8 && !xen_pv_domain()) + apic_bigsmp_force(); if (apic->setup_apic_routing) apic->setup_apic_routing(); --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -114,7 +114,6 @@ static struct resource bss_resource = { #ifdef CONFIG_X86_32 /* CPU data as detected by the assembly code in head_32.S */ struct cpuinfo_x86 new_cpu_data; -unsigned int def_to_bigsmp; struct apm_info apm_info; EXPORT_SYMBOL(apm_info); --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -1149,41 +1149,6 @@ static __init void disable_smp(void) cpumask_set_cpu(0, topology_die_cpumask(0)); } -/* - * Various sanity checks. - */ -static void __init smp_sanity_check(void) -{ - preempt_disable(); - -#if !defined(CONFIG_X86_BIGSMP) && defined(CONFIG_X86_32) - if (def_to_bigsmp && nr_cpu_ids > 8) { - unsigned int cpu; - unsigned nr; - - pr_warn("More than 8 CPUs detected - skipping them\n" - "Use CONFIG_X86_BIGSMP\n"); - - nr = 0; - for_each_present_cpu(cpu) { - if (nr >= 8) - set_cpu_present(cpu, false); - nr++; - } - - nr = 0; - for_each_possible_cpu(cpu) { - if (nr >= 8) - set_cpu_possible(cpu, false); - nr++; - } - - set_nr_cpu_ids(8); - } -#endif - preempt_enable(); -} - static void __init smp_cpu_index_default(void) { int i; @@ -1243,8 +1208,6 @@ void __init native_smp_prepare_cpus(unsi { smp_prepare_cpus_common(); - smp_sanity_check(); - switch (apic_intr_mode) { case APIC_PIC: case APIC_VIRTUAL_WIRE_NO_CONFIG: From patchwork Mon Jul 24 13:34:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124986 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1812911vqg; Mon, 24 Jul 2023 06:50:43 -0700 (PDT) X-Google-Smtp-Source: APBJJlFHSx78AcbXKda0iDyIkIGUGIi1bMJ2K+i3L4ccW/406EPXZ8dfBfd5wjag4s8f5kuKI0Oz X-Received: by 2002:a17:906:9bc6:b0:982:26c5:6525 with SMTP id de6-20020a1709069bc600b0098226c56525mr9320686ejc.60.1690206643385; Mon, 24 Jul 2023 06:50:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206643; cv=none; d=google.com; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id w25-20020a1709064a1900b009933309250bsi6367469eju.64.2023.07.24.06.50.17; Mon, 24 Jul 2023 06:50:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=VmGFX0IE; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=JLNG2RMx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231657AbjGXNgk (ORCPT + 99 others); Mon, 24 Jul 2023 09:36:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231650AbjGXNf5 (ORCPT ); Mon, 24 Jul 2023 09:35:57 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 37CD12137 for ; Mon, 24 Jul 2023 06:35:22 -0700 (PDT) Message-ID: <20230724132046.151776137@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205669; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=XhABCxwHPGY7DF2UNzN4o5WpsX1JegdIqFCLm4OuXKU=; b=VmGFX0IETpaI+oMlGGJY0qeaNZGdonnmAPfFKwcvA3qmYDCTS+ALu/+/KRMhq6fMo+WS9q jCMBnPbJRiA+oUMNpXiLmAOR+HMPx+QDdiSmzRliAliGe2H1sO7Jfh/PNfAV4SUkCLqIwm MrGm3Tb202qfpETcj4lZDuUAIGUpeZXbo6WhOnaaq3Af92X/htMabWpVs0YzWVdZ48XNUj k9nvdneoMFge9u7TFPcCSJ6b5TyO8RfOR/jl/Sb3HMCrjbr7yEQb5ZMnzfVLOFXwfzAFfN 6OY4m+JrdV3KMqhSE4TaMbxowurGrXUPIK7HDGFuInFpiro76JUjyhC9W9SspA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205669; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=XhABCxwHPGY7DF2UNzN4o5WpsX1JegdIqFCLm4OuXKU=; b=JLNG2RMxRe+mb+bVZfwm+s9yCPeHqUjtHLAPxX0yNcYmbs1VO5qzGqByHvHBmvOz3+Vb+q 2KqpNUQqi+OLldAg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 26/58] x86/apic/32: Remove bigsmp_cpu_present_to_apicid() References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:28 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310121538738612 X-GMAIL-MSGID: 1772310121538738612 It's a copy of default_cpu_present_to_apicid() with the omission of the actual check whether the CPU is present. This APIC callback should die completely, but the XEN APIC implementation does something different which needs to be addressed first. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/kernel/apic/bigsmp_32.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -43,14 +43,6 @@ static void bigsmp_setup_apic_routing(vo nr_ioapics); } -static int bigsmp_cpu_present_to_apicid(int mps_cpu) -{ - if (mps_cpu < nr_cpu_ids) - return (int) per_cpu(x86_cpu_to_apicid, mps_cpu); - - return BAD_APICID; -} - static void bigsmp_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap) { /* For clustered we don't have a good way to do this yet - hack */ @@ -119,7 +111,7 @@ static struct apic apic_bigsmp __ro_afte .init_apic_ldr = bigsmp_init_apic_ldr, .ioapic_phys_id_map = bigsmp_ioapic_phys_id_map, .setup_apic_routing = bigsmp_setup_apic_routing, - .cpu_present_to_apicid = bigsmp_cpu_present_to_apicid, + .cpu_present_to_apicid = default_cpu_present_to_apicid, .apicid_to_cpu_present = physid_set_mask_of_physid, .phys_pkg_id = bigsmp_phys_pkg_id, From patchwork Mon Jul 24 13:34:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 125015 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1832968vqg; Mon, 24 Jul 2023 07:20:49 -0700 (PDT) X-Google-Smtp-Source: APBJJlE8vCS7idjdHTLSqvBGrNZiNEcXdICP5R7R4k9FtpLT/Llbec5AvN+foHynm3+d7FfLPnje X-Received: by 2002:a05:6a20:9483:b0:130:b19d:ec1f with SMTP id hs3-20020a056a20948300b00130b19dec1fmr7704119pzb.11.1690208449389; Mon, 24 Jul 2023 07:20:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690208449; cv=none; d=google.com; s=arc-20160816; b=P68tauvdh4hl4EzxI2KCskmejO+sDK2m/eZau5aqb2nGRDYfJnUkJDNvmwL9YJCSN+ 9Yzp2frXI0vNyl6FJC5B8OA14WieUXxC45YXv6obi/6hiEgJmnqCUuXIBkWMLQ/P4CtQ bh+UilD0XqaPKR5msSOAxCOBYr4hfsUO/BKdBPidOkyRvkcAXlCNfD+OuaErM69O2hAL bOY9lkO9mq3PrJSQVFpWJ6ktEXwFnCWbCNK5nINAEo5FBdOTkexAOR5Lu57Yjk/iSIPc L9/ZcwiECn60dw0WaqFjMbdwSBaEQhZesljXA3ctkBC7aqzOoWFmvtbnZXLZXU8lsKOl ft6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=O00kb3ANDLPAWttSm0Yl7DwanzSJODjrzlZY67TMPn8=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=qtJX/0oyFXR3Vacm0IXb43yDwyc406xYqTViQ3owTdSEfcd6BmTCuDz+PxugbX9raM 6f4X3qdaoujIUE9zsplZFeJyvCGfMs8D2XJjNqw9jtr0MpBX0c9BLGRkyX5dfihyJQYB YdlsdkKBjYWA01wS3Zw5b8s2LDRArjG2wN70TtT7pd8wu1bZuKJskqt1SeqFni70T7yU nEIfWTfzXUhXJ+hnCgEMd5Ep8yCHVVRXiG/T9DZhDRF6xRa00gSClhMmikjgEAPDhFht niBL6iiTossATnj021iJC2L30EulKN1zEk/gzyWn4HRtjqgnTgELOWnAGmipZnTf4x22 BunQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=gMy+tLU5; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id p21-20020a056a000b5500b0068664d7f3f2si7362793pfo.88.2023.07.24.07.20.35; Mon, 24 Jul 2023 07:20:49 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=gMy+tLU5; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230240AbjGXNgt (ORCPT + 99 others); Mon, 24 Jul 2023 09:36:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37144 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231731AbjGXNf6 (ORCPT ); Mon, 24 Jul 2023 09:35:58 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A6B310D9 for ; Mon, 24 Jul 2023 06:35:25 -0700 (PDT) Message-ID: <20230724132046.210620592@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205671; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=O00kb3ANDLPAWttSm0Yl7DwanzSJODjrzlZY67TMPn8=; b=gMy+tLU5q/5Yf7VBcFX6HHL4jyjZOT26/Lvxa9zTe0cAUXB/P3u3S27/hlJU+gG83Zs+BY SQnMVD781nwHrgkpJxWzCq48mGKVtPFRV1CDkRfOy7hSCWi16XEd240EYVt8tCrgFb/je1 4Rlz21Lz/tlP8vWZU0z1T2+q9EJxm8As1ITr10WHAHhle7Btqg7v8QlF0aoYxm5HVMgwSm Cs1lxjBO8opXs+/yRcZeNTUeUbeOrbagGhfNmSVTwMt63Bvb9J2kYPsnrdLgkM4RPA5yw9 qSGFKT12fF6+9viODQ6psyvdDM6REcIqB459eLbYOgeSqvNbPFBSQ2up/iGoqg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205671; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=O00kb3ANDLPAWttSm0Yl7DwanzSJODjrzlZY67TMPn8=; b=xS/K3T/ixn28Xm/WzZ6JVUul6cgkEyuUvK03qTIuiwaPE/euoS8I6p1kQqQ6OCaQPTEnTT E8Ge7dYYCCcaDPDQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 27/58] x86/apic: Nuke empty init_apic_ldr() callbacks References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:30 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772312014823202068 X-GMAIL-MSGID: 1772312014823202068 apic::init_apic_ldr() is only invoked when the APIC is initialized. So there is really no point in having: - Default empty callbacks all over the place - Two implementations of the actual LDR init function where one is just unreadable gunk but does exactly the same as the other. Make the apic::init_apic_ldr() invocation conditional, remove the empty callbacks and consolidate the two implementation into one. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 2 -- arch/x86/kernel/apic/apic.c | 7 +++++-- arch/x86/kernel/apic/apic_common.c | 16 ++++++++++++++++ arch/x86/kernel/apic/apic_flat_64.c | 32 +------------------------------- arch/x86/kernel/apic/apic_noop.c | 2 -- arch/x86/kernel/apic/apic_numachip.c | 2 -- arch/x86/kernel/apic/bigsmp_32.c | 9 --------- arch/x86/kernel/apic/local.h | 5 ++--- arch/x86/kernel/apic/probe_32.c | 15 --------------- arch/x86/kernel/apic/x2apic_phys.c | 5 ----- arch/x86/kernel/apic/x2apic_uv_x.c | 5 ----- arch/x86/xen/apic.c | 1 - 12 files changed, 24 insertions(+), 77 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -445,8 +445,6 @@ extern void generic_bigsmp_probe(void); #include -#define APIC_DFR_VALUE (APIC_DFR_FLAT) - extern struct apic apic_noop; static inline unsigned int read_apic_id(void) --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1578,9 +1578,12 @@ static void setup_local_APIC(void) /* * Intel recommends to set DFR, LDR and TPR before enabling * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel - * document number 292116). So here it goes... + * document number 292116). + * + * Except for APICs which operate in physical destination mode. */ - apic->init_apic_ldr(); + if (apic->init_apic_ldr) + apic->init_apic_ldr(); /* * Set Task Priority to 'accept all except vectors 0-31'. An APIC --- a/arch/x86/kernel/apic/apic_common.c +++ b/arch/x86/kernel/apic/apic_common.c @@ -6,6 +6,8 @@ #include #include +#include "local.h" + u32 apic_default_calc_apicid(unsigned int cpu) { return per_cpu(x86_cpu_to_apicid, cpu); @@ -39,3 +41,17 @@ int default_apic_id_valid(u32 apicid) { return (apicid < 255); } + +/* + * Set up the logical destination ID when the APIC operates in logical + * destination mode. + */ +void default_init_apic_ldr(void) +{ + unsigned long val; + + apic_write(APIC_DFR, APIC_DFR_FLAT); + val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; + val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id()); + apic_write(APIC_LDR, val); +} --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -28,26 +28,6 @@ static int flat_acpi_madt_oem_check(char return 1; } -/* - * Set up the logical destination ID. - * - * Intel recommends to set DFR, LDR and TPR before enabling - * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel - * document number 292116). So here it goes... - */ -void flat_init_apic_ldr(void) -{ - unsigned long val; - unsigned long num, id; - - num = smp_processor_id(); - id = 1UL << num; - apic_write(APIC_DFR, APIC_DFR_FLAT); - val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; - val |= SET_APIC_LOGICAL_ID(id); - apic_write(APIC_LDR, val); -} - static void _flat_send_IPI_mask(unsigned long mask, int vector) { unsigned long flags; @@ -119,7 +99,7 @@ static struct apic apic_flat __ro_after_ .disable_esr = 0, .check_apicid_used = NULL, - .init_apic_ldr = flat_init_apic_ldr, + .init_apic_ldr = default_init_apic_ldr, .ioapic_phys_id_map = NULL, .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, @@ -175,15 +155,6 @@ static int physflat_acpi_madt_oem_check( return 0; } -static void physflat_init_apic_ldr(void) -{ - /* - * LDR and DFR are not involved in physflat mode, rather: - * "In physical destination mode, the destination processor is - * specified by its local APIC ID [...]." (Intel SDM, 10.6.2.1) - */ -} - static int physflat_probe(void) { if (apic == &apic_physflat || num_possible_cpus() > 8 || @@ -207,7 +178,6 @@ static struct apic apic_physflat __ro_af .disable_esr = 0, .check_apicid_used = NULL, - .init_apic_ldr = physflat_init_apic_ldr, .ioapic_phys_id_map = NULL, .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -14,7 +14,6 @@ #include -static void noop_init_apic_ldr(void) { } static void noop_send_IPI(int cpu, int vector) { } static void noop_send_IPI_mask(const struct cpumask *cpumask, int vector) { } static void noop_send_IPI_mask_allbutself(const struct cpumask *cpumask, int vector) { } @@ -94,7 +93,6 @@ struct apic apic_noop __ro_after_init = .disable_esr = 0, .check_apicid_used = default_check_apicid_used, - .init_apic_ldr = noop_init_apic_ldr, .ioapic_phys_id_map = default_ioapic_phys_id_map, .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, --- a/arch/x86/kernel/apic/apic_numachip.c +++ b/arch/x86/kernel/apic/apic_numachip.c @@ -252,7 +252,6 @@ static const struct apic apic_numachip1 .disable_esr = 0, .check_apicid_used = NULL, - .init_apic_ldr = flat_init_apic_ldr, .ioapic_phys_id_map = NULL, .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, @@ -297,7 +296,6 @@ static const struct apic apic_numachip2 .disable_esr = 0, .check_apicid_used = NULL, - .init_apic_ldr = flat_init_apic_ldr, .ioapic_phys_id_map = NULL, .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -28,14 +28,6 @@ static bool bigsmp_check_apicid_used(phy return false; } -/* - * bigsmp enables physical destination mode - * and doesn't use LDR and DFR - */ -static void bigsmp_init_apic_ldr(void) -{ -} - static void bigsmp_setup_apic_routing(void) { printk(KERN_INFO @@ -108,7 +100,6 @@ static struct apic apic_bigsmp __ro_afte .disable_esr = 1, .check_apicid_used = bigsmp_check_apicid_used, - .init_apic_ldr = bigsmp_init_apic_ldr, .ioapic_phys_id_map = bigsmp_ioapic_phys_id_map, .setup_apic_routing = bigsmp_setup_apic_routing, .cpu_present_to_apicid = default_cpu_present_to_apicid, --- a/arch/x86/kernel/apic/local.h +++ b/arch/x86/kernel/apic/local.h @@ -13,9 +13,6 @@ #include #include -/* APIC flat 64 */ -void flat_init_apic_ldr(void); - /* X2APIC */ int x2apic_apic_id_valid(u32 apicid); int x2apic_apic_id_registered(void); @@ -46,6 +43,8 @@ static inline unsigned int __prepare_ICR return icr; } +void default_init_apic_ldr(void); + void __default_send_IPI_shortcut(unsigned int shortcut, int vector); /* --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -32,21 +32,6 @@ static int default_apic_id_registered(vo return physid_isset(read_apic_id(), phys_cpu_present_map); } -/* - * Set up the logical destination ID. Intel recommends to set DFR, LDR and - * TPR before enabling an APIC. See e.g. "AP-388 82489DX User's Manual" - * (Intel document number 292116). - */ -static void default_init_apic_ldr(void) -{ - unsigned long val; - - apic_write(APIC_DFR, APIC_DFR_VALUE); - val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; - val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id()); - apic_write(APIC_LDR, val); -} - static int default_phys_pkg_id(int cpuid_apic, int index_msb) { return cpuid_apic >> index_msb; --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -91,10 +91,6 @@ static void x2apic_send_IPI_all(int vect __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLINC); } -static void init_x2apic_ldr(void) -{ -} - static int x2apic_phys_probe(void) { if (!x2apic_mode) @@ -169,7 +165,6 @@ static struct apic apic_x2apic_phys __ro .disable_esr = 0, .check_apicid_used = NULL, - .init_apic_ldr = init_x2apic_ldr, .ioapic_phys_id_map = NULL, .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -788,10 +788,6 @@ static int uv_apic_id_registered(void) return 1; } -static void uv_init_apic_ldr(void) -{ -} - static u32 apic_uv_calc_apicid(unsigned int cpu) { return apic_default_calc_apicid(cpu); @@ -841,7 +837,6 @@ static struct apic apic_x2apic_uv_x __ro .disable_esr = 0, .check_apicid_used = NULL, - .init_apic_ldr = uv_init_apic_ldr, .ioapic_phys_id_map = NULL, .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, --- a/arch/x86/xen/apic.c +++ b/arch/x86/xen/apic.c @@ -149,7 +149,6 @@ static struct apic xen_pv_apic = { .disable_esr = 0, .check_apicid_used = default_check_apicid_used, /* Used on 32-bit */ - .init_apic_ldr = xen_noop, /* setup_local_APIC calls it */ .ioapic_phys_id_map = default_ioapic_phys_id_map, /* Used on 32-bit */ .setup_apic_routing = NULL, .cpu_present_to_apicid = xen_cpu_present_to_apicid, From patchwork Mon Jul 24 13:34:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 125034 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1838243vqg; Mon, 24 Jul 2023 07:29:46 -0700 (PDT) X-Google-Smtp-Source: APBJJlE/xJvf2mpFPpKi8KXPyCemn8Q5K/Gp8nolTa2+tVDdx25AN6XDTPpu+H4pyzgwJQXC1Fxt X-Received: by 2002:a17:906:77cf:b0:992:ef60:ab0d with SMTP id m15-20020a17090677cf00b00992ef60ab0dmr10323078ejn.69.1690208986058; Mon, 24 Jul 2023 07:29:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690208986; cv=none; d=google.com; s=arc-20160816; b=sr7rd6J5tHFUgNVSDFqf/AVqKXP+RK2sMQVAg5613zPfXshkopDwqckz60pL/3yAv3 Lt4qChsBUz8tdHF1NGWlsT27FdkRSRJQ5ebdxYXX1BGPAwx5DocOaPMiEjP7aFvlwqOC IdiqVRwNwyWQBDd+opfw6PNiVhHDSSNCKeO2Ews4imXHriXsUJdTrWPV0Xh7pMz4xKJr 1W4yCYbK3bRVDq7706Ga4KwcAeAttsH3GhRPq+ZVCwHd/uo3+FAlB4XRDkYj4JPbY+/+ ksdQBCqb2yYHYxsuIw12YjZnuvu9no3MqZ+7Zyez8PDTnoABSJqB/Ezv12H4zb5GZz0O DjlA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=1MEDk0oUWD+OycA9uR7KeKJmXv9b1vvtIY5WeHz0Kk0=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=Sjtj2I6vJAg4P0iHo0XxuHasCs4sPQizjsTvuW2qKfaNU7EDllQd6dzGpEkeFD+gnS 0VOewOmU3QsOk5hqPLitEhzYk9TY84v3sK75FMzdUfO+KP7wBNmCL+Z0tIdjdtqbZezp SOhJCu8sXGpUGqSjTxUqviYZDQVuXgxCeISt29Bzc9o8I7SpAHIzMxBm0uMW+84xI1iK +N6F+ioNV04Y0si0u13FhMTJmlW6d9js4idpr4pExBh+Sn6fPvEblKZjH8aBUr6L8rLY /XsZlRgploSLmholzuGJAhgHGl+rwmC7kkWzr4sjP6Dhr3mZ03yuR0mBEgqRssEMh3xa PqNA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=PsT1fjCb; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Remove the callback and use physid_set_mask_of_physid() in the code directly, Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 1 - arch/x86/kernel/apic/apic_flat_64.c | 2 -- arch/x86/kernel/apic/apic_noop.c | 1 - arch/x86/kernel/apic/apic_numachip.c | 2 -- arch/x86/kernel/apic/bigsmp_32.c | 1 - arch/x86/kernel/apic/io_apic.c | 11 +++++------ arch/x86/kernel/apic/probe_32.c | 1 - arch/x86/kernel/apic/x2apic_cluster.c | 1 - arch/x86/kernel/apic/x2apic_phys.c | 1 - arch/x86/kernel/apic/x2apic_uv_x.c | 1 - arch/x86/xen/apic.c | 1 - 11 files changed, 5 insertions(+), 18 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -304,7 +304,6 @@ struct apic { void (*ioapic_phys_id_map)(physid_mask_t *phys_map, physid_mask_t *retmap); void (*setup_apic_routing)(void); int (*cpu_present_to_apicid)(int mps_cpu); - void (*apicid_to_cpu_present)(int phys_apicid, physid_mask_t *retmap); int (*phys_pkg_id)(int cpuid_apic, int index_msb); u32 (*get_apic_id)(unsigned long x); --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -103,7 +103,6 @@ static struct apic apic_flat __ro_after_ .ioapic_phys_id_map = NULL, .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, - .apicid_to_cpu_present = NULL, .phys_pkg_id = flat_phys_pkg_id, .get_apic_id = flat_get_apic_id, @@ -181,7 +180,6 @@ static struct apic apic_physflat __ro_af .ioapic_phys_id_map = NULL, .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, - .apicid_to_cpu_present = NULL, .phys_pkg_id = flat_phys_pkg_id, .get_apic_id = flat_get_apic_id, --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -96,7 +96,6 @@ struct apic apic_noop __ro_after_init = .ioapic_phys_id_map = default_ioapic_phys_id_map, .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, - .apicid_to_cpu_present = physid_set_mask_of_physid, .phys_pkg_id = noop_phys_pkg_id, --- a/arch/x86/kernel/apic/apic_numachip.c +++ b/arch/x86/kernel/apic/apic_numachip.c @@ -255,7 +255,6 @@ static const struct apic apic_numachip1 .ioapic_phys_id_map = NULL, .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, - .apicid_to_cpu_present = NULL, .phys_pkg_id = numachip_phys_pkg_id, .get_apic_id = numachip1_get_apic_id, @@ -299,7 +298,6 @@ static const struct apic apic_numachip2 .ioapic_phys_id_map = NULL, .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, - .apicid_to_cpu_present = NULL, .phys_pkg_id = numachip_phys_pkg_id, .get_apic_id = numachip2_get_apic_id, --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -103,7 +103,6 @@ static struct apic apic_bigsmp __ro_afte .ioapic_phys_id_map = bigsmp_ioapic_phys_id_map, .setup_apic_routing = bigsmp_setup_apic_routing, .cpu_present_to_apicid = default_cpu_present_to_apicid, - .apicid_to_cpu_present = physid_set_mask_of_physid, .phys_pkg_id = bigsmp_phys_pkg_id, .get_apic_id = bigsmp_get_apic_id, --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -1512,11 +1512,10 @@ void __init setup_ioapic_ids_from_mpc_no ioapics[ioapic_idx].mp_config.apicid = i; } else { physid_mask_t tmp; - apic->apicid_to_cpu_present(mpc_ioapic_id(ioapic_idx), - &tmp); - apic_printk(APIC_VERBOSE, "Setting %d in the " - "phys_id_present_map\n", - mpc_ioapic_id(ioapic_idx)); + + physid_set_mask_of_physid(mpc_ioapic_id(ioapic_idx), &tmp); + apic_printk(APIC_VERBOSE, "Setting %d in the phys_id_present_map\n", + mpc_ioapic_id(ioapic_idx)); physids_or(phys_id_present_map, phys_id_present_map, tmp); } @@ -2546,7 +2545,7 @@ static int io_apic_get_unique_id(int ioa apic_id = i; } - apic->apicid_to_cpu_present(apic_id, &tmp); + physid_set_mask_of_physid(apic_id, &tmp); physids_or(apic_id_map, apic_id_map, tmp); if (reg_00.bits.ID != apic_id) { --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -60,7 +60,6 @@ static struct apic apic_default __ro_aft .ioapic_phys_id_map = default_ioapic_phys_id_map, .setup_apic_routing = setup_apic_flat_routing, .cpu_present_to_apicid = default_cpu_present_to_apicid, - .apicid_to_cpu_present = physid_set_mask_of_physid, .phys_pkg_id = default_phys_pkg_id, .get_apic_id = default_get_apic_id, --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c @@ -249,7 +249,6 @@ static struct apic apic_x2apic_cluster _ .ioapic_phys_id_map = NULL, .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, - .apicid_to_cpu_present = NULL, .phys_pkg_id = x2apic_phys_pkg_id, .get_apic_id = x2apic_get_apic_id, --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -168,7 +168,6 @@ static struct apic apic_x2apic_phys __ro .ioapic_phys_id_map = NULL, .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, - .apicid_to_cpu_present = NULL, .phys_pkg_id = x2apic_phys_pkg_id, .get_apic_id = x2apic_get_apic_id, --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -840,7 +840,6 @@ static struct apic apic_x2apic_uv_x __ro .ioapic_phys_id_map = NULL, .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, - .apicid_to_cpu_present = NULL, .phys_pkg_id = uv_phys_pkg_id, .get_apic_id = x2apic_get_apic_id, --- a/arch/x86/xen/apic.c +++ b/arch/x86/xen/apic.c @@ -152,7 +152,6 @@ static struct apic xen_pv_apic = { .ioapic_phys_id_map = default_ioapic_phys_id_map, /* Used on 32-bit */ .setup_apic_routing = NULL, .cpu_present_to_apicid = xen_cpu_present_to_apicid, - .apicid_to_cpu_present = physid_set_mask_of_physid, /* Used on 32-bit */ .phys_pkg_id = xen_phys_pkg_id, /* detect_ht */ .get_apic_id = xen_get_apic_id, From patchwork Mon Jul 24 13:34:34 2023 Content-Type: text/plain; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id lv27-20020a170906bc9b00b00993ee77a3c4si5926244ejb.681.2023.07.24.06.50.30; Mon, 24 Jul 2023 06:50:55 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=zPdsB3Qf; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=bXbMHxnr; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231696AbjGXNfz (ORCPT + 99 others); Mon, 24 Jul 2023 09:35:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37564 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231468AbjGXNf2 (ORCPT ); Mon, 24 Jul 2023 09:35:28 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E7E91BC5 for ; Mon, 24 Jul 2023 06:34:55 -0700 (PDT) Message-ID: <20230724132046.329111530@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205675; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=1KrXZ6WN0UqKcYJn0Q3OLCj/xDPlvNt/2RBQorpLgnc=; b=zPdsB3Qf0w8rV5u7JJnEIrIICeCzWTESZsbT+83xaO4G7lSL6vRPsUxFUTxGRaSn99v1B3 hdl4ic6m1fHScfmE1QZy+GtIL+FU5Afy7wGZpS832vieQtAbLjn6JcxiNvfFFDGjecia3G ZMkQ+qbslirBrb5NlWts1dfA3jURrpmMaFIfs2AySraOPjrJ2e6K/higTJDfYj0IMyOYEY xtn/6s7nb7/QEG6GxJC0kC7bdD0f/IGFHZc+4rSm/UXTCYdt9BF84cLblVCaMIc8x+2Sop ZkYBK1VPcRBq8M9lGd8RrCqVvcsewXmLPPZbJGHxy2EEu6LTW4x8Tuy+be5d5w== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205675; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=1KrXZ6WN0UqKcYJn0Q3OLCj/xDPlvNt/2RBQorpLgnc=; b=bXbMHxnrFfo/lqPPNrPTXtirsfmHyRdr4Kx5gjWQ8CrH9UqX1+MNBomFj4GHEJEKRk+eWe NvxyiUz6wdHclhBA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 29/58] x86/ioapic/32: Decrapify phys_id_present_map operation References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:34 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310134489339231 X-GMAIL-MSGID: 1772310134489339231 The operation to set the IOAPIC ID in phys_id_present_map is as convoluted as it can be. 1) Allocate a bitmap of 32byte size on the stack 2) Zero the bitmap and set the IOAPIC ID bit 3) Or the temporary bitmap over phys_id_present_map The same functionality can be achieved by setting the IOAPIC ID bit directly in the phys_id_present_map. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/kernel/apic/io_apic.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -1511,12 +1511,9 @@ void __init setup_ioapic_ids_from_mpc_no physid_set(i, phys_id_present_map); ioapics[ioapic_idx].mp_config.apicid = i; } else { - physid_mask_t tmp; - - physid_set_mask_of_physid(mpc_ioapic_id(ioapic_idx), &tmp); apic_printk(APIC_VERBOSE, "Setting %d in the phys_id_present_map\n", mpc_ioapic_id(ioapic_idx)); - physids_or(phys_id_present_map, phys_id_present_map, tmp); + physid_set(mpc_ioapic_id(ioapic_idx), phys_id_present_map); } /* From patchwork Mon Jul 24 13:34:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 125036 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1838549vqg; Mon, 24 Jul 2023 07:30:12 -0700 (PDT) X-Google-Smtp-Source: APBJJlF9LuCTgwyYofFTaqS1MVp0hblVviKVfFrYDql2n3MK1X0mn4t/smZ5qZIbj00vliyoPWpO X-Received: by 2002:a17:907:1dc2:b0:982:870f:9e8f with SMTP id og2-20020a1709071dc200b00982870f9e8fmr9210047ejc.62.1690209012644; Mon, 24 Jul 2023 07:30:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690209012; cv=none; d=google.com; s=arc-20160816; b=Hns5m7OlV5MXKdeRi0mjZPvEVNPHhJvzPqiyvROpD5h/rBHQtb8gKaVtoSPBhT6ok+ V5S2cKbP9A/9BrBSEJuHLomT00WgmEm+rgFHiq7xa+sD0UAMttTpmtVARsM8sGHY2s0l W4KPSufg0LpuVeKykutL1VzAMKtDeUBs2Xcn9MQPcBvQfv2kWBL5phciCL+p/fxPR5/v 0Io/etu9L5Lyj0atCBqVbnGjbRi55Ys1Iou4cdloTAlAWlqA+v5YJUdGdCogexsqs0YV nhuanLckLYJJm3QkOnfPDHR1+fUPtCscGFgKRuKNBpnk5pNigXlnTFRZSGBTw8My+v7W Mo4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=VD8E0eWfITI3SqlQ5XFWHaHK77hHBGW1xMWiR2dsiXE=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=a2wME3PszpAgl+FDLOzE0Optg2YcB3fnDwZ7FzSXSxMgd9CcUY3zd2lmiZBWLpn5bo UqflAHwFtpwn//LFfzVIf38jSyeA6xlgHKENC4NQQRElvrasDRRy/3yJg+xptI1BnHiB FLLZldLgYRfiVG2anzlVppZfxG2f+6BYl54aZS2mvSl3sz5jvvcaBNbur+TEOi69qARl YR11Kkfo+6qytFZQchc73dXoQ48KPb+ZWItGhrOxKNcbHDe3zGKb0qEIW7qZ9hieaOVc yDKoLGHjQeUqml0kq/WD73p3T1p7uV8TsDsrVmGIleDEAT2vJPLnbujrqrhtr1TwhlF/ Q98g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=M2dLAaFX; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id k8-20020a170906970800b00992abdccff6si6520345ejx.576.2023.07.24.07.29.48; Mon, 24 Jul 2023 07:30:12 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=M2dLAaFX; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231654AbjGXNf6 (ORCPT + 99 others); Mon, 24 Jul 2023 09:35:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36792 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231694AbjGXNf3 (ORCPT ); Mon, 24 Jul 2023 09:35:29 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8938DE70 for ; Mon, 24 Jul 2023 06:34:58 -0700 (PDT) Message-ID: <20230724132046.389025869@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205676; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=VD8E0eWfITI3SqlQ5XFWHaHK77hHBGW1xMWiR2dsiXE=; b=M2dLAaFXgp43yWBh16JkrUS29uxgkJYLWVGWpJsccbZV5E0PwwMqtLlJlIYG0uKHx0wVKv scmGC9A+eZqjNaG4J3f7pUIr5zfLUe+FHGl2ZGlqc/7/IPX8mxruPWmcqGu/1YuDQ1F4Yp P9Pq8O3006dKIMbmDEkmsEzmfq2v6maR7qBWUG3jxK7rt1h8n/4gjTAxDNTBr7VSEzjYyU Ovd4AuSQxpSUVETbQia97fDtW6j5ojq9nK8KoLCu1ux0hs/djb83bIuG2gSeE0/LIFwkJg D3bkT77bQ/I8MaYciFogvun1Sc1ieSmqJDm5ypOAtIN3SSdPbnPw4GgESnxiyQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205676; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=VD8E0eWfITI3SqlQ5XFWHaHK77hHBGW1xMWiR2dsiXE=; b=CVkXArHxb05JiM2QxCbKQdGHwwDdmrr9SqbSKTTleIkOkVQloKwy4GJw4yKQoxAz5j8D5k zoQr72/ZryQW8aDw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 30/58] x86/apic: Mop up *setup_apic_routing() References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:36 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772312605227750395 X-GMAIL-MSGID: 1772312605227750395 default_setup_apic_routing() is a complete misnomer. On 64bit it does the actual APIC probing and on 32bit it is used to force select the bigsmp APIC and to emit a redundant message in the apic::setup_apic_routing() callback. Rename the 64bit and 32bit function so they reflect what they are doing and remove the useless APIC callback. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 10 ++++------ arch/x86/kernel/apic/apic.c | 4 +++- arch/x86/kernel/apic/apic_flat_64.c | 2 -- arch/x86/kernel/apic/apic_noop.c | 1 - arch/x86/kernel/apic/apic_numachip.c | 2 -- arch/x86/kernel/apic/bigsmp_32.c | 8 -------- arch/x86/kernel/apic/local.h | 2 ++ arch/x86/kernel/apic/probe_32.c | 17 ++--------------- arch/x86/kernel/apic/probe_64.c | 2 +- arch/x86/kernel/apic/x2apic_cluster.c | 1 - arch/x86/kernel/apic/x2apic_phys.c | 1 - arch/x86/kernel/apic/x2apic_uv_x.c | 1 - arch/x86/kernel/setup.c | 2 +- arch/x86/xen/apic.c | 1 - 14 files changed, 13 insertions(+), 41 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -40,11 +40,9 @@ #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) -extern void generic_apic_probe(void); +extern void x86_32_probe_apic(void); #else -static inline void generic_apic_probe(void) -{ -} +static inline void x86_32_probe_apic(void) { } #endif #ifdef CONFIG_X86_LOCAL_APIC @@ -302,7 +300,6 @@ struct apic { bool (*check_apicid_used)(physid_mask_t *map, int apicid); void (*init_apic_ldr)(void); void (*ioapic_phys_id_map)(physid_mask_t *phys_map, physid_mask_t *retmap); - void (*setup_apic_routing)(void); int (*cpu_present_to_apicid)(int mps_cpu); int (*phys_pkg_id)(int cpuid_apic, int index_msb); @@ -457,12 +454,13 @@ static inline unsigned int read_apic_id( typedef int (*wakeup_cpu_handler)(int apicid, unsigned long start_eip); extern void acpi_wake_cpu_handler_update(wakeup_cpu_handler handler); extern int default_acpi_madt_oem_check(char *, char *); +extern void x86_64_probe_apic(void); #else static inline int default_acpi_madt_oem_check(char *a, char *b) { return 0; } +static inline void x86_64_probe_apic(void) { } #endif extern int default_apic_id_valid(u32 apicid); -extern void default_setup_apic_routing(void); extern u32 apic_default_calc_apicid(unsigned int cpu); extern u32 apic_flat_calc_apicid(unsigned int cpu); --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1419,7 +1419,9 @@ void __init apic_intr_mode_init(void) break; } - default_setup_apic_routing(); + x86_64_probe_apic(); + + x86_32_install_bigsmp(); if (x86_platform.apic_post_init) x86_platform.apic_post_init(); --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -101,7 +101,6 @@ static struct apic apic_flat __ro_after_ .check_apicid_used = NULL, .init_apic_ldr = default_init_apic_ldr, .ioapic_phys_id_map = NULL, - .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = flat_phys_pkg_id, @@ -178,7 +177,6 @@ static struct apic apic_physflat __ro_af .check_apicid_used = NULL, .ioapic_phys_id_map = NULL, - .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = flat_phys_pkg_id, --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -94,7 +94,6 @@ struct apic apic_noop __ro_after_init = .check_apicid_used = default_check_apicid_used, .ioapic_phys_id_map = default_ioapic_phys_id_map, - .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = noop_phys_pkg_id, --- a/arch/x86/kernel/apic/apic_numachip.c +++ b/arch/x86/kernel/apic/apic_numachip.c @@ -253,7 +253,6 @@ static const struct apic apic_numachip1 .check_apicid_used = NULL, .ioapic_phys_id_map = NULL, - .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = numachip_phys_pkg_id, @@ -296,7 +295,6 @@ static const struct apic apic_numachip2 .check_apicid_used = NULL, .ioapic_phys_id_map = NULL, - .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = numachip_phys_pkg_id, --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -28,13 +28,6 @@ static bool bigsmp_check_apicid_used(phy return false; } -static void bigsmp_setup_apic_routing(void) -{ - printk(KERN_INFO - "Enabling APIC mode: Physflat. Using %d I/O APICs\n", - nr_ioapics); -} - static void bigsmp_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap) { /* For clustered we don't have a good way to do this yet - hack */ @@ -101,7 +94,6 @@ static struct apic apic_bigsmp __ro_afte .check_apicid_used = bigsmp_check_apicid_used, .ioapic_phys_id_map = bigsmp_ioapic_phys_id_map, - .setup_apic_routing = bigsmp_setup_apic_routing, .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = bigsmp_phys_pkg_id, --- a/arch/x86/kernel/apic/local.h +++ b/arch/x86/kernel/apic/local.h @@ -66,8 +66,10 @@ void default_send_IPI_mask_sequence_logi void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask, int vector); void default_send_IPI_mask_logical(const struct cpumask *mask, int vector); void x86_32_probe_bigsmp_early(void); +void x86_32_install_bigsmp(void); #else static inline void x86_32_probe_bigsmp_early(void) { } +static inline void x86_32_install_bigsmp(void) { } #endif #ifdef CONFIG_X86_BIGSMP --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -18,15 +18,6 @@ #include "local.h" -static void setup_apic_flat_routing(void) -{ -#ifdef CONFIG_X86_IO_APIC - printk(KERN_INFO - "Enabling APIC mode: Flat. Using %d I/O APICs\n", - nr_ioapics); -#endif -} - static int default_apic_id_registered(void) { return physid_isset(read_apic_id(), phys_cpu_present_map); @@ -58,7 +49,6 @@ static struct apic apic_default __ro_aft .check_apicid_used = default_check_apicid_used, .init_apic_ldr = default_init_apic_ldr, .ioapic_phys_id_map = default_ioapic_phys_id_map, - .setup_apic_routing = setup_apic_flat_routing, .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = default_phys_pkg_id, @@ -132,16 +122,13 @@ void __init x86_32_probe_bigsmp_early(vo set_nr_cpu_ids(8); } -void __init default_setup_apic_routing(void) +void __init x86_32_install_bigsmp(void) { if (nr_cpu_ids >= 8 && !xen_pv_domain()) apic_bigsmp_force(); - - if (apic->setup_apic_routing) - apic->setup_apic_routing(); } -void __init generic_apic_probe(void) +void __init x86_32_probe_apic(void) { if (!cmdline_apic) { struct apic **drv; --- a/arch/x86/kernel/apic/probe_64.c +++ b/arch/x86/kernel/apic/probe_64.c @@ -14,7 +14,7 @@ #include "local.h" /* Select the appropriate APIC driver */ -void __init default_setup_apic_routing(void) +void __init x86_64_probe_apic(void) { struct apic **drv; --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c @@ -247,7 +247,6 @@ static struct apic apic_x2apic_cluster _ .check_apicid_used = NULL, .init_apic_ldr = init_x2apic_ldr, .ioapic_phys_id_map = NULL, - .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = x2apic_phys_pkg_id, --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -166,7 +166,6 @@ static struct apic apic_x2apic_phys __ro .check_apicid_used = NULL, .ioapic_phys_id_map = NULL, - .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = x2apic_phys_pkg_id, --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -838,7 +838,6 @@ static struct apic apic_x2apic_uv_x __ro .check_apicid_used = NULL, .ioapic_phys_id_map = NULL, - .setup_apic_routing = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = uv_phys_pkg_id, --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -1253,7 +1253,7 @@ void __init setup_arch(char **cmdline_p) map_vsyscall(); - generic_apic_probe(); + x86_32_probe_apic(); early_quirks(); --- a/arch/x86/xen/apic.c +++ b/arch/x86/xen/apic.c @@ -150,7 +150,6 @@ static struct apic xen_pv_apic = { .check_apicid_used = default_check_apicid_used, /* Used on 32-bit */ .ioapic_phys_id_map = default_ioapic_phys_id_map, /* Used on 32-bit */ - .setup_apic_routing = NULL, .cpu_present_to_apicid = xen_cpu_present_to_apicid, .phys_pkg_id = xen_phys_pkg_id, /* detect_ht */ From patchwork Mon Jul 24 13:34:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 125063 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1871583vqg; Mon, 24 Jul 2023 08:22:53 -0700 (PDT) X-Google-Smtp-Source: APBJJlF4nmo6I6CKC+n02R7ntdyKdACNUjHDGdbbaZX0AQtZWlJi7q1U5D87SJUVm/E8Q3YY/VG1 X-Received: by 2002:a17:90a:6c22:b0:267:f2f6:586b with SMTP id x31-20020a17090a6c2200b00267f2f6586bmr4196370pjj.21.1690212172868; Mon, 24 Jul 2023 08:22:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690212172; cv=none; d=google.com; s=arc-20160816; b=BEk3+0HikVQPQIiTn6Byi8ji0346LtMLuGStIU8Rf8hSXX4LoukkwHB9VIVderD2tL kJBfu26EcpPYY4ZAHG/ne20YifUaA4ERctqRZJxjdIX1+i/D4iURLMdT7iE9u7DhcTPe C7T0lAL9me1fuQHDBrK/OJB6ZRZefdhgLBUiKVoQmvBr3P1uMfyxO/XazglBrIrLBiua +T/mHVq2GDkjnzG14ng/3gbC5+ajjLD9fWBA2LXIJXaVP3R953fobIc2ENC8lBKVWhmY io/7p72M8NIx152Gvob6QL3nGPYreX+GAIJucsF+XOr3SRtNGAA4xMSoaIbT75lC24HN jhSg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=KMlJ8GHAqxlGy3Usfux4GuD7eAy2oZuqB8vi82Tf9K0=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=EyWgGzWqsK4Ub9HCmZNCLnFjXcyL8ZXV2AVlnp4gHoojOXtgL0MPwCFAPvGfxX6/xs T9Ytt1RjxFICo7yqESu46U9MZ7XA1cWnbQSr/8xsWksVsF4EKfUZtGr6U/dzvRwNCuuL ujVeVy5Ky3BdHDZ73jGwIbXFw/Kjo02dRnIj2aJojHykE1d76WgXmdp4WfTrZcFIFlO+ Swt7HgwoRnHG4olVyVzFMZVAE8k0kJZknUq/hc2KXC9zy0Z661bMimBQdtkqUh0+TVzM jMFo4zowKDoXjWAlclToKLwVe8FwYj0joCBmpT2sVjBaO3m24iWIvZOAqHaS0sZvUoXi YmHw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=yWnMQAro; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id kb13-20020a17090ae7cd00b00262df8f6cf2si12575770pjb.43.2023.07.24.08.22.38; Mon, 24 Jul 2023 08:22:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=yWnMQAro; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229999AbjGXNgG (ORCPT + 99 others); Mon, 24 Jul 2023 09:36:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36940 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231695AbjGXNf3 (ORCPT ); Mon, 24 Jul 2023 09:35:29 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 996D61BCE for ; Mon, 24 Jul 2023 06:34:58 -0700 (PDT) Message-ID: <20230724132046.448154478@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205678; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=KMlJ8GHAqxlGy3Usfux4GuD7eAy2oZuqB8vi82Tf9K0=; b=yWnMQAro+CFUoyVtTEmMGHg7CafNx2W9/24/zHzKBTmHnKlYDSv3pLnPaLQbGjH03m88EX DTQRunwiSXfj33cvwYg07RFKyyY98LZk88gQcoAQxNtR9lP+nPpQdUujiDJtni00az0F15 1EnybptNTnt0h7b5mJqaLL0AN/XyE6VcAmSA/Bz6+hnm9HlpL8dSU+jQ+mPdAgoo+vP/eV WoK24kWI2jQXwrNm25jba0mR6Bi1nmIIU0ED6nxil7P5BUC8S5lLV7/NSlHzotnxJsaSj3 msbisRlK9c45al3UkyCLuOaS1ZKZhEg2mX4iy0xAzVwBLp1Mhbrpj1NDYX+tPQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205678; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=KMlJ8GHAqxlGy3Usfux4GuD7eAy2oZuqB8vi82Tf9K0=; b=YILlrcWDt/VbFma6qdluJkCjAZkz1Hibb+i6PwQXwnmGw5qGg0iccLM56FGyRipuQ0e2D0 reXxcqIk2niISdDg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 31/58] x86/apic: Mop up apic::apic_id_registered() References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:37 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772315919729687550 X-GMAIL-MSGID: 1772315919729687550 Really not a hotpath and again no reason for having a gazillion of empty callbacks returning 1. Make it return bool and provide one shared implementation for the remaining users. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 2 +- arch/x86/kernel/apic/apic.c | 7 ++----- arch/x86/kernel/apic/apic_common.c | 5 +++++ arch/x86/kernel/apic/apic_flat_64.c | 14 ++------------ arch/x86/kernel/apic/apic_noop.c | 12 ------------ arch/x86/kernel/apic/apic_numachip.c | 7 ------- arch/x86/kernel/apic/bigsmp_32.c | 6 ------ arch/x86/kernel/apic/local.h | 3 ++- arch/x86/kernel/apic/probe_32.c | 5 ----- arch/x86/kernel/apic/x2apic_cluster.c | 1 - arch/x86/kernel/apic/x2apic_phys.c | 6 ------ arch/x86/kernel/apic/x2apic_uv_x.c | 6 ------ arch/x86/xen/apic.c | 6 ------ 13 files changed, 12 insertions(+), 68 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -295,7 +295,7 @@ struct apic { int (*probe)(void); int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); int (*apic_id_valid)(u32 apicid); - int (*apic_id_registered)(void); + bool (*apic_id_registered)(void); bool (*check_apicid_used)(physid_mask_t *map, int apicid); void (*init_apic_ldr)(void); --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1571,11 +1571,8 @@ static void setup_local_APIC(void) apic_write(APIC_ESR, 0); } #endif - /* - * Double-check whether this APIC is really registered. - * This is meaningless in clustered apic mode, so we skip it. - */ - BUG_ON(!apic->apic_id_registered()); + /* Validate that the APIC is registered if required */ + BUG_ON(apic->apic_id_registered && !apic->apic_id_registered()); /* * Intel recommends to set DFR, LDR and TPR before enabling --- a/arch/x86/kernel/apic/apic_common.c +++ b/arch/x86/kernel/apic/apic_common.c @@ -42,6 +42,11 @@ int default_apic_id_valid(u32 apicid) return (apicid < 255); } +bool default_apic_id_registered(void) +{ + return physid_isset(read_apic_id(), phys_cpu_present_map); +} + /* * Set up the logical destination ID when the APIC operates in logical * destination mode. --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -66,16 +66,6 @@ static u32 set_apic_id(unsigned int id) return (id & 0xFF) << 24; } -static unsigned int read_xapic_id(void) -{ - return flat_get_apic_id(apic_read(APIC_ID)); -} - -static int flat_apic_id_registered(void) -{ - return physid_isset(read_xapic_id(), phys_cpu_present_map); -} - static int flat_phys_pkg_id(int initial_apic_id, int index_msb) { return initial_apic_id >> index_msb; @@ -91,7 +81,7 @@ static struct apic apic_flat __ro_after_ .probe = flat_probe, .acpi_madt_oem_check = flat_acpi_madt_oem_check, .apic_id_valid = default_apic_id_valid, - .apic_id_registered = flat_apic_id_registered, + .apic_id_registered = default_apic_id_registered, .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = true, @@ -168,7 +158,7 @@ static struct apic apic_physflat __ro_af .probe = physflat_probe, .acpi_madt_oem_check = physflat_acpi_madt_oem_check, .apic_id_valid = default_apic_id_valid, - .apic_id_registered = flat_apic_id_registered, + .apic_id_registered = default_apic_id_registered, .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = false, --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -57,17 +57,6 @@ static int noop_probe(void) return 0; } -static int noop_apic_id_registered(void) -{ - /* - * if we would be really "pedantic" - * we should pass read_apic_id() here - * but since NOOP suppose APIC ID = 0 - * lets save a few cycles - */ - return physid_isset(0, phys_cpu_present_map); -} - static u32 noop_apic_read(u32 reg) { WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_APIC) && !apic_is_disabled); @@ -85,7 +74,6 @@ struct apic apic_noop __ro_after_init = .acpi_madt_oem_check = NULL, .apic_id_valid = default_apic_id_valid, - .apic_id_registered = noop_apic_id_registered, .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = true, --- a/arch/x86/kernel/apic/apic_numachip.c +++ b/arch/x86/kernel/apic/apic_numachip.c @@ -62,11 +62,6 @@ static int numachip_apic_id_valid(u32 ap return 1; } -static int numachip_apic_id_registered(void) -{ - return 1; -} - static int numachip_phys_pkg_id(int initial_apic_id, int index_msb) { return initial_apic_id >> index_msb; @@ -244,7 +239,6 @@ static const struct apic apic_numachip1 .probe = numachip1_probe, .acpi_madt_oem_check = numachip1_acpi_madt_oem_check, .apic_id_valid = numachip_apic_id_valid, - .apic_id_registered = numachip_apic_id_registered, .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = false, @@ -286,7 +280,6 @@ static const struct apic apic_numachip2 .probe = numachip2_probe, .acpi_madt_oem_check = numachip2_acpi_madt_oem_check, .apic_id_valid = numachip_apic_id_valid, - .apic_id_registered = numachip_apic_id_registered, .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = false, --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -18,11 +18,6 @@ static unsigned bigsmp_get_apic_id(unsig return (x >> 24) & 0xFF; } -static int bigsmp_apic_id_registered(void) -{ - return 1; -} - static bool bigsmp_check_apicid_used(physid_mask_t *map, int apicid) { return false; @@ -85,7 +80,6 @@ static struct apic apic_bigsmp __ro_afte .name = "bigsmp", .probe = probe_bigsmp, .apic_id_valid = default_apic_id_valid, - .apic_id_registered = bigsmp_apic_id_registered, .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = false, --- a/arch/x86/kernel/apic/local.h +++ b/arch/x86/kernel/apic/local.h @@ -15,7 +15,6 @@ /* X2APIC */ int x2apic_apic_id_valid(u32 apicid); -int x2apic_apic_id_registered(void); void __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest); unsigned int x2apic_get_apic_id(unsigned long id); u32 x2apic_set_apic_id(unsigned int id); @@ -61,6 +60,8 @@ void default_send_IPI_allbutself(int vec void default_send_IPI_all(int vector); void default_send_IPI_self(int vector); +bool default_apic_id_registered(void); + #ifdef CONFIG_X86_32 void default_send_IPI_mask_sequence_logical(const struct cpumask *mask, int vector); void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask, int vector); --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -18,11 +18,6 @@ #include "local.h" -static int default_apic_id_registered(void) -{ - return physid_isset(read_apic_id(), phys_cpu_present_map); -} - static int default_phys_pkg_id(int cpuid_apic, int index_msb) { return cpuid_apic >> index_msb; --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c @@ -237,7 +237,6 @@ static struct apic apic_x2apic_cluster _ .probe = x2apic_cluster_probe, .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, .apic_id_valid = x2apic_apic_id_valid, - .apic_id_registered = x2apic_apic_id_registered, .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = true, --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -111,11 +111,6 @@ int x2apic_apic_id_valid(u32 apicid) return 1; } -int x2apic_apic_id_registered(void) -{ - return 1; -} - void __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest) { unsigned long cfg = __prepare_ICR(0, vector, dest); @@ -157,7 +152,6 @@ static struct apic apic_x2apic_phys __ro .probe = x2apic_phys_probe, .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, .apic_id_valid = x2apic_apic_id_valid, - .apic_id_registered = x2apic_apic_id_registered, .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = false, --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -783,11 +783,6 @@ static int uv_apic_id_valid(u32 apicid) return 1; } -static int uv_apic_id_registered(void) -{ - return 1; -} - static u32 apic_uv_calc_apicid(unsigned int cpu) { return apic_default_calc_apicid(cpu); @@ -829,7 +824,6 @@ static struct apic apic_x2apic_uv_x __ro .probe = uv_probe, .acpi_madt_oem_check = uv_acpi_madt_oem_check, .apic_id_valid = uv_apic_id_valid, - .apic_id_registered = uv_apic_id_registered, .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = false, --- a/arch/x86/xen/apic.c +++ b/arch/x86/xen/apic.c @@ -115,11 +115,6 @@ static int xen_id_always_valid(u32 apici return 1; } -static int xen_id_always_registered(void) -{ - return 1; -} - static int xen_phys_pkg_id(int initial_apic_id, int index_msb) { return initial_apic_id >> index_msb; @@ -142,7 +137,6 @@ static struct apic xen_pv_apic = { .probe = xen_apic_probe_pv, .acpi_madt_oem_check = xen_madt_oem_check, .apic_id_valid = xen_id_always_valid, - .apic_id_registered = xen_id_always_registered, /* .delivery_mode and .dest_mode_logical not used by XENPV */ From patchwork Mon Jul 24 13:34:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124995 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1813730vqg; Mon, 24 Jul 2023 06:52:13 -0700 (PDT) X-Google-Smtp-Source: APBJJlFAgJc505KNvEqBG1WI9ZC+XzOZb7AE1ojA2A/7NP2+HB43/mP5C6jTFzJbKg4LsmPk7pXQ X-Received: by 2002:a17:906:cc:b0:992:9005:5ed5 with SMTP id 12-20020a17090600cc00b0099290055ed5mr9635863eji.32.1690206733674; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id c11-20020a170906154b00b0098dea0a1eb4si5808260ejd.700.2023.07.24.06.51.49; Mon, 24 Jul 2023 06:52:13 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=ME3iUUqO; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231727AbjGXNhT (ORCPT + 99 others); Mon, 24 Jul 2023 09:37:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37366 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230214AbjGXNgf (ORCPT ); Mon, 24 Jul 2023 09:36:35 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36318E4F for ; Mon, 24 Jul 2023 06:35:39 -0700 (PDT) Message-ID: <20230724132046.507775279@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205680; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=gTGbbDL5HBuwEB2u+LxYM2ki0P05Jj6Bwt/DqClxZRM=; b=ME3iUUqOwvRAPOdEBpEKJ88hcN/yxKmM/gI2Rj0npJLQuFr9oBqpUhbXzTR7BZKc8E04HS zqWbgxcoYqD1QyJUqYySobCup0Q8QZOXEVHpknlETiqs/TccgAQLRyqOSQI6tJdHmQSDt1 YzL4/3S9uytCLDFkn+6OCGHeuS1F+/X7k7XAieBtoJFvYiNyhJpD6y/bXD9Guod2CCEJ4i WeKOd9OIUb1IdlLRmlIFi94HlIXuTnia+boF8nVNvGIHIz6Ds+sCotJuhmXDYtcpJfFDQ9 ka24KbfEcFgzEVeFzRhaSCwTNsF9ztjL7wpXJ0XXzjNSl/GPnMLEQ0dwGx5GYw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205680; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=gTGbbDL5HBuwEB2u+LxYM2ki0P05Jj6Bwt/DqClxZRM=; b=qHP0QiyZiejLd2dp5RSbp+pLHTW+/3oDCD+K64/p+jwChMIaAjg2f8FLboYAtPBgQUjuAV QixjDK6VIZ9cK1BQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 32/58] x86/apic/ipi: Tidy up the code and fixup comments References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:39 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310215727967878 X-GMAIL-MSGID: 1772310215727967878 Replace the undecodable comment on top of the function, replace the space consuming zero content comments with useful ones and tidy up the implementation to prevent further eye bleed. Make __default_send_IPI_shortcut() static as it has no other users. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/kernel/apic/ipi.c | 74 ++++++++++++++++++------------------------- arch/x86/kernel/apic/local.h | 2 - 2 files changed, 32 insertions(+), 44 deletions(-) --- a/arch/x86/kernel/apic/ipi.c +++ b/arch/x86/kernel/apic/ipi.c @@ -108,68 +108,58 @@ static inline void __xapic_wait_icr_idle cpu_relax(); } -void __default_send_IPI_shortcut(unsigned int shortcut, int vector) +/* + * This is safe against interruption because it only writes the lower 32 + * bits of the APIC_ICR register. The destination field is ignored for + * short hand IPIs. + * + * wait_icr_idle() + * write(ICR2, dest) + * NMI + * wait_icr_idle() + * write(ICR) + * wait_icr_idle() + * write(ICR) + * + * This function does not need to disable interrupts as there is no ICR2 + * interaction. The memory write is direct except when the machine is + * affected by the 11AP Pentium erratum, which turns the plain write into + * an XCHG operation. + */ +static void __default_send_IPI_shortcut(unsigned int shortcut, int vector) { /* - * Subtle. In the case of the 'never do double writes' workaround - * we have to lock out interrupts to be safe. As we don't care - * of the value read we use an atomic rmw access to avoid costly - * cli/sti. Otherwise we use an even cheaper single atomic write - * to the APIC. - */ - unsigned int cfg; - - /* - * Wait for idle. + * Wait for the previous ICR command to complete. Use + * safe_apic_wait_icr_idle() for the NMI vector as there have been + * issues where otherwise the system hangs when the panic CPU tries + * to stop the others before launching the kdump kernel. */ if (unlikely(vector == NMI_VECTOR)) safe_apic_wait_icr_idle(); else __xapic_wait_icr_idle(); - /* - * No need to touch the target chip field. Also the destination - * mode is ignored when a shorthand is used. - */ - cfg = __prepare_ICR(shortcut, vector, 0); - - /* - * Send the IPI. The write to APIC_ICR fires this off. - */ - native_apic_mem_write(APIC_ICR, cfg); + /* Destination field (ICR2) and the destination mode are ignored */ + native_apic_mem_write(APIC_ICR, __prepare_ICR(shortcut, vector, 0)); } /* * This is used to send an IPI with no shorthand notation (the destination is * specified in bits 56 to 63 of the ICR). */ -void __default_send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest) +void __default_send_IPI_dest_field(unsigned int dest_mask, int vector, + unsigned int dest_mode) { - unsigned long cfg; - - /* - * Wait for idle. - */ + /* See comment in __default_send_IPI_shortcut() */ if (unlikely(vector == NMI_VECTOR)) safe_apic_wait_icr_idle(); else __xapic_wait_icr_idle(); - /* - * prepare target chip field - */ - cfg = __prepare_ICR2(mask); - native_apic_mem_write(APIC_ICR2, cfg); - - /* - * program the ICR - */ - cfg = __prepare_ICR(0, vector, dest); - - /* - * Send the IPI. The write to APIC_ICR fires this off. - */ - native_apic_mem_write(APIC_ICR, cfg); + /* Set the IPI destination field in the ICR */ + native_apic_mem_write(APIC_ICR2, __prepare_ICR2(dest_mask)); + /* Send it with the proper destination mode */ + native_apic_mem_write(APIC_ICR, __prepare_ICR(0, vector, dest_mode)); } void default_send_IPI_single_phys(int cpu, int vector) --- a/arch/x86/kernel/apic/local.h +++ b/arch/x86/kernel/apic/local.h @@ -44,8 +44,6 @@ static inline unsigned int __prepare_ICR void default_init_apic_ldr(void); -void __default_send_IPI_shortcut(unsigned int shortcut, int vector); - /* * This is used to send an IPI with no shorthand notation (the destination is * specified in bits 56 to 63 of the ICR). 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id lv27-20020a170906bc9b00b00993ee77a3c4si5926244ejb.681.2023.07.24.06.48.34; Mon, 24 Jul 2023 06:49:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=THs3gdoz; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b="VBjiFS/Q"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231695AbjGXNgJ (ORCPT + 99 others); Mon, 24 Jul 2023 09:36:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36748 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231643AbjGXNfe (ORCPT ); Mon, 24 Jul 2023 09:35:34 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CE9D21BE8 for ; Mon, 24 Jul 2023 06:34:59 -0700 (PDT) Message-ID: <20230724132046.565793939@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205682; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=XotObdBbNP3ucbQgBWCj/e0HCpzDGhDJU7P6fYqyeq4=; b=THs3gdozYYmFcI0pLJTE5EoDS5sPb6gkNRNXObRZ1Q3mjIt5bUez4JiC0G37eAPx9vJS3n rFnl/IuTDPZ5LL9ek5TyHh4MIl3Xxe5rwYylGucoNsNeu+SZb6rnJuDAHvpl97yKi4EXKa qBCwp3oCyQucZ2Wy2VMGavSAVLikewNPTXjCUFJDh145L+SrT/ockSQcT6AGDP22vG5zFI xYqU/aZRKJF5uruyH9gzAG2/hw4xsrDPJlpzciVzVjc00lP6gK60MH0+eCBSo+55NGMgmp r8Fm15nzezLTBNjB+5B1GlLhlZ94QVQtqqfG705BP4x0CN63+dBZRj6hpnYeAw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205682; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=XotObdBbNP3ucbQgBWCj/e0HCpzDGhDJU7P6fYqyeq4=; b=VBjiFS/Qnb09J/I4zLv2EuyWZSIP+g9d8cJ0H0N7MdAo1W6uuL+OzSlZmqODDfnfn4+Pp8 9/dvder+swhQocBQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 33/58] x86/apic: Consolidate wait_icr_idle() implementations References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:41 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310013868291652 X-GMAIL-MSGID: 1772310013868291652 Two copies and also needlessly public. Move it into ipi.c so it can be inlined. Rename it to apic_mem_wait_icr_idle(). Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 1 - arch/x86/kernel/apic/apic.c | 6 ------ arch/x86/kernel/apic/apic_flat_64.c | 4 ++-- arch/x86/kernel/apic/bigsmp_32.c | 2 +- arch/x86/kernel/apic/ipi.c | 6 +++--- arch/x86/kernel/apic/local.h | 2 ++ arch/x86/kernel/apic/probe_32.c | 2 +- 7 files changed, 9 insertions(+), 14 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -98,7 +98,6 @@ static inline u32 native_apic_mem_read(u return *((volatile u32 *)(APIC_BASE + reg)); } -extern void native_apic_wait_icr_idle(void); extern u32 native_safe_apic_wait_icr_idle(void); extern void native_apic_icr_write(u32 low, u32 id); extern u64 native_apic_icr_read(void); --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -240,12 +240,6 @@ static void __init apic_disable(void) apic = &apic_noop; } -void native_apic_wait_icr_idle(void) -{ - while (apic_read(APIC_ICR) & APIC_ICR_BUSY) - cpu_relax(); -} - u32 native_safe_apic_wait_icr_idle(void) { u32 send_status; --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -111,7 +111,7 @@ static struct apic apic_flat __ro_after_ .eoi_write = native_apic_mem_write, .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, - .wait_icr_idle = native_apic_wait_icr_idle, + .wait_icr_idle = apic_mem_wait_icr_idle, .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, }; @@ -187,7 +187,7 @@ static struct apic apic_physflat __ro_af .eoi_write = native_apic_mem_write, .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, - .wait_icr_idle = native_apic_wait_icr_idle, + .wait_icr_idle = apic_mem_wait_icr_idle, .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, }; --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -108,7 +108,7 @@ static struct apic apic_bigsmp __ro_afte .eoi_write = native_apic_mem_write, .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, - .wait_icr_idle = native_apic_wait_icr_idle, + .wait_icr_idle = apic_mem_wait_icr_idle, .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, }; --- a/arch/x86/kernel/apic/ipi.c +++ b/arch/x86/kernel/apic/ipi.c @@ -102,7 +102,7 @@ static inline int __prepare_ICR2(unsigne return SET_XAPIC_DEST_FIELD(mask); } -static inline void __xapic_wait_icr_idle(void) +void apic_mem_wait_icr_idle(void) { while (native_apic_mem_read(APIC_ICR) & APIC_ICR_BUSY) cpu_relax(); @@ -137,7 +137,7 @@ static void __default_send_IPI_shortcut( if (unlikely(vector == NMI_VECTOR)) safe_apic_wait_icr_idle(); else - __xapic_wait_icr_idle(); + apic_mem_wait_icr_idle(); /* Destination field (ICR2) and the destination mode are ignored */ native_apic_mem_write(APIC_ICR, __prepare_ICR(shortcut, vector, 0)); @@ -154,7 +154,7 @@ void __default_send_IPI_dest_field(unsig if (unlikely(vector == NMI_VECTOR)) safe_apic_wait_icr_idle(); else - __xapic_wait_icr_idle(); + apic_mem_wait_icr_idle(); /* Set the IPI destination field in the ICR */ native_apic_mem_write(APIC_ICR2, __prepare_ICR2(dest_mask)); --- a/arch/x86/kernel/apic/local.h +++ b/arch/x86/kernel/apic/local.h @@ -44,6 +44,8 @@ static inline unsigned int __prepare_ICR void default_init_apic_ldr(void); +void apic_mem_wait_icr_idle(void); + /* * This is used to send an IPI with no shorthand notation (the destination is * specified in bits 56 to 63 of the ICR). --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -64,7 +64,7 @@ static struct apic apic_default __ro_aft .eoi_write = native_apic_mem_write, .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, - .wait_icr_idle = native_apic_wait_icr_idle, + .wait_icr_idle = apic_mem_wait_icr_idle, .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, }; From patchwork Mon Jul 24 13:34:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124962 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1805592vqg; Mon, 24 Jul 2023 06:37:47 -0700 (PDT) X-Google-Smtp-Source: APBJJlE6XzqYqtu6CxSJxSAzcuILOVmW7C3PORsGF7ubXCd3xUphlXjyh+UX8kalfE0R619+ua7L X-Received: by 2002:a05:6a20:948a:b0:137:62b6:65c9 with SMTP id hs10-20020a056a20948a00b0013762b665c9mr8830760pzb.45.1690205867178; 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Will be replaced with a static call later. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 9 ++------- arch/x86/kernel/apic/apic_noop.c | 2 -- arch/x86/kernel/apic/apic_numachip.c | 7 ------- arch/x86/kernel/apic/x2apic_cluster.c | 1 - arch/x86/kernel/apic/x2apic_phys.c | 1 - arch/x86/kernel/apic/x2apic_uv_x.c | 1 - arch/x86/xen/apic.c | 5 ----- 7 files changed, 2 insertions(+), 24 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -206,12 +206,6 @@ static inline u32 native_apic_msr_read(u return (u32)msr; } -static inline void native_x2apic_wait_icr_idle(void) -{ - /* no need to wait for icr idle in x2apic */ - return; -} - static inline u32 native_safe_x2apic_wait_icr_idle(void) { /* no need to wait for icr idle in x2apic */ @@ -376,7 +370,8 @@ static inline void apic_icr_write(u32 lo static inline void apic_wait_icr_idle(void) { - apic->wait_icr_idle(); + if (apic->wait_icr_idle) + apic->wait_icr_idle(); } static inline u32 safe_apic_wait_icr_idle(void) --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -20,7 +20,6 @@ static void noop_send_IPI_mask_allbutsel static void noop_send_IPI_allbutself(int vector) { } static void noop_send_IPI_all(int vector) { } static void noop_send_IPI_self(int vector) { } -static void noop_apic_wait_icr_idle(void) { } static void noop_apic_icr_write(u32 low, u32 id) { } static int noop_wakeup_secondary_cpu(int apicid, unsigned long start_eip) @@ -105,6 +104,5 @@ struct apic apic_noop __ro_after_init = .eoi_write = noop_apic_write, .icr_read = noop_apic_icr_read, .icr_write = noop_apic_icr_write, - .wait_icr_idle = noop_apic_wait_icr_idle, .safe_wait_icr_idle = noop_safe_apic_wait_icr_idle, }; --- a/arch/x86/kernel/apic/apic_numachip.c +++ b/arch/x86/kernel/apic/apic_numachip.c @@ -223,11 +223,6 @@ static int numachip2_acpi_madt_oem_check return 1; } -/* APIC IPIs are queued */ -static void numachip_apic_wait_icr_idle(void) -{ -} - /* APIC NMI IPIs are queued */ static u32 numachip_safe_apic_wait_icr_idle(void) { @@ -269,7 +264,6 @@ static const struct apic apic_numachip1 .eoi_write = native_apic_mem_write, .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, - .wait_icr_idle = numachip_apic_wait_icr_idle, .safe_wait_icr_idle = numachip_safe_apic_wait_icr_idle, }; @@ -310,7 +304,6 @@ static const struct apic apic_numachip2 .eoi_write = native_apic_mem_write, .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, - .wait_icr_idle = numachip_apic_wait_icr_idle, .safe_wait_icr_idle = numachip_safe_apic_wait_icr_idle, }; --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c @@ -266,7 +266,6 @@ static struct apic apic_x2apic_cluster _ .eoi_write = native_apic_msr_eoi_write, .icr_read = native_x2apic_icr_read, .icr_write = native_x2apic_icr_write, - .wait_icr_idle = native_x2apic_wait_icr_idle, .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle, }; --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -180,7 +180,6 @@ static struct apic apic_x2apic_phys __ro .eoi_write = native_apic_msr_eoi_write, .icr_read = native_x2apic_icr_read, .icr_write = native_x2apic_icr_write, - .wait_icr_idle = native_x2apic_wait_icr_idle, .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle, }; --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -854,7 +854,6 @@ static struct apic apic_x2apic_uv_x __ro .eoi_write = native_apic_msr_eoi_write, .icr_read = native_x2apic_icr_read, .icr_write = native_x2apic_icr_write, - .wait_icr_idle = native_x2apic_wait_icr_idle, .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle, }; --- a/arch/x86/xen/apic.c +++ b/arch/x86/xen/apic.c @@ -120,10 +120,6 @@ static int xen_phys_pkg_id(int initial_a return initial_apic_id >> index_msb; } -static void xen_noop(void) -{ -} - static int xen_cpu_present_to_apicid(int cpu) { if (cpu_present(cpu)) @@ -165,7 +161,6 @@ static struct apic xen_pv_apic = { .icr_read = xen_apic_icr_read, .icr_write = xen_apic_icr_write, - .wait_icr_idle = xen_noop, .safe_wait_icr_idle = xen_safe_apic_wait_icr_idle, }; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id c22-20020a17090603d600b00992fec0f917si6960573eja.634.2023.07.24.06.53.53; Mon, 24 Jul 2023 06:54:17 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=EhZr3tzX; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231166AbjGXNh5 (ORCPT + 99 others); Mon, 24 Jul 2023 09:37:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37222 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231739AbjGXNhZ (ORCPT ); Mon, 24 Jul 2023 09:37:25 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1799730D5 for ; Mon, 24 Jul 2023 06:36:10 -0700 (PDT) Message-ID: <20230724132046.681223662@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205685; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=z2S2U2bO6X4QfT3xQwa1JPftqd1coMzUZ0B6XjGeK1c=; b=EhZr3tzXKm6s9hfymUtCQKb/r5wRgn3GAzvNSXJruDw86eilpn1lWub8jlCvTMCfe7uLDC EXJ2Oe6GxbzcnIwfWSfNe3+GXcorYa/qfkXejOhiEobXrq8O9Ob87yH25NWqJHRpV8p3dX hFXMNwp7tckeOcN9ywQ5Rd05wGDtrDyLa16TLxhpHwOOiQdvqyig2NfYcDxKhB1LR/ivtL dCT+70JNrHGfVkGhVzYfk02PvwbezVCHukSXZZmyC+dSNdkmpFPj+HtKsfT9tU9bo1UEpg Aqw5UawMtlJN4F/DG/+qKXiwzslsB79uWINJhacJlxDQak4JolWrDd/uxCUUug== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205685; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=z2S2U2bO6X4QfT3xQwa1JPftqd1coMzUZ0B6XjGeK1c=; b=+nGLeSph2TJzakAwnw6pxIhihhKkdyLBCKxrbI/u5Y884Anl68nrR1p8uIg3zq6qJqyKxc Qfl3/bvz6s8hKKDQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 35/58] x86/apic: Allow apic::safe_wait_icr_idle() to be NULL References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:44 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310345236222091 X-GMAIL-MSGID: 1772310345236222091 Remove tons of NOOP callbacks by making the invocation of safe_wait_icr_idle() conditional in the inline wrapper. Will be replaced by a static_call_cond() later. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 8 +------- arch/x86/kernel/apic/apic_noop.c | 6 ------ arch/x86/kernel/apic/apic_numachip.c | 8 -------- arch/x86/kernel/apic/x2apic_cluster.c | 1 - arch/x86/kernel/apic/x2apic_phys.c | 1 - arch/x86/kernel/apic/x2apic_uv_x.c | 1 - arch/x86/xen/apic.c | 6 ------ 7 files changed, 1 insertion(+), 30 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -206,12 +206,6 @@ static inline u32 native_apic_msr_read(u return (u32)msr; } -static inline u32 native_safe_x2apic_wait_icr_idle(void) -{ - /* no need to wait for icr idle in x2apic */ - return 0; -} - static inline void native_x2apic_icr_write(u32 low, u32 id) { wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); @@ -376,7 +370,7 @@ static inline void apic_wait_icr_idle(vo static inline u32 safe_apic_wait_icr_idle(void) { - return apic->safe_wait_icr_idle(); + return apic->safe_wait_icr_idle ? apic->safe_wait_icr_idle() : 0; } extern void __init apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)); --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -27,11 +27,6 @@ static int noop_wakeup_secondary_cpu(int return -1; } -static u32 noop_safe_apic_wait_icr_idle(void) -{ - return 0; -} - static u64 noop_apic_icr_read(void) { return 0; @@ -104,5 +99,4 @@ struct apic apic_noop __ro_after_init = .eoi_write = noop_apic_write, .icr_read = noop_apic_icr_read, .icr_write = noop_apic_icr_write, - .safe_wait_icr_idle = noop_safe_apic_wait_icr_idle, }; --- a/arch/x86/kernel/apic/apic_numachip.c +++ b/arch/x86/kernel/apic/apic_numachip.c @@ -223,12 +223,6 @@ static int numachip2_acpi_madt_oem_check return 1; } -/* APIC NMI IPIs are queued */ -static u32 numachip_safe_apic_wait_icr_idle(void) -{ - return 0; -} - static const struct apic apic_numachip1 __refconst = { .name = "NumaConnect system", .probe = numachip1_probe, @@ -264,7 +258,6 @@ static const struct apic apic_numachip1 .eoi_write = native_apic_mem_write, .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, - .safe_wait_icr_idle = numachip_safe_apic_wait_icr_idle, }; apic_driver(apic_numachip1); @@ -304,7 +297,6 @@ static const struct apic apic_numachip2 .eoi_write = native_apic_mem_write, .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, - .safe_wait_icr_idle = numachip_safe_apic_wait_icr_idle, }; apic_driver(apic_numachip2); --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c @@ -266,7 +266,6 @@ static struct apic apic_x2apic_cluster _ .eoi_write = native_apic_msr_eoi_write, .icr_read = native_x2apic_icr_read, .icr_write = native_x2apic_icr_write, - .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle, }; apic_driver(apic_x2apic_cluster); --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -180,7 +180,6 @@ static struct apic apic_x2apic_phys __ro .eoi_write = native_apic_msr_eoi_write, .icr_read = native_x2apic_icr_read, .icr_write = native_x2apic_icr_write, - .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle, }; apic_driver(apic_x2apic_phys); --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -854,7 +854,6 @@ static struct apic apic_x2apic_uv_x __ro .eoi_write = native_apic_msr_eoi_write, .icr_read = native_x2apic_icr_read, .icr_write = native_x2apic_icr_write, - .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle, }; #define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_LENGTH 3 --- a/arch/x86/xen/apic.c +++ b/arch/x86/xen/apic.c @@ -92,11 +92,6 @@ static void xen_apic_icr_write(u32 low, WARN_ON(1); } -static u32 xen_safe_apic_wait_icr_idle(void) -{ - return 0; -} - static int xen_apic_probe_pv(void) { if (xen_pv_domain()) @@ -161,7 +156,6 @@ static struct apic xen_pv_apic = { .icr_read = xen_apic_icr_read, .icr_write = xen_apic_icr_write, - .safe_wait_icr_idle = xen_safe_apic_wait_icr_idle, }; static void __init xen_apic_check(void) From patchwork Mon Jul 24 13:34:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124966 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1806799vqg; Mon, 24 Jul 2023 06:40:03 -0700 (PDT) X-Google-Smtp-Source: APBJJlENqHdUna/ZuG/JKqFIolp76uObdcyTVjfbHQwcPjjYgDDBtcRbOjTAcCWMZifN33ZxS4fD X-Received: by 2002:a17:906:9bf6:b0:988:6e75:6b3d with SMTP id de54-20020a1709069bf600b009886e756b3dmr9386707ejc.33.1690206003348; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id a13-20020a170906670d00b0098d2f81bceasi6650566ejp.934.2023.07.24.06.39.38; Mon, 24 Jul 2023 06:40:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=V0CBUKz3; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230456AbjGXNgZ (ORCPT + 99 others); Mon, 24 Jul 2023 09:36:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37304 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231627AbjGXNft (ORCPT ); Mon, 24 Jul 2023 09:35:49 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4F9E81FF9 for ; Mon, 24 Jul 2023 06:35:13 -0700 (PDT) Message-ID: <20230724132046.740349345@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205687; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=tVQYxJN/DzHFa1cx/oRePw+d48kC6weMnZb4I/fSkGc=; b=V0CBUKz3iYA7FamMURMv7ZC+NR9wh5+xhRt7KaIaqfJ5SrQVy6nO4t8vXg065G2hPTkuZz XDgpJpM4FJHkKL2b6req7nYWOYyHtCDu22PVoyXidDTOa1qpAqpxqLXkgu+bPi5S2bp0DK mhbN6k6t5NtLDAzkENatRnmp2CKqFiOVPXXCVeQby5lG5jnYGxDh9Z04rMwy5l/qvP1qdG F34JQyUvhKmoCIBsQ86EEOwfF5LNpYs5FyWKEXLgel2mRJKFGBC4jsQ0z5H9Qcmh0L23+G B4/gpclbPC79mwDoVcXv7MVPjshdp5NpCp5o3hLFCEmezbn5L+ZDBMaqwCZZcg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205687; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=tVQYxJN/DzHFa1cx/oRePw+d48kC6weMnZb4I/fSkGc=; b=b/r0yCD6AW3mulD2/HfW+rv4hv6jDCZgUXkGTGH6kLI/14Y/t9fl/jswbxfTPl6aFfhqoB SA24MojOFAJouJDg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 36/58] x86/apic: Move safe wait_icr_idle() next to apic_mem_wait_icr_idle() References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:46 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772309450378774871 X-GMAIL-MSGID: 1772309450378774871 Move it next to apic_mem_wait_icr_idle(), rename it so that it's clear what it does and rewrite it in readable form. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 1 - arch/x86/kernel/apic/apic.c | 17 ----------------- arch/x86/kernel/apic/apic_flat_64.c | 4 ++-- arch/x86/kernel/apic/bigsmp_32.c | 2 +- arch/x86/kernel/apic/ipi.c | 19 +++++++++++++++++-- arch/x86/kernel/apic/local.h | 1 + arch/x86/kernel/apic/probe_32.c | 2 +- 7 files changed, 22 insertions(+), 24 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -98,7 +98,6 @@ static inline u32 native_apic_mem_read(u return *((volatile u32 *)(APIC_BASE + reg)); } -extern u32 native_safe_apic_wait_icr_idle(void); extern void native_apic_icr_write(u32 low, u32 id); extern u64 native_apic_icr_read(void); --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -240,23 +240,6 @@ static void __init apic_disable(void) apic = &apic_noop; } -u32 native_safe_apic_wait_icr_idle(void) -{ - u32 send_status; - int timeout; - - timeout = 0; - do { - send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY; - if (!send_status) - break; - inc_irq_stat(icr_read_retry_count); - udelay(100); - } while (timeout++ < 1000); - - return send_status; -} - void native_apic_icr_write(u32 low, u32 id) { unsigned long flags; --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -112,7 +112,7 @@ static struct apic apic_flat __ro_after_ .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, .wait_icr_idle = apic_mem_wait_icr_idle, - .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, + .safe_wait_icr_idle = apic_mem_wait_icr_idle_timeout, }; /* @@ -188,7 +188,7 @@ static struct apic apic_physflat __ro_af .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, .wait_icr_idle = apic_mem_wait_icr_idle, - .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, + .safe_wait_icr_idle = apic_mem_wait_icr_idle_timeout, }; /* --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -109,7 +109,7 @@ static struct apic apic_bigsmp __ro_afte .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, .wait_icr_idle = apic_mem_wait_icr_idle, - .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, + .safe_wait_icr_idle = apic_mem_wait_icr_idle_timeout, }; bool __init apic_bigsmp_possible(bool cmdline_override) --- a/arch/x86/kernel/apic/ipi.c +++ b/arch/x86/kernel/apic/ipi.c @@ -1,7 +1,9 @@ // SPDX-License-Identifier: GPL-2.0 #include +#include #include + #include #include "local.h" @@ -102,6 +104,19 @@ static inline int __prepare_ICR2(unsigne return SET_XAPIC_DEST_FIELD(mask); } +u32 apic_mem_wait_icr_idle_timeout(void) +{ + int cnt; + + for (cnt = 0; cnt < 1000; cnt++) { + if (!(apic_read(APIC_ICR) & APIC_ICR_BUSY)) + return 0; + inc_irq_stat(icr_read_retry_count); + udelay(100); + } + return APIC_ICR_BUSY; +} + void apic_mem_wait_icr_idle(void) { while (native_apic_mem_read(APIC_ICR) & APIC_ICR_BUSY) @@ -135,7 +150,7 @@ static void __default_send_IPI_shortcut( * to stop the others before launching the kdump kernel. */ if (unlikely(vector == NMI_VECTOR)) - safe_apic_wait_icr_idle(); + apic_mem_wait_icr_idle_timeout(); else apic_mem_wait_icr_idle(); @@ -152,7 +167,7 @@ void __default_send_IPI_dest_field(unsig { /* See comment in __default_send_IPI_shortcut() */ if (unlikely(vector == NMI_VECTOR)) - safe_apic_wait_icr_idle(); + apic_mem_wait_icr_idle_timeout(); else apic_mem_wait_icr_idle(); --- a/arch/x86/kernel/apic/local.h +++ b/arch/x86/kernel/apic/local.h @@ -45,6 +45,7 @@ static inline unsigned int __prepare_ICR void default_init_apic_ldr(void); void apic_mem_wait_icr_idle(void); +u32 apic_mem_wait_icr_idle_timeout(void); /* * This is used to send an IPI with no shorthand notation (the destination is --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -65,7 +65,7 @@ static struct apic apic_default __ro_aft .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, .wait_icr_idle = apic_mem_wait_icr_idle, - .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, + .safe_wait_icr_idle = apic_mem_wait_icr_idle_timeout, }; apic_driver(apic_default); From patchwork Mon Jul 24 13:34:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124979 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1812312vqg; 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Just to be able to slap some vendor name on it... Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/kernel/apic/x2apic_uv_x.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -783,11 +783,6 @@ static int uv_apic_id_valid(u32 apicid) return 1; } -static u32 apic_uv_calc_apicid(unsigned int cpu) -{ - return apic_default_calc_apicid(cpu); -} - static unsigned int x2apic_get_apic_id(unsigned long id) { return id; @@ -838,7 +833,7 @@ static struct apic apic_x2apic_uv_x __ro .get_apic_id = x2apic_get_apic_id, .set_apic_id = set_apic_id, - .calc_dest_apicid = apic_uv_calc_apicid, + .calc_dest_apicid = apic_default_calc_apicid, .send_IPI = uv_send_IPI_one, .send_IPI_mask = uv_send_IPI_mask, From patchwork Mon Jul 24 13:34:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 125012 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1831612vqg; Mon, 24 Jul 2023 07:18:39 -0700 (PDT) X-Google-Smtp-Source: APBJJlFGZtbSwGzq/OpXGSOwH7ZNsBhmjWGMoYvZUTy9V2XJ7f7JSLkHj3utEHuDGSyCsxshPF/8 X-Received: by 2002:a17:902:ea06:b0:1b8:2537:542c with SMTP id s6-20020a170902ea0600b001b82537542cmr9407963plg.43.1690208318761; Mon, 24 Jul 2023 07:18:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690208318; cv=none; d=google.com; s=arc-20160816; b=tyx18CRoHmXpV/7HHsawWde5sKi/87SuaZcAHJKwLWYgTB2f7WjYMPiyYnf7ZaZiac u86j7Ig3Zuh4Aj5AJJrjTyYayKcKG0T6oN+bkvEZ7XYncE6OPg/FmTuGA1RSG0msMPeR ZJ64fsj/HiRooV56bFQ0N3muc65j6nLR3pRdEUGclpHWM/nrbI+p6EArChwK0KBvGPop Ihs2ShSa7boJJ5ATkxwVL6gLYlmA6AC1dz2mHVMP0aGagZaZJLyNl1kHBRnUIDJqVlpd 8QoXOlOrC7O0XlU07be/dCzaYKg+3mqe2cmP2IUmm9nQiuznALWrAX6HyBZCrHVnY9rQ rdvw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=wooQjfivjf9g/FihTIdSMalhuVeQoOiGD7tnhzUY+hw=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=qe8V7hdGrIw7dfSTxfkoPks250h7cP1fx04n2xcJfhCBI0+mM0ukWJYWBw7X+xD2CW c4JvhX/zBZZcC5hDdO7S7fMLWDsm2Hrnz+dbYXABLQScKsDdBGpIkgHqvSTx0rtgwYEy sT0PsqAsiKjP/Y91h6VTUmKxu0dhQd+w+pFZrKFx3iopHxb5jiEBBV+nfI6Y3s0pqOe7 M5z0jSJDGP9oAnRaSEj9Hl3PYO5JRsp4DczFk4fsucI67pN0B7TlJXVzGoK96sJvZ266 AkQeiJwLktd+lzSLz2tZSVrB/9AaKv/Rs//Y87apwFBbueVVF0wR5jG1rBQre5lQJQeQ T2fQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=Pmk9LBNZ; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=z5KUT8gc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/kernel/apic/local.h | 4 ++- arch/x86/kernel/apic/x2apic_cluster.c | 10 ------- arch/x86/kernel/apic/x2apic_phys.c | 44 +++++++++++++++++----------------- arch/x86/kernel/apic/x2apic_uv_x.c | 14 ++-------- 4 files changed, 28 insertions(+), 44 deletions(-) --- a/arch/x86/kernel/apic/local.h +++ b/arch/x86/kernel/apic/local.h @@ -19,8 +19,10 @@ void __x2apic_send_IPI_dest(unsigned int unsigned int x2apic_get_apic_id(unsigned long id); u32 x2apic_set_apic_id(unsigned int id); int x2apic_phys_pkg_id(int initial_apicid, int index_msb); + +void x2apic_send_IPI_all(int vector); +void x2apic_send_IPI_allbutself(int vector); void x2apic_send_IPI_self(int vector); -void __x2apic_send_IPI_shorthand(int vector, u32 which); /* IPI */ --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c @@ -83,16 +83,6 @@ x2apic_send_IPI_mask_allbutself(const st __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT); } -static void x2apic_send_IPI_allbutself(int vector) -{ - __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLBUT); -} - -static void x2apic_send_IPI_all(int vector) -{ - __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLINC); -} - static u32 x2apic_calc_apicid(unsigned int cpu) { return x86_cpu_to_logical_apicid[cpu]; --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -81,16 +81,36 @@ static void __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT); } -static void x2apic_send_IPI_allbutself(int vector) +static void __x2apic_send_IPI_shorthand(int vector, u32 which) +{ + unsigned long cfg = __prepare_ICR(which, vector, 0); + + /* x2apic MSRs are special and need a special fence: */ + weak_wrmsr_fence(); + native_x2apic_icr_write(cfg, 0); +} + +void x2apic_send_IPI_allbutself(int vector) { __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLBUT); } -static void x2apic_send_IPI_all(int vector) +void x2apic_send_IPI_all(int vector) { __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLINC); } +void x2apic_send_IPI_self(int vector) +{ + apic_write(APIC_SELF_IPI, vector); +} + +void __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest) +{ + unsigned long cfg = __prepare_ICR(0, vector, dest); + native_x2apic_icr_write(cfg, apicid); +} + static int x2apic_phys_probe(void) { if (!x2apic_mode) @@ -111,21 +131,6 @@ int x2apic_apic_id_valid(u32 apicid) return 1; } -void __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest) -{ - unsigned long cfg = __prepare_ICR(0, vector, dest); - native_x2apic_icr_write(cfg, apicid); -} - -void __x2apic_send_IPI_shorthand(int vector, u32 which) -{ - unsigned long cfg = __prepare_ICR(which, vector, 0); - - /* x2apic MSRs are special and need a special fence: */ - weak_wrmsr_fence(); - native_x2apic_icr_write(cfg, 0); -} - unsigned int x2apic_get_apic_id(unsigned long id) { return id; @@ -141,11 +146,6 @@ int x2apic_phys_pkg_id(int initial_apici return initial_apicid >> index_msb; } -void x2apic_send_IPI_self(int vector) -{ - apic_write(APIC_SELF_IPI, vector); -} - static struct apic apic_x2apic_phys __ro_after_init = { .name = "physical x2apic", --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -25,6 +25,8 @@ #include #include +#include "local.h" + static enum uv_system_type uv_system_type; static int uv_hubbed_system; static int uv_hubless_system; @@ -783,11 +785,6 @@ static int uv_apic_id_valid(u32 apicid) return 1; } -static unsigned int x2apic_get_apic_id(unsigned long id) -{ - return id; -} - static u32 set_apic_id(unsigned int id) { return id; @@ -803,11 +800,6 @@ static int uv_phys_pkg_id(int initial_ap return uv_read_apic_id() >> index_msb; } -static void uv_send_IPI_self(int vector) -{ - apic_write(APIC_SELF_IPI, vector); -} - static int uv_probe(void) { return apic == &apic_x2apic_uv_x; @@ -840,7 +832,7 @@ static struct apic apic_x2apic_uv_x __ro .send_IPI_mask_allbutself = uv_send_IPI_mask_allbutself, .send_IPI_allbutself = uv_send_IPI_allbutself, .send_IPI_all = uv_send_IPI_all, - .send_IPI_self = uv_send_IPI_self, + .send_IPI_self = x2apic_send_IPI_self, .wakeup_secondary_cpu = uv_wakeup_secondary, From patchwork Mon Jul 24 13:34:51 2023 Content-Type: text/plain; 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Also prepares for simplifying the APIC ID validation checks. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/kernel/apic/probe_64.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) --- a/arch/x86/kernel/apic/probe_64.c +++ b/arch/x86/kernel/apic/probe_64.c @@ -13,6 +13,15 @@ #include "local.h" +static __init void apic_install_driver(struct apic *driver) +{ + if (apic == driver) + return; + + apic = driver; + pr_info("Switched APIC routing to %s:\n", apic->name); +} + /* Select the appropriate APIC driver */ void __init x86_64_probe_apic(void) { @@ -22,11 +31,7 @@ void __init x86_64_probe_apic(void) for (drv = __apicdrivers; drv < __apicdrivers_end; drv++) { if ((*drv)->probe && (*drv)->probe()) { - if (apic != *drv) { - apic = *drv; - pr_info("Switched APIC routing to %s.\n", - apic->name); - } + apic_install_driver(*drv); break; } } @@ -38,11 +43,7 @@ int __init default_acpi_madt_oem_check(c for (drv = __apicdrivers; drv < __apicdrivers_end; drv++) { if ((*drv)->acpi_madt_oem_check(oem_id, oem_table_id)) { - if (apic != *drv) { - apic = *drv; - pr_info("Setting APIC routing to %s.\n", - apic->name); - } + apic_install_driver(*drv); return 1; } } From patchwork Mon Jul 24 13:34:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 125020 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1834824vqg; Mon, 24 Jul 2023 07:23:58 -0700 (PDT) X-Google-Smtp-Source: APBJJlHjeyzLMt/lW9nwbQZUAolKksCFWgJyMhrveIy4nrJB5kOLi76Jwt0wtosM7Flxk0O8LGcz X-Received: by 2002:a05:6a20:1391:b0:133:6c35:99c1 with SMTP id hn17-20020a056a20139100b001336c3599c1mr9097088pzc.16.1690208637704; Mon, 24 Jul 2023 07:23:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690208637; cv=none; d=google.com; s=arc-20160816; b=YKL2r84f0gFlgC6UGj+j5WNCzs0CtUHsSUAwYrwNP7GXTJEpJNrTdW3ICdnvpUFLNS u6Sls8v9JA2R6kp58tSWuW+BfTqqeAOfPZetH4v+HuFWk5IKMyLI2R8qiUOubtf8/H1G VVakze/MHtqgB02dLnnKAPHr5oBA5Coc6WKDiscNSpRXDW+yKXLfytr961f3QEqk19ls PA4PfJNEZhKwubaUxKTd2FrkZ9pfeqKX08pF1bSfFU1tY7q3JUdKXkKcZBjh8CX2pWEZ KKXGqsNydstONu1wvc9wZYYjW/B4eZZBgXoCZh/NB/CQmby7WdoZ/MRpNTpCQZSfo7oQ BarA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=TA8RTRP76/X19cT18S7neKhRCl/b+EEGzlCWZ6ao1A4=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=rFvyvHF08kDCL64hzS8ynkR+IjzyvVtH57Kr0a5BBglILs67EP9f2a81K+y+/d5PW3 VAZd7k8mXSvKURoBKXa9ZoRCu0EbMSBD3IjZ2ao96yrm8pP9B75VeOhcOQIBhiOdoPL1 PRHNcsBBIcFBLvoZ+Ly+TtebqPS4tFKBu4Dw+yazYDb8iCoXiJN6+EWio8vHe3Y8vfym tqTn+ztETMCuO+QP1PN18IJJ3ETfsbFQUNtho8u/VbllKu4OTSXinjRtezII9NaRUZY8 8F3qlqDNG9Lol47jHo0FsBLRwTlmaf0emwR9d2elK97dbcZRExSN0cFexWLvaOYD9Uss NR0g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=HxclbIhT; dkim=neutral (no key) header.i=@linutronix.de header.b=TksayY8y; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 5 +++++ arch/x86/kernel/acpi/boot.c | 2 +- arch/x86/kernel/apic/vector.c | 2 +- arch/x86/kernel/smpboot.c | 5 ++--- arch/x86/mm/srat.c | 5 ++--- 5 files changed, 11 insertions(+), 8 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -372,6 +372,11 @@ static inline u32 safe_apic_wait_icr_idl return apic->safe_wait_icr_idle ? apic->safe_wait_icr_idle() : 0; } +static inline bool apic_id_valid(u32 apic_id) +{ + return apic->apic_id_valid(apic_id); +} + extern void __init apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)); #else /* CONFIG_X86_LOCAL_APIC */ --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c @@ -235,7 +235,7 @@ acpi_parse_x2apic(union acpi_subtable_he * to not preallocating memory for all NR_CPUS * when we use CPU hotplug. */ - if (!apic->apic_id_valid(apic_id)) { + if (!apic_id_valid(apic_id)) { if (enabled) pr_warn("x2apic entry ignored\n"); return 0; --- a/arch/x86/kernel/apic/vector.c +++ b/arch/x86/kernel/apic/vector.c @@ -680,7 +680,7 @@ static int x86_vector_select(struct irq_ * if IRQ remapping is enabled. APIC IDs above 15 bits are * only permitted if IRQ remapping is enabled, so check that. */ - if (apic->apic_id_valid(32768)) + if (apic_id_valid(32768)) return 0; return x86_fwspec_is_ioapic(fwspec) || x86_fwspec_is_hpet(fwspec); --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -1064,9 +1064,8 @@ int native_kick_ap(unsigned int cpu, str pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu); - if (apicid == BAD_APICID || - !physid_isset(apicid, phys_cpu_present_map) || - !apic->apic_id_valid(apicid)) { + if (apicid == BAD_APICID || !physid_isset(apicid, phys_cpu_present_map) || + !apic_id_valid(apicid)) { pr_err("%s: bad cpu %d\n", __func__, cpu); return -EINVAL; } --- a/arch/x86/mm/srat.c +++ b/arch/x86/mm/srat.c @@ -40,9 +40,8 @@ acpi_numa_x2apic_affinity_init(struct ac return; pxm = pa->proximity_domain; apic_id = pa->apic_id; - if (!apic->apic_id_valid(apic_id)) { - printk(KERN_INFO "SRAT: PXM %u -> X2APIC 0x%04x ignored\n", - pxm, apic_id); + if (!apic_id_valid(apic_id)) { + pr_info("SRAT: PXM %u -> X2APIC 0x%04x ignored\n", pxm, apic_id); return; } node = acpi_map_pxm_to_node(pxm); From patchwork Mon Jul 24 13:34:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124964 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1805885vqg; Mon, 24 Jul 2023 06:38:20 -0700 (PDT) X-Google-Smtp-Source: APBJJlGoYz860PdC2o5bB53ztpggBVHkWWay/QUCBzsboiyeRMyA4yGdlehHwiGSu+FcyTDdsjjQ X-Received: by 2002:a9d:63d9:0:b0:6b9:2989:c261 with SMTP id e25-20020a9d63d9000000b006b92989c261mr9060055otl.21.1690205900311; Mon, 24 Jul 2023 06:38:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690205900; cv=none; d=google.com; s=arc-20160816; b=wMlod+Y6YC13jCNUdrbKFvDUF2Zv0rIcq6GYCLFmjogPLZEUq55+c7eX6zy+l+KZi/ Ayo2GEgE82Bpai/hXYzTGofPeCgVorWShlC7BnZZ8mFoxfTvoZCtBMo9mkUGBy+0qeBH vaLtSCzjnR/Bgbd9KnTMe12JEgdtLWSH/cWQDp1LgXvxvUv5V1CX09PL9b/u2N/ZTwFg WcFYZ835gIypSIXpOwGgAPrcEIP5XJeRCa+QDk7mlZbs/Ej8zZTwxIsxQsuLcxf1eLhQ u7VvnWLX8q65uiF69qj+PQZR3hpjZyKOdvUqoswA2Hcu0Een73DHVDUL/upca7IdLVl+ idaQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=Lzl2By5b2bK0JPapjkW1rKVMFogh5AbCCARtLT2XDn0=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=lyPjhUjqkDlSxJ+eTa8Q0Mk74V87uV9iSuG4l76Dmmg3QNr5j4Z3/h0TuWytLwh8zH Hqx3wNG3+QcInqDd2WbqoWXwpC+oEe1EB5ZcCYCOl0sMAxGpinEZwCTpxNhNXaARloH9 oXkJnmG0sdwEVPbi7wlSKK/I9PD+7O/1vg3ymdsmEC/PnKkpBQfOwgGqLvonqLlZl1ru CEORrnkQcIVD644iPH18ap1TLRNX5dCIsthji35xFOFkYBk4pVF8o963Otb54PIDOlc/ ictjY9/GoeixZcQ9zMm4iFAYoH1rxDGyh+LcR3uFb0duSNSjek8CgaIzLew36N4Uo/Kg Khig== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=dKLgGaYj; dkim=neutral (no key) header.i=@linutronix.de header.b=+SvsShFD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Add a field which allows each APIC to store the maximum APIC ID supported and fill it in for all APIC incarnations. The next step will remove the callback. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 3 +++ arch/x86/kernel/apic/apic_flat_64.c | 2 ++ arch/x86/kernel/apic/apic_noop.c | 1 + arch/x86/kernel/apic/apic_numachip.c | 2 ++ arch/x86/kernel/apic/bigsmp_32.c | 1 + arch/x86/kernel/apic/probe_32.c | 1 + arch/x86/kernel/apic/x2apic_cluster.c | 1 + arch/x86/kernel/apic/x2apic_phys.c | 1 + arch/x86/kernel/apic/x2apic_uv_x.c | 1 + arch/x86/xen/apic.c | 1 + 10 files changed, 14 insertions(+) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -277,6 +277,9 @@ struct apic { u64 (*icr_read)(void); void (*icr_write)(u32 low, u32 high); + /* The limit of the APIC ID space. */ + u32 max_apic_id; + /* Probe, setup and smpboot functions */ int (*probe)(void); int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -94,6 +94,7 @@ static struct apic apic_flat __ro_after_ .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = flat_phys_pkg_id, + .max_apic_id = 0xFE, .get_apic_id = flat_get_apic_id, .set_apic_id = set_apic_id, @@ -170,6 +171,7 @@ static struct apic apic_physflat __ro_af .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = flat_phys_pkg_id, + .max_apic_id = 0xFE, .get_apic_id = flat_get_apic_id, .set_apic_id = set_apic_id, --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -80,6 +80,7 @@ struct apic apic_noop __ro_after_init = .phys_pkg_id = noop_phys_pkg_id, + .max_apic_id = 0xFE, .get_apic_id = noop_get_apic_id, .set_apic_id = NULL, --- a/arch/x86/kernel/apic/apic_numachip.c +++ b/arch/x86/kernel/apic/apic_numachip.c @@ -239,6 +239,7 @@ static const struct apic apic_numachip1 .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = numachip_phys_pkg_id, + .max_apic_id = UINT_MAX, .get_apic_id = numachip1_get_apic_id, .set_apic_id = numachip1_set_apic_id, @@ -278,6 +279,7 @@ static const struct apic apic_numachip2 .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = numachip_phys_pkg_id, + .max_apic_id = UINT_MAX, .get_apic_id = numachip2_get_apic_id, .set_apic_id = numachip2_set_apic_id, --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -91,6 +91,7 @@ static struct apic apic_bigsmp __ro_afte .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = bigsmp_phys_pkg_id, + .max_apic_id = 0xFE, .get_apic_id = bigsmp_get_apic_id, .set_apic_id = NULL, --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -47,6 +47,7 @@ static struct apic apic_default __ro_aft .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = default_phys_pkg_id, + .max_apic_id = 0xFE, .get_apic_id = default_get_apic_id, .set_apic_id = NULL, --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c @@ -239,6 +239,7 @@ static struct apic apic_x2apic_cluster _ .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = x2apic_phys_pkg_id, + .max_apic_id = UINT_MAX, .get_apic_id = x2apic_get_apic_id, .set_apic_id = x2apic_set_apic_id, --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -163,6 +163,7 @@ static struct apic apic_x2apic_phys __ro .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = x2apic_phys_pkg_id, + .max_apic_id = UINT_MAX, .get_apic_id = x2apic_get_apic_id, .set_apic_id = x2apic_set_apic_id, --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -822,6 +822,7 @@ static struct apic apic_x2apic_uv_x __ro .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = uv_phys_pkg_id, + .max_apic_id = UINT_MAX, .get_apic_id = x2apic_get_apic_id, .set_apic_id = set_apic_id, --- a/arch/x86/xen/apic.c +++ b/arch/x86/xen/apic.c @@ -138,6 +138,7 @@ static struct apic xen_pv_apic = { .cpu_present_to_apicid = xen_cpu_present_to_apicid, .phys_pkg_id = xen_phys_pkg_id, /* detect_ht */ + .max_apic_id = UINT_MAX, .get_apic_id = xen_get_apic_id, .set_apic_id = xen_set_apic_id, /* Can be NULL on 32-bit. */ From patchwork Mon Jul 24 13:34:56 2023 Content-Type: text/plain; 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Unlimited is UINT_MAX. So initialize the variable with UINT_MAX and compare less than or equal. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/kernel/apic/x2apic_phys.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -8,7 +8,7 @@ int x2apic_phys; static struct apic apic_x2apic_phys; -static u32 x2apic_max_apicid __ro_after_init; +static u32 x2apic_max_apicid __ro_after_init = UINT_MAX; void __init x2apic_set_max_apicid(u32 apicid) { @@ -125,10 +125,7 @@ static int x2apic_phys_probe(void) /* Common x2apic functions, also used by x2apic_cluster */ int x2apic_apic_id_valid(u32 apicid) { - if (x2apic_max_apicid && apicid > x2apic_max_apicid) - return 0; - - return 1; + return apicid <= x2apic_max_apicid; } unsigned int x2apic_get_apic_id(unsigned long id) From patchwork Mon Jul 24 13:34:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124993 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1813294vqg; Mon, 24 Jul 2023 06:51:28 -0700 (PDT) X-Google-Smtp-Source: APBJJlGuR/KIlrPQAZ+h3XAQ3AaXaz0LPghLy/OwPTZhuxIk4OQLOvOWkZ7FaNrjQcr9i+UPAyWy X-Received: by 2002:aa7:c481:0:b0:522:1956:a291 with SMTP id m1-20020aa7c481000000b005221956a291mr5367254edq.8.1690206688110; Mon, 24 Jul 2023 06:51:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206688; cv=none; d=google.com; s=arc-20160816; b=WSF5MuQLlH65xkF8gegtTIzU246Cp4S1sAbzZC2ehdRvEKO1SHMAhld2+PD2QMKJ4m DWYyjTw5f1oM2fWyQ25zPwW3tQrNrJyHLau0+iV7BPHesJph4IIsev8FhYy8IwVFhAH1 avkHKqUJaGVz4SbtSq4okttT9GXbXnrueSDBYugcWbLncn3GcyVLBh5cCPKHeORf5yPX vecboEF4+DjGNB0K4ZE5ZEZuv3YYWkqkKDnhaXnO7e6tdMet1ByjF7Emq0tbYjy95WuF CPGZ3+CTvO8YQ5wMPxJz+cj5GMgWs8dmUb1CbuLqjlBdO6YQXu4Qx+0LO0vu+fp71BwS Wk6A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=szXoVyIugEhLQoBNKHeoJc9xg6are8RXmgk50QQTfEQ=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=noIniEXfTpBpiroPGAmAtTx9WXoVKRwk023C6K/pFQEZ8t+iyTfKSrswHOUULPNSgl HRXpFMAMN+2XjRqsTK1NS8c+nQmm/cLxrQ3dLuv9830/U7Q8e82sCOgzensdH2atR/mO Yy/oNKIrDUPhGg783/amIXzAxzjJ9Es6lJ3vwYqss20As71hJLEE9ej750mFgzvcsfr7 qv4RsCMkCKwmqotEqWEFaFqp8IdvumAbQzix7+bUM4LRxOBEZS7WYFaHcXInRNjF00Iv 1wjfKQGOncJdkAr1WsYHkeEyqrHu71L56Z3OkqxCL175mmr0F5No1DlkBg6sZ1PKGhqU 4Fiw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=n7uarqd3; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id n22-20020a05640206d600b005218239ce10si6678546edy.206.2023.07.24.06.51.03; Mon, 24 Jul 2023 06:51:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=n7uarqd3; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231666AbjGXNiD (ORCPT + 99 others); Mon, 24 Jul 2023 09:38:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37308 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231590AbjGXNhe (ORCPT ); Mon, 24 Jul 2023 09:37:34 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E154230ED for ; Mon, 24 Jul 2023 06:36:13 -0700 (PDT) Message-ID: <20230724132047.149054128@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205699; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=szXoVyIugEhLQoBNKHeoJc9xg6are8RXmgk50QQTfEQ=; b=n7uarqd3pMzRqJTlxuF5yXK90hit5XxnQykJs8a24A+nlnoQi0N3gkfVjconnL/Sdu0C2G v15Wk4FhYXkJlaKkLMVMV2HK18Do5U6f1D1NjNITNHVAar7gqXfVuOKf2oqGV6g02YScbA G4RLlCeJkFQLmGiAgV3fm+MAyImOCOF8bIVtukwhOpSqpTMr1rS+ZPySumefyi9epw9N2i eI4XiVO/uvFO4wp4hAq2HcjarF3j0t5ZCGktPg1yWxkMxuHDAJu6vqbetSKdxkByk4gyHp 2Q8i51LBvU8ARAVrp6gF4JI3wElYrNlCO1G+BO7CevdN7peyy8MSXkOify4zpg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205699; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=szXoVyIugEhLQoBNKHeoJc9xg6are8RXmgk50QQTfEQ=; b=o5eCI97zCcZ87VWWuPVHrr1SAFB0AAZLUdU2CvDZHOj2yu6AOA8CDjKrIPHe0Drvq4kFWY QFxKW1meOXIRfkCQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 43/58] x86/apic: Prepare x2APIC for using apic::max_apic_id References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:34:58 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310167903674733 X-GMAIL-MSGID: 1772310167903674733 In order to remove the apic::apic_id_valid() callback and switch to checking apic::max_apic_id, it is required to update apic::max_apic_id when the APIC initialization code overrides it via x2apic_set_max_apicid(). Make the existing booleans a bitfield and add a flag which lets the update function and the core code which switches the driver detect whether the apic instance wants to have that update or not and apply it if required. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 7 ++++--- arch/x86/kernel/apic/local.h | 1 + arch/x86/kernel/apic/probe_64.c | 4 ++++ arch/x86/kernel/apic/x2apic_cluster.c | 1 + arch/x86/kernel/apic/x2apic_phys.c | 5 ++++- 5 files changed, 14 insertions(+), 4 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -266,10 +266,11 @@ struct apic { void (*send_IPI_all)(int vector); void (*send_IPI_self)(int vector); - u32 disable_esr; - enum apic_delivery_modes delivery_mode; - bool dest_mode_logical; + + u32 disable_esr : 1, + dest_mode_logical : 1, + x2apic_set_max_apicid : 1; u32 (*calc_dest_apicid)(unsigned int cpu); --- a/arch/x86/kernel/apic/local.h +++ b/arch/x86/kernel/apic/local.h @@ -23,6 +23,7 @@ int x2apic_phys_pkg_id(int initial_apici void x2apic_send_IPI_all(int vector); void x2apic_send_IPI_allbutself(int vector); void x2apic_send_IPI_self(int vector); +extern u32 x2apic_max_apicid; /* IPI */ --- a/arch/x86/kernel/apic/probe_64.c +++ b/arch/x86/kernel/apic/probe_64.c @@ -19,6 +19,10 @@ static __init void apic_install_driver(s return; apic = driver; + + if (IS_ENABLED(CONFIG_X86_X2APIC) && apic->x2apic_set_max_apicid) + apic->max_apic_id = x2apic_max_apicid; + pr_info("Switched APIC routing to %s:\n", apic->name); } --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c @@ -240,6 +240,7 @@ static struct apic apic_x2apic_cluster _ .phys_pkg_id = x2apic_phys_pkg_id, .max_apic_id = UINT_MAX, + .x2apic_set_max_apicid = true, .get_apic_id = x2apic_get_apic_id, .set_apic_id = x2apic_set_apic_id, --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -8,11 +8,13 @@ int x2apic_phys; static struct apic apic_x2apic_phys; -static u32 x2apic_max_apicid __ro_after_init = UINT_MAX; +u32 x2apic_max_apicid __ro_after_init = UINT_MAX; void __init x2apic_set_max_apicid(u32 apicid) { x2apic_max_apicid = apicid; + if (apic->x2apic_set_max_apicid) + apic->max_apic_id = apicid; } static int __init set_x2apic_phys_mode(char *arg) @@ -161,6 +163,7 @@ static struct apic apic_x2apic_phys __ro .phys_pkg_id = x2apic_phys_pkg_id, .max_apic_id = UINT_MAX, + .x2apic_set_max_apicid = true, .get_apic_id = x2apic_get_apic_id, .set_apic_id = x2apic_set_apic_id, From patchwork Mon Jul 24 13:35:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 125046 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1843892vqg; Mon, 24 Jul 2023 07:38:35 -0700 (PDT) X-Google-Smtp-Source: APBJJlGrCKhX7fUhFvSGlI+ou+IwI6/kyPc0YVsH+aYqaYwCRhJDauEhOuvIMe9ZJTWZadEReauP X-Received: by 2002:a9d:7f8f:0:b0:6bb:2945:b180 with SMTP id t15-20020a9d7f8f000000b006bb2945b180mr3666451otp.11.1690209515315; Mon, 24 Jul 2023 07:38:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690209515; cv=none; d=google.com; s=arc-20160816; b=RDOWOpoN4X7fTie17D0q8K0pvuBrR5xkPSmCCPnVkazQA9qfWpDQrm4k41IXXwTBGd QW6LopXAcR7pIuE/8Ic9y44y6sJdhrazjUk3jsn6OnSSie+hquoOGYKjN2nHAnBZnNfy Nce4tYqmhbTbVIyWSxJR7KW1Un3fEZaGWzP10bKo0lLze1MhudvWJ8TwTN8yH/YPN6AV ZVcpR8xdsSANvFH1eImwikINt8BpyJgSt1nqc3i2Akf1h0bPWK59o7zPI6R0VQD2xcho kjFlI7xQXph8iynXU5EqeE66963n02Cie/xzO8XODG3WnW5E05Gb4FbaG28w6YhMJiHx dtOA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=5u62JLRIdL35F8zaoRJUG8h+QUZ60VbjH6N1PcWK5uo=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=ta7PIuTTfAuNyl09b3br+ql+Y08e8txr6iBAsNwYgUBxCG1i1n6+/bh4NAwf03AwNG 1J+LhLnxlGIGlSMSiaGAVQ4179QFRDaIfcCx0BcFkNBVuheWqRK56jUbgJ7IcYSIUl0r ie4tqr5NMjxK3m3z6DCas4LJl6MtSUxctFD4E60X3yA3kSrrM5Ow1e1/gfk7UJkITQP/ 6ejBW+QMSC5QzVoVBr4NJUtgS4phUAKxGi8UwJzZC9gOxJ82Nh0cfsE2FKwjvI19M2i5 WTmXhZp0l1ylsjEnxCjXD8vuh8tmdhp766dSWfWB9mDoZ7kEKKyduiw6yF+/X+aqvpoF OUcw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=zWhyS8sF; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id d71-20020a63364a000000b0055c07307e5bsi8891104pga.64.2023.07.24.07.38.20; Mon, 24 Jul 2023 07:38:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=zWhyS8sF; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231655AbjGXNhX (ORCPT + 99 others); Mon, 24 Jul 2023 09:37:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37734 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230189AbjGXNgq (ORCPT ); Mon, 24 Jul 2023 09:36:46 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 60DE92D77 for ; Mon, 24 Jul 2023 06:35:43 -0700 (PDT) Message-ID: <20230724132047.206295388@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205701; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=5u62JLRIdL35F8zaoRJUG8h+QUZ60VbjH6N1PcWK5uo=; b=zWhyS8sF95CkV/Mdhf/89EMoFEZUuP5Yi1vXxOAzYCaZeUtFsl5XpHrHQiG07qhSZXkaGi Z1JkXYJngPS+f7wp74SByE2USU68ElAHQP4U7NNktqy1U2O/YsROido/moSiofP7EYG9hu v0Bk+w6kEVoE06PNzX9uDxvtnI8cXf4RJTjfqeYvpt/bdPEoyTMTJiD46ngFQVws3HNiPQ Ta/bG7x9FfVNcLaKHDkG6DSmJfdvDsFx3p3Z714VuMvXlUvfjtk/eu6Mpoop508U5HX5tZ eEbdOIGRN2DaUb6nVkuI51hg8mOCVpdAkEIUv/GNWhkYsRHe4+K50J+vajBN5g== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205701; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=5u62JLRIdL35F8zaoRJUG8h+QUZ60VbjH6N1PcWK5uo=; b=magkCM1wn40P75vkw+McnszXTJstwhW5RV6dUqzVt1mkqid9dRDm9XSVsXRh1WFaWVVHad GUwkQs08NfnyE9DA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 44/58] x86/apic: Sanitize APID ID range validation References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:35:00 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772313132466360997 X-GMAIL-MSGID: 1772313132466360997 Now that everything has apic::max_apic_id set and the eventual update for the x2APIC case is in place, switch the apic_id_valid() helper to use apic::max_apic_id and remove the apic::apic_id_valid() callback. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 3 +-- arch/x86/kernel/apic/apic_common.c | 5 ----- arch/x86/kernel/apic/apic_flat_64.c | 2 -- arch/x86/kernel/apic/apic_noop.c | 2 -- arch/x86/kernel/apic/apic_numachip.c | 8 -------- arch/x86/kernel/apic/bigsmp_32.c | 1 - arch/x86/kernel/apic/local.h | 1 - arch/x86/kernel/apic/probe_32.c | 1 - arch/x86/kernel/apic/x2apic_cluster.c | 1 - arch/x86/kernel/apic/x2apic_phys.c | 7 ------- arch/x86/kernel/apic/x2apic_uv_x.c | 6 ------ arch/x86/xen/apic.c | 6 ------ 12 files changed, 1 insertion(+), 42 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -284,7 +284,6 @@ struct apic { /* Probe, setup and smpboot functions */ int (*probe)(void); int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); - int (*apic_id_valid)(u32 apicid); bool (*apic_id_registered)(void); bool (*check_apicid_used)(physid_mask_t *map, int apicid); @@ -378,7 +377,7 @@ static inline u32 safe_apic_wait_icr_idl static inline bool apic_id_valid(u32 apic_id) { - return apic->apic_id_valid(apic_id); + return apic_id <= apic->max_apic_id; } extern void __init apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)); --- a/arch/x86/kernel/apic/apic_common.c +++ b/arch/x86/kernel/apic/apic_common.c @@ -37,11 +37,6 @@ int default_cpu_present_to_apicid(int mp } EXPORT_SYMBOL_GPL(default_cpu_present_to_apicid); -int default_apic_id_valid(u32 apicid) -{ - return (apicid < 255); -} - bool default_apic_id_registered(void) { return physid_isset(read_apic_id(), phys_cpu_present_map); --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -80,7 +80,6 @@ static struct apic apic_flat __ro_after_ .name = "flat", .probe = flat_probe, .acpi_madt_oem_check = flat_acpi_madt_oem_check, - .apic_id_valid = default_apic_id_valid, .apic_id_registered = default_apic_id_registered, .delivery_mode = APIC_DELIVERY_MODE_FIXED, @@ -158,7 +157,6 @@ static struct apic apic_physflat __ro_af .name = "physical flat", .probe = physflat_probe, .acpi_madt_oem_check = physflat_acpi_madt_oem_check, - .apic_id_valid = default_apic_id_valid, .apic_id_registered = default_apic_id_registered, .delivery_mode = APIC_DELIVERY_MODE_FIXED, --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -67,8 +67,6 @@ struct apic apic_noop __ro_after_init = .probe = noop_probe, .acpi_madt_oem_check = NULL, - .apic_id_valid = default_apic_id_valid, - .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = true, --- a/arch/x86/kernel/apic/apic_numachip.c +++ b/arch/x86/kernel/apic/apic_numachip.c @@ -56,12 +56,6 @@ static u32 numachip2_set_apic_id(unsigne return id << 24; } -static int numachip_apic_id_valid(u32 apicid) -{ - /* Trust what bootloader passes in MADT */ - return 1; -} - static int numachip_phys_pkg_id(int initial_apic_id, int index_msb) { return initial_apic_id >> index_msb; @@ -227,7 +221,6 @@ static const struct apic apic_numachip1 .name = "NumaConnect system", .probe = numachip1_probe, .acpi_madt_oem_check = numachip1_acpi_madt_oem_check, - .apic_id_valid = numachip_apic_id_valid, .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = false, @@ -267,7 +260,6 @@ static const struct apic apic_numachip2 .name = "NumaConnect2 system", .probe = numachip2_probe, .acpi_madt_oem_check = numachip2_acpi_madt_oem_check, - .apic_id_valid = numachip_apic_id_valid, .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = false, --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -79,7 +79,6 @@ static struct apic apic_bigsmp __ro_afte .name = "bigsmp", .probe = probe_bigsmp, - .apic_id_valid = default_apic_id_valid, .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = false, --- a/arch/x86/kernel/apic/local.h +++ b/arch/x86/kernel/apic/local.h @@ -14,7 +14,6 @@ #include /* X2APIC */ -int x2apic_apic_id_valid(u32 apicid); void __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest); unsigned int x2apic_get_apic_id(unsigned long id); u32 x2apic_set_apic_id(unsigned int id); --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -33,7 +33,6 @@ static struct apic apic_default __ro_aft .name = "default", .probe = probe_default, - .apic_id_valid = default_apic_id_valid, .apic_id_registered = default_apic_id_registered, .delivery_mode = APIC_DELIVERY_MODE_FIXED, --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c @@ -226,7 +226,6 @@ static struct apic apic_x2apic_cluster _ .name = "cluster x2apic", .probe = x2apic_cluster_probe, .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, - .apic_id_valid = x2apic_apic_id_valid, .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = true, --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -124,12 +124,6 @@ static int x2apic_phys_probe(void) return apic == &apic_x2apic_phys; } -/* Common x2apic functions, also used by x2apic_cluster */ -int x2apic_apic_id_valid(u32 apicid) -{ - return apicid <= x2apic_max_apicid; -} - unsigned int x2apic_get_apic_id(unsigned long id) { return id; @@ -150,7 +144,6 @@ static struct apic apic_x2apic_phys __ro .name = "physical x2apic", .probe = x2apic_phys_probe, .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, - .apic_id_valid = x2apic_apic_id_valid, .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = false, --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -780,11 +780,6 @@ static void uv_send_IPI_all(int vector) uv_send_IPI_mask(cpu_online_mask, vector); } -static int uv_apic_id_valid(u32 apicid) -{ - return 1; -} - static u32 set_apic_id(unsigned int id) { return id; @@ -810,7 +805,6 @@ static struct apic apic_x2apic_uv_x __ro .name = "UV large system", .probe = uv_probe, .acpi_madt_oem_check = uv_acpi_madt_oem_check, - .apic_id_valid = uv_apic_id_valid, .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = false, --- a/arch/x86/xen/apic.c +++ b/arch/x86/xen/apic.c @@ -105,11 +105,6 @@ static int xen_madt_oem_check(char *oem_ return xen_pv_domain(); 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Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/kernel/apic/apic_flat_64.c | 2 -- arch/x86/kernel/apic/apic_noop.c | 2 -- arch/x86/kernel/apic/apic_numachip.c | 4 ---- arch/x86/kernel/apic/probe_32.c | 1 - arch/x86/kernel/apic/x2apic_phys.c | 2 -- arch/x86/kernel/apic/x2apic_uv_x.c | 2 -- 6 files changed, 13 deletions(-) --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -87,9 +87,7 @@ static struct apic apic_flat __ro_after_ .disable_esr = 0, - .check_apicid_used = NULL, .init_apic_ldr = default_init_apic_ldr, - .ioapic_phys_id_map = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = flat_phys_pkg_id, --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -65,7 +65,6 @@ static void noop_apic_write(u32 reg, u32 struct apic apic_noop __ro_after_init = { .name = "noop", .probe = noop_probe, - .acpi_madt_oem_check = NULL, .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = true, @@ -80,7 +79,6 @@ struct apic apic_noop __ro_after_init = .max_apic_id = 0xFE, .get_apic_id = noop_get_apic_id, - .set_apic_id = NULL, .calc_dest_apicid = apic_flat_calc_apicid, --- a/arch/x86/kernel/apic/apic_numachip.c +++ b/arch/x86/kernel/apic/apic_numachip.c @@ -227,8 +227,6 @@ static const struct apic apic_numachip1 .disable_esr = 0, - .check_apicid_used = NULL, - .ioapic_phys_id_map = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = numachip_phys_pkg_id, @@ -266,8 +264,6 @@ static const struct apic apic_numachip2 .disable_esr = 0, - .check_apicid_used = NULL, - .ioapic_phys_id_map = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = numachip_phys_pkg_id, --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -48,7 +48,6 @@ static struct apic apic_default __ro_aft .max_apic_id = 0xFE, .get_apic_id = default_get_apic_id, - .set_apic_id = NULL, .calc_dest_apicid = apic_flat_calc_apicid, --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -150,8 +150,6 @@ static struct apic apic_x2apic_phys __ro .disable_esr = 0, - .check_apicid_used = NULL, - .ioapic_phys_id_map = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = x2apic_phys_pkg_id, --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -811,8 +811,6 @@ static struct apic apic_x2apic_uv_x __ro .disable_esr = 0, - .check_apicid_used = NULL, - .ioapic_phys_id_map = NULL, .cpu_present_to_apicid = default_cpu_present_to_apicid, .phys_pkg_id = uv_phys_pkg_id, From patchwork Mon Jul 24 13:35:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124992 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1813239vqg; Mon, 24 Jul 2023 06:51:22 -0700 (PDT) X-Google-Smtp-Source: APBJJlGnj6VzmYoT+xj54GCU+D2MljRM04D/LFc+4Gfmwd8xzuIFLQYQV/EOuolaWThezKxvhdc6 X-Received: by 2002:a17:906:8a43:b0:99b:4bab:2839 with SMTP id gx3-20020a1709068a4300b0099b4bab2839mr10183197ejc.55.1690206682133; Mon, 24 Jul 2023 06:51:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206682; cv=none; d=google.com; s=arc-20160816; b=aOm/fxJJ6rsH+PDQR75NMK5mD4FP/URGAKEdqYGl7l/Tca9mYvtvd5/iVeW3wqlWOM kU04XlXXtJA7JHpJugYvtmYj8j774sizFwluVEpgjq4Dt2Jf0rLIPR+jbG+ZASWjrJP3 oy+Ebb0dAtnIOf5SXKfbtIRVfGld99gGKuiMJ6yjD5kN6rTPLoR1qBmDDC7k5z7TpB/q iRv9+uSzB1aWtjXxfAAnkZbL45ycqCOBJT/2it6t9QhefErLB2PMZW3iUJqx6ceW2PB+ +FNmM9HR3Dv4Sei3orozwLuk+yxW64sj1yldzNCLnsap/IUVYQmgJpMKdl/PInAqun/d bsYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=QxJCd5EJ/bsG/9bO98P8hnP2UT09lEdt9hSBI73j59Y=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=jvYfJ8FLfJegt9ujZ4EWcCc5rngskigM4a+vbZRlQfxZgvj/msNdGEhiazicK2GM4r iUqIodZ6RMXPzxX6RQLzwTcvhRlHaEwx+zu6IvRJdkAHTexIpFfatzXZlbqqnWT6b39p TdiND9eWZ6Yx0rFYPhYhvF8r21rJCuM4IHsT8qwVhuL7qE3aANsLoFPR0+C71wLeC4WK M3/k0L82Rd690nPQQUKSCAW2nMmiUnzx5HRdJZJdkktCWrodEgwHjFYDxJDUHEJ+wSgl 1f09cJKC9IOLkTomkR/OLfkGZxpz1sxmJ0UP/Ber+RqwBcqOkyyzcfxReUkwjvxne/fe 8mcw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=jnht3IlQ; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id kg6-20020a17090776e600b0098d15f24429si6152106ejc.260.2023.07.24.06.50.57; Mon, 24 Jul 2023 06:51:22 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=jnht3IlQ; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231743AbjGXNh1 (ORCPT + 99 others); Mon, 24 Jul 2023 09:37:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37412 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231377AbjGXNgz (ORCPT ); Mon, 24 Jul 2023 09:36:55 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81E0719B7 for ; Mon, 24 Jul 2023 06:35:46 -0700 (PDT) Message-ID: <20230724132047.321976097@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205704; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=QxJCd5EJ/bsG/9bO98P8hnP2UT09lEdt9hSBI73j59Y=; b=jnht3IlQUevCKibeWaI+StPW2K0ERqCZ3clERExc/JIXUbdpCQFx8OBDHoo/DKOqOSS0s/ HhPj/lBlTqE/+bEH736nmA6crF9+IVKNeMjZtG19zxWqGXSSBbRM3V6rwhF/90rbK26FNQ QDQOHwOdegXzQs8sRV8YNGBS024hQxK6bQNpopqnlBWSVHgzHZ96tHWPmw7nlPpD+lm7AC IP+GKIYW+jv71vAH9NKYiJQ8J5GoQIef/x60DPl6uswYMx3Bb4/MwyEOSidCRGiCdwIAVf 43GzCDBJOoTyNaba7Ytw/iTEVtL75hwA3D6hHJknVBldPIMwNcfoSXj4AaB4IQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205704; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=QxJCd5EJ/bsG/9bO98P8hnP2UT09lEdt9hSBI73j59Y=; b=AN5F9Gs/MbSCtB5xfB1PETttRPQEgma/7jh/RyUdZ684f2wmsczwfJCzK45hkPmRXLeKb1 Nj5B9y4GAOZdDdCQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 46/58] x86/apic/noop: Tidy up the code References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:35:03 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310162095425126 X-GMAIL-MSGID: 1772310162095425126 First of all apic_noop can't be probed because it's not registered. So there is no point for implementing a probe callback. The machine is rightfully to die when that is invoked. Remove the gunk and tidy up the other space consuming dummy callbacks. This gunk should simply die. Nothing should ever invoke APIC callbacks once this is installed, But that's a differrent story for another round of cleanups. The comment on top of this file which was intentionally left in place tells exactly why this is needed: voodoo programming. In fact the kernel of today should just outright refuse to boot on a system with no (functional) local APIC. That would spare tons of #ifdeffery and other nonsense. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/kernel/apic/apic_noop.c | 38 ++++++++------------------------------ 1 file changed, 8 insertions(+), 30 deletions(-) --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -8,6 +8,10 @@ * Though in case if apic is disabled (for some reason) we try * to not uglify the caller's code and allow to call (some) apic routines * like self-ipi, etc... + * + * FIXME: Remove this gunk. The above argument which was intentionally left + * in place is silly to begin with because none of the callbacks except for + * APIC::read/write() have a WARN_ON_ONCE() in them. Sigh... */ #include #include @@ -21,35 +25,10 @@ static void noop_send_IPI_allbutself(int static void noop_send_IPI_all(int vector) { } static void noop_send_IPI_self(int vector) { } static void noop_apic_icr_write(u32 low, u32 id) { } - -static int noop_wakeup_secondary_cpu(int apicid, unsigned long start_eip) -{ - return -1; -} - -static u64 noop_apic_icr_read(void) -{ - return 0; -} - -static int noop_phys_pkg_id(int cpuid_apic, int index_msb) -{ - return 0; -} - -static unsigned int noop_get_apic_id(unsigned long x) -{ - return 0; -} - -static int noop_probe(void) -{ - /* - * NOOP apic should not ever be - * enabled via probe routine - */ - return 0; -} +static int noop_wakeup_secondary_cpu(int apicid, unsigned long start_eip) { return -1; } +static u64 noop_apic_icr_read(void) { return 0; } +static int noop_phys_pkg_id(int cpuid_apic, int index_msb) { return 0; } +static unsigned int noop_get_apic_id(unsigned long x) { return 0; } static u32 noop_apic_read(u32 reg) { @@ -64,7 +43,6 @@ static void noop_apic_write(u32 reg, u32 struct apic apic_noop __ro_after_init = { .name = "noop", - .probe = noop_probe, .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = true, From patchwork Mon Jul 24 13:35:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 125002 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1815611vqg; Mon, 24 Jul 2023 06:55:43 -0700 (PDT) X-Google-Smtp-Source: APBJJlGcZ7YLwsw1kGQOKYDGNIesAeGgzazuM4Jyqyf0uCOc4NzV97/vBfYx3juGas58uJrAZYe4 X-Received: by 2002:a05:6402:1a33:b0:51e:234:cc51 with SMTP id be19-20020a0564021a3300b0051e0234cc51mr8182960edb.17.1690206943261; Mon, 24 Jul 2023 06:55:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206943; cv=none; d=google.com; s=arc-20160816; b=lN+yeTKc85AwG0lNoqpMlEdGGVkuPERs2MwmeW4fXlN0nMOCUCq6CAapwueVmg58Np FJFeRVp2h4JS7twz6wAdHHJQtCHwUvo1j9Ns+63YPubtX6Nzb4IPabAgsEIhfQ8Z7+kF 1EyBCxtLrLU8ZyqiQFW8toQ6W1mIlimeuSzqCJBEjT0YQbChTsTg2CGOWRm7COEHQWtf ONiy2d2flqXxhmaGE3UhDddr0b65c0YvzCmQF2JEjuFBTSIfbBnyoLZarS9KPNSRE4JC M2icKru3cLyXtbcNfSwfeazEAF3c42ejNDQ5V4fHMrn+1waWYJ1WDbYc6fnSTWHQufoy ErYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=dj21GG+2OIX1Rs+wEX+47dOzfVF0PHc+KOqDglhdL7U=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=i/hGgwrxfHMCfTH1PwbLpT3wxP3b3cc0U4BhI77mUnGOllEdtSYZ6227jPGQqG6/54 RB3LxC9AcU5JYUpEBxqtOai2dkJqv0m5uSE3f4KF1E0ZwOHce/SsUemc4cy9IVH52Sxe z69gf6R25JQcB7vSIEx/CoMb6dRCaNFlpuK+gGB80GU7vPfrZThtEv6Mr0ZgVhhSQ5tb h7JadY0mu99LkqwfJ9HM0OJZ1u1OMG34eC1dxUrveY+UFOyuwO15w0IN36aA+jWzQFKf 2UFawSpAFCCYiGQPjiqJuwmy4u3YjwsUhWyy3tPlK+AttdyQMhM2Owciz0ZSxvtqzBK8 5ZtQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=2zBWH4Xr; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=T8H9Lxnq; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Use the constants in the eoi() callbacks and remove the arguments. Signed-off-by: Thomas Gleixner Reviewed-by: Wei Liu Acked-by: Peter Zijlstra (Intel) --- arch/x86/hyperv/hv_apic.c | 6 +++--- arch/x86/include/asm/apic.h | 17 +++++++++++------ arch/x86/kernel/apic/apic.c | 8 ++++---- arch/x86/kernel/apic/apic_flat_64.c | 4 ++-- arch/x86/kernel/apic/apic_noop.c | 3 ++- arch/x86/kernel/apic/apic_numachip.c | 4 ++-- arch/x86/kernel/apic/bigsmp_32.c | 2 +- arch/x86/kernel/apic/probe_32.c | 2 +- arch/x86/kernel/apic/x2apic_cluster.c | 2 +- arch/x86/kernel/apic/x2apic_phys.c | 2 +- arch/x86/kernel/apic/x2apic_uv_x.c | 2 +- arch/x86/kernel/kvm.c | 6 +++--- arch/x86/xen/apic.c | 7 ++++++- 13 files changed, 38 insertions(+), 27 deletions(-) --- a/arch/x86/hyperv/hv_apic.c +++ b/arch/x86/hyperv/hv_apic.c @@ -86,14 +86,14 @@ static void hv_apic_write(u32 reg, u32 v } } -static void hv_apic_eoi_write(u32 reg, u32 val) +static void hv_apic_eoi_write(void) { struct hv_vp_assist_page *hvp = hv_vp_assist_page[smp_processor_id()]; if (hvp && (xchg(&hvp->apic_assist, 0) & 0x1)) return; - wrmsr(HV_X64_MSR_EOI, val, 0); + wrmsr(HV_X64_MSR_EOI, APIC_EOI_ACK, 0); } static bool cpu_is_self(int cpu) @@ -310,7 +310,7 @@ void __init hv_apic_init(void) * lazy EOI when available, but the same accessor works for * both xapic and x2apic because the field layout is the same. */ - apic_set_eoi_write(hv_apic_eoi_write); + apic_set_eoi_cb(hv_apic_eoi_write); if (!x2apic_enabled()) { apic->read = hv_apic_read; apic->write = hv_apic_write; --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -98,6 +98,11 @@ static inline u32 native_apic_mem_read(u return *((volatile u32 *)(APIC_BASE + reg)); } +static inline void native_apic_mem_eoi(void) +{ + native_apic_mem_write(APIC_EOI, APIC_EOI_ACK); +} + extern void native_apic_icr_write(u32 low, u32 id); extern u64 native_apic_icr_read(void); @@ -189,7 +194,7 @@ static inline void native_apic_msr_write wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); } -static inline void native_apic_msr_eoi_write(u32 reg, u32 v) +static inline void native_apic_msr_eoi(void) { __wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0); } @@ -250,8 +255,8 @@ struct irq_data; */ struct apic { /* Hotpath functions first */ - void (*eoi_write)(u32 reg, u32 v); - void (*native_eoi_write)(u32 reg, u32 v); + void (*eoi)(void); + void (*native_eoi)(void); void (*write)(u32 reg, u32 v); u32 (*read)(u32 reg); @@ -351,7 +356,7 @@ static inline void apic_write(u32 reg, u static inline void apic_eoi(void) { - apic->eoi_write(APIC_EOI, APIC_EOI_ACK); + apic->eoi(); } static inline u64 apic_icr_read(void) @@ -380,7 +385,7 @@ static inline bool apic_id_valid(u32 api return apic_id <= apic->max_apic_id; } -extern void __init apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)); +extern void __init apic_set_eoi_cb(void (*eoi)(void)); #else /* CONFIG_X86_LOCAL_APIC */ @@ -391,7 +396,7 @@ static inline u64 apic_icr_read(void) { static inline void apic_icr_write(u32 low, u32 high) { } static inline void apic_wait_icr_idle(void) { } static inline u32 safe_apic_wait_icr_idle(void) { return 0; } -static inline void apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)) {} +static inline void apic_set_eoi_cb(void (*eoi)(void)) {} #endif /* CONFIG_X86_LOCAL_APIC */ --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -2502,15 +2502,15 @@ void __init acpi_wake_cpu_handler_update * interrupts disabled, so we know this does not race with actual APIC driver * use. */ -void __init apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)) +void __init apic_set_eoi_cb(void (*eoi)(void)) { struct apic **drv; for (drv = __apicdrivers; drv < __apicdrivers_end; drv++) { /* Should happen once for each apic */ - WARN_ON((*drv)->eoi_write == eoi_write); - (*drv)->native_eoi_write = (*drv)->eoi_write; - (*drv)->eoi_write = eoi_write; + WARN_ON((*drv)->eoi == eoi); + (*drv)->native_eoi = (*drv)->eoi; + (*drv)->eoi = eoi; } } --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -106,7 +106,7 @@ static struct apic apic_flat __ro_after_ .read = native_apic_mem_read, .write = native_apic_mem_write, - .eoi_write = native_apic_mem_write, + .eoi = native_apic_mem_eoi, .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, .wait_icr_idle = apic_mem_wait_icr_idle, @@ -182,7 +182,7 @@ static struct apic apic_physflat __ro_af .read = native_apic_mem_read, .write = native_apic_mem_write, - .eoi_write = native_apic_mem_write, + .eoi = native_apic_mem_eoi, .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, .wait_icr_idle = apic_mem_wait_icr_idle, --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -29,6 +29,7 @@ static int noop_wakeup_secondary_cpu(int static u64 noop_apic_icr_read(void) { return 0; } static int noop_phys_pkg_id(int cpuid_apic, int index_msb) { return 0; } static unsigned int noop_get_apic_id(unsigned long x) { return 0; } +static void noop_apic_eoi(void) { } static u32 noop_apic_read(u32 reg) { @@ -71,7 +72,7 @@ struct apic apic_noop __ro_after_init = .read = noop_apic_read, .write = noop_apic_write, - .eoi_write = noop_apic_write, + .eoi = noop_apic_eoi, .icr_read = noop_apic_icr_read, .icr_write = noop_apic_icr_write, }; --- a/arch/x86/kernel/apic/apic_numachip.c +++ b/arch/x86/kernel/apic/apic_numachip.c @@ -247,7 +247,7 @@ static const struct apic apic_numachip1 .read = native_apic_mem_read, .write = native_apic_mem_write, - .eoi_write = native_apic_mem_write, + .eoi = native_apic_mem_eoi, .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, }; @@ -284,7 +284,7 @@ static const struct apic apic_numachip2 .read = native_apic_mem_read, .write = native_apic_mem_write, - .eoi_write = native_apic_mem_write, + .eoi = native_apic_mem_eoi, .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, }; --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -105,7 +105,7 @@ static struct apic apic_bigsmp __ro_afte .read = native_apic_mem_read, .write = native_apic_mem_write, - .eoi_write = native_apic_mem_write, + .eoi = native_apic_mem_eoi, .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, .wait_icr_idle = apic_mem_wait_icr_idle, --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -60,7 +60,7 @@ static struct apic apic_default __ro_aft .read = native_apic_mem_read, .write = native_apic_mem_write, - .eoi_write = native_apic_mem_write, + .eoi = native_apic_mem_eoi, .icr_read = native_apic_icr_read, .icr_write = native_apic_icr_write, .wait_icr_idle = apic_mem_wait_icr_idle, --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c @@ -254,7 +254,7 @@ static struct apic apic_x2apic_cluster _ .read = native_apic_msr_read, .write = native_apic_msr_write, - .eoi_write = native_apic_msr_eoi_write, + .eoi = native_apic_msr_eoi, .icr_read = native_x2apic_icr_read, .icr_write = native_x2apic_icr_write, }; --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -169,7 +169,7 @@ static struct apic apic_x2apic_phys __ro .read = native_apic_msr_read, .write = native_apic_msr_write, - .eoi_write = native_apic_msr_eoi_write, + .eoi = native_apic_msr_eoi, .icr_read = native_x2apic_icr_read, .icr_write = native_x2apic_icr_write, }; --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -831,7 +831,7 @@ static struct apic apic_x2apic_uv_x __ro .read = native_apic_msr_read, .write = native_apic_msr_write, - .eoi_write = native_apic_msr_eoi_write, + .eoi = native_apic_msr_eoi, .icr_read = native_x2apic_icr_read, .icr_write = native_x2apic_icr_write, }; --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -332,7 +332,7 @@ static void kvm_register_steal_time(void static DEFINE_PER_CPU_DECRYPTED(unsigned long, kvm_apic_eoi) = KVM_PV_EOI_DISABLED; -static notrace void kvm_guest_apic_eoi_write(u32 reg, u32 val) +static notrace void kvm_guest_apic_eoi_write(void) { /** * This relies on __test_and_clear_bit to modify the memory @@ -343,7 +343,7 @@ static notrace void kvm_guest_apic_eoi_w */ if (__test_and_clear_bit(KVM_PV_EOI_BIT, this_cpu_ptr(&kvm_apic_eoi))) return; - apic->native_eoi_write(APIC_EOI, APIC_EOI_ACK); + apic->native_eoi(); } static void kvm_guest_cpu_init(void) @@ -825,7 +825,7 @@ static void __init kvm_guest_init(void) } if (kvm_para_has_feature(KVM_FEATURE_PV_EOI)) - apic_set_eoi_write(kvm_guest_apic_eoi_write); + apic_set_eoi_cb(kvm_guest_apic_eoi_write); if (kvm_para_has_feature(KVM_FEATURE_ASYNC_PF_INT) && kvmapf) { static_branch_enable(&kvm_async_pf_enabled); --- a/arch/x86/xen/apic.c +++ b/arch/x86/xen/apic.c @@ -81,6 +81,11 @@ static void xen_apic_write(u32 reg, u32 WARN(1,"register: %x, value: %x\n", reg, val); } +static void xen_apic_eoi(void) +{ + WARN_ON_ONCE(1); +} + static u64 xen_apic_icr_read(void) { return 0; @@ -147,7 +152,7 @@ static struct apic xen_pv_apic = { #endif .read = xen_apic_read, .write = xen_apic_write, - .eoi_write = xen_apic_write, + .eoi = xen_apic_eoi, .icr_read = xen_apic_icr_read, .icr_write = xen_apic_icr_write, From patchwork Mon Jul 24 13:35:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 125019 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1834721vqg; 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Signed-off-by: Thomas Gleixner Reviewed-by: Wei Liu Acked-by: Peter Zijlstra (Intel) --- arch/x86/hyperv/hv_init.c | 2 +- arch/x86/include/asm/apic.h | 10 ---------- arch/x86/kernel/apic/apic.c | 10 +++++----- arch/x86/kernel/apic/io_apic.c | 4 ++-- arch/x86/kernel/apic/vector.c | 4 ++-- arch/x86/kernel/cpu/acrn.c | 2 +- arch/x86/kernel/cpu/mce/amd.c | 2 +- arch/x86/kernel/cpu/mce/threshold.c | 2 +- arch/x86/kernel/cpu/mshyperv.c | 4 ++-- arch/x86/kernel/irq.c | 14 +++++++------- arch/x86/kernel/irq_work.c | 2 +- arch/x86/kernel/kvm.c | 2 +- arch/x86/kernel/smp.c | 8 ++++---- arch/x86/xen/enlighten_hvm.c | 2 +- 14 files changed, 29 insertions(+), 39 deletions(-) --- a/arch/x86/hyperv/hv_init.c +++ b/arch/x86/hyperv/hv_init.c @@ -161,7 +161,7 @@ static inline bool hv_reenlightenment_av DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_reenlightenment) { - ack_APIC_irq(); + apic_eoi(); inc_irq_stat(irq_hv_reenlightenment_count); schedule_delayed_work(&hv_reenlightenment_work, HZ/10); } --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -402,16 +402,6 @@ static inline void apic_set_eoi(void (*e extern void apic_ack_irq(struct irq_data *data); -static inline void ack_APIC_irq(void) -{ - /* - * ack_APIC_irq() actually gets compiled as a single instruction - * ... yummie. - */ - apic_eoi(); -} - - static inline bool lapic_vector_set_in_irr(unsigned int vector) { u32 irr = apic_read(APIC_IRR + (vector / 32 * 0x10)); --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1076,7 +1076,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_apic_timer { struct pt_regs *old_regs = set_irq_regs(regs); - ack_APIC_irq(); + apic_eoi(); trace_local_timer_entry(LOCAL_TIMER_VECTOR); local_apic_timer_interrupt(); trace_local_timer_exit(LOCAL_TIMER_VECTOR); @@ -1480,7 +1480,7 @@ static bool apic_check_and_ack(union api * per set bit. */ for_each_set_bit(bit, isr->map, APIC_IR_BITS) - ack_APIC_irq(); + apic_eoi(); return true; } @@ -1492,7 +1492,7 @@ static bool apic_check_and_ack(union api * interrupt from previous kernel might still have ISR bit set. * * Most probably by now the CPU has serviced that pending interrupt and it - * might not have done the ack_APIC_irq() because it thought, interrupt + * might not have done the apic_eoi() because it thought, interrupt * came from i8259 as ExtInt. LAPIC did not get EOI so it does not clear * the ISR bit and cpu thinks it has already serviced the interrupt. Hence * a vector might get locked. It was noticed for timer irq (vector @@ -2146,7 +2146,7 @@ static noinline void handle_spurious_int if (v & (1 << (vector & 0x1f))) { pr_info("Spurious interrupt (vector 0x%02x) on CPU#%d. Acked\n", vector, smp_processor_id()); - ack_APIC_irq(); + apic_eoi(); } else { pr_info("Spurious interrupt (vector 0x%02x) on CPU#%d. Not pending!\n", vector, smp_processor_id()); @@ -2197,7 +2197,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_error_inte if (lapic_get_maxlvt() > 3) /* Due to the Pentium erratum 3AP. */ apic_write(APIC_ESR, 0); v = apic_read(APIC_ESR); - ack_APIC_irq(); + apic_eoi(); atomic_inc(&irq_err_count); apic_printk(APIC_DEBUG, KERN_DEBUG "APIC error on CPU%d: %02x", --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -1823,7 +1823,7 @@ static void ioapic_ack_level(struct irq_ * We must acknowledge the irq before we move it or the acknowledge will * not propagate properly. */ - ack_APIC_irq(); + apic_eoi(); /* * Tail end of clearing remote IRR bit (either by delivering the EOI @@ -2046,7 +2046,7 @@ static void unmask_lapic_irq(struct irq_ static void ack_lapic_irq(struct irq_data *data) { - ack_APIC_irq(); + apic_eoi(); } static struct irq_chip lapic_chip __read_mostly = { --- a/arch/x86/kernel/apic/vector.c +++ b/arch/x86/kernel/apic/vector.c @@ -885,7 +885,7 @@ static int apic_retrigger_irq(struct irq void apic_ack_irq(struct irq_data *irqd) { irq_move_irq(irqd); - ack_APIC_irq(); + apic_eoi(); } void apic_ack_edge(struct irq_data *irqd) @@ -940,7 +940,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_irq_move_c struct apic_chip_data *apicd; struct hlist_node *tmp; - ack_APIC_irq(); + apic_eoi(); /* Prevent vectors vanishing under us */ raw_spin_lock(&vector_lock); --- a/arch/x86/kernel/cpu/acrn.c +++ b/arch/x86/kernel/cpu/acrn.c @@ -51,7 +51,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_acrn_hv_ca * will block the interrupt whose vector is lower than * HYPERVISOR_CALLBACK_VECTOR. */ - ack_APIC_irq(); + apic_eoi(); inc_irq_stat(irq_hv_callback_count); if (acrn_intr_handler) --- a/arch/x86/kernel/cpu/mce/amd.c +++ b/arch/x86/kernel/cpu/mce/amd.c @@ -759,7 +759,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_deferred_e inc_irq_stat(irq_deferred_error_count); deferred_error_int_vector(); trace_deferred_error_apic_exit(DEFERRED_ERROR_VECTOR); - ack_APIC_irq(); + apic_eoi(); } /* --- a/arch/x86/kernel/cpu/mce/threshold.c +++ b/arch/x86/kernel/cpu/mce/threshold.c @@ -27,5 +27,5 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_threshold) inc_irq_stat(irq_threshold_count); mce_threshold_vector(); trace_threshold_apic_exit(THRESHOLD_APIC_VECTOR); - ack_APIC_irq(); + apic_eoi(); } --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -119,7 +119,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_cal vmbus_handler(); if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED) - ack_APIC_irq(); + apic_eoi(); set_irq_regs(old_regs); } @@ -147,7 +147,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_sti if (hv_stimer0_handler) hv_stimer0_handler(); add_interrupt_randomness(HYPERV_STIMER0_VECTOR); - ack_APIC_irq(); + apic_eoi(); set_irq_regs(old_regs); } --- a/arch/x86/kernel/irq.c +++ b/arch/x86/kernel/irq.c @@ -49,7 +49,7 @@ void ack_bad_irq(unsigned int irq) * completely. * But only ack when the APIC is enabled -AK */ - ack_APIC_irq(); + apic_eoi(); } #define irq_stats(x) (&per_cpu(irq_stat, x)) @@ -256,7 +256,7 @@ DEFINE_IDTENTRY_IRQ(common_interrupt) if (likely(!IS_ERR_OR_NULL(desc))) { handle_irq(desc, regs); } else { - ack_APIC_irq(); + apic_eoi(); if (desc == VECTOR_UNUSED) { pr_emerg_ratelimited("%s: %d.%u No irq handler for vector\n", @@ -280,7 +280,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_x86_platfo { struct pt_regs *old_regs = set_irq_regs(regs); - ack_APIC_irq(); + apic_eoi(); trace_x86_platform_ipi_entry(X86_PLATFORM_IPI_VECTOR); inc_irq_stat(x86_platform_ipis); if (x86_platform_ipi_callback) @@ -310,7 +310,7 @@ EXPORT_SYMBOL_GPL(kvm_set_posted_intr_wa */ DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_kvm_posted_intr_ipi) { - ack_APIC_irq(); + apic_eoi(); inc_irq_stat(kvm_posted_intr_ipis); } @@ -319,7 +319,7 @@ DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_kvm */ DEFINE_IDTENTRY_SYSVEC(sysvec_kvm_posted_intr_wakeup_ipi) { - ack_APIC_irq(); + apic_eoi(); inc_irq_stat(kvm_posted_intr_wakeup_ipis); kvm_posted_intr_wakeup_handler(); } @@ -329,7 +329,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_kvm_posted */ DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_kvm_posted_intr_nested_ipi) { - ack_APIC_irq(); + apic_eoi(); inc_irq_stat(kvm_posted_intr_nested_ipis); } #endif @@ -401,6 +401,6 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_thermal) inc_irq_stat(irq_thermal_count); smp_thermal_vector(); trace_thermal_apic_exit(THERMAL_APIC_VECTOR); - ack_APIC_irq(); + apic_eoi(); } #endif --- a/arch/x86/kernel/irq_work.c +++ b/arch/x86/kernel/irq_work.c @@ -16,7 +16,7 @@ #ifdef CONFIG_X86_LOCAL_APIC DEFINE_IDTENTRY_SYSVEC(sysvec_irq_work) { - ack_APIC_irq(); + apic_eoi(); trace_irq_work_entry(IRQ_WORK_VECTOR); inc_irq_stat(apic_irq_work_irqs); irq_work_run(); --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -291,7 +291,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_kvm_asyncp struct pt_regs *old_regs = set_irq_regs(regs); u32 token; - ack_APIC_irq(); + apic_eoi(); inc_irq_stat(irq_hv_callback_count); --- a/arch/x86/kernel/smp.c +++ b/arch/x86/kernel/smp.c @@ -135,7 +135,7 @@ static int smp_stop_nmi_callback(unsigne */ DEFINE_IDTENTRY_SYSVEC(sysvec_reboot) { - ack_APIC_irq(); + apic_eoi(); cpu_emergency_disable_virtualization(); stop_this_cpu(NULL); } @@ -268,7 +268,7 @@ static void native_stop_other_cpus(int w */ DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_reschedule_ipi) { - ack_APIC_irq(); + apic_eoi(); trace_reschedule_entry(RESCHEDULE_VECTOR); inc_irq_stat(irq_resched_count); scheduler_ipi(); @@ -277,7 +277,7 @@ DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_res DEFINE_IDTENTRY_SYSVEC(sysvec_call_function) { - ack_APIC_irq(); + apic_eoi(); trace_call_function_entry(CALL_FUNCTION_VECTOR); inc_irq_stat(irq_call_count); generic_smp_call_function_interrupt(); @@ -286,7 +286,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_call_funct DEFINE_IDTENTRY_SYSVEC(sysvec_call_function_single) { - ack_APIC_irq(); + apic_eoi(); trace_call_function_single_entry(CALL_FUNCTION_SINGLE_VECTOR); inc_irq_stat(irq_call_count); generic_smp_call_function_single_interrupt(); --- a/arch/x86/xen/enlighten_hvm.c +++ b/arch/x86/xen/enlighten_hvm.c @@ -132,7 +132,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_xen_hvm_ca struct pt_regs *old_regs = set_irq_regs(regs); if (xen_percpu_upcall) - ack_APIC_irq(); + apic_eoi(); inc_irq_stat(irq_hv_callback_count); From patchwork Mon Jul 24 13:35:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124965 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1806488vqg; Mon, 24 Jul 2023 06:39:29 -0700 (PDT) X-Google-Smtp-Source: APBJJlH0z/DLuDB9uiDemYe0RrN3ikiJ4Ih5pfNvMvBj/QcZ4R3nnrkXqa5if/FQnRLGour9dcYX X-Received: by 2002:adf:f703:0:b0:314:50d:4540 with SMTP id r3-20020adff703000000b00314050d4540mr7512582wrp.18.1690205969631; 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Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 6 ++++++ arch/x86/kernel/kvm.c | 2 +- 2 files changed, 7 insertions(+), 1 deletion(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -359,6 +359,11 @@ static inline void apic_eoi(void) apic->eoi(); } +static inline void apic_native_eoi(void) +{ + apic->native_eoi(); +} + static inline u64 apic_icr_read(void) { return apic->icr_read(); @@ -397,6 +402,7 @@ static inline void apic_icr_write(u32 lo static inline void apic_wait_icr_idle(void) { } static inline u32 safe_apic_wait_icr_idle(void) { return 0; } static inline void apic_set_eoi_cb(void (*eoi)(void)) {} +static inline void apic_native_eoi(void) { WARN_ON_ONCE(1); } #endif /* CONFIG_X86_LOCAL_APIC */ --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -343,7 +343,7 @@ static notrace void kvm_guest_apic_eoi_w */ if (__test_and_clear_bit(KVM_PV_EOI_BIT, this_cpu_ptr(&kvm_apic_eoi))) return; - apic->native_eoi(); + apic_native_eoi(); } static void kvm_guest_cpu_init(void) From patchwork Mon Jul 24 13:35:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124967 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1806800vqg; Mon, 24 Jul 2023 06:40:03 -0700 (PDT) X-Google-Smtp-Source: APBJJlH9eugWzeAzsExNa168OL02DtFQ7grFIpLPG9SJO+WIfIJvD497PIoH2Ug0Oi5o+UndJJkL X-Received: by 2002:a05:6402:5249:b0:51e:5aac:6bad with SMTP id t9-20020a056402524900b0051e5aac6badmr16860675edd.11.1690206003347; Mon, 24 Jul 2023 06:40:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206003; cv=none; d=google.com; s=arc-20160816; b=VuAkhEvmWud/k/scG7USpoMzqKi09s6fsOx30Fd65FgDPbf7bAryq5nbXys1KS5ILt EDnZ2BqucFDxVyVYDAZVJB2uhfI3emubSCFy/15cWQZmNAi3tHH9DGX4RwAYDKFRnEsq yK1plMxBkUhAAqJN/9w2ngExEhpuj8nxXXHsqPJcBDDWqiSv6pxklFgtM0aQ+uqFz5G0 fYwhtnc+Oxxs1aA822brLvVpYp2bFtmkhGn3475JoFvrPktpDBuzxAzmSOOeRD4VG4qr d49iSzvkytLcIozV33BCeI6r+22gBZgKLQ4jA7S3+u7ETQeAgC3dEg/8NWycSkLc7E7W pNcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=u1MBAiZCltHmWzuaN06FA6y4i5aqgal/njyPH8pNWsw=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=t2LY6y8CpxFfEyEdlgmUV0S4BP2bxiZYfmXeUcJthqaJVAXmfHLJhirk3f3tDye7v4 0/gc9sXmdYIIh08rknZ20nlRHo0gcr4ptgXuwvzIlx6opNwE7SvlVfghGIbFqqkj1V44 MoDv462T8EEiYN6vAsLGMg141BFH4SlILOpFu3Vr+9t64lhEpG4kTHzxzh2oVjGTk424 qdU4k8jNcZU+0LSXvhGB4NhRwsG8xfcX6vmE8P7QVBb63wF0EEmjHu2Celd8M5j2+ksn ag2s8jQnskjwvrwGWoIrCYu+yO/fh/kG3Yrxmmg9w0C3KNxwJqLZ9r/K1dPGRMrYnVLE 3Gbw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=u9kgxt8S; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b="eA/edTzH"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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Lift apic_install_drivers() from probe_64.c and convert all places which switch the apic instance by storing the pointer to use apic_install_driver() as a first step. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 2 + arch/x86/kernel/apic/Makefile | 2 - arch/x86/kernel/apic/apic.c | 31 ----------------------- arch/x86/kernel/apic/apic_flat_64.c | 6 ---- arch/x86/kernel/apic/bigsmp_32.c | 6 +--- arch/x86/kernel/apic/init.c | 47 ++++++++++++++++++++++++++++++++++++ arch/x86/kernel/apic/probe_32.c | 5 +-- arch/x86/kernel/apic/probe_64.c | 13 --------- arch/x86/xen/apic.c | 10 ++----- 9 files changed, 59 insertions(+), 63 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -344,6 +344,8 @@ extern int lapic_can_unplug_cpu(void); #ifdef CONFIG_X86_LOCAL_APIC +void __init apic_install_driver(struct apic *driver); + static inline u32 apic_read(u32 reg) { return apic->read(reg); --- a/arch/x86/kernel/apic/Makefile +++ b/arch/x86/kernel/apic/Makefile @@ -7,7 +7,7 @@ # In particualr, smp_apic_timer_interrupt() is called in random places. KCOV_INSTRUMENT := n -obj-$(CONFIG_X86_LOCAL_APIC) += apic.o apic_common.o apic_noop.o ipi.o vector.o +obj-$(CONFIG_X86_LOCAL_APIC) += apic.o apic_common.o apic_noop.o ipi.o vector.o init.o obj-y += hw_nmi.o obj-$(CONFIG_X86_IO_APIC) += io_apic.o --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -236,8 +236,7 @@ static int modern_apic(void) */ static void __init apic_disable(void) { - pr_info("APIC: switched to apic NOOP\n"); - apic = &apic_noop; + apic_install_driver(&apic_noop); } void native_apic_icr_write(u32 low, u32 id) @@ -2486,34 +2485,6 @@ u32 x86_msi_msg_get_destid(struct msi_ms } EXPORT_SYMBOL_GPL(x86_msi_msg_get_destid); -#ifdef CONFIG_X86_64 -void __init acpi_wake_cpu_handler_update(wakeup_cpu_handler handler) -{ - struct apic **drv; - - for (drv = __apicdrivers; drv < __apicdrivers_end; drv++) - (*drv)->wakeup_secondary_cpu_64 = handler; -} -#endif - -/* - * Override the generic EOI implementation with an optimized version. - * Only called during early boot when only one CPU is active and with - * interrupts disabled, so we know this does not race with actual APIC driver - * use. - */ -void __init apic_set_eoi_cb(void (*eoi)(void)) -{ - struct apic **drv; - - for (drv = __apicdrivers; drv < __apicdrivers_end; drv++) { - /* Should happen once for each apic */ - WARN_ON((*drv)->eoi == eoi); - (*drv)->native_eoi = (*drv)->eoi; - (*drv)->eoi = eoi; - } -} - static void __init apic_bsp_up_setup(void) { #ifdef CONFIG_X86_64 --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -143,11 +143,7 @@ static int physflat_acpi_madt_oem_check( static int physflat_probe(void) { - if (apic == &apic_physflat || num_possible_cpus() > 8 || - jailhouse_paravirt()) - return 1; - - return 0; + return apic == &apic_physflat || num_possible_cpus() > 8 || jailhouse_paravirt(); } static struct apic apic_physflat __ro_after_init = { --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -119,10 +119,8 @@ bool __init apic_bigsmp_possible(bool cm void __init apic_bigsmp_force(void) { - if (apic != &apic_bigsmp) { - apic = &apic_bigsmp; - pr_info("Overriding APIC driver with bigsmp\n"); - } + if (apic != &apic_bigsmp) + apic_install_driver(&apic_bigsmp); } apic_driver(apic_bigsmp); --- /dev/null +++ b/arch/x86/kernel/apic/init.c @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0-only +#define pr_fmt(fmt) "APIC: " fmt + +#include + +#include "local.h" + +void __init apic_install_driver(struct apic *driver) +{ + if (apic == driver) + return; + + apic = driver; + + if (IS_ENABLED(CONFIG_X86_X2APIC) && apic->x2apic_set_max_apicid) + apic->max_apic_id = x2apic_max_apicid; + + pr_info("Switched APIC routing to: %s\n", driver->name); +} + +#ifdef CONFIG_X86_64 +void __init acpi_wake_cpu_handler_update(wakeup_cpu_handler handler) +{ + struct apic **drv; + + for (drv = __apicdrivers; drv < __apicdrivers_end; drv++) + (*drv)->wakeup_secondary_cpu_64 = handler; +} +#endif + +/* + * Override the generic EOI implementation with an optimized version. + * Only called during early boot when only one CPU is active and with + * interrupts disabled, so we know this does not race with actual APIC driver + * use. + */ +void __init apic_set_eoi_cb(void (*eoi)(void)) +{ + struct apic **drv; + + for (drv = __apicdrivers; drv < __apicdrivers_end; drv++) { + /* Should happen once for each apic */ + WARN_ON((*drv)->eoi == eoi); + (*drv)->native_eoi = (*drv)->eoi; + (*drv)->eoi = eoi; + } +} --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -82,7 +82,7 @@ static int __init parse_apic(char *arg) for (drv = __apicdrivers; drv < __apicdrivers_end; drv++) { if (!strcmp((*drv)->name, arg)) { - apic = *drv; + apic_install_driver(*drv); cmdline_apic = 1; return 0; } @@ -129,7 +129,7 @@ void __init x86_32_probe_apic(void) for (drv = __apicdrivers; drv < __apicdrivers_end; drv++) { if ((*drv)->probe()) { - apic = *drv; + apic_install_driver(*drv); break; } } @@ -137,5 +137,4 @@ void __init x86_32_probe_apic(void) if (drv == __apicdrivers_end) panic("Didn't find an APIC driver"); } - printk(KERN_INFO "Using APIC driver %s\n", apic->name); } --- a/arch/x86/kernel/apic/probe_64.c +++ b/arch/x86/kernel/apic/probe_64.c @@ -13,19 +13,6 @@ #include "local.h" -static __init void apic_install_driver(struct apic *driver) -{ - if (apic == driver) - return; - - apic = driver; - - if (IS_ENABLED(CONFIG_X86_X2APIC) && apic->x2apic_set_max_apicid) - apic->max_apic_id = x2apic_max_apicid; - - pr_info("Switched APIC routing to %s:\n", apic->name); -} - /* Select the appropriate APIC driver */ void __init x86_64_probe_apic(void) { --- a/arch/x86/xen/apic.c +++ b/arch/x86/xen/apic.c @@ -160,20 +160,16 @@ static struct apic xen_pv_apic = { static void __init xen_apic_check(void) { - if (apic == &xen_pv_apic) - return; - - pr_info("Switched APIC routing from %s to %s.\n", apic->name, - xen_pv_apic.name); - apic = &xen_pv_apic; + apic_install_driver(&xen_pv_apic); } + void __init xen_init_apic(void) { x86_apic_ops.io_apic_read = xen_io_apic_read; /* On PV guests the APIC CPUID bit is disabled so none of the * routines end up executing. */ if (!xen_initial_domain()) - apic = &xen_pv_apic; + apic_install_driver(&xen_pv_apic); x86_platform.apic_post_init = xen_apic_check; } From patchwork Mon Jul 24 13:35:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124978 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1812259vqg; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id v16-20020aa7cd50000000b0051e0ef8936asi6640945edw.291.2023.07.24.06.49.06; Mon, 24 Jul 2023 06:49:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=zptSSBtO; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231822AbjGXNjF (ORCPT + 99 others); Mon, 24 Jul 2023 09:39:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37468 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231821AbjGXNi1 (ORCPT ); Mon, 24 Jul 2023 09:38:27 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 59D453C27 for ; Mon, 24 Jul 2023 06:36:49 -0700 (PDT) Message-ID: <20230724132047.611558040@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205713; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=4GFxWOIrpTfqT5fCSkz52w3aacX6yQNA53PA8dS4E0E=; b=zptSSBtO1rWwzGKir+or4dSXyIMymZXnRM5fAuXjhYH/UIPw/y/RozcRA4zvsHrzKVklI3 Olh1RbHVdR4Z/Aw3KexJuLkOCo/aJdj2uPoRi31J5PIXokFGCAUMvsEWaSrDrYH1tDb7a9 Xv89knTWJQ8CazKkozhWtI89hEzkSf2nyyZoeAiiMOw6Eq3/BwM4B9DKgFn845ZoBabcU6 +Z3M7GPxQSBNopy7Qji13fryOt6hg1hB1OKoK+jPCnJwqn5zBJIJLJnpT6Pg9pwekZdUbN Zlmt9iiSHlJz6Q0ysv8GR/u0eg8kK1fAY2xxnA9f6CGnDM8j8WuJUXTVGPa5UQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205713; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=4GFxWOIrpTfqT5fCSkz52w3aacX6yQNA53PA8dS4E0E=; b=gcKuNfWVF0T7yp825uFEHKQaJHvli5qi5psu7QM2lz/GftTXdUck64n7QcmhEzDoK0r5Ga HAmbFg9MlQGMMVAg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 51/58] x86/apic: Provide apic_update_callback() References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:35:12 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310045648947916 X-GMAIL-MSGID: 1772310045648947916 There are already two variants of update mechanism for particular callbacks and virtualization just writes into the data structure. Provide an interface and use a shadow data structure to preserve callbacks so they can be reapplied when the APIC driver is replaced. The extra data structure is intentional as any new callback needs to be also updated in the core code. This also prepares for static calls. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 28 ++++++++++++++++++++++++++++ arch/x86/kernel/apic/init.c | 39 ++++++++++++++++++++++++++++++++++++++- arch/x86/kernel/setup.c | 2 ++ 3 files changed, 68 insertions(+), 1 deletion(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -308,6 +308,23 @@ struct apic { char *name; }; +struct apic_override { + void (*eoi)(void); + void (*native_eoi)(void); + void (*write)(u32 reg, u32 v); + u32 (*read)(u32 reg); + void (*send_IPI)(int cpu, int vector); + void (*send_IPI_mask)(const struct cpumask *mask, int vector); + void (*send_IPI_mask_allbutself)(const struct cpumask *msk, int vec); + void (*send_IPI_allbutself)(int vector); + void (*send_IPI_all)(int vector); + void (*send_IPI_self)(int vector); + u64 (*icr_read)(void); + void (*icr_write)(u32 low, u32 high); + int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip); + int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip); +}; + /* * Pointer to the local APIC driver in use on this system (there's * always just one such driver in use - the kernel decides via an @@ -343,9 +360,17 @@ extern int lapic_can_unplug_cpu(void); #endif #ifdef CONFIG_X86_LOCAL_APIC +extern struct apic_override __x86_apic_override; +void __init apic_setup_apic_calls(void); void __init apic_install_driver(struct apic *driver); +#define apic_update_callback(_callback, _fn) { \ + __x86_apic_override._callback = _fn; \ + apic->_callback = _fn; \ + pr_info("APIC: %s() replaced with %ps()\n", #_callback, _fn); \ +} + static inline u32 apic_read(u32 reg) { return apic->read(reg); @@ -405,6 +430,9 @@ static inline void apic_wait_icr_idle(vo static inline u32 safe_apic_wait_icr_idle(void) { return 0; } static inline void apic_set_eoi_cb(void (*eoi)(void)) {} static inline void apic_native_eoi(void) { WARN_ON_ONCE(1); } +static inline void apic_setup_apic_calls(void) { } + +#define apic_update_callback(_callback, _fn) do { } while (0) #endif /* CONFIG_X86_LOCAL_APIC */ --- a/arch/x86/kernel/apic/init.c +++ b/arch/x86/kernel/apic/init.c @@ -5,6 +5,37 @@ #include "local.h" +/* The container for function call overrides */ +struct apic_override __x86_apic_override __initdata; + +#define apply_override(__cb) \ + if (__x86_apic_override.__cb) \ + apic->__cb = __x86_apic_override.__cb + +static __init void restore_override_callbacks(void) +{ + apply_override(eoi); + apply_override(native_eoi); + apply_override(write); + apply_override(read); + apply_override(send_IPI); + apply_override(send_IPI_mask); + apply_override(send_IPI_mask_allbutself); + apply_override(send_IPI_allbutself); + apply_override(send_IPI_all); + apply_override(send_IPI_self); + apply_override(icr_read); + apply_override(icr_write); + apply_override(wakeup_secondary_cpu); + apply_override(wakeup_secondary_cpu_64); +} + +void __init apic_setup_apic_calls(void) +{ + /* Ensure that the default APIC has native_eoi populated */ + apic->native_eoi = apic->eoi; +} + void __init apic_install_driver(struct apic *driver) { if (apic == driver) @@ -15,6 +46,13 @@ void __init apic_install_driver(struct a if (IS_ENABLED(CONFIG_X86_X2APIC) && apic->x2apic_set_max_apicid) apic->max_apic_id = x2apic_max_apicid; + /* Copy the original eoi() callback as KVM/HyperV might overwrite it */ + if (!apic->native_eoi) + apic->native_eoi = apic->eoi; + + /* Apply any already installed callback overrides */ + restore_override_callbacks(); + pr_info("Switched APIC routing to: %s\n", driver->name); } @@ -41,7 +79,6 @@ void __init apic_set_eoi_cb(void (*eoi)( for (drv = __apicdrivers; drv < __apicdrivers_end; drv++) { /* Should happen once for each apic */ WARN_ON((*drv)->eoi == eoi); - (*drv)->native_eoi = (*drv)->eoi; (*drv)->eoi = eoi; } } --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -1017,6 +1017,8 @@ void __init setup_arch(char **cmdline_p) x86_report_nx(); + apic_setup_apic_calls(); + if (acpi_mps_check()) { #ifdef CONFIG_X86_LOCAL_APIC apic_is_disabled = true; From patchwork Mon Jul 24 13:35:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124997 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1814124vqg; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id mc13-20020a170906eb4d00b00991ddce682esi6198178ejb.305.2023.07.24.06.52.36; Mon, 24 Jul 2023 06:53:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="x/TM2AVl"; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229495AbjGXNiG (ORCPT + 99 others); Mon, 24 Jul 2023 09:38:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231153AbjGXNhf (ORCPT ); Mon, 24 Jul 2023 09:37:35 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6C71F30EC for ; Mon, 24 Jul 2023 06:36:13 -0700 (PDT) Message-ID: <20230724132047.667644433@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205715; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=Nbvmnz+q7lfNjTCb/pF8Ed6DjVtg5/qR2ISN11UnuKc=; b=x/TM2AVlAMspr0k4XPiVpGv4qqKGxWAjwzMtqbvdQoC2PCngvuwEH76vwlPhu8NcQ0MMT1 iY+btmzfOwI7dLoIZdZweSfdmCPNfY/YX+8NWhWm2Dnv1zzJb+pVoW0umR4+Nze2knnofU vggEtvf7r4ruXT63hnFPbcqtwMLO1BoNawaI0phRZ9XTOm+FpugEBohMe7eqWUFmtlT89Y qGRq5jQSwPB9Kxma0DZqow6CX3klJsijOhvIPk7vpxMdzp0ZFmtRIJrZzUCFXffB668HBP WTMknH9qbOyrVBg/4qCm+U0em5oyrmTiq2ebCkhD3FDC7+45W2oG+lt93MQL6Q== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205715; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=Nbvmnz+q7lfNjTCb/pF8Ed6DjVtg5/qR2ISN11UnuKc=; b=RvrRRYAZAKmZUkQxtFTZwGYvaOYPJoNVkt9p8f/9Fsh7RpaCVa5arWT6SYxcme0ukB5qti 7x6c7Nj1Z4FUYjAA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 52/58] x86/apic: Replace acpi_wake_cpu_handler_update() and apic_set_eoi_cb() References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:35:14 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310266553286547 X-GMAIL-MSGID: 1772310266553286547 Switch them over to apic_update_callback() and remove the code. Signed-off-by: Thomas Gleixner Reviewed-by: Wei Liu Acked-by: Peter Zijlstra (Intel) --- arch/x86/hyperv/hv_apic.c | 2 +- arch/x86/hyperv/hv_vtl.c | 2 +- arch/x86/include/asm/apic.h | 3 --- arch/x86/kernel/acpi/boot.c | 2 +- arch/x86/kernel/apic/init.c | 27 --------------------------- arch/x86/kernel/kvm.c | 4 ++-- 6 files changed, 5 insertions(+), 35 deletions(-) --- a/arch/x86/hyperv/hv_apic.c +++ b/arch/x86/hyperv/hv_apic.c @@ -310,7 +310,7 @@ void __init hv_apic_init(void) * lazy EOI when available, but the same accessor works for * both xapic and x2apic because the field layout is the same. */ - apic_set_eoi_cb(hv_apic_eoi_write); + apic_update_callback(eoi, hv_apic_eoi_write); if (!x2apic_enabled()) { apic->read = hv_apic_read; apic->write = hv_apic_write; --- a/arch/x86/hyperv/hv_vtl.c +++ b/arch/x86/hyperv/hv_vtl.c @@ -222,7 +222,7 @@ static int __init hv_vtl_early_init(void "Please add 'noxsave' to the kernel command line.\n"); real_mode_header = &hv_vtl_real_mode_header; - apic->wakeup_secondary_cpu_64 = hv_vtl_wakeup_secondary_cpu; + apic_update_callback(wakeup_secondary_cpu_64, hv_vtl_wakeup_secondary_cpu); return 0; } --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -417,8 +417,6 @@ static inline bool apic_id_valid(u32 api return apic_id <= apic->max_apic_id; } -extern void __init apic_set_eoi_cb(void (*eoi)(void)); - #else /* CONFIG_X86_LOCAL_APIC */ static inline u32 apic_read(u32 reg) { return 0; } @@ -478,7 +476,6 @@ static inline unsigned int read_apic_id( #ifdef CONFIG_X86_64 typedef int (*wakeup_cpu_handler)(int apicid, unsigned long start_eip); -extern void acpi_wake_cpu_handler_update(wakeup_cpu_handler handler); extern int default_acpi_madt_oem_check(char *, char *); extern void x86_64_probe_apic(void); #else --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c @@ -1174,7 +1174,7 @@ static int __init acpi_parse_mp_wake(uni acpi_mp_wake_mailbox_paddr = mp_wake->base_address; - acpi_wake_cpu_handler_update(acpi_wakeup_cpu); + apic_update_callback(wakeup_secondary_cpu_64, acpi_wakeup_cpu); return 0; } --- a/arch/x86/kernel/apic/init.c +++ b/arch/x86/kernel/apic/init.c @@ -55,30 +55,3 @@ void __init apic_install_driver(struct a pr_info("Switched APIC routing to: %s\n", driver->name); } - -#ifdef CONFIG_X86_64 -void __init acpi_wake_cpu_handler_update(wakeup_cpu_handler handler) -{ - struct apic **drv; - - for (drv = __apicdrivers; drv < __apicdrivers_end; drv++) - (*drv)->wakeup_secondary_cpu_64 = handler; -} -#endif - -/* - * Override the generic EOI implementation with an optimized version. - * Only called during early boot when only one CPU is active and with - * interrupts disabled, so we know this does not race with actual APIC driver - * use. - */ -void __init apic_set_eoi_cb(void (*eoi)(void)) -{ - struct apic **drv; - - for (drv = __apicdrivers; drv < __apicdrivers_end; drv++) { - /* Should happen once for each apic */ - WARN_ON((*drv)->eoi == eoi); - (*drv)->eoi = eoi; - } -} --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -332,7 +332,7 @@ static void kvm_register_steal_time(void static DEFINE_PER_CPU_DECRYPTED(unsigned long, kvm_apic_eoi) = KVM_PV_EOI_DISABLED; -static notrace void kvm_guest_apic_eoi_write(void) +static notrace __maybe_unused void kvm_guest_apic_eoi_write(void) { /** * This relies on __test_and_clear_bit to modify the memory @@ -825,7 +825,7 @@ static void __init kvm_guest_init(void) } if (kvm_para_has_feature(KVM_FEATURE_PV_EOI)) - apic_set_eoi_cb(kvm_guest_apic_eoi_write); + apic_update_callback(eoi, kvm_guest_apic_eoi_write); if (kvm_para_has_feature(KVM_FEATURE_ASYNC_PF_INT) && kvmapf) { static_branch_enable(&kvm_async_pf_enabled); From patchwork Mon Jul 24 13:35:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 125047 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1843953vqg; Mon, 24 Jul 2023 07:38:43 -0700 (PDT) X-Google-Smtp-Source: APBJJlFiLsaNlDnMiYJYaekAAJd8LomxptoIUxSH8QuugPMK8F6exoNvRJySA1Qmqrn2G4tYsR4L X-Received: by 2002:a05:6a20:324d:b0:12c:b10d:693d with SMTP id hm13-20020a056a20324d00b0012cb10d693dmr7868024pzc.6.1690209523143; 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Mark snp_set_wakeup_secondary_cpu() and kvm_setup_pv_ipi() __init, as they are only invoked from init code and otherwise trigger a section mismatch as they are now invoking a __init function. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- V2: Mark snp_set_wakeup_secondary_cpu() and kvm_setup_pv_ipi() __init. --- arch/x86/hyperv/hv_apic.c | 20 ++++++++++---------- arch/x86/kernel/kvm.c | 6 +++--- arch/x86/kernel/sev.c | 4 ++-- 3 files changed, 15 insertions(+), 15 deletions(-) --- a/arch/x86/hyperv/hv_apic.c +++ b/arch/x86/hyperv/hv_apic.c @@ -288,12 +288,12 @@ void __init hv_apic_init(void) */ orig_apic = *apic; - apic->send_IPI = hv_send_ipi; - apic->send_IPI_mask = hv_send_ipi_mask; - apic->send_IPI_mask_allbutself = hv_send_ipi_mask_allbutself; - apic->send_IPI_allbutself = hv_send_ipi_allbutself; - apic->send_IPI_all = hv_send_ipi_all; - apic->send_IPI_self = hv_send_ipi_self; + apic_update_callback(send_IPI, hv_send_ipi); + apic_update_callback(send_IPI_mask, hv_send_ipi_mask); + apic_update_callback(send_IPI_mask_allbutself, hv_send_ipi_mask_allbutself); + apic_update_callback(send_IPI_allbutself, hv_send_ipi_allbutself); + apic_update_callback(send_IPI_all, hv_send_ipi_all); + apic_update_callback(send_IPI_self, hv_send_ipi_self); } if (ms_hyperv.hints & HV_X64_APIC_ACCESS_RECOMMENDED) { @@ -312,10 +312,10 @@ void __init hv_apic_init(void) */ apic_update_callback(eoi, hv_apic_eoi_write); if (!x2apic_enabled()) { - apic->read = hv_apic_read; - apic->write = hv_apic_write; - apic->icr_write = hv_apic_icr_write; - apic->icr_read = hv_apic_icr_read; + apic_update_callback(read, hv_apic_read); + apic_update_callback(write, hv_apic_write); + apic_update_callback(icr_write, hv_apic_icr_write); + apic_update_callback(icr_read, hv_apic_icr_read); } } } --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -622,10 +622,10 @@ late_initcall(setup_efi_kvm_sev_migratio /* * Set the IPI entry points */ -static void kvm_setup_pv_ipi(void) +static __init void kvm_setup_pv_ipi(void) { - apic->send_IPI_mask = kvm_send_ipi_mask; - apic->send_IPI_mask_allbutself = kvm_send_ipi_mask_allbutself; + apic_update_callback(send_IPI_mask, kvm_send_ipi_mask); + apic_update_callback(send_IPI_mask_allbutself, kvm_send_ipi_mask_allbutself); pr_info("setup PV IPIs\n"); } --- a/arch/x86/kernel/sev.c +++ b/arch/x86/kernel/sev.c @@ -1089,7 +1089,7 @@ static int wakeup_cpu_via_vmgexit(int ap return ret; } -void snp_set_wakeup_secondary_cpu(void) +void __init snp_set_wakeup_secondary_cpu(void) { if (!cc_platform_has(CC_ATTR_GUEST_SEV_SNP)) return; @@ -1099,7 +1099,7 @@ void snp_set_wakeup_secondary_cpu(void) * required method to start APs under SNP. If the hypervisor does * not support AP creation, then no APs will be started. */ - apic->wakeup_secondary_cpu = wakeup_cpu_via_vmgexit; + apic_update_callback(wakeup_secondary_cpu, wakeup_cpu_via_vmgexit); } int __init sev_es_setup_ap_jump_table(struct real_mode_header *rmh) From patchwork Mon Jul 24 13:35:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124974 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1811903vqg; Mon, 24 Jul 2023 06:48:51 -0700 (PDT) X-Google-Smtp-Source: APBJJlEa85yq9RkM8o3t6m0OHfBPClacUSKysTnlMHVtW936GaSeNvF0k3gnMXDtda7OhUrgHZ3e X-Received: by 2002:a17:907:75fa:b0:974:1ef7:1e88 with SMTP id jz26-20020a17090775fa00b009741ef71e88mr9122643ejc.13.1690206531480; Mon, 24 Jul 2023 06:48:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206531; cv=none; d=google.com; s=arc-20160816; b=noCnoU7te/KXTTz0UFgqrgGbV1DoemK33NBnkcRp4zUBHH6E5mrYn8Zr1bDWKOuxZu 4rj1YiQyfLPUpuaM6MY+XbZ6AjdgRRuY1z0z3LpBvvFzTn8aWhqz8X4f3xIBEUVk+il5 go6kOwul/5aqTbkmntZu423bdIqF4Ie2JpFsQecLz7TnYwvVVfvQZ3sPvRr5Hl23tfEc oHKtoEpnleTaue1ZfQIDNYvyiWBlL+n3BYq7TGUc1zuBGPiDzwS54s3zF83nfK2TW0d6 mfe3iy1dRS5J1UAeRsr698fD/TBIplmCiKHoVRdSvS+SRZ6TXB/a1odTBg/lFABHX4Dt AejA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=O0XTJMurd8agT9XR8N/9h35QD+xMCyVQhi7/zAo436M=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=TEQ4hoEHZbonYHk+A7H1Zo91IeuGeIEUQArQ+qk8e5T6wfuitbxOFN5Cfi8+eNl10n 4B6ybYQI4FA5yqJ3aq2CM9Hy7ypRWFfsSSqPpzCMeb6hxwOJ3ejVZim0LZCA3duXrhuW /q21N9ep2YtwlkUw5CewQRg/WsoBR2IhXVQAflUsAwTkwJNN2aLirM56n80y0YrcXEkE kQH/DypxsH+lvw1rJ4mOLY474jOn51aHHbC1+B+9GGFlLBEljkc3Np31bS/mRxIIy0oi JHx363tsmJ5wlj/aoaW/XW4exBRUGvBGUX6X2HLktu10m7t9m7DjITlwgcVJHNZURo1E cTRw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=ZWXoG6Io; dkim=neutral (no key) header.i=@linutronix.de header.b=bi4hxsCu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c11-20020a170906154b00b0098dea0a1eb4si5808260ejd.700.2023.07.24.06.48.27; Mon, 24 Jul 2023 06:48:51 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=ZWXoG6Io; dkim=neutral (no key) header.i=@linutronix.de header.b=bi4hxsCu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231851AbjGXNi5 (ORCPT + 99 others); Mon, 24 Jul 2023 09:38:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37414 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231811AbjGXNiZ (ORCPT ); Mon, 24 Jul 2023 09:38:25 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2ADE93C10 for ; Mon, 24 Jul 2023 06:36:47 -0700 (PDT) Message-ID: <20230724132047.780772553@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205718; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=O0XTJMurd8agT9XR8N/9h35QD+xMCyVQhi7/zAo436M=; b=ZWXoG6IobDx6riWyjqKv9qh46qsw9PmprJtJxi4cys5MjKFTsvisDgmmRYUsv+el8SE71+ KXGU+c97azP3w1HyMNrA3DQs+oh+YqGjJiymvTiUP0QxmnEYO3Mlp+lhxR1X1IcQPyG8nX P9dx2m+we7FjI8tMuwYh14bjeIaUp2jhqes9xOzIVU14C3OjlP4XFcMk3biwaxEbgBrY52 Z5LI1bs0PmVBhwbbadTB01QVmLhMncMo1ROmsMXQSaMIWG5r6vHe2wxjPzofoHS/YRkETT 33PvP6hUv45T2UDOBZUPEhgf9sRgPyBSxsxut+X2/33WJQF3HjDIl8Zt/h3rkg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205718; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=O0XTJMurd8agT9XR8N/9h35QD+xMCyVQhi7/zAo436M=; b=bi4hxsCuLFaqNkJLJd0Of7FbqVBIiWHA7kyC7kZlN4qP2gWFrXinMDkuM/ShQlOGiW1Ghl nFxs6eylWxcHPgCQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 54/58] x86/xen/apic: Mark apic __ro_after_init References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:35:17 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310003625046842 X-GMAIL-MSGID: 1772310003625046842 Nothing can change it post init. Remove the 32bit callbacks and comments as XENPV is strictly 64bit. While at it mop up the whitespace damage which causes eyebleed due to an editor which is highlighting it. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) Cc: Juergen Gross --- arch/x86/xen/apic.c | 26 ++++++++++++-------------- 1 file changed, 12 insertions(+), 14 deletions(-) --- a/arch/x86/xen/apic.c +++ b/arch/x86/xen/apic.c @@ -123,39 +123,37 @@ static int xen_cpu_present_to_apicid(int return BAD_APICID; } -static struct apic xen_pv_apic = { - .name = "Xen PV", - .probe = xen_apic_probe_pv, +static struct apic xen_pv_apic __ro_after_init = { + .name = "Xen PV", + .probe = xen_apic_probe_pv, .acpi_madt_oem_check = xen_madt_oem_check, /* .delivery_mode and .dest_mode_logical not used by XENPV */ .disable_esr = 0, - .check_apicid_used = default_check_apicid_used, /* Used on 32-bit */ - .ioapic_phys_id_map = default_ioapic_phys_id_map, /* Used on 32-bit */ .cpu_present_to_apicid = xen_cpu_present_to_apicid, .phys_pkg_id = xen_phys_pkg_id, /* detect_ht */ .max_apic_id = UINT_MAX, - .get_apic_id = xen_get_apic_id, - .set_apic_id = xen_set_apic_id, /* Can be NULL on 32-bit. */ + .get_apic_id = xen_get_apic_id, + .set_apic_id = xen_set_apic_id, .calc_dest_apicid = apic_flat_calc_apicid, #ifdef CONFIG_SMP - .send_IPI_mask = xen_send_IPI_mask, - .send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself, - .send_IPI_allbutself = xen_send_IPI_allbutself, - .send_IPI_all = xen_send_IPI_all, - .send_IPI_self = xen_send_IPI_self, + .send_IPI_mask = xen_send_IPI_mask, + .send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself, + .send_IPI_allbutself = xen_send_IPI_allbutself, + .send_IPI_all = xen_send_IPI_all, + .send_IPI_self = xen_send_IPI_self, #endif .read = xen_apic_read, .write = xen_apic_write, .eoi = xen_apic_eoi, - .icr_read = xen_apic_icr_read, - .icr_write = xen_apic_icr_write, + .icr_read = xen_apic_icr_read, + .icr_write = xen_apic_icr_write, }; static void __init xen_apic_check(void) From patchwork Mon Jul 24 13:35:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 125003 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1815629vqg; Mon, 24 Jul 2023 06:55:45 -0700 (PDT) X-Google-Smtp-Source: APBJJlHBDuymFPfxLr0Gjks6xa7shf6ItS/2DD/nBcZkFyp8DUgx8QwKyWrZ7s52UIQa4vjQ8tQO X-Received: by 2002:aa7:d98c:0:b0:522:307b:f420 with SMTP id u12-20020aa7d98c000000b00522307bf420mr1987042eds.38.1690206945262; Mon, 24 Jul 2023 06:55:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206945; cv=none; d=google.com; s=arc-20160816; b=mn4cnDU/jYMA47c+Lja60FLq0k/GmQX8QDy5ITLFwPp7UprFcYtLSkvlIUMG6CC35f AheH7mGVLAtEKSMkMBlpmuFmzAlrfYNVezHW9S/DkISOYqR69Ee79fRVZnh7RnACSXD/ cBzZfwipRufPgbKo4fE/mzmUvR+R4IssZTTR9e6jODFflm+WiIcUnIt0gxW70UUDYRP+ hnNLFWEcN43/QsopkeM0t1nCckCOUwukOCummsWybSUUBC6Dt1Np0sC2RdvsiOgUK3Ja pDIgya7LoW+2P6MCcyzpaVDwQBHivkIdsxg3pVy5OU6p0n2VV3tQnprLLawEwwZZHxlu ls8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=ughx6myInj7tBGUgtVNaK0CKBD3pdVmOGF8WRhhzTa4=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=plF4rRc8gkpaHQTmSQoXT0OaEVv/UpmXmA7g0SrnJmc9VcurcGsY6F18kzc5DJhwfL NHXC6s/nXqj0+BDzSGUDKIAbVZ4xZJ2/JcCIYwOmqfX+awIRrTkZlv7jsx1H2duzKw+G xkegpbNZVc2rg+5sH8TZNVA2oavZEPcrcJqqr1ZHUduGHzy+VvS8jZtts4nxfIvKAMlT Af95EJGX0m1C3jCr93jUNrDO3/tNLQXLf6argQbkf9sxMJO1xpggMJ+ppzZLGeiPWPfW 8stxo4sIWL7VpL8ksy+XE9S6djc6/O4n8XfLwBZaEdc3yz/mRUetzopeu98hbY+NINLm yksw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=kwoiOuDA; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=2WL7HNmn; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id m23-20020aa7c2d7000000b0051bde65fb79si6540090edp.572.2023.07.24.06.55.15; Mon, 24 Jul 2023 06:55:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=kwoiOuDA; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=2WL7HNmn; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230376AbjGXNjL (ORCPT + 99 others); Mon, 24 Jul 2023 09:39:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36792 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229545AbjGXNig (ORCPT ); Mon, 24 Jul 2023 09:38:36 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3623F10D5 for ; Mon, 24 Jul 2023 06:36:55 -0700 (PDT) Message-ID: <20230724132047.837772527@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205720; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ughx6myInj7tBGUgtVNaK0CKBD3pdVmOGF8WRhhzTa4=; b=kwoiOuDAovdAN5YiiqAECbj6LLitpjSJP+TZ+3qeF4Bl0Q4kNBW8ZOGZ6vmO0QnEH5yhgs ZldHloRckXQgBf9hQWCR493aunpVDGjOmDFOV3uQS9ykP1QdgQ5BIgllzb3ZcaPPO1RDpl SOi/zlRzJIDAR4IH4NVv6DCIsAG4h9YU+RMaVMNjsKF31fjZWohtGY6E/KHpjfnpXpip26 9bfKdl5PcHWPNHIRf32md5tNpRnZQAdm+IOGrdS3QlRmmiRSMheq1FPYpPvJW6cmyShcJ9 q5gkkYRsdstEX72ASXepqBQCj6l+U977gYTSDIdU4pmYJUw9qgAWw7uIsR9kqg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205720; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ughx6myInj7tBGUgtVNaK0CKBD3pdVmOGF8WRhhzTa4=; b=2WL7HNmn/6HgtJssUiNXv9sezZpnoJgvv1UvWVS3rp+2602W790X3X0MZYw1ym0th1zxaR Jc9ma375Z2A2EkDg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 55/58] x86/apic: Mark all hotpath APIC callback wrappers __always_inline References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:35:19 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772310437625412746 X-GMAIL-MSGID: 1772310437625412746 There is no value for instrumentation to look at those wrappers and with the upcoming conversion to static calls even less so. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -371,48 +371,48 @@ void __init apic_install_driver(struct a pr_info("APIC: %s() replaced with %ps()\n", #_callback, _fn); \ } -static inline u32 apic_read(u32 reg) +static __always_inline u32 apic_read(u32 reg) { return apic->read(reg); } -static inline void apic_write(u32 reg, u32 val) +static __always_inline void apic_write(u32 reg, u32 val) { apic->write(reg, val); } -static inline void apic_eoi(void) +static __always_inline void apic_eoi(void) { apic->eoi(); } -static inline void apic_native_eoi(void) +static __always_inline void apic_native_eoi(void) { apic->native_eoi(); } -static inline u64 apic_icr_read(void) +static __always_inline u64 apic_icr_read(void) { return apic->icr_read(); } -static inline void apic_icr_write(u32 low, u32 high) +static __always_inline void apic_icr_write(u32 low, u32 high) { apic->icr_write(low, high); } -static inline void apic_wait_icr_idle(void) +static __always_inline void apic_wait_icr_idle(void) { if (apic->wait_icr_idle) apic->wait_icr_idle(); } -static inline u32 safe_apic_wait_icr_idle(void) +static __always_inline u32 safe_apic_wait_icr_idle(void) { return apic->safe_wait_icr_idle ? apic->safe_wait_icr_idle() : 0; } -static inline bool apic_id_valid(u32 apic_id) +static __always_inline bool apic_id_valid(u32 apic_id) { return apic_id <= apic->max_apic_id; } From patchwork Mon Jul 24 13:35:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 125013 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1832158vqg; Mon, 24 Jul 2023 07:19:24 -0700 (PDT) X-Google-Smtp-Source: APBJJlFgzImwGaafCXh/MdWYBRWBF8VLQNvY27ygW6awlF/Nd5UIGZsLpqJJyvyNhKT8jDHCr8X2 X-Received: by 2002:a05:6a20:1014:b0:134:4f86:7966 with SMTP id gs20-20020a056a20101400b001344f867966mr9441416pzc.9.1690208364329; Mon, 24 Jul 2023 07:19:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690208364; cv=none; d=google.com; s=arc-20160816; b=zLJopmPkco4uoDqSGElFD3K66YKLK24xUgca3y3LrJ9Gk0DrZvNduvjpkZfhFQn5cD Z/I+kJ9qGjj3PXjKrwuxeFuGXddIeF2opAPIqm//BnHh1Uqh1yE+dvVORsXOaSefl2zh JBdDB+cCfxQMiRopHkUde3Sw170nLuLwegScIhZmCtT8IcQ4uNbaqQHWCw8KhYiN1W8W QakorO3nEuVDLL57C4+dww2A588IcPzZSkJqPsZtEmQHIGu4gtdk7c3PTucFsepYhX4R GKCBBTqFvvNMfmMdotkZ3gDhb33Kp4z9gS281WwGWR+V6sMdS3lTpeJx0AiWG7pazZzN qUvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=MV6Y606SVssEQVKgDvP1PL7mW4j5AtallYXi4hZ7gRY=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=jVgG/S34ElNSe7lpLxt2H2V8ePN/YUaCcFgGFmVUZbC7mbSyKRBSpHZv2dN/FQ7+Dw mCMLzCk4FY20FqBExGxk+h9FvUeR+Tf7xoito2mt/7R1MJNBxnEuCGoqange4L4ZOFIs eFB9UBohxcVovE9U2yOsIKGTFYY8wM5bf6IEqyszzs3WeCq7M4Xjv15dKPPmCmx1bxTJ mpMaW1RjPg7QI9TDtG5I6ylhSNhRkNcSWceaP89LsvBkM2/uceGxfQAdZ//DqO2AjL8E W8WNTH1KsLNKZLMsFnJqzow7oIgVxDKyB2WSIHWbc476hSCihjEyf0Pi1DC1nTzSXQt4 wbUw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=0ouHLDXq; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. 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No functional change. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/hyperv/hv_spinlock.c | 2 +- arch/x86/include/asm/apic.h | 30 ++++++++++++++++++++++++++++++ arch/x86/kernel/apic/apic.c | 2 +- arch/x86/kernel/apic/hw_nmi.c | 4 +++- arch/x86/kernel/apic/ipi.c | 16 ++++++++-------- arch/x86/kernel/apic/vector.c | 6 +++--- arch/x86/kernel/cpu/mce/inject.c | 3 +-- arch/x86/kernel/irq_work.c | 2 +- arch/x86/kernel/nmi_selftest.c | 2 +- arch/x86/kernel/smp.c | 2 +- arch/x86/kvm/vmx/posted_intr.c | 2 +- arch/x86/kvm/vmx/vmx.c | 2 +- arch/x86/platform/uv/uv_nmi.c | 2 +- 13 files changed, 53 insertions(+), 22 deletions(-) --- a/arch/x86/hyperv/hv_spinlock.c +++ b/arch/x86/hyperv/hv_spinlock.c @@ -20,7 +20,7 @@ static bool __initdata hv_pvspin = true; static void hv_qlock_kick(int cpu) { - apic->send_IPI(cpu, X86_PLATFORM_IPI_VECTOR); + __apic_send_IPI(cpu, X86_PLATFORM_IPI_VECTOR); } static void hv_qlock_wait(u8 *byte, u8 val) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -401,6 +401,36 @@ static __always_inline void apic_icr_wri apic->icr_write(low, high); } +static __always_inline void __apic_send_IPI(int cpu, int vector) +{ + apic->send_IPI(cpu, vector); +} + +static __always_inline void __apic_send_IPI_mask(const struct cpumask *mask, int vector) +{ + apic->send_IPI_mask(mask, vector); +} + +static __always_inline void __apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) +{ + apic->send_IPI_mask_allbutself(mask, vector); +} + +static __always_inline void __apic_send_IPI_allbutself(int vector) +{ + apic->send_IPI_allbutself(vector); +} + +static __always_inline void __apic_send_IPI_all(int vector) +{ + apic->send_IPI_all(vector); +} + +static __always_inline void __apic_send_IPI_self(int vector) +{ + apic->send_IPI_self(vector); +} + static __always_inline void apic_wait_icr_idle(void) { if (apic->wait_icr_idle) --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -502,7 +502,7 @@ static int lapic_timer_set_oneshot(struc static void lapic_timer_broadcast(const struct cpumask *mask) { #ifdef CONFIG_SMP - apic->send_IPI_mask(mask, LOCAL_TIMER_VECTOR); + __apic_send_IPI_mask(mask, LOCAL_TIMER_VECTOR); #endif } --- a/arch/x86/kernel/apic/hw_nmi.c +++ b/arch/x86/kernel/apic/hw_nmi.c @@ -21,6 +21,8 @@ #include #include +#include "local.h" + #ifdef CONFIG_HARDLOCKUP_DETECTOR_PERF u64 hw_nmi_get_sample_period(int watchdog_thresh) { @@ -31,7 +33,7 @@ u64 hw_nmi_get_sample_period(int watchdo #ifdef arch_trigger_cpumask_backtrace static void nmi_raise_cpu_backtrace(cpumask_t *mask) { - apic->send_IPI_mask(mask, NMI_VECTOR); + __apic_send_IPI_mask(mask, NMI_VECTOR); } void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self) --- a/arch/x86/kernel/apic/ipi.c +++ b/arch/x86/kernel/apic/ipi.c @@ -54,9 +54,9 @@ void apic_send_IPI_allbutself(unsigned i return; if (static_branch_likely(&apic_use_ipi_shorthand)) - apic->send_IPI_allbutself(vector); + __apic_send_IPI_allbutself(vector); else - apic->send_IPI_mask_allbutself(cpu_online_mask, vector); + __apic_send_IPI_mask_allbutself(cpu_online_mask, vector); } /* @@ -70,12 +70,12 @@ void native_smp_send_reschedule(int cpu) WARN(1, "sched: Unexpected reschedule of offline CPU#%d!\n", cpu); return; } - apic->send_IPI(cpu, RESCHEDULE_VECTOR); + __apic_send_IPI(cpu, RESCHEDULE_VECTOR); } void native_send_call_func_single_ipi(int cpu) { - apic->send_IPI(cpu, CALL_FUNCTION_SINGLE_VECTOR); + __apic_send_IPI(cpu, CALL_FUNCTION_SINGLE_VECTOR); } void native_send_call_func_ipi(const struct cpumask *mask) @@ -87,14 +87,14 @@ void native_send_call_func_ipi(const str goto sendmask; if (cpumask_test_cpu(cpu, mask)) - apic->send_IPI_all(CALL_FUNCTION_VECTOR); + __apic_send_IPI_all(CALL_FUNCTION_VECTOR); else if (num_online_cpus() > 1) - apic->send_IPI_allbutself(CALL_FUNCTION_VECTOR); + __apic_send_IPI_allbutself(CALL_FUNCTION_VECTOR); return; } sendmask: - apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR); + __apic_send_IPI_mask(mask, CALL_FUNCTION_VECTOR); } #endif /* CONFIG_SMP */ @@ -221,7 +221,7 @@ void default_send_IPI_mask_allbutself_ph */ void default_send_IPI_single(int cpu, int vector) { - apic->send_IPI_mask(cpumask_of(cpu), vector); + __apic_send_IPI_mask(cpumask_of(cpu), vector); } void default_send_IPI_allbutself(int vector) --- a/arch/x86/kernel/apic/vector.c +++ b/arch/x86/kernel/apic/vector.c @@ -876,7 +876,7 @@ static int apic_retrigger_irq(struct irq unsigned long flags; raw_spin_lock_irqsave(&vector_lock, flags); - apic->send_IPI(apicd->cpu, apicd->vector); + __apic_send_IPI(apicd->cpu, apicd->vector); raw_spin_unlock_irqrestore(&vector_lock, flags); return 1; @@ -958,7 +958,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_irq_move_c */ irr = apic_read(APIC_IRR + (vector / 32 * 0x10)); if (irr & (1U << (vector % 32))) { - apic->send_IPI_self(IRQ_MOVE_CLEANUP_VECTOR); + __apic_send_IPI_self(IRQ_MOVE_CLEANUP_VECTOR); continue; } free_moved_vector(apicd); @@ -976,7 +976,7 @@ static void __send_cleanup_vector(struct cpu = apicd->prev_cpu; if (cpu_online(cpu)) { hlist_add_head(&apicd->clist, per_cpu_ptr(&cleanup_list, cpu)); - apic->send_IPI(cpu, IRQ_MOVE_CLEANUP_VECTOR); + __apic_send_IPI(cpu, IRQ_MOVE_CLEANUP_VECTOR); } else { apicd->prev_vector = 0; } --- a/arch/x86/kernel/cpu/mce/inject.c +++ b/arch/x86/kernel/cpu/mce/inject.c @@ -270,8 +270,7 @@ static void __maybe_unused raise_mce(str mce_irq_ipi, NULL, 0); preempt_enable(); } else if (m->inject_flags & MCJ_NMI_BROADCAST) - apic->send_IPI_mask(mce_inject_cpumask, - NMI_VECTOR); + __apic_send_IPI_mask(mce_inject_cpumask, NMI_VECTOR); } start = jiffies; while (!cpumask_empty(mce_inject_cpumask)) { --- a/arch/x86/kernel/irq_work.c +++ b/arch/x86/kernel/irq_work.c @@ -28,7 +28,7 @@ void arch_irq_work_raise(void) if (!arch_irq_work_has_interrupt()) return; - apic->send_IPI_self(IRQ_WORK_VECTOR); + __apic_send_IPI_self(IRQ_WORK_VECTOR); apic_wait_icr_idle(); } #endif --- a/arch/x86/kernel/nmi_selftest.c +++ b/arch/x86/kernel/nmi_selftest.c @@ -75,7 +75,7 @@ static void __init test_nmi_ipi(struct c /* sync above data before sending NMI */ wmb(); - apic->send_IPI_mask(mask, NMI_VECTOR); + __apic_send_IPI_mask(mask, NMI_VECTOR); /* Don't wait longer than a second */ timeout = USEC_PER_SEC; --- a/arch/x86/kernel/smp.c +++ b/arch/x86/kernel/smp.c @@ -237,7 +237,7 @@ static void native_stop_other_cpus(int w pr_emerg("Shutting down cpus with NMI\n"); for_each_cpu(cpu, &cpus_stop_mask) - apic->send_IPI(cpu, NMI_VECTOR); + __apic_send_IPI(cpu, NMI_VECTOR); } /* * Don't wait longer than 10 ms if the caller didn't --- a/arch/x86/kvm/vmx/posted_intr.c +++ b/arch/x86/kvm/vmx/posted_intr.c @@ -175,7 +175,7 @@ static void pi_enable_wakeup_handler(str * scheduled out). */ if (pi_test_on(&new)) - apic->send_IPI_self(POSTED_INTR_WAKEUP_VECTOR); + __apic_send_IPI_self(POSTED_INTR_WAKEUP_VECTOR); local_irq_restore(flags); } --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -4144,7 +4144,7 @@ static inline void kvm_vcpu_trigger_post */ if (vcpu != kvm_get_running_vcpu()) - apic->send_IPI_mask(get_cpu_mask(vcpu->cpu), pi_vec); + __apic_send_IPI_mask(get_cpu_mask(vcpu->cpu), pi_vec); return; } #endif --- a/arch/x86/platform/uv/uv_nmi.c +++ b/arch/x86/platform/uv/uv_nmi.c @@ -601,7 +601,7 @@ static void uv_nmi_nr_cpus_ping(void) for_each_cpu(cpu, uv_nmi_cpu_mask) uv_cpu_nmi_per(cpu).pinging = 1; - apic->send_IPI_mask(uv_nmi_cpu_mask, APIC_DM_NMI); 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Note this deliberately uses STATIC_CALL_NULL() because otherwise it would be required to have the definitions in the 32bit and the 64bit default APIC implementations and it's hard to keep the calls in sync. The other option would be to have stub functions for each callback type. Not pretty either So the NULL capable calls are used and filled in during early boot after the static key infrastructure has been initialized. The calls will be static_call() except for the wait_irc_idle() callback which is valid to be NULL for X2APIC systems. Update the calls when a new APIC driver is installed and when a callback override is invoked. Export the trampolines for the two calls which are used in KVM and MCE error inject modules. Test the setup and let the next step convert the inline wrappers to make it effective. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 21 +++++++++++++++++ arch/x86/kernel/apic/init.c | 53 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 74 insertions(+) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -3,6 +3,7 @@ #define _ASM_X86_APIC_H #include +#include #include #include @@ -368,9 +369,29 @@ void __init apic_install_driver(struct a #define apic_update_callback(_callback, _fn) { \ __x86_apic_override._callback = _fn; \ apic->_callback = _fn; \ + static_call_update(apic_call_##_callback, _fn); \ pr_info("APIC: %s() replaced with %ps()\n", #_callback, _fn); \ } +#define DECLARE_APIC_CALL(__cb) \ + DECLARE_STATIC_CALL(apic_call_##__cb, *apic->__cb) + +DECLARE_APIC_CALL(eoi); +DECLARE_APIC_CALL(native_eoi); +DECLARE_APIC_CALL(icr_read); +DECLARE_APIC_CALL(icr_write); +DECLARE_APIC_CALL(read); +DECLARE_APIC_CALL(send_IPI); +DECLARE_APIC_CALL(send_IPI_mask); +DECLARE_APIC_CALL(send_IPI_mask_allbutself); +DECLARE_APIC_CALL(send_IPI_allbutself); +DECLARE_APIC_CALL(send_IPI_all); +DECLARE_APIC_CALL(send_IPI_self); +DECLARE_APIC_CALL(wait_icr_idle); +DECLARE_APIC_CALL(wakeup_secondary_cpu); +DECLARE_APIC_CALL(wakeup_secondary_cpu_64); +DECLARE_APIC_CALL(write); + static __always_inline u32 apic_read(u32 reg) { return apic->read(reg); --- a/arch/x86/kernel/apic/init.c +++ b/arch/x86/kernel/apic/init.c @@ -5,6 +5,34 @@ #include "local.h" +/* + * Use DEFINE_STATIC_CALL_NULL() to avoid having to provide stub functions + * for each callback. The callbacks are setup during boot and all except + * wait_icr_idle() must be initialized before usage. The IPI wrappers + * use static_call() and not static_call_cond() to catch any fails. + */ +#define DEFINE_APIC_CALL(__cb) \ + DEFINE_STATIC_CALL_NULL(apic_call_##__cb, *apic->__cb) + +DEFINE_APIC_CALL(eoi); +DEFINE_APIC_CALL(native_eoi); +DEFINE_APIC_CALL(icr_read); +DEFINE_APIC_CALL(icr_write); +DEFINE_APIC_CALL(read); +DEFINE_APIC_CALL(send_IPI); +DEFINE_APIC_CALL(send_IPI_mask); +DEFINE_APIC_CALL(send_IPI_mask_allbutself); +DEFINE_APIC_CALL(send_IPI_allbutself); +DEFINE_APIC_CALL(send_IPI_all); +DEFINE_APIC_CALL(send_IPI_self); +DEFINE_APIC_CALL(wait_icr_idle); +DEFINE_APIC_CALL(wakeup_secondary_cpu); +DEFINE_APIC_CALL(wakeup_secondary_cpu_64); +DEFINE_APIC_CALL(write); + +EXPORT_STATIC_CALL_TRAMP_GPL(apic_call_send_IPI_mask); +EXPORT_STATIC_CALL_TRAMP_GPL(apic_call_send_IPI_self); + /* The container for function call overrides */ struct apic_override __x86_apic_override __initdata; @@ -30,10 +58,34 @@ static __init void restore_override_call apply_override(wakeup_secondary_cpu_64); } +#define update_call(__cb) \ + static_call_update(apic_call_##__cb, *apic->__cb) + +static __init void update_static_calls(void) +{ + update_call(eoi); + update_call(native_eoi); + update_call(write); + update_call(read); + update_call(send_IPI); + update_call(send_IPI_mask); + update_call(send_IPI_mask_allbutself); + update_call(send_IPI_allbutself); + update_call(send_IPI_all); + update_call(send_IPI_self); + update_call(icr_read); + update_call(icr_write); + update_call(wait_icr_idle); + update_call(wakeup_secondary_cpu); + update_call(wakeup_secondary_cpu_64); +} + void __init apic_setup_apic_calls(void) { /* Ensure that the default APIC has native_eoi populated */ apic->native_eoi = apic->eoi; + update_static_calls(); + pr_info("Static calls initialized\n"); } void __init apic_install_driver(struct apic *driver) @@ -52,6 +104,7 @@ void __init apic_install_driver(struct a /* Apply any already installed callback overrides */ restore_override_callbacks(); + update_static_calls(); pr_info("Switched APIC routing to: %s\n", driver->name); } From patchwork Mon Jul 24 13:35:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 124970 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1809791vqg; Mon, 24 Jul 2023 06:45:20 -0700 (PDT) X-Google-Smtp-Source: APBJJlGsLYcay399QLU7u8U0/N+O/WwN2HcU5lP9k1uUon7INB+oYJaZNzM125/ACeB1t7Whhh2/ X-Received: by 2002:a05:6402:88e:b0:522:3ef1:b10 with SMTP id e14-20020a056402088e00b005223ef10b10mr211459edy.6.1690206319891; Mon, 24 Jul 2023 06:45:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690206319; cv=none; d=google.com; s=arc-20160816; b=Jj3AseKP7lnFXwPuuv3Mdu1Kzi6RSchdr8XxZxH9iR2zb02W1UuwNHXDEMnee1lFql M6z9XGg+4UUf7f/mVoD9na32TQ8U4XF5AKLK7hSnIwh68t9DCQqkwbul15Hy33NXlmIv atuu//LxOeWr214vYuFknrlaepAf4Stm7v1T+4xSwiTOizX0XLdy8t5ZVnMNvci7I4b6 8Js1kKilWjbqe76AClY20o2LvsYLt0Q5SGilvAsRgGeyUAIZLQy8r5vm24XR78xbLQKn 13+6U5zYuDsOvSidZ8xQX13G3S8nLU13Pg03rjMsPA3TLBLrtMVxJAO9EuchG6fqGBdS 5njw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=4thjqk06PAC51pOMOTPF8ETngeGfrVOo3TNMYdEenIA=; fh=mE3iieUIZLcDfOLIULj9X6/p0bMDPZGFSVRsnyRUnTc=; b=QDUB9zuXwtW0/AAorG1nQM9fNaJlAXKwxl80Fhqd6HtROvq00ZRuqVDxWRfyTqIlyA Tcat6a4hufiX/DYdrU/RWLIZtS26Li6JNHLAdYrIHGCj2DL6VNCRFL76c050U0HxeFkz S3X2qiLWzMy7Fri8fAerHZfhtmVnWVjP8tiT7aIvYPqNQBbT47laoIDyX+ikYAO2AKV+ QSRC2csiPgZj70pQOZ/t4VDB2iCPTDWxmwC69WfPu0VtMNGNWZZvYkhlETwrhYVMe4Qk UNeGcObN+8J3FQa4s5w1g5lxn1tME51rV38mXsN6XVBnyWRKCwDdHS7Un6JoDZzOZrok CPjA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=QNqojH3y; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=8QoYiXFc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j26-20020aa7c0da000000b0051de3796896si6484274edp.211.2023.07.24.06.44.54; Mon, 24 Jul 2023 06:45:19 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=QNqojH3y; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=8QoYiXFc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231761AbjGXNjW (ORCPT + 99 others); Mon, 24 Jul 2023 09:39:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37734 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231844AbjGXNis (ORCPT ); Mon, 24 Jul 2023 09:38:48 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5BD4A10FE for ; Mon, 24 Jul 2023 06:37:04 -0700 (PDT) Message-ID: <20230724132048.008763662@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205725; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=4thjqk06PAC51pOMOTPF8ETngeGfrVOo3TNMYdEenIA=; b=QNqojH3yNGauj6S7jtVUTgfJIY4hOseZ1pizUb25/YRuFX4otRsjkWDPtuY1QKbcJkSLBD 2XD2bJvdAWarJmifj9IDwWhRxNG7wcEQNx88/58d9NF1JuHlt4UevfZL1ByTBsBHcp1kPq kXCHEPXBk5IUL4VyvjkfZ0vlurst+nHAeGhIdFx06TFRXNnrAqt8q0GSnOWStRsRQ5B8q4 /FLHCJes/y5UDcMIjbusZk1cMmel6qTKshOuYA/ZSWTM/yIA9rx0Z352Ue9LBdiy+7HSsu S2wfBJo3ASeQNbJUHxQYcFPOuvB7gi8V89Z6/f/c2ptjiH60bkNRzIStChS1VQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205725; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=4thjqk06PAC51pOMOTPF8ETngeGfrVOo3TNMYdEenIA=; b=8QoYiXFcmJJLbG4UzxIoYsSbQhp0iHF0cun7+IpTntZ8Zdhh7X3AJmLJ/I0CUdfEkWmxXH tKlV5XGYdndZ6BCg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 58/58] x86/apic: Turn on static calls References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:35:24 +0200 (CEST) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772309782330004637 X-GMAIL-MSGID: 1772309782330004637 Convert all the APIC callback inline wrappers from apic->foo() to static_call(apic_call_foo)(), except for the safe_wait_icr_idle() one which is only used during SMP bringup when sending INIT/SIPI. That really can do the conditional callback. The regular wait_icr_idle() matters as it is used in irq_work_raise(), so X2APIC machines spare the conditional. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -394,68 +394,67 @@ DECLARE_APIC_CALL(write); static __always_inline u32 apic_read(u32 reg) { - return apic->read(reg); + return static_call(apic_call_read)(reg); } static __always_inline void apic_write(u32 reg, u32 val) { - apic->write(reg, val); + static_call(apic_call_write)(reg, val); } static __always_inline void apic_eoi(void) { - apic->eoi(); + static_call(apic_call_eoi)(); } static __always_inline void apic_native_eoi(void) { - apic->native_eoi(); + static_call(apic_call_native_eoi)(); } static __always_inline u64 apic_icr_read(void) { - return apic->icr_read(); + return static_call(apic_call_icr_read)(); } static __always_inline void apic_icr_write(u32 low, u32 high) { - apic->icr_write(low, high); + static_call(apic_call_icr_write)(low, high); } static __always_inline void __apic_send_IPI(int cpu, int vector) { - apic->send_IPI(cpu, vector); + static_call(apic_call_send_IPI)(cpu, vector); } static __always_inline void __apic_send_IPI_mask(const struct cpumask *mask, int vector) { - apic->send_IPI_mask(mask, vector); + static_call_mod(apic_call_send_IPI_mask)(mask, vector); } static __always_inline void __apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) { - apic->send_IPI_mask_allbutself(mask, vector); + static_call(apic_call_send_IPI_mask_allbutself)(mask, vector); } static __always_inline void __apic_send_IPI_allbutself(int vector) { - apic->send_IPI_allbutself(vector); + static_call(apic_call_send_IPI_allbutself)(vector); } static __always_inline void __apic_send_IPI_all(int vector) { - apic->send_IPI_all(vector); + static_call(apic_call_send_IPI_all)(vector); } static __always_inline void __apic_send_IPI_self(int vector) { - apic->send_IPI_self(vector); + static_call_mod(apic_call_send_IPI_self)(vector); } static __always_inline void apic_wait_icr_idle(void) { - if (apic->wait_icr_idle) - apic->wait_icr_idle(); + static_call_cond(apic_call_wait_icr_idle)(); } static __always_inline u32 safe_apic_wait_icr_idle(void)