From patchwork Wed Jul 19 16:46:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: jeevitha X-Patchwork-Id: 122728 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:c923:0:b0:3e4:2afc:c1 with SMTP id j3csp2568679vqt; Wed, 19 Jul 2023 09:47:42 -0700 (PDT) X-Google-Smtp-Source: APBJJlGM0pvLMX4j140D6Mv/F87iWm0VM4wHDcrFazmOAVh+YyRFo+LAwaXKIJtc9HBu1E3eYiVM X-Received: by 2002:a17:907:770e:b0:991:dc98:69ff with SMTP id kw14-20020a170907770e00b00991dc9869ffmr2883098ejc.67.1689785261995; Wed, 19 Jul 2023 09:47:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1689785261; cv=none; d=google.com; s=arc-20160816; b=V60HqifrhwlnAccgRjgnHTy1D6PTbWmRP6hfTNyK0fj3X3frckAD2hC3Qm1JMySzIw HeEu8tF7maGK6SvfTTP9rKp02lpohppavyWlaM1wT8uwNOaAyxIds64pIrXBWIofOVnI /s23MITLR4HIKPddCsGtuhT4gG2AJESK1FJDIrlcK4OlRXFmDDzPbz4N2xtZG02J9ILh dZg4sbJsIRxjbhVfaululrl9KgjjpNy6QdEBus/kzSeSQAkdb1i/WfexC4jtGbyGE2bW MzkatLETSvBOCkUN3hH0lzNgs3BGM7nRYtI196HX8lOsb29xR4JHKPk0zAeh+ypz1Cw2 HECA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:to:subject:content-language:user-agent :mime-version:date:message-id:dmarc-filter:delivered-to :dkim-signature:dkim-filter; bh=H9hHX7qDfZALHpj5KNJuxpY3DFr/ZZVyucMb9Y9XmR0=; fh=uj1oBMyPsnwTMm2+AuZSaW3UCX8Z31kzOtTK2AKdKOQ=; b=z0tU+SuXHB0GWoflCx0gkvZelNzqszMvnoDIWl1uDuEZnwJ7/0R6CxeZ+qmTmqdsXv 0xPTcRqRCTgICOfg8lf6BvMIpCuEibmlN4I+KVT4oC1LmLqzQgfSAwyZio8BkEr4jrBY VJWx3QVT9UL5bvyHcir97rjTqpdVqNVCLKY2Le/L3uRIXy8vuZloF1+AdvS6LgYmhmh/ v93HrxATgEwaOpgkPxIxecdQqYe5sghdmSZH/v1IT5S9uZyav/M10dnVa3J0qWalFZ6/ GOcCr4QWGlg55TjlpH9Ek2jkWrbwElE0v+hyH0EabH4IBRmEL8mHRnrv8WEveXipnExf 7YJQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=VR16MdjI; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (ip-8-43-85-97.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id p15-20020a17090635cf00b0099392706398si3250262ejb.231.2023.07.19.09.47.41 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Jul 2023 09:47:41 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=VR16MdjI; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BD20B38582BD for ; Wed, 19 Jul 2023 16:47:40 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org BD20B38582BD DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1689785260; bh=H9hHX7qDfZALHpj5KNJuxpY3DFr/ZZVyucMb9Y9XmR0=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=VR16MdjIPdG/aJi/8rcZubmDYVYkcZ9o4dvp6SNnZCtM27RyxRXLnp4IKg6SeXxuU A1u1mvtI+BbGgjyakA8b1+8Lrhipzz3Nho9hlmg8zPhvVmfE/ndahu5N3s5MSQdQyE dj8Hd/RsW4xBMq7V9IbexYwxzCe5oE0eMWVBXa4g= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id F2F3E3858002 for ; Wed, 19 Jul 2023 16:46:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org F2F3E3858002 Received: from pps.filterd (m0356517.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 36JGco14028302; Wed, 19 Jul 2023 16:46:55 GMT Received: from ppma11.dal12v.mail.ibm.com (db.9e.1632.ip4.static.sl-reverse.com [50.22.158.219]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3rxjx09ep7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 19 Jul 2023 16:46:54 +0000 Received: from pps.filterd (ppma11.dal12v.mail.ibm.com [127.0.0.1]) by ppma11.dal12v.mail.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 36JDVSLZ004479; Wed, 19 Jul 2023 16:46:53 GMT Received: from smtprelay06.wdc07v.mail.ibm.com ([172.16.1.73]) by ppma11.dal12v.mail.ibm.com (PPS) with ESMTPS id 3rv8g13c9r-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 19 Jul 2023 16:46:53 +0000 Received: from smtpav01.dal12v.mail.ibm.com (smtpav01.dal12v.mail.ibm.com [10.241.53.100]) by smtprelay06.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 36JGkqVC44171528 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 19 Jul 2023 16:46:52 GMT Received: from smtpav01.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3E70658059; Wed, 19 Jul 2023 16:46:52 +0000 (GMT) Received: from smtpav01.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7541B5805D; Wed, 19 Jul 2023 16:46:50 +0000 (GMT) Received: from [9.43.51.111] (unknown [9.43.51.111]) by smtpav01.dal12v.mail.ibm.com (Postfix) with ESMTP; Wed, 19 Jul 2023 16:46:50 +0000 (GMT) Message-ID: Date: Wed, 19 Jul 2023 22:16:48 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US Subject: [PATCH V2] rs6000: Don't allow AltiVec address in movoo & movxo pattern [PR110411] To: gcc-patches@gcc.gnu.org, "Kewen.Lin" , segher@kernel.crashing.org, Peter Bergner X-TM-AS-GCONF: 00 X-Proofpoint-GUID: D4X0AmXxV8_SVz5n4JvshYBefJPA3I__ X-Proofpoint-ORIG-GUID: D4X0AmXxV8_SVz5n4JvshYBefJPA3I__ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-19_12,2023-07-19_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 mlxscore=0 bulkscore=0 phishscore=0 lowpriorityscore=0 clxscore=1015 priorityscore=1501 mlxlogscore=999 impostorscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2307190149 X-Spam-Status: No, score=-13.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: jeevitha via Gcc-patches From: jeevitha Reply-To: jeevitha Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771868270507931819 X-GMAIL-MSGID: 1771868270507931819 Hi All, The following patch has been bootstrapped and regtested on powerpc64le-linux. There are no instructions that do traditional AltiVec addresses (i.e. with the low four bits of the address masked off) for OOmode and XOmode objects. The solution is to modify the constraints used in the movoo and movxo pattern to disallow these types of addresses, which assists LRA in resolving this issue. Furthermore, the mode size 16 check has been removed in vsx_quad_dform_memory_operand to allow OOmode and quad_address_p already handles less than size 16. 2023-07-19 Jeevitha Palanisamy gcc/ PR target/110411 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow AltiVec address in movoo and movxo pattern. (define_insn_and_split movxo): Likewise. *config/rs6000/predicates.md (vsx_quad_dform_memory_operand):Remove redundant mode size check. gcc/testsuite/ PR target/110411 * gcc.target/powerpc/pr110411-1.c: New testcase. * gcc.target/powerpc/pr110411-2.c: New testcase. diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md index d36dc13872b..575751d477e 100644 --- a/gcc/config/rs6000/mma.md +++ b/gcc/config/rs6000/mma.md @@ -293,8 +293,8 @@ }) (define_insn_and_split "*movoo" - [(set (match_operand:OO 0 "nonimmediate_operand" "=wa,m,wa") - (match_operand:OO 1 "input_operand" "m,wa,wa"))] + [(set (match_operand:OO 0 "nonimmediate_operand" "=wa,ZwO,wa") + (match_operand:OO 1 "input_operand" "ZwO,wa,wa"))] "TARGET_MMA && (gpc_reg_operand (operands[0], OOmode) || gpc_reg_operand (operands[1], OOmode))" @@ -340,8 +340,8 @@ }) (define_insn_and_split "*movxo" - [(set (match_operand:XO 0 "nonimmediate_operand" "=d,m,d") - (match_operand:XO 1 "input_operand" "m,d,d"))] + [(set (match_operand:XO 0 "nonimmediate_operand" "=d,ZwO,d") + (match_operand:XO 1 "input_operand" "ZwO,d,d"))] "TARGET_MMA && (gpc_reg_operand (operands[0], XOmode) || gpc_reg_operand (operands[1], XOmode))" diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index 3552d908e9d..925f69cd3fc 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -924,7 +924,7 @@ (define_predicate "vsx_quad_dform_memory_operand" (match_code "mem") { - if (!TARGET_P9_VECTOR || GET_MODE_SIZE (mode) != 16) + if (!TARGET_P9_VECTOR) return false; return quad_address_p (XEXP (op, 0), mode, false); diff --git a/gcc/testsuite/gcc.target/powerpc/pr110411-1.c b/gcc/testsuite/gcc.target/powerpc/pr110411-1.c new file mode 100644 index 00000000000..f42e9388d65 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr110411-1.c @@ -0,0 +1,22 @@ +/* PR target/110411 */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-O2 -mdejagnu-cpu=power10 -mblock-ops-vector-pair" } */ + +/* Verify we do not ICE on the following. */ + +#include + +struct s { + long a; + long b; + long c; + long d: 1; +}; +unsigned long ptr; + +void +bug (struct s *dst) +{ + struct s *src = (struct s *)(ptr & ~0xFUL); + memcpy (dst, src, sizeof(struct s)); +} diff --git a/gcc/testsuite/gcc.target/powerpc/pr110411-2.c b/gcc/testsuite/gcc.target/powerpc/pr110411-2.c new file mode 100644 index 00000000000..c2046fb9855 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr110411-2.c @@ -0,0 +1,12 @@ +/* PR target/110411 */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-O2 -mdejagnu-cpu=power10" } */ + +/* Verify we do not ICE on the following. */ + +void +bug (__vector_quad *dst) +{ + dst = (__vector_quad *)((unsigned long)dst & ~0xFUL); + __builtin_mma_xxsetaccz (dst); +}