From patchwork Wed Jul 19 16:18:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Harvey X-Patchwork-Id: 122713 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:c923:0:b0:3e4:2afc:c1 with SMTP id j3csp2562314vqt; Wed, 19 Jul 2023 09:36:22 -0700 (PDT) X-Google-Smtp-Source: APBJJlF4zD5PKxUvaBq2/NQoEVJMZLAzc5KiPnl7ZjMfVSSq7MMY0CPuGh763CmG6B2twxjs6GNj X-Received: by 2002:a05:6a20:728d:b0:134:2b46:797f with SMTP id o13-20020a056a20728d00b001342b46797fmr15962944pzk.18.1689784581784; Wed, 19 Jul 2023 09:36:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1689784581; cv=none; d=google.com; s=arc-20160816; b=GGHmyqRmbgLNkQit84ZADqlmnq7sfSgQpTaaqqsCDs3sl1BhgALHTKIkPwUZDwAPmY DmQvvyFIytXd1sE02yFqR7mJV1JdT9lpGIBmyPgXVd/F7fzsi8/oUo0n2P8PKOcPBHZC fdCK9kDkROaxGK6ut1/2ThoakX603zIkd0RElSxSg8lrN2fJBR/X4wqfuzLTdndlfAVd cXDszynY00V6zCrf3SgMYxxZ8i8J7ZwPsTmBl7LaZBQp5Ajk4kykaKOigoBPg0oaVaS2 20Z3kbTg9POr1GpUVAMl0pb3mI25Zh8radi62pxAJYTQGZDyBIEf6kBflfZPbi53E516 v55g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=f+pqlN7shcQf+ADzYQf7B7aK2SpaJI9+1mhz57WKk+U=; fh=xZhIHt1Fc3OOTSYWfs4fhIMYJ8PzLyRD6ha2V2748mQ=; b=kNq872Jtkm+DAYJsBRLna+L+ztnnO0qdR0tRV9MEiqooZwVSm3iayZR67af7Vn2kf3 Tn+tM3+d8x7yFTbTJeuTqAPiTJkfDUHHe32Cz5/qbgPEQgE5O0QhhQMf1Wc5EHndBG3I Pb18uhsPBcGfsx6c3x6x0pzESaYzak8RwFhwXY5A3QKMUAo1ZdCI5mnj+fw7Wr64MEdr WuHW9yOux44YcILQb9khMjl0Ia6CFt2w9WdMZ16RjKIHlokUxigd2Sp95Exr0/GcJ1lp dvb9hRVa7MJBCxr2D9IH/LG5dtv74935nEY6Y2d9Do626SZkbihH7M+V3Co5prVNFlb4 hMfw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id d1-20020a63fd01000000b0054fe4a4f66bsi3833684pgh.61.2023.07.19.09.36.08; Wed, 19 Jul 2023 09:36:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230201AbjGSQSk (ORCPT + 99 others); Wed, 19 Jul 2023 12:18:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229587AbjGSQSf (ORCPT ); Wed, 19 Jul 2023 12:18:35 -0400 Received: from finn.localdomain (finn.gateworks.com [108.161.129.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0DB371733; Wed, 19 Jul 2023 09:18:33 -0700 (PDT) Received: from 068-189-091-139.biz.spectrum.com ([68.189.91.139] helo=tharvey.pdc.gateworks.com) by finn.localdomain with esmtp (Exim 4.93) (envelope-from ) id 1qM9sk-007Fhk-Fr; Wed, 19 Jul 2023 16:18:30 +0000 From: Tim Harvey To: Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Tim Harvey , Krzysztof Kozlowski Subject: [PATCH v3 1/2] dt-bindings: arm: Add Gateworks i.MX8M Plus gw73xx-2x board Date: Wed, 19 Jul 2023 09:18:26 -0700 Message-Id: <20230719161827.7588-1-tharvey@gateworks.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771867557858976484 X-GMAIL-MSGID: 1771867557858976484 Add DT compatible string for a Gateworks GW73xx-2x board based on the i.MX8M Plus SoC from NXP. Signed-off-by: Tim Harvey Acked-by: Krzysztof Kozlowski --- v3: - fix commit message: s/Mini/Plus/ - add Krzysztof's tag v2: - no changes --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 3bc64bf2df79..c4039a797fe1 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1034,6 +1034,7 @@ properties: - fsl,imx8mp-evk # i.MX8MP EVK Board - gateworks,imx8mp-gw71xx-2x # i.MX8MP Gateworks Board - gateworks,imx8mp-gw72xx-2x # i.MX8MP Gateworks Board + - gateworks,imx8mp-gw73xx-2x # i.MX8MP Gateworks Board - gateworks,imx8mp-gw74xx # i.MX8MP Gateworks Board - gateworks,imx8mp-gw7905-2x # i.MX8MP Gateworks Board - polyhex,imx8mp-debix # Polyhex Debix boards From patchwork Wed Jul 19 16:18:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Harvey X-Patchwork-Id: 122726 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:c923:0:b0:3e4:2afc:c1 with SMTP id j3csp2568518vqt; Wed, 19 Jul 2023 09:47:25 -0700 (PDT) X-Google-Smtp-Source: APBJJlHr2wuNZ9nhP1/TsDDe4TI4Impu0U5YKkxnKZ6uono/CqJmd16j/vM7GZYJawVoUR2qtlS1 X-Received: by 2002:a05:6512:2525:b0:4f8:58ae:8ea8 with SMTP id be37-20020a056512252500b004f858ae8ea8mr429916lfb.58.1689785245583; Wed, 19 Jul 2023 09:47:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1689785245; cv=none; d=google.com; s=arc-20160816; b=mEzuz/xT+/d2g0kQfGdzQ/CvhB/rEe+0f+FllNAF9CLnENmLd6paZYrUzWz6SroVw8 Fg0gQvKgNH3c6nNoJj6JNUTuXl1ZPLNdYU3IGVjz/DGnlnl6S+fllEN4SQ56Oy4qMYzO iwsh2IKK5E2oSgvUxbg0PLbgrtNShpWFrsV0pru83nMVNNzgdyMaPGQs9wzXXcUsFsLt o1fiHlr7R8AmSwxcoEyu/9r6A4axB0N5P4GzfqrmdjEzGP3MmadvI1co/XjP80PpZv7u PoidSF2vJDY04w29HjD5+om89oWE0VeIRydWrx5Fe3o8X/Zmh/EGXsQsDi+bhBF9lZS8 3qZw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=RD32t8GXAGqy3OKRSd6v5nFoC2Xp1iAorRr3yeBanP4=; fh=BpZGbRlUT7+D3jGlD8Vhfmc3ScOx4DpgMVpVSBMUAEM=; b=R3P284CLGDWcTE7HbRq6H8LEq/nfNMUrG1Ag8PCnivvEejR2pL7V9fgx4WaSp7+8j7 SmHhnoiLDmb+klHEEiSlTy/ngV89irdqc0mG6YP5frgpVUXDe3LOAqgkV2ihu4XrnR9S Jd0AfUMq3E2pIJOE2MDgH2NetVHPoHJg8E+c6r9DOPgOdPp8fjrzH3kMi5kFSMbULJcF 71jXWtB5VUFaTi90o5YzsQhsKHwq31QPtKkKnweShWNP7vIcg88Z6Cs0DWvF+mDMRAt/ ID1BQ6DuRSRtnM0tWc9LEYllvX17xasay6mONswwgGSHO8+/XtNYmaOl/Gz2Q1xtFsJA fnIA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id d7-20020a056402516700b0051dd4e2847csi2962799ede.660.2023.07.19.09.47.01; Wed, 19 Jul 2023 09:47:25 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229960AbjGSQSg (ORCPT + 99 others); Wed, 19 Jul 2023 12:18:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42782 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229552AbjGSQSf (ORCPT ); Wed, 19 Jul 2023 12:18:35 -0400 Received: from finn.localdomain (finn.gateworks.com [108.161.129.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5FF36172E; Wed, 19 Jul 2023 09:18:33 -0700 (PDT) Received: from 068-189-091-139.biz.spectrum.com ([68.189.91.139] helo=tharvey.pdc.gateworks.com) by finn.localdomain with esmtp (Exim 4.93) (envelope-from ) id 1qM9sl-007Fhk-B6; Wed, 19 Jul 2023 16:18:31 +0000 From: Tim Harvey To: Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Tim Harvey Subject: [PATCH v3 2/2] arm64: dts: freescale: Add imx8mp-venice-gw73xx-2x Date: Wed, 19 Jul 2023 09:18:27 -0700 Message-Id: <20230719161827.7588-2-tharvey@gateworks.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230719161827.7588-1-tharvey@gateworks.com> References: <20230719161827.7588-1-tharvey@gateworks.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771868253524562101 X-GMAIL-MSGID: 1771868253524562101 The Gateworks imx8mp-venice-gw73xx-2x consists of a SOM + baseboard. The GW702x SOM contains the following: - i.MX8M Plus SoC - LPDDR4 memory - eMMC Boot device - Gateworks System Controller (GSC) with integrated EEPROM, button controller, and ADC's - PMIC - SOM connector providing: - eQoS GbE MII - 1x SPI - 2x I2C - 4x UART - 2x USB 3.0 - 1x PCI - 1x SDIO (4-bit 3.3V) - 1x SDIO (4-bit 3.3V/1.8V) - GPIO The GW73xx Baseboard contains the following: - GPS - microSD - off-board I/O connector with SPI - off-board I/O connector with I2C, and GPIO - off-board I/O connector with MIPI DSI, MIPI CSI, I2C, and GPIO - off-board I/O connector with RS232 and RS485 - EERPOM - USB 3.0 HUB - USB 3.0 TypeA socket - USB 2.0 Micro-B OTG socket - Accelerometer - 1x GbE (eQoS) - 1x GbE (PCI) - PCIe clock generator - PCIe switch - 2x full-length miniPCIe socket with PCI and USB2.0 - 1x full-length miniPCIe socket with PCI/USB3 (via mux) SIM, and USB2.0 - 1x half-length miniPCIe socket with USB2.0 and USB3.0 - USB Type-C with USB PD Sink capability and peripheral support - USB Type-C with USB 3.0 host support - on-board 802.11abgnac with Bluetooth 5.2 - Wide range DC input supply Signed-off-by: Tim Harvey --- v3: - change clock name from pcie0-refclk to clock-pcie0 - start properties with compatible then reg with pinctrl following v2: - remove invalid uart-has-rtscts from uart3 --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../dts/freescale/imx8mp-venice-gw73xx-2x.dts | 19 + .../dts/freescale/imx8mp-venice-gw73xx.dtsi | 414 ++++++++++++++++++ 3 files changed, 434 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx-2x.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 583d9a77918f..454b07ed09fc 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -103,6 +103,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw73xx-2x.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw7905-2x.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dahlia.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx-2x.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx-2x.dts new file mode 100644 index 000000000000..000fd15e0c07 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx-2x.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2023 Gateworks Corporation + */ + +/dts-v1/; + +#include "imx8mp.dtsi" +#include "imx8mp-venice-gw702x.dtsi" +#include "imx8mp-venice-gw73xx.dtsi" + +/ { + model = "Gateworks Venice GW73xx-2x i.MX8MP Development Kit"; + compatible = "gateworks,imx8mp-gw73xx-2x", "fsl,imx8mp"; + + chosen { + stdout-path = &uart2; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi new file mode 100644 index 000000000000..68c62def4c06 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi @@ -0,0 +1,414 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2023 Gateworks Corporation + */ + +#include +#include +#include + +/ { + led-controller { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_leds>; + + led-0 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + + led-1 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + pcie0_refclk: clock-pcie0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + }; + + pps { + compatible = "pps-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pps>; + gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + reg_usb1_vbus: regulator-usb1 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_usb1_en>; + regulator-name = "usb1_vbus"; + gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_usb2_vbus: regulator-usb2 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_usb2_en>; + regulator-name = "usb2_vbus"; + gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_wifi_en: regulator-wifi-en { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_wl>; + regulator-name = "wl"; + gpio = <&gpio4 19 GPIO_ACTIVE_HIGH>; + startup-delay-us = <100>; + enable-active-high; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_usdhc2_vmmc: regulator-usdhc2-vmmc { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2_vmmc>; + regulator-name = "VDD_3V3_SD"; + enable-active-high; + gpio = <&gpio2 19 0>; /* SD2_RESET */ + off-on-delay-us = <12000>; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + startup-delay-us = <100>; + }; +}; + +/* off-board header */ +&ecspi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi2>; + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&gpio4 { + gpio-line-names = + "", "", "", "", + "", "", "", "", + "dio1", "", "", "dio0", + "", "", "pci_usb_sel", "", + "", "", "", "", + "", "", "rs485_en", "rs485_term", + "", "", "", "rs485_half", + "pci_wdis#", "", "", ""; +}; + +&i2c2 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + accelerometer@19 { + compatible = "st,lis2de12"; + reg = <0x19>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_accel>; + st,drdy-int-pin = <1>; + interrupt-parent = <&gpio4>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "INT1"; + }; +}; + +&pcie_phy { + fsl,refclk-pad-mode = ; + fsl,clkreq-unsupported; + clocks = <&pcie0_refclk>; + clock-names = "ref"; + status = "okay"; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie0>; + reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +/* GPS */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +/* bluetooth HCI */ +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_bten>; + cts-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; + rts-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; + status = "okay"; + + bluetooth { + compatible = "brcm,bcm4330-bt"; + shutdown-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; + }; +}; + +/* RS232 */ +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +/* USB1 - OTG */ +&usb3_0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1>; + fsl,over-current-active-low; + status = "okay"; +}; + +&usb3_phy0 { + vbus-supply = <®_usb1_vbus>; + status = "okay"; +}; + +&usb_dwc3_0 { + /* dual role is implemented but not a full featured OTG */ + adp-disable; + hnp-disable; + srp-disable; + dr_mode = "otg"; + usb-role-switch; + role-switch-default-mode = "peripheral"; + status = "okay"; + + connector { + compatible = "gpio-usb-b-connector", "usb-b-connector"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbcon1>; + type = "micro"; + label = "otg"; + id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; + }; +}; + +/* USB2 - USB3.0 Hub */ +&usb3_1 { + fsl,permanently-attached; + fsl,disable-port-power-control; + status = "okay"; +}; + +&usb3_phy1 { + vbus-supply = <®_usb2_vbus>; + status = "okay"; +}; + +&usb_dwc3_1 { + dr_mode = "host"; + status = "okay"; +}; + +/* SDIO WiFi */ +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + bus-width = <4>; + non-removable; + vmmc-supply = <®_wifi_en>; + status = "okay"; +}; + +/* microSD */ +&usdhc2 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; + bus-width = <4>; + vmmc-supply = <®_usdhc2_vmmc>; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + pinctrl_hog: hoggrp { + fsl,pins = < + MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08 0x40000146 /* DIO1 */ + MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11 0x40000146 /* DIO0 */ + MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x40000106 /* PCIE_USBSEL */ + MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x40000106 /* RS485_HALF */ + MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x40000106 /* RS485_EN */ + MX8MP_IOMUXC_SAI2_RXD0__GPIO4_IO23 0x40000106 /* RS485_TERM */ + MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCIE_WDIS# */ + >; + }; + + pinctrl_accel: accelgrp { + fsl,pins = < + MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x150 /* IRQ */ + >; + }; + + pinctrl_bten: btengrp { + fsl,pins = < + MX8MP_IOMUXC_SAI1_TXD4__GPIO4_IO16 0x146 + >; + }; + + pinctrl_gpio_leds: gpioledgrp { + fsl,pins = < + MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x6 /* LEDG */ + MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x6 /* LEDR */ + >; + }; + + pinctrl_pcie0: pcie0grp { + fsl,pins = < + MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106 + >; + }; + + pinctrl_pps: ppsgrp { + fsl,pins = < + MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x146 + >; + }; + + pinctrl_reg_wl: regwlgrp { + fsl,pins = < + MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x146 + >; + }; + + pinctrl_reg_usb1_en: regusb1grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x146 /* USB1_EN */ + >; + }; + + pinctrl_usb1: usb1grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x140 /* USB1_FLT# */ + >; + }; + + pinctrl_usbcon1: usbcon1grp { + fsl,pins = < + MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x140 /* USB1_ID */ + >; + }; + + pinctrl_reg_usb2_en: regusb2grp { + fsl,pins = < + MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12 0x146 /* USBHUB_RST# */ + >; + }; + + pinctrl_spi2: spi2grp { + fsl,pins = < + MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140 + MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140 + MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140 + MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140 + MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140 + MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140 + MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08 0x140 + MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x140 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x140 + MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x140 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190 + MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0 + MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0 + MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0 + MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0 + MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0 + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0 + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0 + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0 + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0 + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { + fsl,pins = < + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194 + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4 + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4 + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4 + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4 + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4 + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { + fsl,pins = < + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196 + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6 + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6 + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6 + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6 + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6 + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 + >; + }; + + pinctrl_usdhc2_vmmc: usdhc2-vmmc-grp { + fsl,pins = < + MX8MP_IOMUXC_SD2_RESET_B__USDHC2_RESET_B 0x1d0 + >; + }; + + pinctrl_usdhc2_gpio: usdhc2gpiogrp { + fsl,pins = < + MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 + >; + }; +};