From patchwork Wed Jul 19 16:14:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Harvey X-Patchwork-Id: 122712 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:c923:0:b0:3e4:2afc:c1 with SMTP id j3csp2561128vqt; Wed, 19 Jul 2023 09:34:30 -0700 (PDT) X-Google-Smtp-Source: APBJJlGACjEHfjUZBqJuFEoNxJ1zhW9s2bNgtd23RBnOw9wpYTVQ2Z4xySRRQKhwlz5sSGjNohfL X-Received: by 2002:a17:902:db0d:b0:1b8:5bf5:543a with SMTP id m13-20020a170902db0d00b001b85bf5543amr3184579plx.49.1689784469756; Wed, 19 Jul 2023 09:34:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1689784469; cv=none; d=google.com; s=arc-20160816; b=cDNm8XYkG2xHOrrU972b3uzFmvYWTCPFGyhDAHpXSEgK4hut5tQc59SfnASNCZedmw vjPQkKHB/zGZk8E9Yn61o21YniMdSHGRVmkQ7cqykXgvhiCX9iPrtfMXKjTR3p3Ke+nq bXiTbdsaS77/x3DsRTDZKRW9vBXtZq3SsnSrMTf3ESweR8382dWxrFoKbnyB3l+rHTL9 1YHm/N2tZLU7dUT8X7CtrewvGzT0YthO59k6Zk+b2y3FI+YDVWhA2CkSRIRXrPmMDXGl IS2PLF/X4xE+Slx1R49bPSGBPrU4zy0h3/TOllAYd7viJxhPd/HDfKy7xbPUFJeCKzZx etxw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=4QYXMSJluZmlvj6MZ6UhadJ6Yc5ow9bcpil2tJxg70E=; fh=xZhIHt1Fc3OOTSYWfs4fhIMYJ8PzLyRD6ha2V2748mQ=; b=xSjxh1r6QE9wJjbEaM2wGLSVXUOrAOGsU1DwTHCSZEfwCj7jJSFXJZ8tYP5jLJ9b5s f2YO4fIkOo1dpgd5oql4LZsnTUf8iFQLB6RhpJ3e+yKXy3XoCLHBWg4PWYAhZ2mwR8t2 mI0pYBWGXu46JSHShUIXVfbJb2Q7m5MWFWuHZK4O5GcZ+21r1e8/dCq6LYns08bGlTXd REerCr0HH7Vw908B0GDFp/EkMQXmcD/NeSQVGWU0KoKmJIPb/gvEdFBS2WhtLj9oR2tV VAZ3gjuDjp9DQ8FLSLesYHxN0o3sEeG5WkBmN/6+0hv5NnB+xHArmantAA2brH7qTF2G DxLQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a15-20020a170902eccf00b001a1e0fd406csi3914964plh.217.2023.07.19.09.34.04; Wed, 19 Jul 2023 09:34:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229847AbjGSQO6 (ORCPT + 99 others); Wed, 19 Jul 2023 12:14:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40004 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229596AbjGSQO5 (ORCPT ); Wed, 19 Jul 2023 12:14:57 -0400 Received: from finn.localdomain (finn.gateworks.com [108.161.129.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD84E10E; Wed, 19 Jul 2023 09:14:56 -0700 (PDT) Received: from 068-189-091-139.biz.spectrum.com ([68.189.91.139] helo=tharvey.pdc.gateworks.com) by finn.localdomain with esmtp (Exim 4.93) (envelope-from ) id 1qM9pF-007Fg9-E3; Wed, 19 Jul 2023 16:14:53 +0000 From: Tim Harvey To: Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Tim Harvey , Krzysztof Kozlowski Subject: [PATCH v2 1/2] dt-bindings: arm: Add Gateworks i.MX8M Plus gw71xx-2x board Date: Wed, 19 Jul 2023 09:14:50 -0700 Message-Id: <20230719161451.7319-1-tharvey@gateworks.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771867440287260012 X-GMAIL-MSGID: 1771867440287260012 Add DT compatible string for a Gateworks GW71xx-2x board based on the i.MX8M Plus SoC from NXP. Signed-off-by: Tim Harvey Acked-by: Krzysztof Kozlowski --- v2: - fix commit message: s/Mini/Plus/ - add Krzysztof's tag --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index b445ce28e843..b540bdb9ec3a 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1032,6 +1032,7 @@ properties: - beacon,imx8mp-beacon-kit # i.MX8MP Beacon Development Kit - dmo,imx8mp-data-modul-edm-sbc # i.MX8MP eDM SBC - fsl,imx8mp-evk # i.MX8MP EVK Board + - gateworks,imx8mp-gw71xx-2x # i.MX8MP Gateworks Board - gateworks,imx8mp-gw74xx # i.MX8MP Gateworks Board - gateworks,imx8mp-gw7905-2x # i.MX8MP Gateworks Board - polyhex,imx8mp-debix # Polyhex Debix boards From patchwork Wed Jul 19 16:14:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Harvey X-Patchwork-Id: 122711 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:c923:0:b0:3e4:2afc:c1 with SMTP id j3csp2560134vqt; Wed, 19 Jul 2023 09:32:49 -0700 (PDT) X-Google-Smtp-Source: APBJJlHYj2Wkqrknq9GWbpox/DQ9EmsedTXSyQt7Mavl8mf/yFpWTOABdzYOLOd9pn7w6dd5/oWn X-Received: by 2002:a17:902:c1d4:b0:1b8:a389:43ef with SMTP id c20-20020a170902c1d400b001b8a38943efmr18605062plc.24.1689784368980; Wed, 19 Jul 2023 09:32:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1689784368; cv=none; d=google.com; s=arc-20160816; b=K8i+Crbmk85K/hp1jNhsaNc4DygFv5h4hW7dsEUsYtUCTU7+q8WJ3a2/8m8+UWgaE0 WGTxpFF36XNnKuPqZvEZAE0hopTDhyzhCd3myqjdFbygUtbQ/nrqOs4/HhZ8egplhkaN 1u2Db3FfkIG/pDvOoOWZthOjdjYMmLExmFKGg0mK3FAzCJIED/RfztpWCXvNF6STDFYm xhFA2Fw5QLKrMUKObN9sjLmXmXtz7JgBDP0aBjrSRBo3LAqttBHfO2AoGEN/mt4hCLKx wkEc9K1eMn/+2am7LOvkHQ+kbmELjTu9pNP8C5SOUranfZW30ZMsPJvz/ponug9oEchD d3CA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=kUApx5ivrttn7WPGnoMuRL5UqSQVKS773hq747O9Zl4=; fh=BpZGbRlUT7+D3jGlD8Vhfmc3ScOx4DpgMVpVSBMUAEM=; b=W5fukSyUCLgJLkWkUmNuK1BdZgsmM23NKtN63pTAPrk51wOcCGv41I15p+7HAnALN2 jHAFULkva4B3qAE6UjSAuwgghCvBGSmp6g3laqJn8PQ+WOXvqjTD3gKaUq3zmFIEKTGy fArwQcX91yruz7XhlpsXaPrYZsqHAkpqL4W06qbkuKR9XpZBGhAo+aoyplUbgPmg1PGl c0W8J1pgTxp7B4XYLWfPbWdiWqGUvF8Vg0mzaT1hWbX//XTIoD/Ty80LYJS69jZ3NSEp 0Jbh0vPzTH55vPVmrkjpO4GstARxmeRjrpe8FdXwoNTOsZDKLAqyaJ/7mdzdhOt2NG0U TF6A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id e2-20020a17090301c200b001b7ea20dbf2si3859437plh.224.2023.07.19.09.32.34; Wed, 19 Jul 2023 09:32:48 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230062AbjGSQPA (ORCPT + 99 others); Wed, 19 Jul 2023 12:15:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40010 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229852AbjGSQO7 (ORCPT ); Wed, 19 Jul 2023 12:14:59 -0400 Received: from finn.localdomain (finn.gateworks.com [108.161.129.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5CE4FC7; Wed, 19 Jul 2023 09:14:57 -0700 (PDT) Received: from 068-189-091-139.biz.spectrum.com ([68.189.91.139] helo=tharvey.pdc.gateworks.com) by finn.localdomain with esmtp (Exim 4.93) (envelope-from ) id 1qM9pG-007Fg9-9k; Wed, 19 Jul 2023 16:14:54 +0000 From: Tim Harvey To: Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Tim Harvey Subject: [PATCH v2 2/2] arm64: dts: freescale: Add imx8mp-venice-gw71xx-2x Date: Wed, 19 Jul 2023 09:14:51 -0700 Message-Id: <20230719161451.7319-2-tharvey@gateworks.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230719161451.7319-1-tharvey@gateworks.com> References: <20230719161451.7319-1-tharvey@gateworks.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771867334445237140 X-GMAIL-MSGID: 1771867334445237140 The Gateworks imx8mp-venice-gw71xx-2x consists of a SOM + baseboard. The GW702x SOM contains the following: - i.MX8M Plus SoC - LPDDR4 memory - eMMC Boot device - Gateworks System Controller (GSC) with integrated EEPROM, button controller, and ADC's - PMIC - SOM connector providing: - eQoS GbE MII - 1x SPI - 2x I2C - 4x UART - 2x USB 3.0 - 1x PCI - 1x SDIO (4-bit 3.3V) - 1x SDIO (4-bit 3.3V/1.8V) - GPIO The GW71xx Baseboard contains the following: - GPS - RJ45 GbE (eQoS) - off-board I/O connector with UART, I2C, SPI, GPIO - EERPOM - PCIe clock generator - full-length miniPCIe socket with PCI/USB3 (via mux) and USB2.0 - USB Type-C with USB 2.0 host and peripheral support - Wide range DC input supply Signed-off-by: Tim Harvey --- v2: - change clock name from pcie0-refclk to clock-pcie0 - start properties with compatible then reg with pinctrl following --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../dts/freescale/imx8mp-venice-gw71xx-2x.dts | 19 ++ .../dts/freescale/imx8mp-venice-gw71xx.dtsi | 236 ++++++++++++++++++ 3 files changed, 256 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx-2x.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index ea63d8f65385..9a7b8361491b 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -101,6 +101,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw7905-2x.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dahlia.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx-2x.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx-2x.dts new file mode 100644 index 000000000000..53120fc9cd7f --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx-2x.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2023 Gateworks Corporation + */ + +/dts-v1/; + +#include "imx8mp.dtsi" +#include "imx8mp-venice-gw702x.dtsi" +#include "imx8mp-venice-gw71xx.dtsi" + +/ { + model = "Gateworks Venice GW71xx-2x i.MX8MP Development Kit"; + compatible = "gateworks,imx8mp-gw71xx-2x", "fsl,imx8mp"; + + chosen { + stdout-path = &uart2; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi new file mode 100644 index 000000000000..c531564c7ebb --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi @@ -0,0 +1,236 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2023 Gateworks Corporation + */ + +#include +#include +#include + +/ { + led-controller { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_leds>; + + led-0 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + + led-1 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + pcie0_refclk: clock-pcie0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + }; + + pps { + compatible = "pps-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pps>; + gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; +}; + +/* off-board header */ +&ecspi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi2>; + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&gpio4 { + gpio-line-names = + "", "", "", "", + "", "", "", "", + "dio1", "", "", "dio0", + "", "", "pci_usb_sel", "", + "", "", "", "", + "", "", "", "", + "dio3", "", "dio2", "", + "pci_wdis#", "", "", ""; +}; + +&i2c2 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + accelerometer@19 { + compatible = "st,lis2de12"; + reg = <0x19>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_accel>; + st,drdy-int-pin = <1>; + interrupt-parent = <&gpio4>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "INT1"; + }; +}; + +&pcie_phy { + fsl,refclk-pad-mode = ; + fsl,clkreq-unsupported; + clocks = <&pcie0_refclk>; + clock-names = "ref"; + status = "okay"; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie0>; + reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +/* GPS */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +/* off-board header */ +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "okay"; +}; + +/* USB1 Type-C front panel */ +&usb3_0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1>; + fsl,over-current-active-low; + status = "okay"; +}; + +&usb3_phy0 { + status = "okay"; +}; + +&usb_dwc3_0 { + /* dual role is implemented but not a full featured OTG */ + adp-disable; + hnp-disable; + srp-disable; + dr_mode = "otg"; + usb-role-switch; + role-switch-default-mode = "peripheral"; + status = "okay"; + + connector { + compatible = "gpio-usb-b-connector", "usb-b-connector"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbcon1>; + type = "micro"; + label = "Type-C"; + id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; + }; +}; + +/* USB2 - MiniPCIe socket */ +&usb3_1 { + fsl,permanently-attached; + fsl,disable-port-power-control; + status = "okay"; +}; + +&usb3_phy1 { + status = "okay"; +}; + +&usb_dwc3_1 { + dr_mode = "host"; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + pinctrl_hog: hoggrp { + fsl,pins = < + MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08 0x40000146 /* DIO1 */ + MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11 0x40000146 /* DIO0 */ + MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x40000106 /* PCIE_USBSEL */ + MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26 0x40000146 /* DIO2 */ + MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24 0x40000146 /* DIO3 */ + MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCIE_WDIS# */ + >; + }; + + pinctrl_accel: accelgrp { + fsl,pins = < + MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x150 /* IRQ */ + >; + }; + + pinctrl_gpio_leds: gpioledgrp { + fsl,pins = < + MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x6 /* LEDG */ + MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x6 /* LEDR */ + >; + }; + + pinctrl_pcie0: pcie0grp { + fsl,pins = < + MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106 + >; + }; + + pinctrl_pps: ppsgrp { + fsl,pins = < + MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x146 + >; + }; + + pinctrl_usb1: usb1grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x140 /* USB1_FLT# */ + >; + }; + + pinctrl_usbcon1: usbcon1grp { + fsl,pins = < + MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x140 /* USB1_ID */ + >; + }; + + pinctrl_spi2: spi2grp { + fsl,pins = < + MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140 + MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140 + MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140 + MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140 + MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140 + MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140 + >; + }; +};