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Signed-off-by: Michael Riesch Acked-by: Conor Dooley --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 1e2e51401dc5..1dfafc339ddd 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -677,6 +677,8 @@ patternProperties: description: iWave Systems Technologies Pvt. Ltd. "^jadard,.*": description: Jadard Technology Inc. + "^jasonic,.*": + description: Jasonic Technology Ltd. "^jdi,.*": description: Japan Display Inc. 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JT240MHQS-HWT-EK-E3 display. Signed-off-by: Michael Riesch Acked-by: Conor Dooley --- Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml b/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml index 905c064cd106..eb1a7256ac32 100644 --- a/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml +++ b/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml @@ -18,6 +18,7 @@ properties: enum: - edt,et028013dma - inanbo,t28cp45tn89-v17 + - jasonic,jt240mhqs-hwt-ek-e3 - sitronix,st7789v reg: true From patchwork Tue Jul 18 15:31:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 122105 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:c923:0:b0:3e4:2afc:c1 with SMTP id j3csp1851920vqt; Tue, 18 Jul 2023 09:07:22 -0700 (PDT) X-Google-Smtp-Source: APBJJlFLi2m0Tl8wyZbHTV63Fets37dFCJPBcgDdWcare9M73t/8c0voVeHm35tcdX0+fcUaC8+P X-Received: by 2002:a17:90a:eb17:b0:25f:20f:2f7d with SMTP id j23-20020a17090aeb1700b0025f020f2f7dmr14513953pjz.2.1689696442595; Tue, 18 Jul 2023 09:07:22 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1689696442; cv=pass; d=google.com; s=arc-20160816; b=e9/jatPq/YSwW/duuw96CThJ1S3AgdEs1zO/FpMpsozI5JL/S8bCT8SkK/CXnuMgvZ e5NO2cGzurWtqQWxE3a+3VvfJMhtjrzSPtp34VWBEq47NS6etLXfoHAWeVLTiOfaW/7m NwE52qGpv4pwLbdcXPl/9QedilT9VF4VFtrOcQ62r2G1ouQCwQ9jDTGLXQY1YQRJBuJK K5RcZC6zN2UjgTWRLFlptXYDIXcoVA2+kw/uws1FCHwvLpXd4EIRl5iYb+d1U1OUbjHH oEY2tbyFdcGjR/FkjaBf49VJNgmF0N8v2I0lP1tmsP/pH8eIcxxvd8kNb+t/nwGX80je V2Fw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:cc:to:in-reply-to:references :message-id:content-transfer-encoding:subject:date:from :dkim-signature; bh=bahtR5u3eXvX7PUqZt+TFypJQJ9zUX6zk+Qjn5hZJqA=; fh=Tq5vakelb7Evvy1hSU1bJIwKBl0VAr7pcHQ3+RKee2k=; b=wdFuLTjk3NZHCHw7Ws8SAWcAR+jMGbDFdwDs9BQJzn8IQQnYEkKZS4MbIdLPXjqS4P QUtps4WDliuYoFAjVlbI7AFbXhrgVtLIydIIXtM206pB7GKNBqxJZn2WRgDQawVp7KgI f3OKrtEuuZRSqQ07YQJKYmcRnNK147+EMkUvMiF5Ck+RGhjw4Kf5/gzK6a4YnW+hTSzL 5eF6+UUfLtBRTOmU2QKYljgx14R50CDIzzKTT2cER2krmLp+foMwYjQSedsevyMrECHX OvenzMzRL4BEgqKtfb0zMMEPKiqh3Cmw+CBRuNp8c8q53T4EcXjz8dKVnews+tcPdDQ2 xeyg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@wolfvision.net header.s=selector2 header.b=fpAQ8Df0; arc=pass (i=1 spf=pass spfdomain=wolfvision.net dkim=pass dkdomain=wolfvision.net dmarc=pass fromdomain=wolfvision.net); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=wolfvision.net Received: from out1.vger.email (out1.vger.email. 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Here, the area to be displayed can be restricted in one direction (by default, in vertical direction). This is useful for panels that are partially occluded by design. Add support for the partial mode. Signed-off-by: Michael Riesch --- drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 38 ++++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c index d16d17f21d92..729d8d7dbf7f 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c @@ -118,6 +118,9 @@ struct st7789_panel_info { u32 bus_format; u32 bus_flags; bool invert_mode; + bool partial_mode; + u16 partial_start; + u16 partial_end; }; struct st7789v { @@ -330,9 +333,14 @@ static int st7789v_get_modes(struct drm_panel *panel, static int st7789v_prepare(struct drm_panel *panel) { struct st7789v *ctx = panel_to_st7789v(panel); - u8 pixel_fmt, polarity; + u8 mode, pixel_fmt, polarity; int ret; + if (!ctx->info->partial_mode) + mode = ST7789V_RGBCTRL_WO; + else + mode = 0; + switch (ctx->info->bus_format) { case MEDIA_BUS_FMT_RGB666_1X18: pixel_fmt = MIPI_DCS_PIXEL_FMT_18BIT; @@ -472,6 +480,32 @@ static int st7789v_prepare(struct drm_panel *panel) MIPI_DCS_EXIT_INVERT_MODE)); } + if (ctx->info->partial_mode) { + u8 area_data[4] = { + (ctx->info->partial_start >> 8) & 0xff, + (ctx->info->partial_start >> 0) & 0xff, + ((ctx->info->partial_end - 1) >> 8) & 0xff, + ((ctx->info->partial_end - 1) >> 0) & 0xff, + }; + + ST7789V_TEST(ret, st7789v_write_command( + ctx, MIPI_DCS_ENTER_PARTIAL_MODE)); + + ST7789V_TEST(ret, st7789v_write_command( + ctx, MIPI_DCS_SET_PAGE_ADDRESS)); + ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[0])); + ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[1])); + ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[2])); + ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[3])); + + ST7789V_TEST(ret, st7789v_write_command( + ctx, MIPI_DCS_SET_PARTIAL_ROWS)); + ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[0])); + ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[1])); + ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[2])); + ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[3])); + } + ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_RAMCTRL_CMD)); ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RAMCTRL_DM_RGB | ST7789V_RAMCTRL_RM_RGB)); @@ -479,7 +513,7 @@ static int st7789v_prepare(struct drm_panel *panel) ST7789V_RAMCTRL_MAGIC)); ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_RGBCTRL_CMD)); - ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RGBCTRL_WO | + ST7789V_TEST(ret, st7789v_write_data(ctx, mode | ST7789V_RGBCTRL_RCM(2) | polarity)); ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RGBCTRL_VBP(8))); From patchwork Tue Jul 18 15:31:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch X-Patchwork-Id: 122108 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:c923:0:b0:3e4:2afc:c1 with SMTP id j3csp1855763vqt; Tue, 18 Jul 2023 09:12:40 -0700 (PDT) X-Google-Smtp-Source: APBJJlHTaYeRGoIq3At64pzvdtaFxryFzAHW2FFAxhSZuCdJ5twRnBBX3FoPWGL1MaW4J+/mKVfh X-Received: by 2002:a17:90a:6fe1:b0:262:e0aa:bbc8 with SMTP id e88-20020a17090a6fe100b00262e0aabbc8mr14630842pjk.8.1689696760422; Tue, 18 Jul 2023 09:12:40 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1689696760; cv=pass; d=google.com; s=arc-20160816; b=ktC8kzMKr7JIhgqZoiMF5LcWdm3OOfmGfhTHeBRDAhuXPgz1PXWu5fGM1tWT1bO09h 2gh/JdHi8wjGPi3ex4COr43MfRRNFOPCjaqr8CwE2u5CkASRih/yXG4PhAcT+wNVbr8n N4U9DKS11kVfdD16e6/BM+rsm8sR8Pe77XHJf/1Ox36y9M9oQBRsbnzQeN6QYxmlA8EQ lBSNEVPHf5w3QqLwanc18BYBOFUwGOVbHCTzCiW28nUNLTPLPMjCuQ2VCNjv7pdoyee7 peEHKnYi4JYPa6QOzTl8ZdReb0usj3+rTfBL1G3IqNbpP4Y0IggyhipYBl+LmVjsfAIq +ERg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:cc:to:in-reply-to:references :message-id:content-transfer-encoding:subject:date:from :dkim-signature; bh=E87Z7uT6z7qx7Gk1+ooAYQ8xSCRr8WcKOLDoY5saXUY=; fh=Tq5vakelb7Evvy1hSU1bJIwKBl0VAr7pcHQ3+RKee2k=; b=GJv6NyAatAXEvZ1w78aM1kbQp7IEPBCd5tE3P2+KqaJcjo+7AJm1fRylFkBqzbtVp+ vsTkmbA/lzAMbApUVxS0ZHFrpHOJ4iIonMQT230YUTuO0f0Y682TFnKJck7rQbifp7gm +2FB5hXj0Y46MNrpBpj5vMevHkbmvRTw1eLG7qb7rd32tiOBDtNnqKTm82NWxrdZhOvu jUpe9OulEEerUFEHdJWLOS/RKXA4mM2lqU2wkMgr0hhKos9nwGuBekK68+sExV8arFT/ fCPSjP+oPRGzSt6HokV/nI4TevROv88/bSeRUToB3wnau/G6AE4mZ7GJJNwYDH4Gosng PkzQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@wolfvision.net header.s=selector2 header.b=c67wFRzG; arc=pass (i=1 spf=pass spfdomain=wolfvision.net dkim=pass dkdomain=wolfvision.net dmarc=pass fromdomain=wolfvision.net); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=wolfvision.net Received: from out1.vger.email (out1.vger.email. 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While the controller features a resolution of 320x240, only an area of 280x240 is visible by design. Signed-off-by: Michael Riesch --- drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 29 ++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c index 729d8d7dbf7f..4c6aed993ba1 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c @@ -278,6 +278,21 @@ static const struct drm_display_mode et028013dma_mode = { .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }; +static const struct drm_display_mode jt240mhqs_hwt_ek_e3_mode = { + .clock = 6000, + .hdisplay = 240, + .hsync_start = 240 + 28, + .hsync_end = 240 + 28 + 10, + .htotal = 240 + 28 + 10 + 10, + .vdisplay = 280, + .vsync_start = 280 + 8, + .vsync_end = 280 + 8 + 4, + .vtotal = 280 + 8 + 4 + 4, + .width_mm = 43, + .height_mm = 37, + .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, +}; + static const struct st7789_panel_info default_panel = { .mode = &default_mode, .invert_mode = true, @@ -302,6 +317,17 @@ static const struct st7789_panel_info et028013dma_panel = { DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, }; +static const struct st7789_panel_info jt240mhqs_hwt_ek_e3_panel = { + .mode = &jt240mhqs_hwt_ek_e3_mode, + .invert_mode = true, + .bus_format = MEDIA_BUS_FMT_RGB666_1X18, + .bus_flags = DRM_BUS_FLAG_DE_HIGH | + DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE, + .partial_mode = true, + .partial_start = 38, + .partial_end = 318, +}; + static int st7789v_get_modes(struct drm_panel *panel, struct drm_connector *connector) { @@ -612,6 +638,7 @@ static const struct spi_device_id st7789v_spi_id[] = { { "st7789v", (unsigned long) &default_panel }, { "t28cp45tn89-v17", (unsigned long) &t28cp45tn89_panel }, { "et028013dma", (unsigned long) &et028013dma_panel }, + { "jt240mhqs-hwt-ek-e3", (unsigned long) &jt240mhqs_hwt_ek_e3_panel }, { } }; MODULE_DEVICE_TABLE(spi, st7789v_spi_id); @@ -620,6 +647,8 @@ static const struct of_device_id st7789v_of_match[] = { { .compatible = "sitronix,st7789v", .data = &default_panel }, { .compatible = "inanbo,t28cp45tn89-v17", .data = &t28cp45tn89_panel }, { .compatible = "edt,et028013dma", .data = &et028013dma_panel }, + { .compatible = "jasonic,jt240mhqs-hwt-ek-e3", + .data = &jt240mhqs_hwt_ek_e3_panel }, { } }; MODULE_DEVICE_TABLE(of, st7789v_of_match);