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([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Oct 2022 23:08:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10516"; a="633416076" X-IronPort-AV: E=Sophos;i="5.95,227,1661842800"; d="scan'208";a="633416076" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga002.jf.intel.com with ESMTP; 30 Oct 2022 23:08:05 -0700 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id A25CC10056BB; Mon, 31 Oct 2022 14:08:04 +0800 (CST) To: binutils@sourceware.org Subject: [PATCH 1/2] i386: Add and Date: Mon, 31 Oct 2022 14:06:00 +0800 Message-Id: <20221031060601.38460-2-haochen.jiang@intel.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20221031060601.38460-1-haochen.jiang@intel.com> References: <20221031060601.38460-1-haochen.jiang@intel.com> X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Binutils From: "Jiang, Haochen" Reply-To: Haochen Jiang Cc: konglin1 Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748182259830643870?= X-GMAIL-MSGID: =?utf-8?q?1748182259830643870?= From: konglin1 opcodes/ * i386-opc.tbl: Add for VEX insn with x/y suffix, and for EVEX insn with x/y suffix. --- opcodes/i386-opc.tbl | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index f1d17171c3..3238c4fc2e 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -1469,7 +1469,8 @@ gf2p8mulb, 0x660f38cf, None, CpuGFNI, Modrm||No_bSuf|No nge_uq:19:, ngt_uq:1a:, false_os:1b:C, neq_os:1c:C, ge_oq:1d:, gt_oq:1e:, + true_us:1f:C> - is used for VEX instructions with x/y suffixes. +, 0x2f, None, CpuAVX, Modrm|VexLIG|Space0F|VexWIG|No_bSuf|No_ vcvtdq2pd, 0xf3e6, None, CpuAVX, Modrm|Vex128|Space0F|VexWIG|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM } vcvtdq2pd, 0xf3e6, None, CpuAVX, Modrm|Vex256|Space0F|VexWIG|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Unspecified|BaseIndex, RegYMM } vcvtdq2ps, 0x5b, None, CpuAVX, Modrm|Vex|Space0F|VexWIG|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM } -vcvtpd2dq, 0xf2e6, None, CpuAVX, Modrm||Space0F|VexWIG|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { , RegXMM } -vcvtpd2ps, 0x665a, None, CpuAVX, Modrm||Space0F|VexWIG|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { , RegXMM } +vcvtpd2dq, 0xf2e6, None, CpuAVX, Modrm||Space0F|VexWIG|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { , RegXMM } +vcvtpd2ps, 0x665a, None, CpuAVX, Modrm||Space0F|VexWIG|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { , RegXMM } vcvtps2dq, 0x665b, None, CpuAVX, Modrm|Vex|Space0F|VexWIG|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM } vcvtps2pd, 0x5a, None, CpuAVX, Modrm|Vex128|Space0F|VexWIG|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM } vcvtps2pd, 0x5a, None, CpuAVX, Modrm|Vex256|Space0F|VexWIG|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Unspecified|BaseIndex, RegYMM } @@ -1504,7 +1505,7 @@ vcvtsd2ss, 0xf25a, None, CpuAVX, Modrm|Vex=3|Space0F|VexVVVV|VexWIG|No_bSuf|No_w vcvtsi2s, 0x2a, None, CpuAVX, Modrm|VexLIG|Space0F|VexVVVV|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|ATTSyntax, { Reg32|Reg64|Unspecified|BaseIndex, RegXMM, RegXMM } vcvtsi2s, 0x2a, None, CpuAVX, Modrm|VexLIG|Space0F|VexVVVV|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|IntelSyntax, { Reg32|Reg64|Unspecified|BaseIndex, RegXMM, RegXMM } vcvtss2sd, 0xf35a, None, CpuAVX, Modrm|Vex=3|Space0F|VexVVVV|VexWIG|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM } -vcvttpd2dq, 0x66e6, None, CpuAVX, Modrm||Space0F|VexWIG|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { , RegXMM } +vcvttpd2dq, 0x66e6, None, CpuAVX, Modrm||Space0F|VexWIG|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { , RegXMM } vcvttps2dq, 0xf35b, None, CpuAVX, Modrm|Vex|Space0F|VexWIG|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM } vcvtts2si, 0x2c, None, CpuAVX, Modrm|VexLIG|Space0F|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { |Unspecified|BaseIndex|RegXMM, Reg32|Reg64 } vdivp, 0x5e, None, CpuAVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM } @@ -1701,7 +1702,6 @@ vxorp, 0x57, None, CpuAVX, Modrm|C|Vex|Space0F|VexVVVV|VexWIG|Check vzeroall, 0x77, None, CpuAVX, Vex=2|Space0F|VexWIG|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {} vzeroupper, 0x77, None, CpuAVX, Vex|Space0F|VexWIG|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {} - // 256bit integer AVX2 instructions. @@ -2052,7 +2052,8 @@ vpclmulhqhqdq, 0x6644, 0x11, CpuVPCLMULQDQ, Modrm|Vex=2|Space0F3A|VexWIG|VexVVVV d:CpuAVX512F:CpuAVX512DQ:66:f2:66:Space0F:Space0F38:1:VexW1:Qword, + h:CpuAVX512_FP16:CpuAVX512_FP16::f3::EVexMap5:EVexMap6:0:VexW0:Word> - is used for EVEX instructions with x/y suffixes. +, 0xf2e6, None, CpuAVX512F|, Modrm||Masking=3|Space0F|VexW1|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Qword, } +vcvtpd2dq, 0xf2e6, None, CpuAVX512F|, Modrm||Masking=3|Space0F|VexW1|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Qword, } -vcvtpd2ps, 0x665a, None, CpuAVX512F|, Modrm||Masking=3|Space0F|VexW1|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Qword, } +vcvtpd2ps, 0x665a, None, CpuAVX512F|, Modrm||Masking=3|Space0F|VexW1|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Qword, } -vcvtpd2udq, 0x79, None, CpuAVX512F|, Modrm||Masking=3|Space0F|VexW1|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Qword, } +vcvtpd2udq, 0x79, None, CpuAVX512F|, Modrm||Masking=3|Space0F|VexW1|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Qword, } vcvtph2ps, 0x6613, None, CpuAVX512F, Modrm|EVex512|Masking=3|Space0F38|VexW0|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { RegYMM|Unspecified|BaseIndex, RegZMM } @@ -2185,8 +2186,8 @@ vcvtusi2ss, 0xF37B, None, CpuAVX512F, Modrm|EVexLIG|Space0F|VexVVVV|Disp8ShiftVL vcvtss2sd, 0xF35A, None, CpuAVX512F, Modrm|EVexLIG|Masking=3|Space0F|VexVVVV|VexW0|Disp8MemShift=2|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM, RegXMM } -vcvttpd2dq, 0x66e6, None, CpuAVX512F|, Modrm||Masking=3|Space0F|VexW1|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Qword, } -vcvttpd2udq, 0x78, None, CpuAVX512F|, Modrm||Masking=3|Space0F|VexW1|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Qword, } +vcvttpd2dq, 0x66e6, None, CpuAVX512F|, Modrm||Masking=3|Space0F|VexW1|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Qword, } +vcvttpd2udq, 0x78, None, CpuAVX512F|, Modrm||Masking=3|Space0F|VexW1|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Qword, } vcvttps2dq, 0xF35B, None, CpuAVX512F, Modrm|Masking=3|Space0F|VexW0|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM } vcvttps2udq, 0x78, None, CpuAVX512F, Modrm|Masking=3|Space0F|VexW0|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM } @@ -2751,7 +2752,7 @@ vcvtps2uqq, 0x6679, None, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex256|Masking=3|Space vcvtqq2pd, 0xF3E6, None, CpuAVX512DQ, Modrm|Masking=3|Space0F|VexW1|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM } vcvtuqq2pd, 0xF37A, None, CpuAVX512DQ, Modrm|Masking=3|Space0F|VexW1|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM } -vcvtqq2ps, 0x5b, None, CpuAVX512DQ|, Modrm||Masking=3|Space0F|VexW1|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Qword, } +vcvtqq2ps, 0x5b, None, CpuAVX512DQ|, Modrm||Masking=3|Space0F|VexW1|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Qword, } vcvttpd2qq, 0x667A, None, CpuAVX512DQ, Modrm|Masking=3|Space0F|VexW1|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM } vcvttpd2uqq, 0x6678, None, CpuAVX512DQ, Modrm|Masking=3|Space0F|VexW1|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM } @@ -2763,7 +2764,7 @@ vcvttps2uqq, 0x6678, None, CpuAVX512DQ, Modrm|EVex512|Masking=3|Space0F|VexW0|Br vcvttps2uqq, 0x6678, None, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex128|Masking=3|Space0F|VexW0|Broadcast|Disp8MemShift=3|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM } vcvttps2uqq, 0x6678, None, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex256|Masking=3|Space0F|VexW0|Broadcast|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM } -vcvtuqq2ps, 0xf27a, None, CpuAVX512DQ|, Modrm||Masking=3|Space0F|VexW1|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Qword, } +vcvtuqq2ps, 0xf27a, None, CpuAVX512DQ|, Modrm||Masking=3|Space0F|VexW1|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Qword, } vextractf32x8, 0x661B, None, CpuAVX512DQ, Modrm|EVex=1|MaskingMorZ|Space0F3A|VexW=1|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegZMM, RegYMM|Unspecified|BaseIndex } vextracti32x8, 0x663B, None, CpuAVX512DQ, Modrm|EVex=1|MaskingMorZ|Space0F3A|VexW=1|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegZMM, RegYMM|Unspecified|BaseIndex } @@ -3049,7 +3050,7 @@ movdir64b, 0x660f38f8, None, CpuMOVDIR64B, Modrm|AddrPrefixOpReg, { Unspecified| vcvtne2ps2bf16, 0xf272, None, CpuAVX512_BF16, Modrm|Space0F38|VexVVVV|Masking=3|VexW0|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM } -vcvtneps2bf16, 0xf372, None, CpuAVX512_BF16|, Modrm|Space0F38||Masking=3|VexW0|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { |Dword, } +vcvtneps2bf16, 0xf372, None, CpuAVX512_BF16|, Modrm|Space0F38||Masking=3|VexW0|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { |Dword, } vdpbf16ps, 0xf352, None, CpuAVX512_BF16, Modrm|Space0F38|VexVVVV|Masking=3|VexW0|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM } @@ -3193,15 +3194,15 @@ vcmpph, 0xc2, None, CpuAVX512_FP16, Modrm|Masking=2|Space0F3A|VexVVVV|VexW0|Broa vcmpsh, 0xf3c2, 0x, CpuAVX512_FP16, Modrm|EVexLIG|Masking=2|Space0F3A|VexVVVV|VexW0|Disp8MemShift=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegXMM, RegMask } vcmpsh, 0xf3c2, None, CpuAVX512_FP16, Modrm|EVexLIG|Masking=2|Space0F3A|VexVVVV|VexW0|Disp8MemShift=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, RegXMM|Word|Unspecified|BaseIndex, RegXMM, RegMask } -vcvtdq2ph, 0x5b, None, CpuAVX512_FP16|, Modrm||Masking=3|EVexMap5|VexW0|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Dword, } -vcvtudq2ph, 0xf27a, None, CpuAVX512_FP16|, Modrm||Masking=3|EVexMap5|VexW0|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Dword, } +vcvtdq2ph, 0x5b, None, CpuAVX512_FP16|, Modrm||Masking=3|EVexMap5|VexW0|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Dword, } +vcvtudq2ph, 0xf27a, None, CpuAVX512_FP16|, Modrm||Masking=3|EVexMap5|VexW0|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Dword, } vcvtqq2ph, 0x5b, None, CpuAVX512_FP16|, Modrm||Masking=3|EVexMap5|VexW1|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf||, { |Qword, RegXMM } vcvtuqq2ph, 0xf27a, None, CpuAVX512_FP16|, Modrm||Masking=3|EVexMap5|VexW1|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf||, { |Qword, RegXMM } vcvtpd2ph, 0x665a, None, CpuAVX512_FP16|, Modrm||Masking=3|EVexMap5|VexW1|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf||, { |Qword, RegXMM } -vcvtps2phx, 0x661d, None, CpuAVX512_FP16|, Modrm||Masking=3|EVexMap5|VexW0|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Dword, } +vcvtps2phx, 0x661d, None, CpuAVX512_FP16|, Modrm||Masking=3|EVexMap5|VexW0|Broadcast|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { |Dword, } vcvtw2ph, 0xf37d, None, CpuAVX512_FP16, Modrm|Masking=3|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM } vcvtuw2ph, 0xf27d, None, CpuAVX512_FP16, Modrm|Masking=3|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM } From patchwork Mon Oct 31 06:06:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jiang, Haochen" X-Patchwork-Id: 13121 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2137171wru; Sun, 30 Oct 2022 23:10:02 -0700 (PDT) X-Google-Smtp-Source: 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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id dt16-20020a170907729000b00783a0e64f8asi7157586ejc.246.2022.10.30.23.10.02 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 30 Oct 2022 23:10:02 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=A7yJe6P0; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 41C72385AC3B for ; Mon, 31 Oct 2022 06:09:42 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 41C72385AC3B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1667196582; bh=/QKdoJ2ZCFntYH8PNwJG7p5Vx++R/qe9Gl4i4PPaRuI=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=A7yJe6P0RyJgflB3pNI3lYmqlLBQvDDGwXcsgL2ETY4e/Zm9O245fFMApIbwygWtz KxV9C0mZhjYuMLuyUmlRXujVrddIjYbgG4/uku4I8cY7vYkwhfR+6EoyOI1nc0Y1pJ aefOvhd0Y9dHieeA02NQNhFSh3vKamMDi9qe68hk= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by sourceware.org (Postfix) with ESMTPS id 401D1385701D for ; Mon, 31 Oct 2022 06:08:26 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 401D1385701D X-IronPort-AV: E=McAfee;i="6500,9779,10516"; a="307550079" X-IronPort-AV: E=Sophos;i="5.95,227,1661842800"; d="scan'208";a="307550079" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Oct 2022 23:08:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10516"; a="633416090" X-IronPort-AV: E=Sophos;i="5.95,227,1661842800"; d="scan'208";a="633416090" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga002.jf.intel.com with ESMTP; 30 Oct 2022 23:08:05 -0700 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id A4E1210056BC; Mon, 31 Oct 2022 14:08:04 +0800 (CST) To: binutils@sourceware.org Subject: [PATCH 2/2] Support Intel AVX-NE-CONVERT Date: Mon, 31 Oct 2022 14:06:01 +0800 Message-Id: <20221031060601.38460-3-haochen.jiang@intel.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20221031060601.38460-1-haochen.jiang@intel.com> References: <20221031060601.38460-1-haochen.jiang@intel.com> X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Binutils From: "Jiang, Haochen" Reply-To: Haochen Jiang Cc: konglin1 Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748182254947007122?= X-GMAIL-MSGID: =?utf-8?q?1748182344879260307?= From: konglin1 gas/ChangeLog: * NEWS: Support Intel AVX-NE-CONVERT. * config/tc-i386.c: Add avx_ne_convert. * doc/c-i386.texi: Document .avx_ne_convert. * testsuite/gas/i386/i386.exp: Run AVX NE CONVERT tests. * testsuite/gas/i386/avx-ne-convert-intel.d: New test. * testsuite/gas/i386/avx-ne-convert.d: Ditto. * testsuite/gas/i386/avx-ne-convert.s: Ditto. * testsuite/gas/i386/x86-64-avx-ne-convert-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx-ne-convert.d: Ditto. * testsuite/gas/i386/x86-64-avx-ne-convert.s: Ditto. opcodes/ChangeLog: * i386-dis.c (PREFIX_VEX_0F3872): New. (PREFIX_VEX_0F38B0_M_1_W_0): Ditto. (PREFIX_VEX_0F38B1_M_1_W_0): Ditto. (VEX_W_0F3872_P_1): Ditto. (VEX_W_0F38B0_M_1): Ditto. (VEX_W_0F38B1_M_1): Ditto. (MOD_VEX_0F38B0): Ditto. (MOD_VEX_0F38B1): Ditto. (prefix_table): Add PREFIX_VEX_0F3872, PREFIX_VEX_0F38B0_M_1_W_0, PREFIX_VEX_0F38B1_M_1_W_0. (vex_table): Add MOD_VEX_0F38B0, MOD_VEX_0F38B1. (vex_w_table): Add VEX_W_0F3872_P_1, VEX_W_0F38B0_M_1, VEX_W_0F38B1_M_1. * i386-gen.c (cpu_flag_init): Add CPU_AVX_NE_CONVERT_FLGAS and CPU_ANY_AVX_NE_CONVERT_FLAGS. (cpu_flags): Add CpuAVX_NE_CONVERT. * i386-init.h: Regenerated. * i386-opc.h (CpuAVX_NE CONVERT): New. (i386_cpu_flags): Add cpuavx_ne_convert. * i386-opc.tbl: Add Intel AVX-NE-CONVERT instructions. * i386-tbl.h: Regenerated. --- gas/NEWS | 2 + gas/config/tc-i386.c | 1 + gas/doc/c-i386.texi | 2 + gas/testsuite/gas/i386/avx-ne-convert-intel.d | 170 + gas/testsuite/gas/i386/avx-ne-convert.d | 170 + gas/testsuite/gas/i386/avx-ne-convert.s | 167 + gas/testsuite/gas/i386/i386.exp | 4 + .../gas/i386/x86-64-avx-ne-convert-intel.d | 170 + .../gas/i386/x86-64-avx-ne-convert.d | 170 + .../gas/i386/x86-64-avx-ne-convert.s | 167 + opcodes/i386-dis.c | 55 +- opcodes/i386-gen.c | 7 +- opcodes/i386-init.h | 522 +- opcodes/i386-opc.h | 3 + opcodes/i386-opc.tbl | 12 + opcodes/i386-tbl.h | 7978 +++++++++-------- 16 files changed, 5430 insertions(+), 4170 deletions(-) create mode 100644 gas/testsuite/gas/i386/avx-ne-convert-intel.d create mode 100644 gas/testsuite/gas/i386/avx-ne-convert.d create mode 100644 gas/testsuite/gas/i386/avx-ne-convert.s create mode 100644 gas/testsuite/gas/i386/x86-64-avx-ne-convert-intel.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx-ne-convert.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx-ne-convert.s diff --git a/gas/NEWS b/gas/NEWS index c9df5608ec..61e85a8bff 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -1,5 +1,7 @@ -*- text -*- +* Add support for Intel AVX-NE-CONVERT instructions. + * Add support for Intel MSRLIST instructions. * Add support for Intel WRMSRNS instructions. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index e1de7d9c76..997a87c7c6 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1101,6 +1101,7 @@ static const arch_entry cpu_arch[] = SUBARCH (cmpccxadd, CMPCCXADD, ANY_CMPCCXADD, false), SUBARCH (wrmsrns, WRMSRNS, ANY_WRMSRNS, false), SUBARCH (msrlist, MSRLIST, ANY_MSRLIST, false), + SUBARCH (avx_ne_convert, AVX_NE_CONVERT, ANY_AVX_NE_CONVERT, false), }; #undef SUBARCH diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 1774979a83..0ef1cece48 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -200,6 +200,7 @@ accept various extension mnemonics. For example, @code{cmpccxadd}, @code{wrmsrns}, @code{msrlist}, +@code{avx_ne_convert}, @code{amx_int8}, @code{amx_bf16}, @code{amx_fp16}, @@ -1495,6 +1496,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @samp{.ibt} @item @samp{.prefetchi} @tab @samp{.avx_ifma} @tab @samp{.avx_vnni_int8} @item @samp{.cmpccxadd} @tab @samp{.wrmsrns} @tab @samp{.msrlist} +@item @samp{.avx_ne_convert} @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote} @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq} @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk} diff --git a/gas/testsuite/gas/i386/avx-ne-convert-intel.d b/gas/testsuite/gas/i386/avx-ne-convert-intel.d new file mode 100644 index 0000000000..490fd9516f --- /dev/null +++ b/gas/testsuite/gas/i386/avx-ne-convert-intel.d @@ -0,0 +1,170 @@ +#as: +#objdump: -dw -Mintel +#name: i386 AVX-NE-CONVERT insns (Intel disassembly) +#source: avx-ne-convert.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 7a b1 b4 f4 00 00 00 10\s+vbcstnebf162ps xmm6,WORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7a b1 31\s+vbcstnebf162ps xmm6,WORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7a b1 b1 fe 00 00 00\s+vbcstnebf162ps xmm6,WORD PTR \[ecx\+0xfe\] +\s*[a-f0-9]+:\s*c4 e2 7a b1 b2 00 ff ff ff\s+vbcstnebf162ps xmm6,WORD PTR \[edx-0x100\] +\s*[a-f0-9]+:\s*c4 e2 7e b1 b4 f4 00 00 00 10\s+vbcstnebf162ps ymm6,WORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7e b1 31\s+vbcstnebf162ps ymm6,WORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7e b1 b1 fe 00 00 00\s+vbcstnebf162ps ymm6,WORD PTR \[ecx\+0xfe\] +\s*[a-f0-9]+:\s*c4 e2 7e b1 b2 00 ff ff ff\s+vbcstnebf162ps ymm6,WORD PTR \[edx-0x100\] +\s*[a-f0-9]+:\s*c4 e2 79 b1 b4 f4 00 00 00 10\s+vbcstnesh2ps xmm6,WORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 79 b1 31\s+vbcstnesh2ps xmm6,WORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 79 b1 b1 fe 00 00 00\s+vbcstnesh2ps xmm6,WORD PTR \[ecx\+0xfe\] +\s*[a-f0-9]+:\s*c4 e2 79 b1 b2 00 ff ff ff\s+vbcstnesh2ps xmm6,WORD PTR \[edx-0x100\] +\s*[a-f0-9]+:\s*c4 e2 7d b1 b4 f4 00 00 00 10\s+vbcstnesh2ps ymm6,WORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7d b1 31\s+vbcstnesh2ps ymm6,WORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7d b1 b1 fe 00 00 00\s+vbcstnesh2ps ymm6,WORD PTR \[ecx\+0xfe\] +\s*[a-f0-9]+:\s*c4 e2 7d b1 b2 00 ff ff ff\s+vbcstnesh2ps ymm6,WORD PTR \[edx-0x100\] +\s*[a-f0-9]+:\s*c4 e2 7a b0 b4 f4 00 00 00 10\s+vcvtneebf162ps xmm6,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7a b0 31\s+vcvtneebf162ps xmm6,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7a b0 b1 f0 07 00 00\s+vcvtneebf162ps xmm6,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 7a b0 b2 00 f8 ff ff\s+vcvtneebf162ps xmm6,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 7e b0 b4 f4 00 00 00 10\s+vcvtneebf162ps ymm6,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7e b0 31\s+vcvtneebf162ps ymm6,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7e b0 b1 e0 0f 00 00\s+vcvtneebf162ps ymm6,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7e b0 b2 00 f0 ff ff\s+vcvtneebf162ps ymm6,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 79 b0 b4 f4 00 00 00 10\s+vcvtneeph2ps xmm6,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 79 b0 31\s+vcvtneeph2ps xmm6,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 79 b0 b1 f0 07 00 00\s+vcvtneeph2ps xmm6,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 79 b0 b2 00 f8 ff ff\s+vcvtneeph2ps xmm6,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 7d b0 b4 f4 00 00 00 10\s+vcvtneeph2ps ymm6,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7d b0 31\s+vcvtneeph2ps ymm6,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7d b0 b1 e0 0f 00 00\s+vcvtneeph2ps ymm6,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7d b0 b2 00 f0 ff ff\s+vcvtneeph2ps ymm6,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 7b b0 b4 f4 00 00 00 10\s+vcvtneobf162ps xmm6,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7b b0 31\s+vcvtneobf162ps xmm6,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7b b0 b1 f0 07 00 00\s+vcvtneobf162ps xmm6,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 7b b0 b2 00 f8 ff ff\s+vcvtneobf162ps xmm6,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 7f b0 b4 f4 00 00 00 10\s+vcvtneobf162ps ymm6,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7f b0 31\s+vcvtneobf162ps ymm6,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7f b0 b1 e0 0f 00 00\s+vcvtneobf162ps ymm6,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7f b0 b2 00 f0 ff ff\s+vcvtneobf162ps ymm6,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 78 b0 b4 f4 00 00 00 10\s+vcvtneoph2ps xmm6,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 78 b0 31\s+vcvtneoph2ps xmm6,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 78 b0 b1 f0 07 00 00\s+vcvtneoph2ps xmm6,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 78 b0 b2 00 f8 ff ff\s+vcvtneoph2ps xmm6,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 7c b0 b4 f4 00 00 00 10\s+vcvtneoph2ps ymm6,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7c b0 31\s+vcvtneoph2ps ymm6,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7c b0 b1 e0 0f 00 00\s+vcvtneoph2ps ymm6,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7c b0 b2 00 f0 ff ff\s+vcvtneoph2ps ymm6,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 f5\s+vcvtneps2bf16 xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 f5\s+vcvtneps2bf16 xmm6,xmm5 +\s*[a-f0-9]+:\s*c4 e2 7a 72 f5\s+\{vex\} vcvtneps2bf16 xmm6,xmm5 +\s*[a-f0-9]+:\s*c4 e2 7a 72 f5\s+\{vex\} vcvtneps2bf16 xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 f5\s+vcvtneps2bf16 xmm6,ymm5 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 f5\s+vcvtneps2bf16 xmm6,ymm5 +\s*[a-f0-9]+:\s*c4 e2 7e 72 f5\s+\{vex\} vcvtneps2bf16 xmm6,ymm5 +\s*[a-f0-9]+:\s*c4 e2 7e 72 f5\s+\{vex\} vcvtneps2bf16 xmm6,ymm5 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 b4 f4 00 00 00 10\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 b4 f4 00 00 00 10\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b4 f4 00 00 00 10\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b4 f4 00 00 00 10\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 31\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 31\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 31\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 31\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 71 7f\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 71 7f\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b1 f0 07 00 00\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b1 f0 07 00 00\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 72 80\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 72 80\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b2 00 f8 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b2 00 f8 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*62 f2 7e 28 72 71 7f\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*62 f2 7e 28 72 71 7f\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7e 72 b1 e0 0f 00 00\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7e 72 b1 e0 0f 00 00\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 7a b1 b4 f4 00 00 00 10\s+vbcstnebf162ps xmm6,WORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7a b1 31\s+vbcstnebf162ps xmm6,WORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7a b1 b1 fe 00 00 00\s+vbcstnebf162ps xmm6,WORD PTR \[ecx\+0xfe\] +\s*[a-f0-9]+:\s*c4 e2 7a b1 b2 00 ff ff ff\s+vbcstnebf162ps xmm6,WORD PTR \[edx-0x100\] +\s*[a-f0-9]+:\s*c4 e2 7e b1 b4 f4 00 00 00 10\s+vbcstnebf162ps ymm6,WORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7e b1 31\s+vbcstnebf162ps ymm6,WORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7e b1 b1 fe 00 00 00\s+vbcstnebf162ps ymm6,WORD PTR \[ecx\+0xfe\] +\s*[a-f0-9]+:\s*c4 e2 7e b1 b2 00 ff ff ff\s+vbcstnebf162ps ymm6,WORD PTR \[edx-0x100\] +\s*[a-f0-9]+:\s*c4 e2 79 b1 b4 f4 00 00 00 10\s+vbcstnesh2ps xmm6,WORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 79 b1 31\s+vbcstnesh2ps xmm6,WORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 79 b1 b1 fe 00 00 00\s+vbcstnesh2ps xmm6,WORD PTR \[ecx\+0xfe\] +\s*[a-f0-9]+:\s*c4 e2 79 b1 b2 00 ff ff ff\s+vbcstnesh2ps xmm6,WORD PTR \[edx-0x100\] +\s*[a-f0-9]+:\s*c4 e2 7d b1 b4 f4 00 00 00 10\s+vbcstnesh2ps ymm6,WORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7d b1 31\s+vbcstnesh2ps ymm6,WORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7d b1 b1 fe 00 00 00\s+vbcstnesh2ps ymm6,WORD PTR \[ecx\+0xfe\] +\s*[a-f0-9]+:\s*c4 e2 7d b1 b2 00 ff ff ff\s+vbcstnesh2ps ymm6,WORD PTR \[edx-0x100\] +\s*[a-f0-9]+:\s*c4 e2 7a b0 b4 f4 00 00 00 10\s+vcvtneebf162ps xmm6,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7a b0 31\s+vcvtneebf162ps xmm6,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7a b0 b1 f0 07 00 00\s+vcvtneebf162ps xmm6,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 7a b0 b2 00 f8 ff ff\s+vcvtneebf162ps xmm6,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 7e b0 b4 f4 00 00 00 10\s+vcvtneebf162ps ymm6,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7e b0 31\s+vcvtneebf162ps ymm6,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7e b0 b1 e0 0f 00 00\s+vcvtneebf162ps ymm6,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7e b0 b2 00 f0 ff ff\s+vcvtneebf162ps ymm6,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 79 b0 b4 f4 00 00 00 10\s+vcvtneeph2ps xmm6,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 79 b0 31\s+vcvtneeph2ps xmm6,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 79 b0 b1 f0 07 00 00\s+vcvtneeph2ps xmm6,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 79 b0 b2 00 f8 ff ff\s+vcvtneeph2ps xmm6,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 7d b0 b4 f4 00 00 00 10\s+vcvtneeph2ps ymm6,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7d b0 31\s+vcvtneeph2ps ymm6,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7d b0 b1 e0 0f 00 00\s+vcvtneeph2ps ymm6,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7d b0 b2 00 f0 ff ff\s+vcvtneeph2ps ymm6,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 7b b0 b4 f4 00 00 00 10\s+vcvtneobf162ps xmm6,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7b b0 31\s+vcvtneobf162ps xmm6,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7b b0 b1 f0 07 00 00\s+vcvtneobf162ps xmm6,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 7b b0 b2 00 f8 ff ff\s+vcvtneobf162ps xmm6,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 7f b0 b4 f4 00 00 00 10\s+vcvtneobf162ps ymm6,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7f b0 31\s+vcvtneobf162ps ymm6,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7f b0 b1 e0 0f 00 00\s+vcvtneobf162ps ymm6,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7f b0 b2 00 f0 ff ff\s+vcvtneobf162ps ymm6,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 78 b0 b4 f4 00 00 00 10\s+vcvtneoph2ps xmm6,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 78 b0 31\s+vcvtneoph2ps xmm6,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 78 b0 b1 f0 07 00 00\s+vcvtneoph2ps xmm6,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 78 b0 b2 00 f8 ff ff\s+vcvtneoph2ps xmm6,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 7c b0 b4 f4 00 00 00 10\s+vcvtneoph2ps ymm6,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7c b0 31\s+vcvtneoph2ps ymm6,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7c b0 b1 e0 0f 00 00\s+vcvtneoph2ps ymm6,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7c b0 b2 00 f0 ff ff\s+vcvtneoph2ps ymm6,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 f5\s+vcvtneps2bf16 xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 f5\s+vcvtneps2bf16 xmm6,xmm5 +\s*[a-f0-9]+:\s*c4 e2 7a 72 f5\s+\{vex\} vcvtneps2bf16 xmm6,xmm5 +\s*[a-f0-9]+:\s*c4 e2 7a 72 f5\s+\{vex\} vcvtneps2bf16 xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 f5\s+vcvtneps2bf16 xmm6,ymm5 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 f5\s+vcvtneps2bf16 xmm6,ymm5 +\s*[a-f0-9]+:\s*c4 e2 7e 72 f5\s+\{vex\} vcvtneps2bf16 xmm6,ymm5 +\s*[a-f0-9]+:\s*c4 e2 7e 72 f5\s+\{vex\} vcvtneps2bf16 xmm6,ymm5 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 b4 f4 00 00 00 10\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 b4 f4 00 00 00 10\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b4 f4 00 00 00 10\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b4 f4 00 00 00 10\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 31\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 31\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 31\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 31\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 71 7f\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 71 7f\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b1 f0 07 00 00\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b1 f0 07 00 00\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 72 80\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 72 80\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b2 00 f8 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b2 00 f8 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*62 f2 7e 28 72 71 7f\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*62 f2 7e 28 72 71 7f\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7e 72 b1 e0 0f 00 00\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7e 72 b1 e0 0f 00 00\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[edx-0x1000\] diff --git a/gas/testsuite/gas/i386/avx-ne-convert.d b/gas/testsuite/gas/i386/avx-ne-convert.d new file mode 100644 index 0000000000..24f6ae09fe --- /dev/null +++ b/gas/testsuite/gas/i386/avx-ne-convert.d @@ -0,0 +1,170 @@ +#as: +#objdump: -dw +#name: i386 AVX-NE-CONVERT insns +#source: avx-ne-convert.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 7a b1 b4 f4 00 00 00 10\s+vbcstnebf162ps 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b1 31\s+vbcstnebf162ps \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b1 b1 fe 00 00 00\s+vbcstnebf162ps 0xfe\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b1 b2 00 ff ff ff\s+vbcstnebf162ps -0x100\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e b1 b4 f4 00 00 00 10\s+vbcstnebf162ps 0x10000000\(%esp,%esi,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b1 31\s+vbcstnebf162ps \(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b1 b1 fe 00 00 00\s+vbcstnebf162ps 0xfe\(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b1 b2 00 ff ff ff\s+vbcstnebf162ps -0x100\(%edx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 79 b1 b4 f4 00 00 00 10\s+vbcstnesh2ps 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b1 31\s+vbcstnesh2ps \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b1 b1 fe 00 00 00\s+vbcstnesh2ps 0xfe\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b1 b2 00 ff ff ff\s+vbcstnesh2ps -0x100\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7d b1 b4 f4 00 00 00 10\s+vbcstnesh2ps 0x10000000\(%esp,%esi,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b1 31\s+vbcstnesh2ps \(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b1 b1 fe 00 00 00\s+vbcstnesh2ps 0xfe\(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b1 b2 00 ff ff ff\s+vbcstnesh2ps -0x100\(%edx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7a b0 b4 f4 00 00 00 10\s+vcvtneebf162ps 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b0 31\s+vcvtneebf162ps \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b0 b1 f0 07 00 00\s+vcvtneebf162ps 0x7f0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b0 b2 00 f8 ff ff\s+vcvtneebf162ps -0x800\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e b0 b4 f4 00 00 00 10\s+vcvtneebf162ps 0x10000000\(%esp,%esi,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b0 31\s+vcvtneebf162ps \(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b0 b1 e0 0f 00 00\s+vcvtneebf162ps 0xfe0\(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b0 b2 00 f0 ff ff\s+vcvtneebf162ps -0x1000\(%edx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 79 b0 b4 f4 00 00 00 10\s+vcvtneeph2ps 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b0 31\s+vcvtneeph2ps \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b0 b1 f0 07 00 00\s+vcvtneeph2ps 0x7f0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b0 b2 00 f8 ff ff\s+vcvtneeph2ps -0x800\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7d b0 b4 f4 00 00 00 10\s+vcvtneeph2ps 0x10000000\(%esp,%esi,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b0 31\s+vcvtneeph2ps \(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b0 b1 e0 0f 00 00\s+vcvtneeph2ps 0xfe0\(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b0 b2 00 f0 ff ff\s+vcvtneeph2ps -0x1000\(%edx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7b b0 b4 f4 00 00 00 10\s+vcvtneobf162ps 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7b b0 31\s+vcvtneobf162ps \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7b b0 b1 f0 07 00 00\s+vcvtneobf162ps 0x7f0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7b b0 b2 00 f8 ff ff\s+vcvtneobf162ps -0x800\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7f b0 b4 f4 00 00 00 10\s+vcvtneobf162ps 0x10000000\(%esp,%esi,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7f b0 31\s+vcvtneobf162ps \(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7f b0 b1 e0 0f 00 00\s+vcvtneobf162ps 0xfe0\(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7f b0 b2 00 f0 ff ff\s+vcvtneobf162ps -0x1000\(%edx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 78 b0 b4 f4 00 00 00 10\s+vcvtneoph2ps 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 78 b0 31\s+vcvtneoph2ps \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 78 b0 b1 f0 07 00 00\s+vcvtneoph2ps 0x7f0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 78 b0 b2 00 f8 ff ff\s+vcvtneoph2ps -0x800\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7c b0 b4 f4 00 00 00 10\s+vcvtneoph2ps 0x10000000\(%esp,%esi,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7c b0 31\s+vcvtneoph2ps \(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7c b0 b1 e0 0f 00 00\s+vcvtneoph2ps 0xfe0\(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7c b0 b2 00 f0 ff ff\s+vcvtneoph2ps -0x1000\(%edx\),%ymm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 f5\s+vcvtneps2bf16 %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 f5\s+vcvtneps2bf16 %xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 f5\s+\{vex\} vcvtneps2bf16 %xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 f5\s+\{vex\} vcvtneps2bf16 %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 f5\s+vcvtneps2bf16 %ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 f5\s+vcvtneps2bf16 %ymm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 f5\s+\{vex\} vcvtneps2bf16 %ymm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 f5\s+\{vex\} vcvtneps2bf16 %ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 b4 f4 00 00 00 10\s+vcvtneps2bf16x 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 b4 f4 00 00 00 10\s+vcvtneps2bf16x 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b4 f4 00 00 00 10\s+\{vex\} vcvtneps2bf16x 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b4 f4 00 00 00 10\s+\{vex\} vcvtneps2bf16x 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 31\s+vcvtneps2bf16x \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 31\s+vcvtneps2bf16x \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 31\s+\{vex\} vcvtneps2bf16x \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 31\s+\{vex\} vcvtneps2bf16x \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 71 7f\s+vcvtneps2bf16x 0x7f0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 71 7f\s+vcvtneps2bf16x 0x7f0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b1 f0 07 00 00\s+\{vex\} vcvtneps2bf16x 0x7f0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b1 f0 07 00 00\s+\{vex\} vcvtneps2bf16x 0x7f0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 72 80\s+vcvtneps2bf16x -0x800\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 72 80\s+vcvtneps2bf16x -0x800\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b2 00 f8 ff ff\s+\{vex\} vcvtneps2bf16x -0x800\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b2 00 f8 ff ff\s+\{vex\} vcvtneps2bf16x -0x800\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 71 7f\s+vcvtneps2bf16y 0xfe0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 71 7f\s+vcvtneps2bf16y 0xfe0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 b1 e0 0f 00 00\s+\{vex\} vcvtneps2bf16y 0xfe0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 b1 e0 0f 00 00\s+\{vex\} vcvtneps2bf16y 0xfe0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16y -0x1000\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16y -0x1000\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16y -0x1000\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16y -0x1000\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b1 b4 f4 00 00 00 10\s+vbcstnebf162ps 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b1 31\s+vbcstnebf162ps \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b1 b1 fe 00 00 00\s+vbcstnebf162ps 0xfe\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b1 b2 00 ff ff ff\s+vbcstnebf162ps -0x100\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e b1 b4 f4 00 00 00 10\s+vbcstnebf162ps 0x10000000\(%esp,%esi,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b1 31\s+vbcstnebf162ps \(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b1 b1 fe 00 00 00\s+vbcstnebf162ps 0xfe\(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b1 b2 00 ff ff ff\s+vbcstnebf162ps -0x100\(%edx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 79 b1 b4 f4 00 00 00 10\s+vbcstnesh2ps 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b1 31\s+vbcstnesh2ps \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b1 b1 fe 00 00 00\s+vbcstnesh2ps 0xfe\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b1 b2 00 ff ff ff\s+vbcstnesh2ps -0x100\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7d b1 b4 f4 00 00 00 10\s+vbcstnesh2ps 0x10000000\(%esp,%esi,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b1 31\s+vbcstnesh2ps \(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b1 b1 fe 00 00 00\s+vbcstnesh2ps 0xfe\(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b1 b2 00 ff ff ff\s+vbcstnesh2ps -0x100\(%edx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7a b0 b4 f4 00 00 00 10\s+vcvtneebf162ps 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b0 31\s+vcvtneebf162ps \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b0 b1 f0 07 00 00\s+vcvtneebf162ps 0x7f0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b0 b2 00 f8 ff ff\s+vcvtneebf162ps -0x800\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e b0 b4 f4 00 00 00 10\s+vcvtneebf162ps 0x10000000\(%esp,%esi,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b0 31\s+vcvtneebf162ps \(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b0 b1 e0 0f 00 00\s+vcvtneebf162ps 0xfe0\(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b0 b2 00 f0 ff ff\s+vcvtneebf162ps -0x1000\(%edx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 79 b0 b4 f4 00 00 00 10\s+vcvtneeph2ps 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b0 31\s+vcvtneeph2ps \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b0 b1 f0 07 00 00\s+vcvtneeph2ps 0x7f0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b0 b2 00 f8 ff ff\s+vcvtneeph2ps -0x800\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7d b0 b4 f4 00 00 00 10\s+vcvtneeph2ps 0x10000000\(%esp,%esi,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b0 31\s+vcvtneeph2ps \(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b0 b1 e0 0f 00 00\s+vcvtneeph2ps 0xfe0\(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b0 b2 00 f0 ff ff\s+vcvtneeph2ps -0x1000\(%edx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7b b0 b4 f4 00 00 00 10\s+vcvtneobf162ps 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7b b0 31\s+vcvtneobf162ps \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7b b0 b1 f0 07 00 00\s+vcvtneobf162ps 0x7f0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7b b0 b2 00 f8 ff ff\s+vcvtneobf162ps -0x800\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7f b0 b4 f4 00 00 00 10\s+vcvtneobf162ps 0x10000000\(%esp,%esi,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7f b0 31\s+vcvtneobf162ps \(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7f b0 b1 e0 0f 00 00\s+vcvtneobf162ps 0xfe0\(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7f b0 b2 00 f0 ff ff\s+vcvtneobf162ps -0x1000\(%edx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 78 b0 b4 f4 00 00 00 10\s+vcvtneoph2ps 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 78 b0 31\s+vcvtneoph2ps \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 78 b0 b1 f0 07 00 00\s+vcvtneoph2ps 0x7f0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 78 b0 b2 00 f8 ff ff\s+vcvtneoph2ps -0x800\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7c b0 b4 f4 00 00 00 10\s+vcvtneoph2ps 0x10000000\(%esp,%esi,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7c b0 31\s+vcvtneoph2ps \(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7c b0 b1 e0 0f 00 00\s+vcvtneoph2ps 0xfe0\(%ecx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7c b0 b2 00 f0 ff ff\s+vcvtneoph2ps -0x1000\(%edx\),%ymm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 f5\s+vcvtneps2bf16 %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 f5\s+vcvtneps2bf16 %xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 f5\s+\{vex\} vcvtneps2bf16 %xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 f5\s+\{vex\} vcvtneps2bf16 %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 f5\s+vcvtneps2bf16 %ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 f5\s+vcvtneps2bf16 %ymm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 f5\s+\{vex\} vcvtneps2bf16 %ymm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 f5\s+\{vex\} vcvtneps2bf16 %ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 b4 f4 00 00 00 10\s+vcvtneps2bf16x 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 b4 f4 00 00 00 10\s+vcvtneps2bf16x 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b4 f4 00 00 00 10\s+\{vex\} vcvtneps2bf16x 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b4 f4 00 00 00 10\s+\{vex\} vcvtneps2bf16x 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 31\s+vcvtneps2bf16x \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 31\s+vcvtneps2bf16x \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 31\s+\{vex\} vcvtneps2bf16x \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 31\s+\{vex\} vcvtneps2bf16x \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 71 7f\s+vcvtneps2bf16x 0x7f0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 71 7f\s+vcvtneps2bf16x 0x7f0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b1 f0 07 00 00\s+\{vex\} vcvtneps2bf16x 0x7f0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b1 f0 07 00 00\s+\{vex\} vcvtneps2bf16x 0x7f0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 72 80\s+vcvtneps2bf16x -0x800\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 72 80\s+vcvtneps2bf16x -0x800\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b2 00 f8 ff ff\s+\{vex\} vcvtneps2bf16x -0x800\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b2 00 f8 ff ff\s+\{vex\} vcvtneps2bf16x -0x800\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 71 7f\s+vcvtneps2bf16y 0xfe0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 71 7f\s+vcvtneps2bf16y 0xfe0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 b1 e0 0f 00 00\s+\{vex\} vcvtneps2bf16y 0xfe0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 b1 e0 0f 00 00\s+\{vex\} vcvtneps2bf16y 0xfe0\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16y -0x1000\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16y -0x1000\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16y -0x1000\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16y -0x1000\(%edx\),%xmm6 diff --git a/gas/testsuite/gas/i386/avx-ne-convert.s b/gas/testsuite/gas/i386/avx-ne-convert.s new file mode 100644 index 0000000000..7fb866630d --- /dev/null +++ b/gas/testsuite/gas/i386/avx-ne-convert.s @@ -0,0 +1,167 @@ +# Check 32bit AVX-NE-CONVERT instructions + + .allow_index_reg + .text +_start: + vbcstnebf162ps 0x10000000(%esp, %esi, 8), %xmm6 #AVX-NE-CONVERT + vbcstnebf162ps (%ecx), %xmm6 #AVX-NE-CONVERT + vbcstnebf162ps 254(%ecx), %xmm6 #AVX-NE-CONVERT Disp32(fe000000) + vbcstnebf162ps -256(%edx), %xmm6 #AVX-NE-CONVERT Disp32(00ffffff) + vbcstnebf162ps 0x10000000(%esp, %esi, 8), %ymm6 #AVX-NE-CONVERT + vbcstnebf162ps (%ecx), %ymm6 #AVX-NE-CONVERT + vbcstnebf162ps 254(%ecx), %ymm6 #AVX-NE-CONVERT Disp32(fe000000) + vbcstnebf162ps -256(%edx), %ymm6 #AVX-NE-CONVERT Disp32(00ffffff) + vbcstnesh2ps 0x10000000(%esp, %esi, 8), %xmm6 #AVX-NE-CONVERT + vbcstnesh2ps (%ecx), %xmm6 #AVX-NE-CONVERT + vbcstnesh2ps 254(%ecx), %xmm6 #AVX-NE-CONVERT Disp32(fe000000) + vbcstnesh2ps -256(%edx), %xmm6 #AVX-NE-CONVERT Disp32(00ffffff) + vbcstnesh2ps 0x10000000(%esp, %esi, 8), %ymm6 #AVX-NE-CONVERT + vbcstnesh2ps (%ecx), %ymm6 #AVX-NE-CONVERT + vbcstnesh2ps 254(%ecx), %ymm6 #AVX-NE-CONVERT Disp32(fe000000) + vbcstnesh2ps -256(%edx), %ymm6 #AVX-NE-CONVERT Disp32(00ffffff) + vcvtneebf162ps 0x10000000(%esp, %esi, 8), %xmm6 #AVX-NE-CONVERT + vcvtneebf162ps (%ecx), %xmm6 #AVX-NE-CONVERT + vcvtneebf162ps 2032(%ecx), %xmm6 #AVX-NE-CONVERT Disp32(f0070000) + vcvtneebf162ps -2048(%edx), %xmm6 #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneebf162ps 0x10000000(%esp, %esi, 8), %ymm6 #AVX-NE-CONVERT + vcvtneebf162ps (%ecx), %ymm6 #AVX-NE-CONVERT + vcvtneebf162ps 4064(%ecx), %ymm6 #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneebf162ps -4096(%edx), %ymm6 #AVX-NE-CONVERT Disp32(00f0ffff) + vcvtneeph2ps 0x10000000(%esp, %esi, 8), %xmm6 #AVX-NE-CONVERT + vcvtneeph2ps (%ecx), %xmm6 #AVX-NE-CONVERT + vcvtneeph2ps 2032(%ecx), %xmm6 #AVX-NE-CONVERT Disp32(f0070000) + vcvtneeph2ps -2048(%edx), %xmm6 #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneeph2ps 0x10000000(%esp, %esi, 8), %ymm6 #AVX-NE-CONVERT + vcvtneeph2ps (%ecx), %ymm6 #AVX-NE-CONVERT + vcvtneeph2ps 4064(%ecx), %ymm6 #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneeph2ps -4096(%edx), %ymm6 #AVX-NE-CONVERT Disp32(00f0ffff) + vcvtneobf162ps 0x10000000(%esp, %esi, 8), %xmm6 #AVX-NE-CONVERT + vcvtneobf162ps (%ecx), %xmm6 #AVX-NE-CONVERT + vcvtneobf162ps 2032(%ecx), %xmm6 #AVX-NE-CONVERT Disp32(f0070000) + vcvtneobf162ps -2048(%edx), %xmm6 #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneobf162ps 0x10000000(%esp, %esi, 8), %ymm6 #AVX-NE-CONVERT + vcvtneobf162ps (%ecx), %ymm6 #AVX-NE-CONVERT + vcvtneobf162ps 4064(%ecx), %ymm6 #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneobf162ps -4096(%edx), %ymm6 #AVX-NE-CONVERT Disp32(00f0ffff) + vcvtneoph2ps 0x10000000(%esp, %esi, 8), %xmm6 #AVX-NE-CONVERT + vcvtneoph2ps (%ecx), %xmm6 #AVX-NE-CONVERT + vcvtneoph2ps 2032(%ecx), %xmm6 #AVX-NE-CONVERT Disp32(f0070000) + vcvtneoph2ps -2048(%edx), %xmm6 #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneoph2ps 0x10000000(%esp, %esi, 8), %ymm6 #AVX-NE-CONVERT + vcvtneoph2ps (%ecx), %ymm6 #AVX-NE-CONVERT + vcvtneoph2ps 4064(%ecx), %ymm6 #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneoph2ps -4096(%edx), %ymm6 #AVX-NE-CONVERT Disp32(00f0ffff) + vcvtneps2bf16 %xmm5, %xmm6 #AVX-NE-CONVERT + {evex} vcvtneps2bf16 %xmm5, %xmm6 #AVX-NE-CONVERT + {vex} vcvtneps2bf16 %xmm5, %xmm6 #AVX-NE-CONVERT + {vex3} vcvtneps2bf16 %xmm5, %xmm6 #AVX-NE-CONVERT + vcvtneps2bf16 %ymm5, %xmm6 #AVX-NE-CONVERT + {evex} vcvtneps2bf16 %ymm5, %xmm6 #AVX-NE-CONVERT + {vex} vcvtneps2bf16 %ymm5, %xmm6 #AVX-NE-CONVERT + {vex3} vcvtneps2bf16 %ymm5, %xmm6 #AVX-NE-CONVERT + vcvtneps2bf16x 0x10000000(%esp, %esi, 8), %xmm6 #AVX-NE-CONVERT + {evex} vcvtneps2bf16x 0x10000000(%esp, %esi, 8), %xmm6 #AVX-NE-CONVERT + {vex} vcvtneps2bf16x 0x10000000(%esp, %esi, 8), %xmm6 #AVX-NE-CONVERT + {vex3} vcvtneps2bf16x 0x10000000(%esp, %esi, 8), %xmm6 #AVX-NE-CONVERT + vcvtneps2bf16x (%ecx), %xmm6 #AVX-NE-CONVERT + {evex} vcvtneps2bf16x (%ecx), %xmm6 #AVX-NE-CONVERT + {vex} vcvtneps2bf16x (%ecx), %xmm6 #AVX-NE-CONVERT + {vex3} vcvtneps2bf16x (%ecx), %xmm6 #AVX-NE-CONVERT + vcvtneps2bf16x 2032(%ecx), %xmm6 #AVX-NE-CONVERT Disp32(f0070000) + {evex} vcvtneps2bf16x 2032(%ecx), %xmm6 #AVX-NE-CONVERT Disp32(f0070000) + {vex} vcvtneps2bf16x 2032(%ecx), %xmm6 #AVX-NE-CONVERT Disp32(f0070000) + {vex3} vcvtneps2bf16x 2032(%ecx), %xmm6 #AVX-NE-CONVERT Disp32(f0070000) + vcvtneps2bf16x -2048(%edx), %xmm6 #AVX-NE-CONVERT Disp32(00f8ffff) + {evex} vcvtneps2bf16x -2048(%edx), %xmm6 #AVX-NE-CONVERT Disp32(00f8ffff) + {vex} vcvtneps2bf16x -2048(%edx), %xmm6 #AVX-NE-CONVERT Disp32(00f8ffff) + {vex3} vcvtneps2bf16x -2048(%edx), %xmm6 #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneps2bf16y 4064(%ecx), %xmm6 #AVX-NE-CONVERT Disp32(e00f0000) + {evex} vcvtneps2bf16y 4064(%ecx), %xmm6 #AVX-NE-CONVERT Disp32(e00f0000) + {vex} vcvtneps2bf16y 4064(%ecx), %xmm6 #AVX-NE-CONVERT Disp32(e00f0000) + {vex3} vcvtneps2bf16y 4064(%ecx), %xmm6 #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneps2bf16y -4096(%edx), %xmm6 #AVX-NE-CONVERT Disp32(00f0ffff) + {evex} vcvtneps2bf16y -4096(%edx), %xmm6 #AVX-NE-CONVERT Disp32(00f0ffff) + {vex} vcvtneps2bf16y -4096(%edx), %xmm6 #AVX-NE-CONVERT Disp32(00f0ffff) + {vex3} vcvtneps2bf16y -4096(%edx), %xmm6 #AVX-NE-CONVERT Disp32(00f0ffff) + +.intel_syntax noprefix + vbcstnebf162ps xmm6, WORD PTR [esp+esi*8+0x10000000] #AVX-NE-CONVERT + vbcstnebf162ps xmm6, WORD PTR [ecx] #AVX-NE-CONVERT + vbcstnebf162ps xmm6, WORD PTR [ecx+254] #AVX-NE-CONVERT Disp32(fe000000) + vbcstnebf162ps xmm6, WORD PTR [edx-256] #AVX-NE-CONVERT Disp32(00ffffff) + vbcstnebf162ps ymm6, WORD PTR [esp+esi*8+0x10000000] #AVX-NE-CONVERT + vbcstnebf162ps ymm6, WORD PTR [ecx] #AVX-NE-CONVERT + vbcstnebf162ps ymm6, WORD PTR [ecx+254] #AVX-NE-CONVERT Disp32(fe000000) + vbcstnebf162ps ymm6, WORD PTR [edx-256] #AVX-NE-CONVERT Disp32(00ffffff) + vbcstnesh2ps xmm6, WORD PTR [esp+esi*8+0x10000000] #AVX-NE-CONVERT + vbcstnesh2ps xmm6, WORD PTR [ecx] #AVX-NE-CONVERT + vbcstnesh2ps xmm6, WORD PTR [ecx+254] #AVX-NE-CONVERT Disp32(fe000000) + vbcstnesh2ps xmm6, WORD PTR [edx-256] #AVX-NE-CONVERT Disp32(00ffffff) + vbcstnesh2ps ymm6, WORD PTR [esp+esi*8+0x10000000] #AVX-NE-CONVERT + vbcstnesh2ps ymm6, WORD PTR [ecx] #AVX-NE-CONVERT + vbcstnesh2ps ymm6, WORD PTR [ecx+254] #AVX-NE-CONVERT Disp32(fe000000) + vbcstnesh2ps ymm6, WORD PTR [edx-256] #AVX-NE-CONVERT Disp32(00ffffff) + vcvtneebf162ps xmm6, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-NE-CONVERT + vcvtneebf162ps xmm6, XMMWORD PTR [ecx] #AVX-NE-CONVERT + vcvtneebf162ps xmm6, XMMWORD PTR [ecx+2032] #AVX-NE-CONVERT Disp32(f0070000) + vcvtneebf162ps xmm6, XMMWORD PTR [edx-2048] #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneebf162ps ymm6, YMMWORD PTR [esp+esi*8+0x10000000] #AVX-NE-CONVERT + vcvtneebf162ps ymm6, YMMWORD PTR [ecx] #AVX-NE-CONVERT + vcvtneebf162ps ymm6, YMMWORD PTR [ecx+4064] #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneebf162ps ymm6, YMMWORD PTR [edx-4096] #AVX-NE-CONVERT Disp32(00f0ffff) + vcvtneeph2ps xmm6, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-NE-CONVERT + vcvtneeph2ps xmm6, XMMWORD PTR [ecx] #AVX-NE-CONVERT + vcvtneeph2ps xmm6, XMMWORD PTR [ecx+2032] #AVX-NE-CONVERT Disp32(f0070000) + vcvtneeph2ps xmm6, XMMWORD PTR [edx-2048] #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneeph2ps ymm6, YMMWORD PTR [esp+esi*8+0x10000000] #AVX-NE-CONVERT + vcvtneeph2ps ymm6, YMMWORD PTR [ecx] #AVX-NE-CONVERT + vcvtneeph2ps ymm6, YMMWORD PTR [ecx+4064] #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneeph2ps ymm6, YMMWORD PTR [edx-4096] #AVX-NE-CONVERT Disp32(00f0ffff) + vcvtneobf162ps xmm6, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-NE-CONVERT + vcvtneobf162ps xmm6, XMMWORD PTR [ecx] #AVX-NE-CONVERT + vcvtneobf162ps xmm6, XMMWORD PTR [ecx+2032] #AVX-NE-CONVERT Disp32(f0070000) + vcvtneobf162ps xmm6, XMMWORD PTR [edx-2048] #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneobf162ps ymm6, YMMWORD PTR [esp+esi*8+0x10000000] #AVX-NE-CONVERT + vcvtneobf162ps ymm6, YMMWORD PTR [ecx] #AVX-NE-CONVERT + vcvtneobf162ps ymm6, YMMWORD PTR [ecx+4064] #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneobf162ps ymm6, YMMWORD PTR [edx-4096] #AVX-NE-CONVERT Disp32(00f0ffff) + vcvtneoph2ps xmm6, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-NE-CONVERT + vcvtneoph2ps xmm6, XMMWORD PTR [ecx] #AVX-NE-CONVERT + vcvtneoph2ps xmm6, XMMWORD PTR [ecx+2032] #AVX-NE-CONVERT Disp32(f0070000) + vcvtneoph2ps xmm6, XMMWORD PTR [edx-2048] #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneoph2ps ymm6, YMMWORD PTR [esp+esi*8+0x10000000] #AVX-NE-CONVERT + vcvtneoph2ps ymm6, YMMWORD PTR [ecx] #AVX-NE-CONVERT + vcvtneoph2ps ymm6, YMMWORD PTR [ecx+4064] #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneoph2ps ymm6, YMMWORD PTR [edx-4096] #AVX-NE-CONVERT Disp32(00f0ffff) + vcvtneps2bf16 xmm6, xmm5 #AVX-NE-CONVERT + {evex} vcvtneps2bf16 xmm6, xmm5 #AVX-NE-CONVERT + {vex} vcvtneps2bf16 xmm6, xmm5 #AVX-NE-CONVERT + {vex3} vcvtneps2bf16 xmm6, xmm5 #AVX-NE-CONVERT + vcvtneps2bf16 xmm6, ymm5 #AVX-NE-CONVERT + {evex} vcvtneps2bf16 xmm6, ymm5 #AVX-NE-CONVERT + {vex} vcvtneps2bf16 xmm6, ymm5 #AVX-NE-CONVERT + {vex3} vcvtneps2bf16 xmm6, ymm5 #AVX-NE-CONVERT + vcvtneps2bf16 xmm6, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-NE-CONVERT + {evex} vcvtneps2bf16 xmm6, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-NE-CONVERT + {vex} vcvtneps2bf16 xmm6, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-NE-CONVERT + {vex3} vcvtneps2bf16 xmm6, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-NE-CONVERT + vcvtneps2bf16 xmm6, XMMWORD PTR [ecx] #AVX-NE-CONVERT + {evex} vcvtneps2bf16 xmm6, XMMWORD PTR [ecx] #AVX-NE-CONVERT + {vex} vcvtneps2bf16 xmm6, XMMWORD PTR [ecx] #AVX-NE-CONVERT + {vex3} vcvtneps2bf16 xmm6, XMMWORD PTR [ecx] #AVX-NE-CONVERT + vcvtneps2bf16 xmm6, XMMWORD PTR [ecx+2032] #AVX-NE-CONVERT Disp32(f0070000) + {evex} vcvtneps2bf16 xmm6, XMMWORD PTR [ecx+2032] #AVX-NE-CONVERT Disp32(f0070000) + {vex} vcvtneps2bf16 xmm6, XMMWORD PTR [ecx+2032] #AVX-NE-CONVERT Disp32(f0070000) + {vex3} vcvtneps2bf16 xmm6, XMMWORD PTR [ecx+2032] #AVX-NE-CONVERT Disp32(f0070000) + vcvtneps2bf16 xmm6, XMMWORD PTR [edx-2048] #AVX-NE-CONVERT Disp32(00f8ffff) + {evex} vcvtneps2bf16 xmm6, XMMWORD PTR [edx-2048] #AVX-NE-CONVERT Disp32(00f8ffff) + {vex} vcvtneps2bf16 xmm6, XMMWORD PTR [edx-2048] #AVX-NE-CONVERT Disp32(00f8ffff) + {vex3} vcvtneps2bf16 xmm6, XMMWORD PTR [edx-2048] #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneps2bf16 xmm6, YMMWORD PTR [ecx+4064] #AVX-NE-CONVERT Disp32(e00f0000) + {evex} vcvtneps2bf16 xmm6, YMMWORD PTR [ecx+4064] #AVX-NE-CONVERT Disp32(e00f0000) + {vex} vcvtneps2bf16 xmm6, YMMWORD PTR [ecx+4064] #AVX-NE-CONVERT Disp32(e00f0000) + {vex3} vcvtneps2bf16 xmm6, YMMWORD PTR [ecx+4064] #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneps2bf16 xmm6, YMMWORD PTR [edx-4096] #AVX-NE-CONVERT Disp32(00f0ffff) + {evex} vcvtneps2bf16 xmm6, YMMWORD PTR [edx-4096] #AVX-NE-CONVERT Disp32(00f0ffff) + {vex} vcvtneps2bf16 xmm6, YMMWORD PTR [edx-4096] #AVX-NE-CONVERT Disp32(00f0ffff) + {vex3} vcvtneps2bf16 xmm6, YMMWORD PTR [edx-4096] #AVX-NE-CONVERT Disp32(00f0ffff) diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 9eaadd131d..cbaec1ad14 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -483,6 +483,8 @@ if [gas_32_check] then { run_dump_test "wrmsrns" run_dump_test "wrmsrns-intel" run_list_test "msrlist-inval" + run_dump_test "avx-ne-convert" + run_dump_test "avx-ne-convert-intel" run_list_test "sg" run_dump_test "clzero" run_dump_test "invlpgb" @@ -1162,6 +1164,8 @@ if [gas_64_check] then { run_dump_test "x86-64-wrmsrns-intel" run_dump_test "x86-64-msrlist" run_dump_test "x86-64-msrlist-intel" + run_dump_test "x86-64-avx-ne-convert" + run_dump_test "x86-64-avx-ne-convert-intel" run_dump_test "x86-64-clzero" run_dump_test "x86-64-mwaitx-bdver4" run_list_test "x86-64-mwaitx-reg" diff --git a/gas/testsuite/gas/i386/x86-64-avx-ne-convert-intel.d b/gas/testsuite/gas/i386/x86-64-avx-ne-convert-intel.d new file mode 100644 index 0000000000..96ec69a12c --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx-ne-convert-intel.d @@ -0,0 +1,170 @@ +#as: +#objdump: -dw -Mintel +#name: x86_64 AVX-NE-CONVERT insns (Intel disassembly) +#source: x86-64-avx-ne-convert.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 a2 7a b1 b4 f5 00 00 00 10\s+vbcstnebf162ps xmm6,WORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7a b1 31\s+vbcstnebf162ps xmm6,WORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7a b1 b1 fe 00 00 00\s+vbcstnebf162ps xmm6,WORD PTR \[rcx\+0xfe\] +\s*[a-f0-9]+:\s*c4 e2 7a b1 b2 00 ff ff ff\s+vbcstnebf162ps xmm6,WORD PTR \[rdx-0x100\] +\s*[a-f0-9]+:\s*c4 a2 7e b1 b4 f5 00 00 00 10\s+vbcstnebf162ps ymm6,WORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7e b1 31\s+vbcstnebf162ps ymm6,WORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7e b1 b1 fe 00 00 00\s+vbcstnebf162ps ymm6,WORD PTR \[rcx\+0xfe\] +\s*[a-f0-9]+:\s*c4 e2 7e b1 b2 00 ff ff ff\s+vbcstnebf162ps ymm6,WORD PTR \[rdx-0x100\] +\s*[a-f0-9]+:\s*c4 a2 79 b1 b4 f5 00 00 00 10\s+vbcstnesh2ps xmm6,WORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 79 b1 31\s+vbcstnesh2ps xmm6,WORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 79 b1 b1 fe 00 00 00\s+vbcstnesh2ps xmm6,WORD PTR \[rcx\+0xfe\] +\s*[a-f0-9]+:\s*c4 e2 79 b1 b2 00 ff ff ff\s+vbcstnesh2ps xmm6,WORD PTR \[rdx-0x100\] +\s*[a-f0-9]+:\s*c4 a2 7d b1 b4 f5 00 00 00 10\s+vbcstnesh2ps ymm6,WORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7d b1 31\s+vbcstnesh2ps ymm6,WORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7d b1 b1 fe 00 00 00\s+vbcstnesh2ps ymm6,WORD PTR \[rcx\+0xfe\] +\s*[a-f0-9]+:\s*c4 e2 7d b1 b2 00 ff ff ff\s+vbcstnesh2ps ymm6,WORD PTR \[rdx-0x100\] +\s*[a-f0-9]+:\s*c4 a2 7a b0 b4 f5 00 00 00 10\s+vcvtneebf162ps xmm6,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7a b0 31\s+vcvtneebf162ps xmm6,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7a b0 b1 f0 07 00 00\s+vcvtneebf162ps xmm6,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 7a b0 b2 00 f8 ff ff\s+vcvtneebf162ps xmm6,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 a2 7e b0 b4 f5 00 00 00 10\s+vcvtneebf162ps ymm6,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7e b0 31\s+vcvtneebf162ps ymm6,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7e b0 b1 e0 0f 00 00\s+vcvtneebf162ps ymm6,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7e b0 b2 00 f0 ff ff\s+vcvtneebf162ps ymm6,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 79 b0 b4 f5 00 00 00 10\s+vcvtneeph2ps xmm6,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 79 b0 31\s+vcvtneeph2ps xmm6,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 79 b0 b1 f0 07 00 00\s+vcvtneeph2ps xmm6,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 79 b0 b2 00 f8 ff ff\s+vcvtneeph2ps xmm6,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 a2 7d b0 b4 f5 00 00 00 10\s+vcvtneeph2ps ymm6,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7d b0 31\s+vcvtneeph2ps ymm6,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7d b0 b1 e0 0f 00 00\s+vcvtneeph2ps ymm6,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7d b0 b2 00 f0 ff ff\s+vcvtneeph2ps ymm6,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 7b b0 b4 f5 00 00 00 10\s+vcvtneobf162ps xmm6,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7b b0 31\s+vcvtneobf162ps xmm6,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7b b0 b1 f0 07 00 00\s+vcvtneobf162ps xmm6,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 7b b0 b2 00 f8 ff ff\s+vcvtneobf162ps xmm6,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 a2 7f b0 b4 f5 00 00 00 10\s+vcvtneobf162ps ymm6,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7f b0 31\s+vcvtneobf162ps ymm6,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7f b0 b1 e0 0f 00 00\s+vcvtneobf162ps ymm6,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7f b0 b2 00 f0 ff ff\s+vcvtneobf162ps ymm6,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 78 b0 b4 f5 00 00 00 10\s+vcvtneoph2ps xmm6,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 78 b0 31\s+vcvtneoph2ps xmm6,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 78 b0 b1 f0 07 00 00\s+vcvtneoph2ps xmm6,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 78 b0 b2 00 f8 ff ff\s+vcvtneoph2ps xmm6,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 a2 7c b0 b4 f5 00 00 00 10\s+vcvtneoph2ps ymm6,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7c b0 31\s+vcvtneoph2ps ymm6,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7c b0 b1 e0 0f 00 00\s+vcvtneoph2ps ymm6,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7c b0 b2 00 f0 ff ff\s+vcvtneoph2ps ymm6,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 f5\s+vcvtneps2bf16 xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 f5\s+vcvtneps2bf16 xmm6,xmm5 +\s*[a-f0-9]+:\s*c4 e2 7a 72 f5\s+\{vex\} vcvtneps2bf16 xmm6,xmm5 +\s*[a-f0-9]+:\s*c4 e2 7a 72 f5\s+\{vex\} vcvtneps2bf16 xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 f5\s+vcvtneps2bf16 xmm6,ymm5 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 f5\s+vcvtneps2bf16 xmm6,ymm5 +\s*[a-f0-9]+:\s*c4 e2 7e 72 f5\s+\{vex\} vcvtneps2bf16 xmm6,ymm5 +\s*[a-f0-9]+:\s*c4 e2 7e 72 f5\s+\{vex\} vcvtneps2bf16 xmm6,ymm5 +\s*[a-f0-9]+:\s*62 b2 7e 08 72 b4 f5 00 00 00 10\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 b2 7e 08 72 b4 f5 00 00 00 10\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 a2 7a 72 b4 f5 00 00 00 10\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 a2 7a 72 b4 f5 00 00 00 10\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 d2 7e 08 72 31\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 d2 7e 08 72 31\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 c2 7a 72 31\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 c2 7a 72 31\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 71 7f\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 71 7f\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b1 f0 07 00 00\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b1 f0 07 00 00\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 72 80\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 72 80\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b2 00 f8 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b2 00 f8 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*62 f2 7e 28 72 71 7f\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*62 f2 7e 28 72 71 7f\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7e 72 b1 e0 0f 00 00\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7e 72 b1 e0 0f 00 00\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 7a b1 b4 f5 00 00 00 10\s+vbcstnebf162ps xmm6,WORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7a b1 31\s+vbcstnebf162ps xmm6,WORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7a b1 b1 fe 00 00 00\s+vbcstnebf162ps xmm6,WORD PTR \[rcx\+0xfe\] +\s*[a-f0-9]+:\s*c4 e2 7a b1 b2 00 ff ff ff\s+vbcstnebf162ps xmm6,WORD PTR \[rdx-0x100\] +\s*[a-f0-9]+:\s*c4 a2 7e b1 b4 f5 00 00 00 10\s+vbcstnebf162ps ymm6,WORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7e b1 31\s+vbcstnebf162ps ymm6,WORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7e b1 b1 fe 00 00 00\s+vbcstnebf162ps ymm6,WORD PTR \[rcx\+0xfe\] +\s*[a-f0-9]+:\s*c4 e2 7e b1 b2 00 ff ff ff\s+vbcstnebf162ps ymm6,WORD PTR \[rdx-0x100\] +\s*[a-f0-9]+:\s*c4 a2 79 b1 b4 f5 00 00 00 10\s+vbcstnesh2ps xmm6,WORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 79 b1 31\s+vbcstnesh2ps xmm6,WORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 79 b1 b1 fe 00 00 00\s+vbcstnesh2ps xmm6,WORD PTR \[rcx\+0xfe\] +\s*[a-f0-9]+:\s*c4 e2 79 b1 b2 00 ff ff ff\s+vbcstnesh2ps xmm6,WORD PTR \[rdx-0x100\] +\s*[a-f0-9]+:\s*c4 a2 7d b1 b4 f5 00 00 00 10\s+vbcstnesh2ps ymm6,WORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7d b1 31\s+vbcstnesh2ps ymm6,WORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7d b1 b1 fe 00 00 00\s+vbcstnesh2ps ymm6,WORD PTR \[rcx\+0xfe\] +\s*[a-f0-9]+:\s*c4 e2 7d b1 b2 00 ff ff ff\s+vbcstnesh2ps ymm6,WORD PTR \[rdx-0x100\] +\s*[a-f0-9]+:\s*c4 a2 7a b0 b4 f5 00 00 00 10\s+vcvtneebf162ps xmm6,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7a b0 31\s+vcvtneebf162ps xmm6,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7a b0 b1 f0 07 00 00\s+vcvtneebf162ps xmm6,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 7a b0 b2 00 f8 ff ff\s+vcvtneebf162ps xmm6,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 a2 7e b0 b4 f5 00 00 00 10\s+vcvtneebf162ps ymm6,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7e b0 31\s+vcvtneebf162ps ymm6,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7e b0 b1 e0 0f 00 00\s+vcvtneebf162ps ymm6,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7e b0 b2 00 f0 ff ff\s+vcvtneebf162ps ymm6,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 79 b0 b4 f5 00 00 00 10\s+vcvtneeph2ps xmm6,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 79 b0 31\s+vcvtneeph2ps xmm6,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 79 b0 b1 f0 07 00 00\s+vcvtneeph2ps xmm6,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 79 b0 b2 00 f8 ff ff\s+vcvtneeph2ps xmm6,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 a2 7d b0 b4 f5 00 00 00 10\s+vcvtneeph2ps ymm6,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7d b0 31\s+vcvtneeph2ps ymm6,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7d b0 b1 e0 0f 00 00\s+vcvtneeph2ps ymm6,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7d b0 b2 00 f0 ff ff\s+vcvtneeph2ps ymm6,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 7b b0 b4 f5 00 00 00 10\s+vcvtneobf162ps xmm6,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7b b0 31\s+vcvtneobf162ps xmm6,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7b b0 b1 f0 07 00 00\s+vcvtneobf162ps xmm6,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 7b b0 b2 00 f8 ff ff\s+vcvtneobf162ps xmm6,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 a2 7f b0 b4 f5 00 00 00 10\s+vcvtneobf162ps ymm6,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7f b0 31\s+vcvtneobf162ps ymm6,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7f b0 b1 e0 0f 00 00\s+vcvtneobf162ps ymm6,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7f b0 b2 00 f0 ff ff\s+vcvtneobf162ps ymm6,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 78 b0 b4 f5 00 00 00 10\s+vcvtneoph2ps xmm6,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 78 b0 31\s+vcvtneoph2ps xmm6,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 78 b0 b1 f0 07 00 00\s+vcvtneoph2ps xmm6,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 78 b0 b2 00 f8 ff ff\s+vcvtneoph2ps xmm6,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 a2 7c b0 b4 f5 00 00 00 10\s+vcvtneoph2ps ymm6,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 7c b0 31\s+vcvtneoph2ps ymm6,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 7c b0 b1 e0 0f 00 00\s+vcvtneoph2ps ymm6,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7c b0 b2 00 f0 ff ff\s+vcvtneoph2ps ymm6,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 f5\s+vcvtneps2bf16 xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 f5\s+vcvtneps2bf16 xmm6,xmm5 +\s*[a-f0-9]+:\s*c4 e2 7a 72 f5\s+\{vex\} vcvtneps2bf16 xmm6,xmm5 +\s*[a-f0-9]+:\s*c4 e2 7a 72 f5\s+\{vex\} vcvtneps2bf16 xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 f5\s+vcvtneps2bf16 xmm6,ymm5 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 f5\s+vcvtneps2bf16 xmm6,ymm5 +\s*[a-f0-9]+:\s*c4 e2 7e 72 f5\s+\{vex\} vcvtneps2bf16 xmm6,ymm5 +\s*[a-f0-9]+:\s*c4 e2 7e 72 f5\s+\{vex\} vcvtneps2bf16 xmm6,ymm5 +\s*[a-f0-9]+:\s*62 b2 7e 08 72 b4 f5 00 00 00 10\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 b2 7e 08 72 b4 f5 00 00 00 10\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 a2 7a 72 b4 f5 00 00 00 10\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 a2 7a 72 b4 f5 00 00 00 10\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 d2 7e 08 72 31\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 d2 7e 08 72 31\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 c2 7a 72 31\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 c2 7a 72 31\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 71 7f\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 71 7f\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b1 f0 07 00 00\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b1 f0 07 00 00\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 72 80\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*62 f2 7e 08 72 72 80\s+vcvtneps2bf16 xmm6,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b2 00 f8 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 7a 72 b2 00 f8 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*62 f2 7e 28 72 71 7f\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*62 f2 7e 28 72 71 7f\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7e 72 b1 e0 0f 00 00\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 7e 72 b1 e0 0f 00 00\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16 xmm6,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16 xmm6,YMMWORD PTR \[rdx-0x1000\] diff --git a/gas/testsuite/gas/i386/x86-64-avx-ne-convert.d b/gas/testsuite/gas/i386/x86-64-avx-ne-convert.d new file mode 100644 index 0000000000..6bd8391ed5 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx-ne-convert.d @@ -0,0 +1,170 @@ +#as: +#objdump: -dw +#name: x86_64 AVX-NE-CONVERT insns +#source: x86-64-avx-ne-convert.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 a2 7a b1 b4 f5 00 00 00 10\s+vbcstnebf162ps 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 c2 7a b1 31\s+vbcstnebf162ps \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b1 b1 fe 00 00 00\s+vbcstnebf162ps 0xfe\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b1 b2 00 ff ff ff\s+vbcstnebf162ps -0x100\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 a2 7e b1 b4 f5 00 00 00 10\s+vbcstnebf162ps 0x10000000\(%rbp,%r14,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 c2 7e b1 31\s+vbcstnebf162ps \(%r9\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b1 b1 fe 00 00 00\s+vbcstnebf162ps 0xfe\(%rcx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b1 b2 00 ff ff ff\s+vbcstnebf162ps -0x100\(%rdx\),%ymm6 +\s*[a-f0-9]+:\s*c4 a2 79 b1 b4 f5 00 00 00 10\s+vbcstnesh2ps 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 c2 79 b1 31\s+vbcstnesh2ps \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b1 b1 fe 00 00 00\s+vbcstnesh2ps 0xfe\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b1 b2 00 ff ff ff\s+vbcstnesh2ps -0x100\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 a2 7d b1 b4 f5 00 00 00 10\s+vbcstnesh2ps 0x10000000\(%rbp,%r14,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 c2 7d b1 31\s+vbcstnesh2ps \(%r9\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b1 b1 fe 00 00 00\s+vbcstnesh2ps 0xfe\(%rcx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b1 b2 00 ff ff ff\s+vbcstnesh2ps -0x100\(%rdx\),%ymm6 +\s*[a-f0-9]+:\s*c4 a2 7a b0 b4 f5 00 00 00 10\s+vcvtneebf162ps 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 c2 7a b0 31\s+vcvtneebf162ps \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b0 b1 f0 07 00 00\s+vcvtneebf162ps 0x7f0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b0 b2 00 f8 ff ff\s+vcvtneebf162ps -0x800\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 a2 7e b0 b4 f5 00 00 00 10\s+vcvtneebf162ps 0x10000000\(%rbp,%r14,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 c2 7e b0 31\s+vcvtneebf162ps \(%r9\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b0 b1 e0 0f 00 00\s+vcvtneebf162ps 0xfe0\(%rcx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b0 b2 00 f0 ff ff\s+vcvtneebf162ps -0x1000\(%rdx\),%ymm6 +\s*[a-f0-9]+:\s*c4 a2 79 b0 b4 f5 00 00 00 10\s+vcvtneeph2ps 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 c2 79 b0 31\s+vcvtneeph2ps \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b0 b1 f0 07 00 00\s+vcvtneeph2ps 0x7f0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b0 b2 00 f8 ff ff\s+vcvtneeph2ps -0x800\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 a2 7d b0 b4 f5 00 00 00 10\s+vcvtneeph2ps 0x10000000\(%rbp,%r14,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 c2 7d b0 31\s+vcvtneeph2ps \(%r9\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b0 b1 e0 0f 00 00\s+vcvtneeph2ps 0xfe0\(%rcx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b0 b2 00 f0 ff ff\s+vcvtneeph2ps -0x1000\(%rdx\),%ymm6 +\s*[a-f0-9]+:\s*c4 a2 7b b0 b4 f5 00 00 00 10\s+vcvtneobf162ps 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 c2 7b b0 31\s+vcvtneobf162ps \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7b b0 b1 f0 07 00 00\s+vcvtneobf162ps 0x7f0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7b b0 b2 00 f8 ff ff\s+vcvtneobf162ps -0x800\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 a2 7f b0 b4 f5 00 00 00 10\s+vcvtneobf162ps 0x10000000\(%rbp,%r14,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 c2 7f b0 31\s+vcvtneobf162ps \(%r9\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7f b0 b1 e0 0f 00 00\s+vcvtneobf162ps 0xfe0\(%rcx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7f b0 b2 00 f0 ff ff\s+vcvtneobf162ps -0x1000\(%rdx\),%ymm6 +\s*[a-f0-9]+:\s*c4 a2 78 b0 b4 f5 00 00 00 10\s+vcvtneoph2ps 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 c2 78 b0 31\s+vcvtneoph2ps \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 78 b0 b1 f0 07 00 00\s+vcvtneoph2ps 0x7f0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 78 b0 b2 00 f8 ff ff\s+vcvtneoph2ps -0x800\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 a2 7c b0 b4 f5 00 00 00 10\s+vcvtneoph2ps 0x10000000\(%rbp,%r14,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 c2 7c b0 31\s+vcvtneoph2ps \(%r9\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7c b0 b1 e0 0f 00 00\s+vcvtneoph2ps 0xfe0\(%rcx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7c b0 b2 00 f0 ff ff\s+vcvtneoph2ps -0x1000\(%rdx\),%ymm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 f5\s+vcvtneps2bf16 %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 f5\s+vcvtneps2bf16 %xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 f5\s+\{vex\} vcvtneps2bf16 %xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 f5\s+\{vex\} vcvtneps2bf16 %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 f5\s+vcvtneps2bf16 %ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 f5\s+vcvtneps2bf16 %ymm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 f5\s+\{vex\} vcvtneps2bf16 %ymm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 f5\s+\{vex\} vcvtneps2bf16 %ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 b2 7e 08 72 b4 f5 00 00 00 10\s+vcvtneps2bf16x 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*62 b2 7e 08 72 b4 f5 00 00 00 10\s+vcvtneps2bf16x 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 a2 7a 72 b4 f5 00 00 00 10\s+\{vex\} vcvtneps2bf16x 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 a2 7a 72 b4 f5 00 00 00 10\s+\{vex\} vcvtneps2bf16x 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*62 d2 7e 08 72 31\s+vcvtneps2bf16x \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*62 d2 7e 08 72 31\s+vcvtneps2bf16x \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*c4 c2 7a 72 31\s+\{vex\} vcvtneps2bf16x \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*c4 c2 7a 72 31\s+\{vex\} vcvtneps2bf16x \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 71 7f\s+vcvtneps2bf16x 0x7f0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 71 7f\s+vcvtneps2bf16x 0x7f0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b1 f0 07 00 00\s+\{vex\} vcvtneps2bf16x 0x7f0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b1 f0 07 00 00\s+\{vex\} vcvtneps2bf16x 0x7f0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 72 80\s+vcvtneps2bf16x -0x800\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 72 80\s+vcvtneps2bf16x -0x800\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b2 00 f8 ff ff\s+\{vex\} vcvtneps2bf16x -0x800\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b2 00 f8 ff ff\s+\{vex\} vcvtneps2bf16x -0x800\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 71 7f\s+vcvtneps2bf16y 0xfe0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 71 7f\s+vcvtneps2bf16y 0xfe0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 b1 e0 0f 00 00\s+\{vex\} vcvtneps2bf16y 0xfe0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 b1 e0 0f 00 00\s+\{vex\} vcvtneps2bf16y 0xfe0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16y -0x1000\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16y -0x1000\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16y -0x1000\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16y -0x1000\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 a2 7a b1 b4 f5 00 00 00 10\s+vbcstnebf162ps 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 c2 7a b1 31\s+vbcstnebf162ps \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b1 b1 fe 00 00 00\s+vbcstnebf162ps 0xfe\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b1 b2 00 ff ff ff\s+vbcstnebf162ps -0x100\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 a2 7e b1 b4 f5 00 00 00 10\s+vbcstnebf162ps 0x10000000\(%rbp,%r14,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 c2 7e b1 31\s+vbcstnebf162ps \(%r9\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b1 b1 fe 00 00 00\s+vbcstnebf162ps 0xfe\(%rcx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b1 b2 00 ff ff ff\s+vbcstnebf162ps -0x100\(%rdx\),%ymm6 +\s*[a-f0-9]+:\s*c4 a2 79 b1 b4 f5 00 00 00 10\s+vbcstnesh2ps 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 c2 79 b1 31\s+vbcstnesh2ps \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b1 b1 fe 00 00 00\s+vbcstnesh2ps 0xfe\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b1 b2 00 ff ff ff\s+vbcstnesh2ps -0x100\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 a2 7d b1 b4 f5 00 00 00 10\s+vbcstnesh2ps 0x10000000\(%rbp,%r14,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 c2 7d b1 31\s+vbcstnesh2ps \(%r9\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b1 b1 fe 00 00 00\s+vbcstnesh2ps 0xfe\(%rcx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b1 b2 00 ff ff ff\s+vbcstnesh2ps -0x100\(%rdx\),%ymm6 +\s*[a-f0-9]+:\s*c4 a2 7a b0 b4 f5 00 00 00 10\s+vcvtneebf162ps 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 c2 7a b0 31\s+vcvtneebf162ps \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b0 b1 f0 07 00 00\s+vcvtneebf162ps 0x7f0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a b0 b2 00 f8 ff ff\s+vcvtneebf162ps -0x800\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 a2 7e b0 b4 f5 00 00 00 10\s+vcvtneebf162ps 0x10000000\(%rbp,%r14,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 c2 7e b0 31\s+vcvtneebf162ps \(%r9\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b0 b1 e0 0f 00 00\s+vcvtneebf162ps 0xfe0\(%rcx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7e b0 b2 00 f0 ff ff\s+vcvtneebf162ps -0x1000\(%rdx\),%ymm6 +\s*[a-f0-9]+:\s*c4 a2 79 b0 b4 f5 00 00 00 10\s+vcvtneeph2ps 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 c2 79 b0 31\s+vcvtneeph2ps \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b0 b1 f0 07 00 00\s+vcvtneeph2ps 0x7f0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 79 b0 b2 00 f8 ff ff\s+vcvtneeph2ps -0x800\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 a2 7d b0 b4 f5 00 00 00 10\s+vcvtneeph2ps 0x10000000\(%rbp,%r14,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 c2 7d b0 31\s+vcvtneeph2ps \(%r9\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b0 b1 e0 0f 00 00\s+vcvtneeph2ps 0xfe0\(%rcx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7d b0 b2 00 f0 ff ff\s+vcvtneeph2ps -0x1000\(%rdx\),%ymm6 +\s*[a-f0-9]+:\s*c4 a2 7b b0 b4 f5 00 00 00 10\s+vcvtneobf162ps 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 c2 7b b0 31\s+vcvtneobf162ps \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7b b0 b1 f0 07 00 00\s+vcvtneobf162ps 0x7f0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7b b0 b2 00 f8 ff ff\s+vcvtneobf162ps -0x800\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 a2 7f b0 b4 f5 00 00 00 10\s+vcvtneobf162ps 0x10000000\(%rbp,%r14,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 c2 7f b0 31\s+vcvtneobf162ps \(%r9\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7f b0 b1 e0 0f 00 00\s+vcvtneobf162ps 0xfe0\(%rcx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7f b0 b2 00 f0 ff ff\s+vcvtneobf162ps -0x1000\(%rdx\),%ymm6 +\s*[a-f0-9]+:\s*c4 a2 78 b0 b4 f5 00 00 00 10\s+vcvtneoph2ps 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 c2 78 b0 31\s+vcvtneoph2ps \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 78 b0 b1 f0 07 00 00\s+vcvtneoph2ps 0x7f0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 78 b0 b2 00 f8 ff ff\s+vcvtneoph2ps -0x800\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 a2 7c b0 b4 f5 00 00 00 10\s+vcvtneoph2ps 0x10000000\(%rbp,%r14,8\),%ymm6 +\s*[a-f0-9]+:\s*c4 c2 7c b0 31\s+vcvtneoph2ps \(%r9\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7c b0 b1 e0 0f 00 00\s+vcvtneoph2ps 0xfe0\(%rcx\),%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7c b0 b2 00 f0 ff ff\s+vcvtneoph2ps -0x1000\(%rdx\),%ymm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 f5\s+vcvtneps2bf16 %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 f5\s+vcvtneps2bf16 %xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 f5\s+\{vex\} vcvtneps2bf16 %xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 f5\s+\{vex\} vcvtneps2bf16 %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 f5\s+vcvtneps2bf16 %ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 f5\s+vcvtneps2bf16 %ymm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 f5\s+\{vex\} vcvtneps2bf16 %ymm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 f5\s+\{vex\} vcvtneps2bf16 %ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 b2 7e 08 72 b4 f5 00 00 00 10\s+vcvtneps2bf16x 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*62 b2 7e 08 72 b4 f5 00 00 00 10\s+vcvtneps2bf16x 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 a2 7a 72 b4 f5 00 00 00 10\s+\{vex\} vcvtneps2bf16x 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*c4 a2 7a 72 b4 f5 00 00 00 10\s+\{vex\} vcvtneps2bf16x 0x10000000\(%rbp,%r14,8\),%xmm6 +\s*[a-f0-9]+:\s*62 d2 7e 08 72 31\s+vcvtneps2bf16x \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*62 d2 7e 08 72 31\s+vcvtneps2bf16x \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*c4 c2 7a 72 31\s+\{vex\} vcvtneps2bf16x \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*c4 c2 7a 72 31\s+\{vex\} vcvtneps2bf16x \(%r9\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 71 7f\s+vcvtneps2bf16x 0x7f0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 71 7f\s+vcvtneps2bf16x 0x7f0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b1 f0 07 00 00\s+\{vex\} vcvtneps2bf16x 0x7f0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b1 f0 07 00 00\s+\{vex\} vcvtneps2bf16x 0x7f0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 72 80\s+vcvtneps2bf16x -0x800\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 08 72 72 80\s+vcvtneps2bf16x -0x800\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b2 00 f8 ff ff\s+\{vex\} vcvtneps2bf16x -0x800\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7a 72 b2 00 f8 ff ff\s+\{vex\} vcvtneps2bf16x -0x800\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 71 7f\s+vcvtneps2bf16y 0xfe0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 71 7f\s+vcvtneps2bf16y 0xfe0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 b1 e0 0f 00 00\s+\{vex\} vcvtneps2bf16y 0xfe0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 b1 e0 0f 00 00\s+\{vex\} vcvtneps2bf16y 0xfe0\(%rcx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16y -0x1000\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*62 f2 7e 28 72 72 80\s+vcvtneps2bf16y -0x1000\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16y -0x1000\(%rdx\),%xmm6 +\s*[a-f0-9]+:\s*c4 e2 7e 72 b2 00 f0 ff ff\s+\{vex\} vcvtneps2bf16y -0x1000\(%rdx\),%xmm6 diff --git a/gas/testsuite/gas/i386/x86-64-avx-ne-convert.s b/gas/testsuite/gas/i386/x86-64-avx-ne-convert.s new file mode 100644 index 0000000000..c01a95d943 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx-ne-convert.s @@ -0,0 +1,167 @@ +# Check 64bit AVX-NE-CONVERT instructions + + .allow_index_reg + .text +_start: + vbcstnebf162ps 0x10000000(%rbp, %r14, 8), %xmm6 #AVX-NE-CONVERT + vbcstnebf162ps (%r9), %xmm6 #AVX-NE-CONVERT + vbcstnebf162ps 254(%rcx), %xmm6 #AVX-NE-CONVERT Disp32(fe000000) + vbcstnebf162ps -256(%rdx), %xmm6 #AVX-NE-CONVERT Disp32(00ffffff) + vbcstnebf162ps 0x10000000(%rbp, %r14, 8), %ymm6 #AVX-NE-CONVERT + vbcstnebf162ps (%r9), %ymm6 #AVX-NE-CONVERT + vbcstnebf162ps 254(%rcx), %ymm6 #AVX-NE-CONVERT Disp32(fe000000) + vbcstnebf162ps -256(%rdx), %ymm6 #AVX-NE-CONVERT Disp32(00ffffff) + vbcstnesh2ps 0x10000000(%rbp, %r14, 8), %xmm6 #AVX-NE-CONVERT + vbcstnesh2ps (%r9), %xmm6 #AVX-NE-CONVERT + vbcstnesh2ps 254(%rcx), %xmm6 #AVX-NE-CONVERT Disp32(fe000000) + vbcstnesh2ps -256(%rdx), %xmm6 #AVX-NE-CONVERT Disp32(00ffffff) + vbcstnesh2ps 0x10000000(%rbp, %r14, 8), %ymm6 #AVX-NE-CONVERT + vbcstnesh2ps (%r9), %ymm6 #AVX-NE-CONVERT + vbcstnesh2ps 254(%rcx), %ymm6 #AVX-NE-CONVERT Disp32(fe000000) + vbcstnesh2ps -256(%rdx), %ymm6 #AVX-NE-CONVERT Disp32(00ffffff) + vcvtneebf162ps 0x10000000(%rbp, %r14, 8), %xmm6 #AVX-NE-CONVERT + vcvtneebf162ps (%r9), %xmm6 #AVX-NE-CONVERT + vcvtneebf162ps 2032(%rcx), %xmm6 #AVX-NE-CONVERT Disp32(f0070000) + vcvtneebf162ps -2048(%rdx), %xmm6 #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneebf162ps 0x10000000(%rbp, %r14, 8), %ymm6 #AVX-NE-CONVERT + vcvtneebf162ps (%r9), %ymm6 #AVX-NE-CONVERT + vcvtneebf162ps 4064(%rcx), %ymm6 #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneebf162ps -4096(%rdx), %ymm6 #AVX-NE-CONVERT Disp32(00f0ffff) + vcvtneeph2ps 0x10000000(%rbp, %r14, 8), %xmm6 #AVX-NE-CONVERT + vcvtneeph2ps (%r9), %xmm6 #AVX-NE-CONVERT + vcvtneeph2ps 2032(%rcx), %xmm6 #AVX-NE-CONVERT Disp32(f0070000) + vcvtneeph2ps -2048(%rdx), %xmm6 #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneeph2ps 0x10000000(%rbp, %r14, 8), %ymm6 #AVX-NE-CONVERT + vcvtneeph2ps (%r9), %ymm6 #AVX-NE-CONVERT + vcvtneeph2ps 4064(%rcx), %ymm6 #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneeph2ps -4096(%rdx), %ymm6 #AVX-NE-CONVERT Disp32(00f0ffff) + vcvtneobf162ps 0x10000000(%rbp, %r14, 8), %xmm6 #AVX-NE-CONVERT + vcvtneobf162ps (%r9), %xmm6 #AVX-NE-CONVERT + vcvtneobf162ps 2032(%rcx), %xmm6 #AVX-NE-CONVERT Disp32(f0070000) + vcvtneobf162ps -2048(%rdx), %xmm6 #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneobf162ps 0x10000000(%rbp, %r14, 8), %ymm6 #AVX-NE-CONVERT + vcvtneobf162ps (%r9), %ymm6 #AVX-NE-CONVERT + vcvtneobf162ps 4064(%rcx), %ymm6 #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneobf162ps -4096(%rdx), %ymm6 #AVX-NE-CONVERT Disp32(00f0ffff) + vcvtneoph2ps 0x10000000(%rbp, %r14, 8), %xmm6 #AVX-NE-CONVERT + vcvtneoph2ps (%r9), %xmm6 #AVX-NE-CONVERT + vcvtneoph2ps 2032(%rcx), %xmm6 #AVX-NE-CONVERT Disp32(f0070000) + vcvtneoph2ps -2048(%rdx), %xmm6 #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneoph2ps 0x10000000(%rbp, %r14, 8), %ymm6 #AVX-NE-CONVERT + vcvtneoph2ps (%r9), %ymm6 #AVX-NE-CONVERT + vcvtneoph2ps 4064(%rcx), %ymm6 #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneoph2ps -4096(%rdx), %ymm6 #AVX-NE-CONVERT Disp32(00f0ffff) + vcvtneps2bf16 %xmm5, %xmm6 #AVX-NE-CONVERT + {evex} vcvtneps2bf16 %xmm5, %xmm6 #AVX-NE-CONVERT + {vex} vcvtneps2bf16 %xmm5, %xmm6 #AVX-NE-CONVERT + {vex3} vcvtneps2bf16 %xmm5, %xmm6 #AVX-NE-CONVERT + vcvtneps2bf16 %ymm5, %xmm6 #AVX-NE-CONVERT + {evex} vcvtneps2bf16 %ymm5, %xmm6 #AVX-NE-CONVERT + {vex} vcvtneps2bf16 %ymm5, %xmm6 #AVX-NE-CONVERT + {vex3} vcvtneps2bf16 %ymm5, %xmm6 #AVX-NE-CONVERT + vcvtneps2bf16x 0x10000000(%rbp, %r14, 8), %xmm6 #AVX-NE-CONVERT + {evex} vcvtneps2bf16x 0x10000000(%rbp, %r14, 8), %xmm6 #AVX-NE-CONVERT + {vex} vcvtneps2bf16x 0x10000000(%rbp, %r14, 8), %xmm6 #AVX-NE-CONVERT + {vex3} vcvtneps2bf16x 0x10000000(%rbp, %r14, 8), %xmm6 #AVX-NE-CONVERT + vcvtneps2bf16x (%r9), %xmm6 #AVX-NE-CONVERT + {evex} vcvtneps2bf16x (%r9), %xmm6 #AVX-NE-CONVERT + {vex} vcvtneps2bf16x (%r9), %xmm6 #AVX-NE-CONVERT + {vex3} vcvtneps2bf16x (%r9), %xmm6 #AVX-NE-CONVERT + vcvtneps2bf16x 2032(%rcx), %xmm6 #AVX-NE-CONVERT Disp32(f0070000) + {evex} vcvtneps2bf16x 2032(%rcx), %xmm6 #AVX-NE-CONVERT Disp32(f0070000) + {vex} vcvtneps2bf16x 2032(%rcx), %xmm6 #AVX-NE-CONVERT Disp32(f0070000) + {vex3} vcvtneps2bf16x 2032(%rcx), %xmm6 #AVX-NE-CONVERT Disp32(f0070000) + vcvtneps2bf16x -2048(%rdx), %xmm6 #AVX-NE-CONVERT Disp32(00f8ffff) + {evex} vcvtneps2bf16x -2048(%rdx), %xmm6 #AVX-NE-CONVERT Disp32(00f8ffff) + {vex} vcvtneps2bf16x -2048(%rdx), %xmm6 #AVX-NE-CONVERT Disp32(00f8ffff) + {vex3} vcvtneps2bf16x -2048(%rdx), %xmm6 #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneps2bf16y 4064(%rcx), %xmm6 #AVX-NE-CONVERT Disp32(e00f0000) + {evex} vcvtneps2bf16y 4064(%rcx), %xmm6 #AVX-NE-CONVERT Disp32(e00f0000) + {vex} vcvtneps2bf16y 4064(%rcx), %xmm6 #AVX-NE-CONVERT Disp32(e00f0000) + {vex3} vcvtneps2bf16y 4064(%rcx), %xmm6 #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneps2bf16y -4096(%rdx), %xmm6 #AVX-NE-CONVERT Disp32(00f0ffff) + {evex} vcvtneps2bf16y -4096(%rdx), %xmm6 #AVX-NE-CONVERT Disp32(00f0ffff) + {vex} vcvtneps2bf16y -4096(%rdx), %xmm6 #AVX-NE-CONVERT Disp32(00f0ffff) + {vex3} vcvtneps2bf16y -4096(%rdx), %xmm6 #AVX-NE-CONVERT Disp32(00f0ffff) + +.intel_syntax noprefix + vbcstnebf162ps xmm6, WORD PTR [rbp+r14*8+0x10000000] #AVX-NE-CONVERT + vbcstnebf162ps xmm6, WORD PTR [r9] #AVX-NE-CONVERT + vbcstnebf162ps xmm6, WORD PTR [rcx+254] #AVX-NE-CONVERT Disp32(fe000000) + vbcstnebf162ps xmm6, WORD PTR [rdx-256] #AVX-NE-CONVERT Disp32(00ffffff) + vbcstnebf162ps ymm6, WORD PTR [rbp+r14*8+0x10000000] #AVX-NE-CONVERT + vbcstnebf162ps ymm6, WORD PTR [r9] #AVX-NE-CONVERT + vbcstnebf162ps ymm6, WORD PTR [rcx+254] #AVX-NE-CONVERT Disp32(fe000000) + vbcstnebf162ps ymm6, WORD PTR [rdx-256] #AVX-NE-CONVERT Disp32(00ffffff) + vbcstnesh2ps xmm6, WORD PTR [rbp+r14*8+0x10000000] #AVX-NE-CONVERT + vbcstnesh2ps xmm6, WORD PTR [r9] #AVX-NE-CONVERT + vbcstnesh2ps xmm6, WORD PTR [rcx+254] #AVX-NE-CONVERT Disp32(fe000000) + vbcstnesh2ps xmm6, WORD PTR [rdx-256] #AVX-NE-CONVERT Disp32(00ffffff) + vbcstnesh2ps ymm6, WORD PTR [rbp+r14*8+0x10000000] #AVX-NE-CONVERT + vbcstnesh2ps ymm6, WORD PTR [r9] #AVX-NE-CONVERT + vbcstnesh2ps ymm6, WORD PTR [rcx+254] #AVX-NE-CONVERT Disp32(fe000000) + vbcstnesh2ps ymm6, WORD PTR [rdx-256] #AVX-NE-CONVERT Disp32(00ffffff) + vcvtneebf162ps xmm6, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-NE-CONVERT + vcvtneebf162ps xmm6, XMMWORD PTR [r9] #AVX-NE-CONVERT + vcvtneebf162ps xmm6, XMMWORD PTR [rcx+2032] #AVX-NE-CONVERT Disp32(f0070000) + vcvtneebf162ps xmm6, XMMWORD PTR [rdx-2048] #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneebf162ps ymm6, YMMWORD PTR [rbp+r14*8+0x10000000] #AVX-NE-CONVERT + vcvtneebf162ps ymm6, YMMWORD PTR [r9] #AVX-NE-CONVERT + vcvtneebf162ps ymm6, YMMWORD PTR [rcx+4064] #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneebf162ps ymm6, YMMWORD PTR [rdx-4096] #AVX-NE-CONVERT Disp32(00f0ffff) + vcvtneeph2ps xmm6, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-NE-CONVERT + vcvtneeph2ps xmm6, XMMWORD PTR [r9] #AVX-NE-CONVERT + vcvtneeph2ps xmm6, XMMWORD PTR [rcx+2032] #AVX-NE-CONVERT Disp32(f0070000) + vcvtneeph2ps xmm6, XMMWORD PTR [rdx-2048] #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneeph2ps ymm6, YMMWORD PTR [rbp+r14*8+0x10000000] #AVX-NE-CONVERT + vcvtneeph2ps ymm6, YMMWORD PTR [r9] #AVX-NE-CONVERT + vcvtneeph2ps ymm6, YMMWORD PTR [rcx+4064] #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneeph2ps ymm6, YMMWORD PTR [rdx-4096] #AVX-NE-CONVERT Disp32(00f0ffff) + vcvtneobf162ps xmm6, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-NE-CONVERT + vcvtneobf162ps xmm6, XMMWORD PTR [r9] #AVX-NE-CONVERT + vcvtneobf162ps xmm6, XMMWORD PTR [rcx+2032] #AVX-NE-CONVERT Disp32(f0070000) + vcvtneobf162ps xmm6, XMMWORD PTR [rdx-2048] #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneobf162ps ymm6, YMMWORD PTR [rbp+r14*8+0x10000000] #AVX-NE-CONVERT + vcvtneobf162ps ymm6, YMMWORD PTR [r9] #AVX-NE-CONVERT + vcvtneobf162ps ymm6, YMMWORD PTR [rcx+4064] #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneobf162ps ymm6, YMMWORD PTR [rdx-4096] #AVX-NE-CONVERT Disp32(00f0ffff) + vcvtneoph2ps xmm6, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-NE-CONVERT + vcvtneoph2ps xmm6, XMMWORD PTR [r9] #AVX-NE-CONVERT + vcvtneoph2ps xmm6, XMMWORD PTR [rcx+2032] #AVX-NE-CONVERT Disp32(f0070000) + vcvtneoph2ps xmm6, XMMWORD PTR [rdx-2048] #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneoph2ps ymm6, YMMWORD PTR [rbp+r14*8+0x10000000] #AVX-NE-CONVERT + vcvtneoph2ps ymm6, YMMWORD PTR [r9] #AVX-NE-CONVERT + vcvtneoph2ps ymm6, YMMWORD PTR [rcx+4064] #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneoph2ps ymm6, YMMWORD PTR [rdx-4096] #AVX-NE-CONVERT Disp32(00f0ffff) + vcvtneps2bf16 xmm6, xmm5 #AVX-NE-CONVERT + {evex} vcvtneps2bf16 xmm6, xmm5 #AVX-NE-CONVERT + {vex} vcvtneps2bf16 xmm6, xmm5 #AVX-NE-CONVERT + {vex3} vcvtneps2bf16 xmm6, xmm5 #AVX-NE-CONVERT + vcvtneps2bf16 xmm6, ymm5 #AVX-NE-CONVERT + {evex} vcvtneps2bf16 xmm6, ymm5 #AVX-NE-CONVERT + {vex} vcvtneps2bf16 xmm6, ymm5 #AVX-NE-CONVERT + {vex3} vcvtneps2bf16 xmm6, ymm5 #AVX-NE-CONVERT + vcvtneps2bf16 xmm6, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-NE-CONVERT + {evex} vcvtneps2bf16 xmm6, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-NE-CONVERT + {vex} vcvtneps2bf16 xmm6, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-NE-CONVERT + {vex3} vcvtneps2bf16 xmm6, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-NE-CONVERT + vcvtneps2bf16 xmm6, XMMWORD PTR [r9] #AVX-NE-CONVERT + {evex} vcvtneps2bf16 xmm6, XMMWORD PTR [r9] #AVX-NE-CONVERT + {vex} vcvtneps2bf16 xmm6, XMMWORD PTR [r9] #AVX-NE-CONVERT + {vex3} vcvtneps2bf16 xmm6, XMMWORD PTR [r9] #AVX-NE-CONVERT + vcvtneps2bf16 xmm6, XMMWORD PTR [rcx+2032] #AVX-NE-CONVERT Disp32(f0070000) + {evex} vcvtneps2bf16 xmm6, XMMWORD PTR [rcx+2032] #AVX-NE-CONVERT Disp32(f0070000) + {vex} vcvtneps2bf16 xmm6, XMMWORD PTR [rcx+2032] #AVX-NE-CONVERT Disp32(f0070000) + {vex3} vcvtneps2bf16 xmm6, XMMWORD PTR [rcx+2032] #AVX-NE-CONVERT Disp32(f0070000) + vcvtneps2bf16 xmm6, XMMWORD PTR [rdx-2048] #AVX-NE-CONVERT Disp32(00f8ffff) + {evex} vcvtneps2bf16 xmm6, XMMWORD PTR [rdx-2048] #AVX-NE-CONVERT Disp32(00f8ffff) + {vex} vcvtneps2bf16 xmm6, XMMWORD PTR [rdx-2048] #AVX-NE-CONVERT Disp32(00f8ffff) + {vex3} vcvtneps2bf16 xmm6, XMMWORD PTR [rdx-2048] #AVX-NE-CONVERT Disp32(00f8ffff) + vcvtneps2bf16 xmm6, YMMWORD PTR [rcx+4064] #AVX-NE-CONVERT Disp32(e00f0000) + {evex} vcvtneps2bf16 xmm6, YMMWORD PTR [rcx+4064] #AVX-NE-CONVERT Disp32(e00f0000) + {vex} vcvtneps2bf16 xmm6, YMMWORD PTR [rcx+4064] #AVX-NE-CONVERT Disp32(e00f0000) + {vex3} vcvtneps2bf16 xmm6, YMMWORD PTR [rcx+4064] #AVX-NE-CONVERT Disp32(e00f0000) + vcvtneps2bf16 xmm6, YMMWORD PTR [rdx-4096] #AVX-NE-CONVERT Disp32(00f0ffff) + {evex} vcvtneps2bf16 xmm6, YMMWORD PTR [rdx-4096] #AVX-NE-CONVERT Disp32(00f0ffff) + {vex} vcvtneps2bf16 xmm6, YMMWORD PTR [rdx-4096] #AVX-NE-CONVERT Disp32(00f0ffff) + {vex3} vcvtneps2bf16 xmm6, YMMWORD PTR [rdx-4096] #AVX-NE-CONVERT Disp32(00f0ffff) diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index ab43d0cd8e..4739685ff3 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -942,6 +942,8 @@ enum MOD_VEX_0F385E_X86_64_P_3_W_0, MOD_VEX_0F388C, MOD_VEX_0F388E, + MOD_VEX_0F38B0, + MOD_VEX_0F38B1, MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0, MOD_VEX_0F3A32_L_0, @@ -1138,6 +1140,9 @@ enum PREFIX_VEX_0F3851_W_0, PREFIX_VEX_0F385C_X86_64, PREFIX_VEX_0F385E_X86_64, + PREFIX_VEX_0F3872, + PREFIX_VEX_0F38B0_M_1_W_0, + PREFIX_VEX_0F38B1_M_1_W_0, PREFIX_VEX_0F38F5_L_0, PREFIX_VEX_0F38F6_L_0, PREFIX_VEX_0F38F7_L_0, @@ -1554,8 +1559,11 @@ enum VEX_W_0F385E_X86_64_P_1, VEX_W_0F385E_X86_64_P_2, VEX_W_0F385E_X86_64_P_3, + VEX_W_0F3872_P_1, VEX_W_0F3878, VEX_W_0F3879, + VEX_W_0F38B0_M_1, + VEX_W_0F38B1_M_1, VEX_W_0F38B4, VEX_W_0F38B5, VEX_W_0F38CF, @@ -4075,6 +4083,27 @@ static const struct dis386 prefix_table[][4] = { { VEX_W_TABLE (VEX_W_0F385E_X86_64_P_3) }, }, + /* PREFIX_VEX_0F3872 */ + { + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F3872_P_1) }, + }, + + /* PREFIX_VEX_0F38B0_M_1_W_0 */ + { + { "vcvtneoph2ps", { XM, Mx }, 0 }, + { "vcvtneebf162ps", { XM, Mx }, 0 }, + { "vcvtneeph2ps", { XM, Mx }, 0 }, + { "vcvtneobf162ps", { XM, Mx }, 0 }, + }, + + /* PREFIX_VEX_0F38B1_M_1_W_0 */ + { + { Bad_Opcode }, + { "vbcstnebf162ps", { XM, Ew }, 0 }, + { "vbcstnesh2ps", { XM, Ew }, 0 }, + }, + /* PREFIX_VEX_0F38F5_L_0 */ { { "bzhiS", { Gdq, Edq, VexGdq }, 0 }, @@ -6397,7 +6426,7 @@ static const struct dis386 vex_table[][256] = { /* 70 */ { Bad_Opcode }, { Bad_Opcode }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F3872) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, @@ -6467,8 +6496,8 @@ static const struct dis386 vex_table[][256] = { { "vfnmsub213p%XW", { XM, Vex, EXx }, PREFIX_DATA }, { "vfnmsub213s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA }, /* b0 */ - { Bad_Opcode }, - { Bad_Opcode }, + { MOD_TABLE (MOD_VEX_0F38B0) }, + { MOD_TABLE (MOD_VEX_0F38B1) }, { Bad_Opcode }, { Bad_Opcode }, { VEX_W_TABLE (VEX_W_0F38B4) }, @@ -7778,6 +7807,10 @@ static const struct dis386 vex_w_table[][2] = { /* VEX_W_0F385E_X86_64_P_3 */ { MOD_TABLE (MOD_VEX_0F385E_X86_64_P_3_W_0) }, }, + { + /* VEX_W_0F3872_P_1 */ + { "%XVvcvtneps2bf16%XY", { XMM, EXx }, 0 }, + }, { /* VEX_W_0F3878 */ { "%XEvpbroadcastb", { XM, EXb }, PREFIX_DATA }, @@ -7786,6 +7819,14 @@ static const struct dis386 vex_w_table[][2] = { /* VEX_W_0F3879 */ { "%XEvpbroadcastw", { XM, EXw }, PREFIX_DATA }, }, + { + /* VEX_W_0F38B0_M_1 */ + { PREFIX_TABLE (PREFIX_VEX_0F38B0_M_1_W_0) }, + }, + { + /* VEX_W_0F38B1_M_1 */ + { PREFIX_TABLE (PREFIX_VEX_0F38B1_M_1_W_0) }, + }, { /* VEX_W_0F38B4 */ { Bad_Opcode }, @@ -8611,6 +8652,14 @@ static const struct dis386 mod_table[][2] = { /* MOD_VEX_0F388E */ { "vpmaskmov%DQ", { Mx, Vex, XM }, PREFIX_DATA }, }, + { + /* MOD_VEX_0F38B0 */ + { VEX_W_TABLE (VEX_W_0F38B0_M_1) }, + }, + { + /* MOD_VEX_0F38B1 */ + { VEX_W_TABLE (VEX_W_0F38B1_M_1) }, + }, { /* MOD_VEX_0F3A30_L_0 */ { Bad_Opcode }, diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index b820104234..fc23332298 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -257,6 +257,8 @@ static initializer cpu_flag_init[] = "CpuWRMSRNS" }, { "CPU_MSRLIST_FLAGS", "CpuMSRLIST" }, + { "CPU_AVX_NE_CONVERT_FLAGS", + "CPU_AVX2_FLAGS|CpuAVX_NE_CONVERT" }, { "CPU_IAMCU_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuIAMCU" }, { "CPU_ADX_FLAGS", @@ -384,7 +386,7 @@ static initializer cpu_flag_init[] = { "CPU_ANY_AVX_FLAGS", "CPU_ANY_AVX2_FLAGS|CpuF16C|CpuFMA|CpuFMA4|CpuXOP|CpuAVX" }, { "CPU_ANY_AVX2_FLAGS", - "CPU_ANY_AVX512F_FLAGS|CpuAVX2|CpuAVX_VNNI|CpuAVX_IFMA|CpuAVX_VNNI_INT8" }, + "CPU_ANY_AVX512F_FLAGS|CpuAVX2|CpuAVX_VNNI|CpuAVX_IFMA|CpuAVX_VNNI_INT8|CpuAVX_NE_CONVERT" }, { "CPU_ANY_AVX512F_FLAGS", "CpuAVX512F|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF|CpuAVX512DQ|CPU_ANY_AVX512BW_FLAGS|CpuAVX512VL|CpuAVX512IFMA|CpuAVX512VBMI|CpuAVX512_4FMAPS|CpuAVX512_4VNNIW|CpuAVX512_VPOPCNTDQ|CpuAVX512_VBMI2|CpuAVX512_VNNI|CpuAVX512_BITALG|CpuAVX512_BF16|CpuAVX512_VP2INTERSECT" }, { "CPU_ANY_AVX512CD_FLAGS", @@ -465,6 +467,8 @@ static initializer cpu_flag_init[] = "CpuWRMSRNS" }, { "CPU_ANY_MSRLIST_FLAGS", "CpuMSRLIST" }, + { "CPU_ANY_AVX_NE_CONVERT_FLAGS", + "CpuAVX_NE_CONVERT" }, }; static initializer operand_type_init[] = @@ -672,6 +676,7 @@ static bitfield cpu_flags[] = BITFIELD (CpuCMPCCXADD), BITFIELD (CpuWRMSRNS), BITFIELD (CpuMSRLIST), + BITFIELD (CpuAVX_NE_CONVERT), BITFIELD (CpuMWAITX), BITFIELD (CpuCLZERO), BITFIELD (CpuOSPKE), diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index a409b10ca1..78fc019c3c 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -221,6 +221,8 @@ enum CpuWRMSRNS, /* Intel MSRLIST Instructions support required. */ CpuMSRLIST, + /* Intel AVX NE CONVERT Instructions support required. */ + CpuAVX_NE_CONVERT, /* mwaitx instruction required */ CpuMWAITX, /* Clzero instruction required */ @@ -408,6 +410,7 @@ typedef union i386_cpu_flags unsigned int cpucmpccxadd:1; unsigned int cpuwrmsrns:1; unsigned int cpumsrlist:1; + unsigned int cpuavx_ne_convert:1; unsigned int cpumwaitx:1; unsigned int cpuclzero:1; unsigned int cpuospke:1; diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 3238c4fc2e..2fccbfcf77 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -3056,6 +3056,18 @@ vdpbf16ps, 0xf352, None, CpuAVX512_BF16, Modrm|Space0F38|VexVVVV|Masking=3|VexW0 // AVX512_BF16 instructions end. +// AVX-NE-CONVERT instructions. + +vbcstnebf162ps, 0xf3b1, None, CpuAVX_NE_CONVERT, Modrm|Vex|Space0F38|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Word|Unspecified|BaseIndex, RegXMM|RegYMM } +vbcstnesh2ps, 0x66b1, None, CpuAVX_NE_CONVERT, Modrm|Vex|Space0F38|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Word|Unspecified|BaseIndex, RegXMM|RegYMM } +vcvtneebf162ps, 0xf3b0, None, CpuAVX_NE_CONVERT, Modrm|Vex|Space0F38|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM } +vcvtneeph2ps, 0x66b0, None, CpuAVX_NE_CONVERT, Modrm|Vex|Space0F38|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM } +vcvtneobf162ps, 0xf2b0, None, CpuAVX_NE_CONVERT, Modrm|Vex|Space0F38|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM } +vcvtneoph2ps, 0xb0, None, CpuAVX_NE_CONVERT, Modrm|Vex|Space0F38|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM } +vcvtneps2bf16, 0xf372, None, CpuAVX_NE_CONVERT, Modrm||Space0F38|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|, { , RegXMM } + +// AVX-NE-CONVERT instructions end. + // ENQCMD instructions. enqcmd, 0xf20f38f8, None, CpuENQCMD, Modrm|AddrPrefixOpReg, { Unspecified|BaseIndex, Reg16|Reg32|Reg64 }