From patchwork Mon Oct 31 02:28:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ChiYuan Huang X-Patchwork-Id: 13096 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2066969wru; Sun, 30 Oct 2022 19:29:44 -0700 (PDT) X-Google-Smtp-Source: AMsMyM43U4BrvRa+QAs5RxQy3FrMx+hX8eBsV0ub3n6rdmkujTmrRj+DdnmlsehHjW0eIZzsgjdc X-Received: by 2002:a17:902:e395:b0:186:9cf7:3147 with SMTP id g21-20020a170902e39500b001869cf73147mr12601063ple.52.1667183384474; Sun, 30 Oct 2022 19:29:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1667183384; cv=none; d=google.com; s=arc-20160816; b=Ip9HR+fS+BAKZR5EbZjUWT3V6ZFJHRfyUB26n/zlVGLuIPSUpLU81yQ6hI8B44cH2L WBLxN1SRE9YgabuAZBiLWsNknr9mhmRWCOdYp4R//AI1VTZVI0gr6W2uL99QD39BY+BL o3emXKBYv13XU8n6yS4A61HDK/Gr43hdGiFwgXW5KfXL6HjsSHK0+HcfxNHP/ewJVKpp PiNUoMgd1b2LCrlvY8JYT7zvxjMpvDeAiKVbfH4yLb8sMOrkGL4hVOK03bWzUfVZL148 isO2nQQePo1+UaPkv3STFklqDYKddR+M03nU4a0JgqcX+BxzOMhKxM2m0xpndgA602Fq uvvA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=OQIWKXkmwpQVfW4D/7Tax4JrMXlVPbNKPmAD+j7Bx1g=; b=xn2bmKD5vhI8fyIfr8SqE0JAKRmVkbEDJ3n2M40JM4HAaQcplDcO9O70JdD3etg7in j/02w91X6h+uuPdCLCIov1VOtzZnyDgsM2UZ0nZ0/hIp9jH5uoFrZ323/ztHJCgy7YMm 8enWzQRLz2oOqlLfj4oJ0Azdg+VyY6EVLFNMxwb7yqxkoN2GdMLcyyn4+Guy5QSrW4hO AskXe/6c0VH5lEQta4bBbe2tnVKmyzSt7YD7saiKWD7pEeLfqXFBolaOAAeHuSdTUqJ8 OzlNn/Ztpj+Z9TZaiSwpheGvW6vGNmpPTqLulutCWoR0Hc8Se6D1GznQSAMf3Akc009A Wgkg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=qW40gGss; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id r187-20020a632bc4000000b00462566bfda8si7221826pgr.788.2022.10.30.19.29.32; Sun, 30 Oct 2022 19:29:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=qW40gGss; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229636AbiJaC3K (ORCPT + 99 others); Sun, 30 Oct 2022 22:29:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39442 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229536AbiJaC3G (ORCPT ); Sun, 30 Oct 2022 22:29:06 -0400 Received: from mail-pg1-x52c.google.com (mail-pg1-x52c.google.com [IPv6:2607:f8b0:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0A134B1F2; Sun, 30 Oct 2022 19:29:04 -0700 (PDT) Received: by mail-pg1-x52c.google.com with SMTP id h193so851613pgc.10; Sun, 30 Oct 2022 19:29:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=references:in-reply-to:message-id:date:subject:cc:to:from:from:to :cc:subject:date:message-id:reply-to; bh=OQIWKXkmwpQVfW4D/7Tax4JrMXlVPbNKPmAD+j7Bx1g=; b=qW40gGss28pMue4kjLqOIH6MqvbG2C6DErcprc0HlYe85WZrQ8I/9zjUxEdFfJRyE9 zInhBumTg3cFspAcHa6WEXoH8OBj1spbvuRUoJGCK6j8T67ktya1ZrRBtGe6luI77P1w /jsRUVrh+Hbd8KtzfXr7Jfsmhc97LM2k3nwKKs+hLj5SHr/BnmJ6LT+fmC8nDZsvF28z 7mGL57i7e52fQ44pzFSAlQ1yLBJiIMC9fX/dwM9iOVxqGM7Qi5uU4QaGOnwYN+G5s1xG UFYpNhqvkXz9dYklt6/nndZwHQcAxUEX7en3LJLk20Mjoyh4QAu+RDXtK1h1OZjW8bWW pcew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=references:in-reply-to:message-id:date:subject:cc:to:from :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=OQIWKXkmwpQVfW4D/7Tax4JrMXlVPbNKPmAD+j7Bx1g=; b=vv41+Cf9vMswJC9XREPolpmE5VmVIApzUI5Z7MlN1vpavV6d1TrPlzqdR2l3tFrWNN GyYwyBJYzLk47MVOK/15/1BtxIaYGcJWIMWjWfsvLdHnrHH/mPcUzcyk+Z8DQJmMQO47 3MqHjZyHMJhJfa3YMt3sJI3OR6IZacwQ6cKUmlKdsgKExAFErJRi4u02lfFCTLI9u+m0 rzQmpJ8qVPLp9zCQOBq/rb8tbBuIIkoLoIeN1SUP9XPtqDbnG+oF6FZQN4qGjBskOPLQ 9+UjLBmKvXxS+0o3UcLuJBBXYsHUmqWS50xE13BffpT1ncGWrJd5YUCuEnbZMbBf2viz mIZQ== X-Gm-Message-State: ACrzQf0hGl2ad0rajFtjJ4PRuQYcs631Ip6VOlt6V0casetghsU/GLD7 SrIfkaP6bMa4Jy80HwpTRaJH+eKII9o= X-Received: by 2002:a63:8949:0:b0:46f:57b1:35bd with SMTP id v70-20020a638949000000b0046f57b135bdmr10557158pgd.623.1667183343370; Sun, 30 Oct 2022 19:29:03 -0700 (PDT) Received: from localhost.localdomain ([2402:7500:46a:ab6a:820:3d51:c22d:4bb5]) by smtp.gmail.com with ESMTPSA id q42-20020a17090a17ad00b0021282014066sm3064504pja.9.2022.10.30.19.29.00 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sun, 30 Oct 2022 19:29:02 -0700 (PDT) From: cy_huang To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, broonie@kernel.org Cc: lgirdwood@gmail.com, cy_huang@richtek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/2] dt-bindings: regulator: Add bindings for Richtek RT6190 regulator Date: Mon, 31 Oct 2022 10:28:53 +0800 Message-Id: <1667183334-16511-2-git-send-email-u0084500@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1667183334-16511-1-git-send-email-u0084500@gmail.com> References: <1667183334-16511-1-git-send-email-u0084500@gmail.com> X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748168484274006900?= X-GMAIL-MSGID: =?utf-8?q?1748168484274006900?= From: ChiYuan Huang Add devicetree binding for Richtek RT6190 4-Switch buckboost controller. Signed-off-by: ChiYuan Huang Reviewed-by: Rob Herring --- Hi, Rob: Since I didn't got any reply from the v2 dt-binding question. https://lore.kernel.org/lkml/CADiBU3_WUeyYdnmnG0Ff2pH+b3u1zOtP1z44LcA53Ba5c9nrEw@mail.gmail.com/ In v3, I aleady fixed it following by your comment. I'm just wondering the corrent usage. As I know, 'enable-gpios' comes from 'gpio-consumer-common.yaml'. In the common yaml file, it's already declared 'enable-gpios' maxItems as '1'. That's why I just declared it as 'true'. Since v3: - Fix the typo 'upply' to 'supply'. - Declare 'enable-gpios' maxItems as 1. - Declare the 'maxItems' for the property 'regulator-allowed-modes'. Since v2: - Rename binding filename to 'richtek,rt6190.yaml' --- .../bindings/regulator/richtek,rt6190.yaml | 79 ++++++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/richtek,rt6190.yaml diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt6190.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt6190.yaml new file mode 100644 index 00000000..29f7d3d --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/richtek,rt6190.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/richtek,rt6190.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Richtek RT6190 4-Switch BuckBoost controller + +maintainers: + - ChiYuan Huang + +description: | + The RT6190 is 4-Switch BuckBoost controller designed for converting input + voltage to output voltage that can be equal to, higher or lower than input + voltage. It operates with wide input voltage range from 4.5V to 36V, and + the output voltage can be set from 3V to 36V by external FB pin. It's commonly + used for the application like as BuckBoost bus supply, docking station and USB + power delivery product. + + Datasheet is available at + https://www.richtek.com/assets/product_file/RT6190/DS6190-02.pdf + +allOf: + - $ref: regulator.yaml# + +properties: + compatible: + enum: + - richtek,rt6190 + + reg: + maxItems: 1 + + enable-gpios: + maxItems: 1 + + wakeup-source: true + + interrupts: + maxItems: 1 + + regulator-allowed-modes: + description: | + buck allowed operating mode + 0: PSM mode (light load Power Saving Mode) + 1: FCCM mode (Forced-CCM mode) + maxItems: 2 + items: + enum: [0, 1] + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + regulator@2c { + compatible = "richtek,rt6190"; + reg = <0x2c>; + wakeup-source; + interrupts-extended = <&gpio26 0 IRQ_TYPE_LEVEL_LOW>; + enable-gpios = <&gpio26 1 GPIO_ACTIVE_HIGH>; + regulator-name = "richtek,rt6190-buckboost"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <32000000>; + regulator-min-microamp = <306000>; + regulator-max-microamp = <12114000>; + regulator-allowed-modes = <0 1>; + }; + }; From patchwork Mon Oct 31 02:28:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ChiYuan Huang X-Patchwork-Id: 13097 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2066998wru; Sun, 30 Oct 2022 19:29:52 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5oh2NcnO9fNiSEQeQ3v1hJUw785YSR/NlSCYj+P4chVJlcm85esWjsv9eV1/LTCSN15tjX X-Received: by 2002:a17:90b:1806:b0:213:bf67:4d4f with SMTP id lw6-20020a17090b180600b00213bf674d4fmr8469862pjb.30.1667183391877; Sun, 30 Oct 2022 19:29:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1667183391; cv=none; d=google.com; s=arc-20160816; b=n5R9xAstXewKSkn7mmuGuW9cvXQ2NiEHoj9wDPN9A5RPoBMn1H3S38I8TkfDsQL02+ PFvD+cs3V9lMlcgSjDNb1RuTX3iwazNPeK4jlZShNF5gsu5Qqa+anEd+uNtMG2fhTRHt 2RTW/kE6AIpjeEd5QV83SjFNYk56XxypJP0E4QOdrpXUxUJdTRAxv1pGbuPGqrjBBByk msxAJYIwcebkpAh2ZKULVKgTcZaHZEr/YTXkjF/U1V6F2VMHL8tY17e3CSM1BRTMnTai WzuuBRM/2pqGNA/Xmr1hVd0dv5xN3BA9TIMkZraQh0/Zs20KNwaoL7/u6tZYg9DtPf/h 2lOA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=tdwtzHR+xQdJbDyYyz1o5nHG0wEHYVT1LmuGtsV2+G8=; b=BsDsJjseQqWFkajNOMah7bp+YPM5w58z0n58xzNCdggmG2XMol9n5lpr3J6OE1QPSf XCf6uz2ZlUilZIaW9deKBQq9kadQy8DT0FCtoqc/ilEV5ZhSfWg1+oyGNflTSqLAvJIV xL52J5NtBwCDZoaie7z94soWoW4KchazWYiPvYwmEcFBrbGvVidNuHrkSiSaY3usrBVh 6RzIhFKkdECPyE5y3uu+ShrRYS6sWhPCuMGiaqup2DURyHmPDyBQ/7sCpRbwoG0l/IZ9 w6oYrvBJGnpgyS7tFjjQ7cLXM4FrzIZ6IGf5Cyd58usR2fVUkySaiF84onfTl0Rqj9A+ Wr/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=YIM59IV4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: ChiYuan Huang --- drivers/regulator/Kconfig | 11 + drivers/regulator/Makefile | 1 + drivers/regulator/rt6190-regulator.c | 495 +++++++++++++++++++++++++++++++++++ 3 files changed, 507 insertions(+) create mode 100644 drivers/regulator/rt6190-regulator.c diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 070e440..4e4614d 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -1124,6 +1124,17 @@ config REGULATOR_RT6160 The wide output range is from 2025mV to 5200mV and can be used on most common application scenario. +config REGULATOR_RT6190 + tristate "Richtek RT6190 4-Switch BuckBoost controller" + depends on I2C + select REGMAP_I2C + help + The RT6190 is a 4-Switch BuckBoost controller designed for converting + input voltage to output voltage that can be equal to, higher or lower + than input voltage. It operates with wide input voltage range from + 4.5V to 36V, and the output voltage can be set from 3V to 36V by + external FB pin. + config REGULATOR_RT6245 tristate "Richtek RT6245 voltage regulator" depends on I2C diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 5962307..c3b5cf6 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -134,6 +134,7 @@ obj-$(CONFIG_REGULATOR_RT5120) += rt5120-regulator.o obj-$(CONFIG_REGULATOR_RT5190A) += rt5190a-regulator.o obj-$(CONFIG_REGULATOR_RT5759) += rt5759-regulator.o obj-$(CONFIG_REGULATOR_RT6160) += rt6160-regulator.o +obj-$(CONFIG_REGULATOR_RT6190) += rt6190-regulator.o obj-$(CONFIG_REGULATOR_RT6245) += rt6245-regulator.o obj-$(CONFIG_REGULATOR_RTMV20) += rtmv20-regulator.o obj-$(CONFIG_REGULATOR_RTQ2134) += rtq2134-regulator.o diff --git a/drivers/regulator/rt6190-regulator.c b/drivers/regulator/rt6190-regulator.c new file mode 100644 index 00000000..995e028 --- /dev/null +++ b/drivers/regulator/rt6190-regulator.c @@ -0,0 +1,495 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2022 Richtek Technology Corp. + * + * Author: ChiYuan Huang + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RT6190_REG_VID 0x00 +#define RT6190_REG_OUTV 0x01 +#define RT6190_REG_OUTC 0x03 +#define RT6190_REG_SET1 0x0D +#define RT6190_REG_SET2 0x0E +#define RT6190_REG_SET4 0x10 +#define RT6190_REG_RATIO 0x11 +#define RT6190_REG_OUT_VOLT_L 0x12 +#define RT6190_REG_TEMP_H 0x1B +#define RT6190_REG_STAT1 0x1C +#define RT6190_REG_ALERT1 0x1E +#define RT6190_REG_ALERT2 0x1F +#define RT6190_REG_MASK2 0x21 +#define RT6190_REG_OCPEN 0x28 +#define RT6190_REG_SET5 0x29 +#define RT6190_REG_VBUSC_ADC 0x32 +#define RT6190_REG_BUSC_VOLT_L 0x33 +#define RT6190_REG_BUSC_VOLT_H 0x34 +#define RT6190_REG_STAT3 0x37 +#define RT6190_REG_ALERT3 0x38 +#define RT6190_REG_MASK3 0x39 + +#define RT6190_ENPWM_MASK BIT(7) +#define RT6190_ENDCHG_MASK BIT(4) +#define RT6190_ALERT_OTPEVT BIT(6) +#define RT6190_ALERT_UVPEVT BIT(5) +#define RT6190_ALERT_OVPEVT BIT(4) +#define RT6190_ENGCP_MASK BIT(1) +#define RT6190_FCCM_MASK BIT(7) + +#define RICHTEK_VID 0x82 +#define RT6190_OUT_MIN_UV 3000000 +#define RT6190_OUT_MAX_UV 32000000 +#define RT6190_OUT_STEP_UV 20000 +#define RT6190_OUT_N_VOLT (RT6190_OUT_MAX_UV / RT6190_OUT_STEP_UV + 1) +#define RT6190_OUTV_MINSEL 150 +#define RT6190_OUT_MIN_UA 306000 +#define RT6190_OUT_MAX_UA 12114000 +#define RT6190_OUT_STEP_UA 24000 +#define RT6190_OUTC_MINSEL 19 +#define RT6190_EN_TIME_US 500 + +#define RT6190_PSM_MODE 0 +#define RT6190_FCCM_MODE 1 + +struct rt6190_data { + struct device *dev; + struct regmap *regmap; + struct gpio_desc *enable_gpio; + unsigned int cached_alert_evt; +}; + +static int rt6190_out_set_voltage_sel(struct regulator_dev *rdev, + unsigned int selector) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + __le16 le_sel = cpu_to_le16(selector); + + return regmap_raw_write(regmap, RT6190_REG_OUTV, &le_sel, + sizeof(le_sel)); +} + +static int rt6190_out_get_voltage_sel(struct regulator_dev *rdev) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + __le16 le_sel; + int ret; + + ret = regmap_raw_read(regmap, RT6190_REG_OUTV, &le_sel, sizeof(le_sel)); + + return ret ?: le16_to_cpu(le_sel); +} + +static int rt6190_out_enable(struct regulator_dev *rdev) +{ + struct rt6190_data *data = rdev_get_drvdata(rdev); + struct regmap *regmap = rdev_get_regmap(rdev); + u8 out_cfg[4]; + int ret; + + pm_runtime_get_sync(data->dev); + + /* + * From off to on, vout config will restore to IC default. + * Read vout configs before enable, and restore them after enable + */ + ret = regmap_raw_read(regmap, RT6190_REG_OUTV, out_cfg, + sizeof(out_cfg)); + if (ret) + return ret; + + ret = regulator_enable_regmap(rdev); + if (ret) + return ret; + + ret = regmap_raw_write(regmap, RT6190_REG_OUTV, out_cfg, + sizeof(out_cfg)); + if (ret) + return ret; + + return regmap_update_bits(regmap, RT6190_REG_SET5, RT6190_ENGCP_MASK, + RT6190_ENGCP_MASK); +} + +static int rt6190_out_disable(struct regulator_dev *rdev) +{ + struct rt6190_data *data = rdev_get_drvdata(rdev); + struct regmap *regmap = rdev_get_regmap(rdev); + int ret; + + ret = regmap_update_bits(regmap, RT6190_REG_SET5, RT6190_ENGCP_MASK, 0); + if (ret) + return ret; + + ret = regulator_disable_regmap(rdev); + if (ret) + return ret; + + /* cleared cached alert event */ + data->cached_alert_evt = 0; + + pm_runtime_put(data->dev); + + return 0; +} + +static int rt6190_out_set_current_limit(struct regulator_dev *rdev, int min_uA, + int max_uA) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + int csel, clim; + __le16 le_csel; + + if (min_uA < RT6190_OUT_MIN_UA || max_uA > RT6190_OUT_MAX_UA) + return -EINVAL; + + csel = DIV_ROUND_UP(min_uA - RT6190_OUT_MIN_UA, RT6190_OUT_STEP_UA); + + clim = RT6190_OUT_MIN_UA + RT6190_OUT_STEP_UA * csel; + if (clim > max_uA) + return -EINVAL; + + csel += RT6190_OUTC_MINSEL; + le_csel = cpu_to_le16(csel); + + return regmap_raw_write(regmap, RT6190_REG_OUTC, &le_csel, + sizeof(le_csel)); +} + +static int rt6190_out_get_current_limit(struct regulator_dev *rdev) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + __le16 le_csel; + int csel, ret; + + ret = regmap_raw_read(regmap, RT6190_REG_OUTC, &le_csel, + sizeof(le_csel)); + if (ret) + return ret; + + csel = le16_to_cpu(le_csel); + csel -= RT6190_OUTC_MINSEL; + + return RT6190_OUT_MIN_UA + RT6190_OUT_STEP_UA * csel; +} + +static int rt6190_out_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int val; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = RT6190_FCCM_MASK; + break; + case REGULATOR_MODE_NORMAL: + val = 0; + break; + default: + return -EINVAL; + } + + return regmap_update_bits(regmap, RT6190_REG_SET1, RT6190_FCCM_MASK, + val); +} + +static unsigned int rt6190_out_get_mode(struct regulator_dev *rdev) +{ + struct regmap *regmap = rdev_get_regmap(rdev); + unsigned int config; + int ret; + + ret = regmap_read(regmap, RT6190_REG_SET1, &config); + if (ret) + return REGULATOR_MODE_INVALID; + + if (config & RT6190_FCCM_MASK) + return REGULATOR_MODE_FAST; + + return REGULATOR_MODE_NORMAL; +} + +static int rt6190_out_get_error_flags(struct regulator_dev *rdev, + unsigned int *flags) +{ + struct rt6190_data *data = rdev_get_drvdata(rdev); + unsigned int state, rpt_flags = 0; + int ret; + + ret = regmap_read(data->regmap, RT6190_REG_STAT1, &state); + if (ret) + return ret; + + state |= data->cached_alert_evt; + + if (state & RT6190_ALERT_OTPEVT) + rpt_flags |= REGULATOR_ERROR_OVER_TEMP; + + if (state & RT6190_ALERT_UVPEVT) + rpt_flags |= REGULATOR_ERROR_UNDER_VOLTAGE; + + if (state & RT6190_ALERT_OVPEVT) + rpt_flags |= REGULATOR_ERROR_REGULATION_OUT; + + *flags = rpt_flags; + + return 0; +} + +static unsigned int rt6190_out_of_map_mode(unsigned int mode) +{ + switch (mode) { + case RT6190_PSM_MODE: + return REGULATOR_MODE_NORMAL; + case RT6190_FCCM_MODE: + return REGULATOR_MODE_FAST; + default: + return REGULATOR_MODE_INVALID; + } +} + +static const struct regulator_ops rt6190_regulator_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = rt6190_out_set_voltage_sel, + .get_voltage_sel = rt6190_out_get_voltage_sel, + .enable = rt6190_out_enable, + .disable = rt6190_out_disable, + .is_enabled = regulator_is_enabled_regmap, + .set_current_limit = rt6190_out_set_current_limit, + .get_current_limit = rt6190_out_get_current_limit, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_mode = rt6190_out_set_mode, + .get_mode = rt6190_out_get_mode, + .get_error_flags = rt6190_out_get_error_flags, +}; + +static const struct regulator_desc rt6190_regulator_desc = { + .name = "rt6190-regulator", + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .ops = &rt6190_regulator_ops, + .min_uV = RT6190_OUT_MIN_UV, + .uV_step = RT6190_OUT_STEP_UV, + .n_voltages = RT6190_OUT_N_VOLT, + .linear_min_sel = RT6190_OUTV_MINSEL, + .enable_reg = RT6190_REG_SET2, + .enable_mask = RT6190_ENPWM_MASK, + .active_discharge_reg = RT6190_REG_SET2, + .active_discharge_mask = RT6190_ENDCHG_MASK, + .active_discharge_on = RT6190_ENDCHG_MASK, + .of_map_mode = rt6190_out_of_map_mode, +}; + +static bool rt6190_is_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case RT6190_REG_OUT_VOLT_L ... RT6190_REG_ALERT2: + case RT6190_REG_BUSC_VOLT_L ... RT6190_REG_BUSC_VOLT_H: + case RT6190_REG_STAT3 ... RT6190_REG_ALERT3: + return true; + default: + return false; + } +} + +static const struct regmap_config rt6190_regmap_config = { + .name = "rt6190", + .cache_type = REGCACHE_FLAT, + .reg_bits = 8, + .val_bits = 8, + .max_register = RT6190_REG_MASK3, + .num_reg_defaults_raw = RT6190_REG_MASK3 + 1, + .volatile_reg = rt6190_is_volatile_reg, +}; + +static irqreturn_t rt6190_irq_handler(int irq, void *devid) +{ + struct regulator_dev *rdev = devid; + struct rt6190_data *data = rdev_get_drvdata(rdev); + unsigned int alert; + int ret; + + ret = regmap_read(data->regmap, RT6190_REG_ALERT1, &alert); + if (ret) + return IRQ_NONE; + + /* Write clear alert events */ + ret = regmap_write(data->regmap, RT6190_REG_ALERT1, alert); + if (ret) + return IRQ_NONE; + + data->cached_alert_evt |= alert; + + if (alert & RT6190_ALERT_OTPEVT) + regulator_notifier_call_chain(rdev, REGULATOR_EVENT_OVER_TEMP, NULL); + + if (alert & RT6190_ALERT_UVPEVT) + regulator_notifier_call_chain(rdev, REGULATOR_EVENT_UNDER_VOLTAGE, NULL); + + if (alert & RT6190_ALERT_OVPEVT) + regulator_notifier_call_chain(rdev, REGULATOR_EVENT_REGULATION_OUT, NULL); + + return IRQ_HANDLED; +} + +static int rt6190_init_registers(struct regmap *regmap) +{ + int ret; + + /* Enable_ADC = 1 */ + ret = regmap_write(regmap, RT6190_REG_SET4, 0x82); + if (ret) + return ret; + + /* Config default VOUT ratio to be higher */ + ret = regmap_write(regmap, RT6190_REG_RATIO, 0x20); + + /* Mask unused alert */ + ret = regmap_write(regmap, RT6190_REG_MASK2, 0); + if (ret) + return ret; + + /* OCP config */ + ret = regmap_write(regmap, RT6190_REG_OCPEN, 0); + if (ret) + return ret; + + /* Enable VBUSC ADC */ + return regmap_write(regmap, RT6190_REG_VBUSC_ADC, 0x02); +} + +static int rt6190_probe(struct i2c_client *i2c) +{ + struct device *dev = &i2c->dev; + struct rt6190_data *data; + struct gpio_desc *enable_gpio; + struct regmap *regmap; + struct regulator_dev *rdev; + struct regulator_config cfg = {}; + unsigned int vid; + int ret; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + enable_gpio = devm_gpiod_get_optional(dev, "enable", GPIOD_OUT_HIGH); + if (IS_ERR(enable_gpio)) + return dev_err_probe(dev, PTR_ERR(enable_gpio), "Failed to get 'enable' gpio\n"); + else if (enable_gpio) + usleep_range(RT6190_EN_TIME_US, RT6190_EN_TIME_US * 2); + + regmap = devm_regmap_init_i2c(i2c, &rt6190_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n"); + + data->dev = dev; + data->enable_gpio = enable_gpio; + data->regmap = regmap; + i2c_set_clientdata(i2c, data); + + ret = regmap_read(regmap, RT6190_REG_VID, &vid); + if (ret) + return dev_err_probe(dev, ret, "Failed to read VID\n"); + + if (vid != RICHTEK_VID) + return dev_err_probe(dev, -ENODEV, "Incorrect VID 0x%02x\n", vid); + + ret = rt6190_init_registers(regmap); + if (ret) + return dev_err_probe(dev, ret, "Failed to init registers\n"); + + pm_runtime_set_active(dev); + ret = devm_pm_runtime_enable(dev); + if (ret) + return dev_err_probe(dev, ret, "Failed to set pm_runtime enable\n"); + + cfg.dev = dev; + cfg.of_node = dev->of_node; + cfg.driver_data = data; + cfg.init_data = of_get_regulator_init_data(dev, dev->of_node, + &rt6190_regulator_desc); + + rdev = devm_regulator_register(dev, &rt6190_regulator_desc, &cfg); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), "Failed to register regulator\n"); + + if (i2c->irq) { + ret = devm_request_threaded_irq(dev, i2c->irq, NULL, + rt6190_irq_handler, + IRQF_ONESHOT, dev_name(dev), + rdev); + if (ret) + return dev_err_probe(dev, ret, "Failed to register interrupt\n"); + } + + return 0; +} + +static int rt6190_runtime_suspend(struct device *dev) +{ + struct rt6190_data *data = dev_get_drvdata(dev); + struct regmap *regmap = data->regmap; + + if (!data->enable_gpio) + return 0; + + regcache_cache_only(regmap, true); + regcache_mark_dirty(regmap); + + gpiod_set_value(data->enable_gpio, 0); + + return 0; +} + +static int rt6190_runtime_resume(struct device *dev) +{ + struct rt6190_data *data = dev_get_drvdata(dev); + struct regmap *regmap = data->regmap; + + if (!data->enable_gpio) + return 0; + + gpiod_set_value(data->enable_gpio, 1); + usleep_range(RT6190_EN_TIME_US, RT6190_EN_TIME_US * 2); + + regcache_cache_only(regmap, false); + return regcache_sync(regmap); +} + +static const struct dev_pm_ops __maybe_unused rt6190_dev_pm = { + RUNTIME_PM_OPS(rt6190_runtime_suspend, rt6190_runtime_resume, NULL) +}; + +static const struct of_device_id rt6190_of_dev_table[] = { + { .compatible = "richtek,rt6190" }, + {} +}; +MODULE_DEVICE_TABLE(of, rt6190_of_dev_table); + +static struct i2c_driver rt6190_driver = { + .driver = { + .name = "rt6190", + .of_match_table = rt6190_of_dev_table, + .pm = pm_ptr(&rt6190_dev_pm), + }, + .probe_new = rt6190_probe, +}; +module_i2c_driver(rt6190_driver); + +MODULE_DESCRIPTION("Richtek RT6190 regulator driver"); +MODULE_AUTHOR("ChiYuan Huang "); +MODULE_LICENSE("GPL");