From patchwork Thu Jul 13 06:32:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jiang, Haochen" X-Patchwork-Id: 119567 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a6b2:0:b0:3e4:2afc:c1 with SMTP id c18csp1629359vqm; Wed, 12 Jul 2023 23:39:45 -0700 (PDT) X-Google-Smtp-Source: APBJJlGP7xFiOVA5cOHNX3EYAwR3BPlcKFVSax84ziUeNvK718zjPn7/HhEAaqK4cYrqJOXymPQN X-Received: by 2002:a05:6512:ac3:b0:4fb:92df:a27c with SMTP id n3-20020a0565120ac300b004fb92dfa27cmr596535lfu.25.1689230384943; Wed, 12 Jul 2023 23:39:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1689230384; cv=none; d=google.com; s=arc-20160816; b=hWrEPr1i18SL2Jy9aPTxgxyiofakqREdo9oYshFB/zyCgKq7dJ0FNCV9bqVnkSX8C9 7ZOuucqT3IMPc4Vg/gVdxGp56zfO1mKRbwgoewrxCes5E0+CHNZ922HrCIITCi3ZNen3 Mr8onwXMjzIqUOxfB3TdaWcweGg4x3m/iaRmccupHSkg25KAX7vhURYLgaj552xSOVCY 11A+NtFthUev53MFfe19kEsrycwGekcb1Vj1viItq3uJ+4vCOaU6jQ/eL91bgKF1cFlz 7NqTZsbUYVz7JKd2rSBBWHm36ot0s12m29WUbRk3Vpxk3q1HVM/CMit+IxiOQQXVdV5r XyFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:dmarc-filter:delivered-to :dkim-signature:dkim-filter; bh=O9jLG0gCvM/X+C3bMgwb8Rc9KcyUx93La5lTZ75UtfA=; fh=nnS31sEU+kbjilhlcM5Z269ZbWrOK2jgT03z53j+Ct8=; b=Rh3VkaQnwKebzz7e8W30TP2YYEa5It35YcmVis1bXN3s/awW6wSq9BslE5S9izz8LU 8Z4LhL1gY0M+NI9FjvAbiZCD6dRi8ndg0g5RKaifVknfl2f9k/g1y9Qgw3+YIke9JtHp yI7JQjlV1SwGMRaFu5mJkl1CZz5qC1+QBCaSO9/JOSS2zlJ4SW3Qyt01H+Von0pN8quF ATHg0kUwW8E0q+rq7g7VDeB7MHeAlnq8OZ+5UdXcgRtS5B7L/vEJditYB4elKtlsn5em sUYCgs5hoeIzxU8iZDskp5es77vyj8PDS343DbtDeKAKWeIxtXx6R8vJavZNLt47aVxO WCAQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b="g/2c9LJz"; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id n2-20020a056402060200b0051bf671a7fasi6044183edv.577.2023.07.12.23.39.44 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 23:39:44 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b="g/2c9LJz"; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 160093852AD0 for ; Thu, 13 Jul 2023 06:35:41 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 160093852AD0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1689230141; bh=O9jLG0gCvM/X+C3bMgwb8Rc9KcyUx93La5lTZ75UtfA=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=g/2c9LJzCiy7eLGHsN41lP1s1yN7SBLrLo6gigoq2Xdp4MIGsea+JN695v47pmHPA VkvRBval2dRiU6vElOBAaON+WfgZE3j1sqw4jCZCyrcNRz/3I1jTB8UyAnRZAwWVLY 9T9tzduhVz7E7/nXPxG8oO6DAReU/LSYnOq/u2xw= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by sourceware.org (Postfix) with ESMTPS id 0A1D8385C41F for ; Thu, 13 Jul 2023 06:33:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0A1D8385C41F X-IronPort-AV: E=McAfee;i="6600,9927,10769"; a="431253810" X-IronPort-AV: E=Sophos;i="6.01,201,1684825200"; d="scan'208";a="431253810" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2023 23:33:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10769"; a="791914413" X-IronPort-AV: E=Sophos;i="6.01,201,1684825200"; d="scan'208";a="791914413" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmsmga004.fm.intel.com with ESMTP; 12 Jul 2023 23:33:06 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 6B9FD1005695; Thu, 13 Jul 2023 14:33:05 +0800 (CST) To: binutils@sourceware.org Cc: jbeulich@suse.com, hjl.tools@gmail.com, amodra@gmail.com, konglin1 Subject: [PATCH 1/5] Support Intel AVX-VNNI-INT16 Date: Thu, 13 Jul 2023 14:32:59 +0800 Message-Id: <20230713063303.205862-2-haochen.jiang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230713063303.205862-1-haochen.jiang@intel.com> References: <20230713063303.205862-1-haochen.jiang@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-10.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Binutils From: "Jiang, Haochen" Reply-To: Haochen Jiang Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771286439840696536 X-GMAIL-MSGID: 1771286439840696536 From: konglin1 gas/ChangeLog: * NEWS: Support Intel AVX-VNNI-INT16. * config/tc-i386.c: Add avx_vnni_int16. * doc/c-i386.texi: Document avx_vnni_int16. * testsuite/gas/i386/i386.exp: Run AVX VNNI INT16 tests. * testsuite/gas/i386/x86-64.exp: Ditto. * testsuite/gas/i386/avx-vnni-int16-intel.d: New test. * testsuite/gas/i386/avx-vnni-int16.d: New test. * testsuite/gas/i386/avx-vnni-int16.s: New test. * testsuite/gas/i386/x86-64-avx-vnni-int16-intel.d: New test. * testsuite/gas/i386/x86-64-avx-vnni-int16.d: New test. * testsuite/gas/i386/x86-64-avx-vnni-int16.s: New test. opcodes/ChangeLog: * i386-dis.c (PREFIX_VEX_0F38D2): New. (PREFIX_VEX_0F38D3): Ditto. (VEX_W_0F38D2_P_0): Ditto. (VEX_W_0F38D2_P_1): Ditto. (VEX_W_0F38D2_P_2): Ditto. (VEX_W_0F38D3_P_0): Ditto. (VEX_W_0F38D3_P_1): Ditto. (VEX_W_0F38D3_P_2): Ditto. (prefix_table): Add PREFIX_VEX_0F38D2 and PREFIX_VEX_0F38D3. (vex_table): Add PREFIX_VEX_0F38D2 and PREFIX_VEX_0F38D3, delete VEX_W_0F38D2 and VEX_W_0F38D3. (vex_w_table): Add VEX_W_0F38D2_P_0, VEX_W_0F38D2_P_1, VEX_W_0F38D2_P_2, VEX_W_0F38D3_P_0, VEX_W_0F38D3_P_1, VEX_W_0F38D3_P_2. * i386-gen.c (isa_dependencies): Add AVX_VNNI_INT16. (cpu_flag): Ditto. * i386-init.h: Regenerated. * i386-mnem.h: Ditto. * i386-opc.h: (CpuAVX_VNNI_INT16): New. * i386-opc.tbl: Add Intel AVX_VNNI_INT16 instructions. * i386-tbl.h: Regenerated. --- gas/NEWS | 2 + gas/config/tc-i386.c | 1 + gas/doc/c-i386.texi | 5 +- gas/testsuite/gas/i386/avx-vnni-int16-intel.d | 130 + gas/testsuite/gas/i386/avx-vnni-int16.d | 130 + gas/testsuite/gas/i386/avx-vnni-int16.s | 127 + gas/testsuite/gas/i386/i386.exp | 2 + .../gas/i386/x86-64-avx-vnni-int16-intel.d | 130 + .../gas/i386/x86-64-avx-vnni-int16.d | 130 + .../gas/i386/x86-64-avx-vnni-int16.s | 127 + gas/testsuite/gas/i386/x86-64.exp | 2 + opcodes/i386-dis.c | 32 +- opcodes/i386-gen.c | 3 + opcodes/i386-init.h | 822 +- opcodes/i386-mnem.h | 2678 ++-- opcodes/i386-opc.h | 3 + opcodes/i386-opc.tbl | 11 + opcodes/i386-tbl.h | 11767 +++++++++++----- 18 files changed, 10570 insertions(+), 5532 deletions(-) create mode 100644 gas/testsuite/gas/i386/avx-vnni-int16-intel.d create mode 100644 gas/testsuite/gas/i386/avx-vnni-int16.d create mode 100644 gas/testsuite/gas/i386/avx-vnni-int16.s create mode 100644 gas/testsuite/gas/i386/x86-64-avx-vnni-int16-intel.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx-vnni-int16.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx-vnni-int16.s diff --git a/gas/NEWS b/gas/NEWS index 59bdd30aaaa..5e9ed5ab4bc 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -1,5 +1,7 @@ -*- text -*- +* Add support for Intel AVX-VNNI-INT16 instructions. + Changes in 2.41: * Add support for Intel FRED instructions. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index bc02f8e0abf..0d3d7560efe 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1151,6 +1151,7 @@ static const arch_entry cpu_arch[] = SUBARCH (rmpquery, RMPQUERY, ANY_RMPQUERY, false), SUBARCH (fred, FRED, ANY_FRED, false), SUBARCH (lkgs, LKGS, ANY_LKGS, false), + SUBARCH (avx_vnni_int16, AVX_VNNI_INT16, ANY_AVX_VNNI_INT16, false), }; #undef SUBARCH diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 49b6e3b1abb..40ba942d9cb 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -207,6 +207,7 @@ accept various extension mnemonics. For example, @code{rao_int}, @code{fred}, @code{lkgs}, +@code{avx_vnni_int16}, @code{amx_int8}, @code{amx_bf16}, @code{amx_fp16}, @@ -1635,8 +1636,8 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @samp{.ibt} @item @samp{.prefetchi} @tab @samp{.avx_ifma} @tab @samp{.avx_vnni_int8} @item @samp{.cmpccxadd} @tab @samp{.wrmsrns} @tab @samp{.msrlist} -@item @samp{.avx_ne_convert} @tab @samp{.rao_int} -@item @samp{.fred} @tab @samp{.lkgs} +@item @samp{.avx_ne_convert} @tab @samp{.rao_int} @tab @samp{.fred} @tab @samp{.lkgs} +@item @samp{.avx_vnni_int16} @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote} @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq} @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk} diff --git a/gas/testsuite/gas/i386/avx-vnni-int16-intel.d b/gas/testsuite/gas/i386/avx-vnni-int16-intel.d new file mode 100644 index 00000000000..649e89fd4a4 --- /dev/null +++ b/gas/testsuite/gas/i386/avx-vnni-int16-intel.d @@ -0,0 +1,130 @@ +#as: +#objdump: -dw -Mintel +#name: i386 AVX-VNNI-INT16 insns (Intel disassembly) +#source: avx-vnni-int16.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 56 d2 b4 f4 00 00 00 10\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 56 d2 31\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 56 d2 b1 e0 0f 00 00\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 56 d2 b2 00 f0 ff ff\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 52 d2 b4 f4 00 00 00 10\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 52 d2 31\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 52 d2 b1 f0 07 00 00\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 52 d2 b2 00 f8 ff ff\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 56 d3 b4 f4 00 00 00 10\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 56 d3 31\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 56 d3 b1 e0 0f 00 00\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 56 d3 b2 00 f0 ff ff\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 52 d3 b4 f4 00 00 00 10\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 52 d3 31\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 52 d3 b1 f0 07 00 00\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 52 d3 b2 00 f8 ff ff\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 55 d2 b4 f4 00 00 00 10\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 55 d2 31\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 55 d2 b1 e0 0f 00 00\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 55 d2 b2 00 f0 ff ff\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 51 d2 b4 f4 00 00 00 10\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 51 d2 31\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 51 d2 b1 f0 07 00 00\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 51 d2 b2 00 f8 ff ff\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 55 d3 b4 f4 00 00 00 10\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 55 d3 31\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 55 d3 b1 e0 0f 00 00\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 55 d3 b2 00 f0 ff ff\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 51 d3 b4 f4 00 00 00 10\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 51 d3 31\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 51 d3 b1 f0 07 00 00\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 51 d3 b2 00 f8 ff ff\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 54 d2 b4 f4 00 00 00 10\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 54 d2 31\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 54 d2 b1 e0 0f 00 00\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 54 d2 b2 00 f0 ff ff\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 50 d2 b4 f4 00 00 00 10\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 50 d2 31\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 50 d2 b1 f0 07 00 00\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 50 d2 b2 00 f8 ff ff\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 54 d3 b4 f4 00 00 00 10\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 54 d3 31\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 54 d3 b1 e0 0f 00 00\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 54 d3 b2 00 f0 ff ff\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 50 d3 b4 f4 00 00 00 10\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 50 d3 31\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 50 d3 b1 f0 07 00 00\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 50 d3 b2 00 f8 ff ff\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 56 d2 b4 f4 00 00 00 10\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 56 d2 31\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 56 d2 b1 e0 0f 00 00\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 56 d2 b2 00 f0 ff ff\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 52 d2 b4 f4 00 00 00 10\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 52 d2 31\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 52 d2 b1 f0 07 00 00\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 52 d2 b2 00 f8 ff ff\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 56 d3 b4 f4 00 00 00 10\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 56 d3 31\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 56 d3 b1 e0 0f 00 00\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 56 d3 b2 00 f0 ff ff\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 52 d3 b4 f4 00 00 00 10\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 52 d3 31\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 52 d3 b1 f0 07 00 00\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 52 d3 b2 00 f8 ff ff\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 55 d2 b4 f4 00 00 00 10\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 55 d2 31\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 55 d2 b1 e0 0f 00 00\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 55 d2 b2 00 f0 ff ff\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 51 d2 b4 f4 00 00 00 10\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 51 d2 31\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 51 d2 b1 f0 07 00 00\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 51 d2 b2 00 f8 ff ff\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 55 d3 b4 f4 00 00 00 10\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 55 d3 31\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 55 d3 b1 e0 0f 00 00\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 55 d3 b2 00 f0 ff ff\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 51 d3 b4 f4 00 00 00 10\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 51 d3 31\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 51 d3 b1 f0 07 00 00\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 51 d3 b2 00 f8 ff ff\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 54 d2 b4 f4 00 00 00 10\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 54 d2 31\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 54 d2 b1 e0 0f 00 00\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 54 d2 b2 00 f0 ff ff\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 50 d2 b4 f4 00 00 00 10\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 50 d2 31\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 50 d2 b1 f0 07 00 00\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 50 d2 b2 00 f8 ff ff\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 54 d3 b4 f4 00 00 00 10\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 54 d3 31\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 54 d3 b1 e0 0f 00 00\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 54 d3 b2 00 f0 ff ff\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 50 d3 b4 f4 00 00 00 10\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 50 d3 31\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 50 d3 b1 f0 07 00 00\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 50 d3 b2 00 f8 ff ff\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[edx-0x800\] diff --git a/gas/testsuite/gas/i386/avx-vnni-int16.d b/gas/testsuite/gas/i386/avx-vnni-int16.d new file mode 100644 index 00000000000..01a7ad29e53 --- /dev/null +++ b/gas/testsuite/gas/i386/avx-vnni-int16.d @@ -0,0 +1,130 @@ +#as: +#objdump: -dw +#name: i386 AVX-VNNI-INT16 insns +#source: avx-vnni-int16.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 56 d2 b4 f4 00 00 00 10\s+vpdpwsud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d2 31\s+vpdpwsud \(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d2 b1 e0 0f 00 00\s+vpdpwsud 0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d2 b2 00 f0 ff ff\s+vpdpwsud -0x1000\(%edx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 d2 b4 f4 00 00 00 10\s+vpdpwsud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d2 31\s+vpdpwsud \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d2 b1 f0 07 00 00\s+vpdpwsud 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d2 b2 00 f8 ff ff\s+vpdpwsud -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 56 d3 b4 f4 00 00 00 10\s+vpdpwsuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d3 31\s+vpdpwsuds \(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d3 b1 e0 0f 00 00\s+vpdpwsuds 0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d3 b2 00 f0 ff ff\s+vpdpwsuds -0x1000\(%edx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 d3 b4 f4 00 00 00 10\s+vpdpwsuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d3 31\s+vpdpwsuds \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d3 b1 f0 07 00 00\s+vpdpwsuds 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d3 b2 00 f8 ff ff\s+vpdpwsuds -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 55 d2 b4 f4 00 00 00 10\s+vpdpwusd 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d2 31\s+vpdpwusd \(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d2 b1 e0 0f 00 00\s+vpdpwusd 0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d2 b2 00 f0 ff ff\s+vpdpwusd -0x1000\(%edx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 51 d2 b4 f4 00 00 00 10\s+vpdpwusd 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d2 31\s+vpdpwusd \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d2 b1 f0 07 00 00\s+vpdpwusd 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d2 b2 00 f8 ff ff\s+vpdpwusd -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 55 d3 b4 f4 00 00 00 10\s+vpdpwusds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d3 31\s+vpdpwusds \(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d3 b1 e0 0f 00 00\s+vpdpwusds 0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d3 b2 00 f0 ff ff\s+vpdpwusds -0x1000\(%edx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 51 d3 b4 f4 00 00 00 10\s+vpdpwusds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d3 31\s+vpdpwusds \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d3 b1 f0 07 00 00\s+vpdpwusds 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d3 b2 00 f8 ff ff\s+vpdpwusds -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 54 d2 b4 f4 00 00 00 10\s+vpdpwuud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d2 31\s+vpdpwuud \(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d2 b1 e0 0f 00 00\s+vpdpwuud 0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d2 b2 00 f0 ff ff\s+vpdpwuud -0x1000\(%edx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 50 d2 b4 f4 00 00 00 10\s+vpdpwuud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d2 31\s+vpdpwuud \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d2 b1 f0 07 00 00\s+vpdpwuud 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d2 b2 00 f8 ff ff\s+vpdpwuud -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 54 d3 b4 f4 00 00 00 10\s+vpdpwuuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d3 31\s+vpdpwuuds \(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d3 b1 e0 0f 00 00\s+vpdpwuuds 0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d3 b2 00 f0 ff ff\s+vpdpwuuds -0x1000\(%edx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 50 d3 b4 f4 00 00 00 10\s+vpdpwuuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d3 31\s+vpdpwuuds \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d3 b1 f0 07 00 00\s+vpdpwuuds 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d3 b2 00 f8 ff ff\s+vpdpwuuds -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 56 d2 b4 f4 00 00 00 10\s+vpdpwsud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d2 31\s+vpdpwsud \(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d2 b1 e0 0f 00 00\s+vpdpwsud 0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d2 b2 00 f0 ff ff\s+vpdpwsud -0x1000\(%edx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 d2 b4 f4 00 00 00 10\s+vpdpwsud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d2 31\s+vpdpwsud \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d2 b1 f0 07 00 00\s+vpdpwsud 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d2 b2 00 f8 ff ff\s+vpdpwsud -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 56 d3 b4 f4 00 00 00 10\s+vpdpwsuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d3 31\s+vpdpwsuds \(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d3 b1 e0 0f 00 00\s+vpdpwsuds 0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d3 b2 00 f0 ff ff\s+vpdpwsuds -0x1000\(%edx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 d3 b4 f4 00 00 00 10\s+vpdpwsuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d3 31\s+vpdpwsuds \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d3 b1 f0 07 00 00\s+vpdpwsuds 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d3 b2 00 f8 ff ff\s+vpdpwsuds -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 55 d2 b4 f4 00 00 00 10\s+vpdpwusd 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d2 31\s+vpdpwusd \(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d2 b1 e0 0f 00 00\s+vpdpwusd 0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d2 b2 00 f0 ff ff\s+vpdpwusd -0x1000\(%edx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 51 d2 b4 f4 00 00 00 10\s+vpdpwusd 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d2 31\s+vpdpwusd \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d2 b1 f0 07 00 00\s+vpdpwusd 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d2 b2 00 f8 ff ff\s+vpdpwusd -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 55 d3 b4 f4 00 00 00 10\s+vpdpwusds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d3 31\s+vpdpwusds \(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d3 b1 e0 0f 00 00\s+vpdpwusds 0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d3 b2 00 f0 ff ff\s+vpdpwusds -0x1000\(%edx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 51 d3 b4 f4 00 00 00 10\s+vpdpwusds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d3 31\s+vpdpwusds \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d3 b1 f0 07 00 00\s+vpdpwusds 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d3 b2 00 f8 ff ff\s+vpdpwusds -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 54 d2 b4 f4 00 00 00 10\s+vpdpwuud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d2 31\s+vpdpwuud \(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d2 b1 e0 0f 00 00\s+vpdpwuud 0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d2 b2 00 f0 ff ff\s+vpdpwuud -0x1000\(%edx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 50 d2 b4 f4 00 00 00 10\s+vpdpwuud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d2 31\s+vpdpwuud \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d2 b1 f0 07 00 00\s+vpdpwuud 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d2 b2 00 f8 ff ff\s+vpdpwuud -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 54 d3 b4 f4 00 00 00 10\s+vpdpwuuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d3 31\s+vpdpwuuds \(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d3 b1 e0 0f 00 00\s+vpdpwuuds 0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d3 b2 00 f0 ff ff\s+vpdpwuuds -0x1000\(%edx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 50 d3 b4 f4 00 00 00 10\s+vpdpwuuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d3 31\s+vpdpwuuds \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d3 b1 f0 07 00 00\s+vpdpwuuds 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d3 b2 00 f8 ff ff\s+vpdpwuuds -0x800\(%edx\),%xmm5,%xmm6 diff --git a/gas/testsuite/gas/i386/avx-vnni-int16.s b/gas/testsuite/gas/i386/avx-vnni-int16.s new file mode 100644 index 00000000000..4a04de3073f --- /dev/null +++ b/gas/testsuite/gas/i386/avx-vnni-int16.s @@ -0,0 +1,127 @@ +# Check 32bit AVX-VNNI-INT16 instructions + + .allow_index_reg + .text +_start: + vpdpwsud %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwsud %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwsud 0x10000000(%esp, %esi, 8), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwsud (%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwsud 4064(%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwsud -4096(%edx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwsud 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwsud (%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwsud 2032(%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwsud -2048(%edx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwsuds %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwsuds %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwsuds 0x10000000(%esp, %esi, 8), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwsuds (%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwsuds 4064(%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwsuds -4096(%edx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwsuds 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwsuds (%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwsuds 2032(%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwsuds -2048(%edx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwusd %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwusd %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwusd 0x10000000(%esp, %esi, 8), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwusd (%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwusd 4064(%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwusd -4096(%edx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwusd 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwusd (%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwusd 2032(%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwusd -2048(%edx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwusds %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwusds %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwusds 0x10000000(%esp, %esi, 8), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwusds (%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwusds 4064(%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwusds -4096(%edx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwusds 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwusds (%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwusds 2032(%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwusds -2048(%edx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwuud %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwuud %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwuud 0x10000000(%esp, %esi, 8), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwuud (%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwuud 4064(%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwuud -4096(%edx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwuud 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwuud (%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwuud 2032(%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwuud -2048(%edx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwuuds %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwuuds %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwuuds 0x10000000(%esp, %esi, 8), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwuuds (%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwuuds 4064(%ecx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwuuds -4096(%edx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwuuds 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwuuds (%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwuuds 2032(%ecx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwuuds -2048(%edx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff) + +.intel_syntax noprefix + vpdpwsud ymm6, ymm5, ymm4 #AVX-VNNI-INT16 + vpdpwsud xmm6, xmm5, xmm4 #AVX-VNNI-INT16 + vpdpwsud ymm6, ymm5, YMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16 + vpdpwsud ymm6, ymm5, YMMWORD PTR [ecx] #AVX-VNNI-INT16 + vpdpwsud ymm6, ymm5, YMMWORD PTR [ecx+4064] #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwsud ymm6, ymm5, YMMWORD PTR [edx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwsud xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16 + vpdpwsud xmm6, xmm5, XMMWORD PTR [ecx] #AVX-VNNI-INT16 + vpdpwsud xmm6, xmm5, XMMWORD PTR [ecx+2032] #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwsud xmm6, xmm5, XMMWORD PTR [edx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwsuds ymm6, ymm5, ymm4 #AVX-VNNI-INT16 + vpdpwsuds xmm6, xmm5, xmm4 #AVX-VNNI-INT16 + vpdpwsuds ymm6, ymm5, YMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16 + vpdpwsuds ymm6, ymm5, YMMWORD PTR [ecx] #AVX-VNNI-INT16 + vpdpwsuds ymm6, ymm5, YMMWORD PTR [ecx+4064] #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwsuds ymm6, ymm5, YMMWORD PTR [edx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwsuds xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16 + vpdpwsuds xmm6, xmm5, XMMWORD PTR [ecx] #AVX-VNNI-INT16 + vpdpwsuds xmm6, xmm5, XMMWORD PTR [ecx+2032] #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwsuds xmm6, xmm5, XMMWORD PTR [edx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwusd ymm6, ymm5, ymm4 #AVX-VNNI-INT16 + vpdpwusd xmm6, xmm5, xmm4 #AVX-VNNI-INT16 + vpdpwusd ymm6, ymm5, YMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16 + vpdpwusd ymm6, ymm5, YMMWORD PTR [ecx] #AVX-VNNI-INT16 + vpdpwusd ymm6, ymm5, YMMWORD PTR [ecx+4064] #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwusd ymm6, ymm5, YMMWORD PTR [edx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwusd xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16 + vpdpwusd xmm6, xmm5, XMMWORD PTR [ecx] #AVX-VNNI-INT16 + vpdpwusd xmm6, xmm5, XMMWORD PTR [ecx+2032] #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwusd xmm6, xmm5, XMMWORD PTR [edx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwusds ymm6, ymm5, ymm4 #AVX-VNNI-INT16 + vpdpwusds xmm6, xmm5, xmm4 #AVX-VNNI-INT16 + vpdpwusds ymm6, ymm5, YMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16 + vpdpwusds ymm6, ymm5, YMMWORD PTR [ecx] #AVX-VNNI-INT16 + vpdpwusds ymm6, ymm5, YMMWORD PTR [ecx+4064] #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwusds ymm6, ymm5, YMMWORD PTR [edx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwusds xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16 + vpdpwusds xmm6, xmm5, XMMWORD PTR [ecx] #AVX-VNNI-INT16 + vpdpwusds xmm6, xmm5, XMMWORD PTR [ecx+2032] #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwusds xmm6, xmm5, XMMWORD PTR [edx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwuud ymm6, ymm5, ymm4 #AVX-VNNI-INT16 + vpdpwuud xmm6, xmm5, xmm4 #AVX-VNNI-INT16 + vpdpwuud ymm6, ymm5, YMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16 + vpdpwuud ymm6, ymm5, YMMWORD PTR [ecx] #AVX-VNNI-INT16 + vpdpwuud ymm6, ymm5, YMMWORD PTR [ecx+4064] #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwuud ymm6, ymm5, YMMWORD PTR [edx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwuud xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16 + vpdpwuud xmm6, xmm5, XMMWORD PTR [ecx] #AVX-VNNI-INT16 + vpdpwuud xmm6, xmm5, XMMWORD PTR [ecx+2032] #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwuud xmm6, xmm5, XMMWORD PTR [edx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwuuds ymm6, ymm5, ymm4 #AVX-VNNI-INT16 + vpdpwuuds xmm6, xmm5, xmm4 #AVX-VNNI-INT16 + vpdpwuuds ymm6, ymm5, YMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16 + vpdpwuuds ymm6, ymm5, YMMWORD PTR [ecx] #AVX-VNNI-INT16 + vpdpwuuds ymm6, ymm5, YMMWORD PTR [ecx+4064] #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwuuds ymm6, ymm5, YMMWORD PTR [edx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwuuds xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000] #AVX-VNNI-INT16 + vpdpwuuds xmm6, xmm5, XMMWORD PTR [ecx] #AVX-VNNI-INT16 + vpdpwuuds xmm6, xmm5, XMMWORD PTR [ecx+2032] #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwuuds xmm6, xmm5, XMMWORD PTR [edx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff) diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index d78f1937c84..b69c692cd16 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -496,6 +496,8 @@ if [gas_32_check] then { run_dump_test "raoint" run_dump_test "raoint-intel" run_list_test "amx-complex-inval" + run_dump_test "avx-vnni-int16" + run_dump_test "avx-vnni-int16-intel" run_list_test "sg" run_dump_test "clzero" run_dump_test "invlpgb" diff --git a/gas/testsuite/gas/i386/x86-64-avx-vnni-int16-intel.d b/gas/testsuite/gas/i386/x86-64-avx-vnni-int16-intel.d new file mode 100644 index 00000000000..7b9616f7d7b --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx-vnni-int16-intel.d @@ -0,0 +1,130 @@ +#as: +#objdump: -dw -Mintel +#name: x86_64 AVX-VNNI-INT16 insns (Intel disassembly) +#source: x86-64-avx-vnni-int16.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 56 d2 b4 f5 00 00 00 10\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 56 d2 31\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 56 d2 b1 e0 0f 00 00\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 56 d2 b2 00 f0 ff ff\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 52 d2 b4 f5 00 00 00 10\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 52 d2 31\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 52 d2 b1 f0 07 00 00\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 52 d2 b2 00 f8 ff ff\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 56 d3 b4 f5 00 00 00 10\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 56 d3 31\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 56 d3 b1 e0 0f 00 00\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 56 d3 b2 00 f0 ff ff\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 52 d3 b4 f5 00 00 00 10\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 52 d3 31\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 52 d3 b1 f0 07 00 00\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 52 d3 b2 00 f8 ff ff\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 55 d2 b4 f5 00 00 00 10\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 55 d2 31\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 55 d2 b1 e0 0f 00 00\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 55 d2 b2 00 f0 ff ff\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 51 d2 b4 f5 00 00 00 10\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 51 d2 31\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 51 d2 b1 f0 07 00 00\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 51 d2 b2 00 f8 ff ff\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 55 d3 b4 f5 00 00 00 10\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 55 d3 31\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 55 d3 b1 e0 0f 00 00\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 55 d3 b2 00 f0 ff ff\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 51 d3 b4 f5 00 00 00 10\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 51 d3 31\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 51 d3 b1 f0 07 00 00\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 51 d3 b2 00 f8 ff ff\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 54 d2 b4 f5 00 00 00 10\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 54 d2 31\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 54 d2 b1 e0 0f 00 00\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 54 d2 b2 00 f0 ff ff\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 50 d2 b4 f5 00 00 00 10\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 50 d2 31\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 50 d2 b1 f0 07 00 00\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 50 d2 b2 00 f8 ff ff\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 54 d3 b4 f5 00 00 00 10\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 54 d3 31\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 54 d3 b1 e0 0f 00 00\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 54 d3 b2 00 f0 ff ff\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 50 d3 b4 f5 00 00 00 10\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 50 d3 31\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 50 d3 b1 f0 07 00 00\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 50 d3 b2 00 f8 ff ff\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 56 d2 b4 f5 00 00 00 10\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 56 d2 31\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 56 d2 b1 e0 0f 00 00\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 56 d2 b2 00 f0 ff ff\s+vpdpwsud ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 52 d2 b4 f5 00 00 00 10\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 52 d2 31\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 52 d2 b1 f0 07 00 00\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 52 d2 b2 00 f8 ff ff\s+vpdpwsud xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 56 d3 b4 f5 00 00 00 10\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 56 d3 31\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 56 d3 b1 e0 0f 00 00\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 56 d3 b2 00 f0 ff ff\s+vpdpwsuds ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 52 d3 b4 f5 00 00 00 10\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 52 d3 31\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 52 d3 b1 f0 07 00 00\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 52 d3 b2 00 f8 ff ff\s+vpdpwsuds xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 55 d2 b4 f5 00 00 00 10\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 55 d2 31\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 55 d2 b1 e0 0f 00 00\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 55 d2 b2 00 f0 ff ff\s+vpdpwusd ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 51 d2 b4 f5 00 00 00 10\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 51 d2 31\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 51 d2 b1 f0 07 00 00\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 51 d2 b2 00 f8 ff ff\s+vpdpwusd xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 55 d3 b4 f5 00 00 00 10\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 55 d3 31\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 55 d3 b1 e0 0f 00 00\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 55 d3 b2 00 f0 ff ff\s+vpdpwusds ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 51 d3 b4 f5 00 00 00 10\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 51 d3 31\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 51 d3 b1 f0 07 00 00\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 51 d3 b2 00 f8 ff ff\s+vpdpwusds xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 54 d2 b4 f5 00 00 00 10\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 54 d2 31\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 54 d2 b1 e0 0f 00 00\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 54 d2 b2 00 f0 ff ff\s+vpdpwuud ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 50 d2 b4 f5 00 00 00 10\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 50 d2 31\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 50 d2 b1 f0 07 00 00\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 50 d2 b2 00 f8 ff ff\s+vpdpwuud xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 54 d3 b4 f5 00 00 00 10\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 54 d3 31\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 54 d3 b1 e0 0f 00 00\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 54 d3 b2 00 f0 ff ff\s+vpdpwuuds ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 50 d3 b4 f5 00 00 00 10\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 50 d3 31\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 50 d3 b1 f0 07 00 00\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 50 d3 b2 00 f8 ff ff\s+vpdpwuuds xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] diff --git a/gas/testsuite/gas/i386/x86-64-avx-vnni-int16.d b/gas/testsuite/gas/i386/x86-64-avx-vnni-int16.d new file mode 100644 index 00000000000..8a3542f4b0e --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx-vnni-int16.d @@ -0,0 +1,130 @@ +#as: +#objdump: -dw +#name: x86_64 AVX-VNNI-INT16 insns +#source: x86-64-avx-vnni-int16.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 56 d2 b4 f5 00 00 00 10\s+vpdpwsud 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 c2 56 d2 31\s+vpdpwsud \(%r9\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d2 b1 e0 0f 00 00\s+vpdpwsud 0xfe0\(%rcx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d2 b2 00 f0 ff ff\s+vpdpwsud -0x1000\(%rdx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 a2 52 d2 b4 f5 00 00 00 10\s+vpdpwsud 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 52 d2 31\s+vpdpwsud \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d2 b1 f0 07 00 00\s+vpdpwsud 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d2 b2 00 f8 ff ff\s+vpdpwsud -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 56 d3 b4 f5 00 00 00 10\s+vpdpwsuds 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 c2 56 d3 31\s+vpdpwsuds \(%r9\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d3 b1 e0 0f 00 00\s+vpdpwsuds 0xfe0\(%rcx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d3 b2 00 f0 ff ff\s+vpdpwsuds -0x1000\(%rdx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 a2 52 d3 b4 f5 00 00 00 10\s+vpdpwsuds 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 52 d3 31\s+vpdpwsuds \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d3 b1 f0 07 00 00\s+vpdpwsuds 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d3 b2 00 f8 ff ff\s+vpdpwsuds -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 55 d2 b4 f5 00 00 00 10\s+vpdpwusd 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 c2 55 d2 31\s+vpdpwusd \(%r9\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d2 b1 e0 0f 00 00\s+vpdpwusd 0xfe0\(%rcx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d2 b2 00 f0 ff ff\s+vpdpwusd -0x1000\(%rdx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 a2 51 d2 b4 f5 00 00 00 10\s+vpdpwusd 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 51 d2 31\s+vpdpwusd \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d2 b1 f0 07 00 00\s+vpdpwusd 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d2 b2 00 f8 ff ff\s+vpdpwusd -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 55 d3 b4 f5 00 00 00 10\s+vpdpwusds 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 c2 55 d3 31\s+vpdpwusds \(%r9\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d3 b1 e0 0f 00 00\s+vpdpwusds 0xfe0\(%rcx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d3 b2 00 f0 ff ff\s+vpdpwusds -0x1000\(%rdx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 a2 51 d3 b4 f5 00 00 00 10\s+vpdpwusds 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 51 d3 31\s+vpdpwusds \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d3 b1 f0 07 00 00\s+vpdpwusds 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d3 b2 00 f8 ff ff\s+vpdpwusds -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 54 d2 b4 f5 00 00 00 10\s+vpdpwuud 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 c2 54 d2 31\s+vpdpwuud \(%r9\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d2 b1 e0 0f 00 00\s+vpdpwuud 0xfe0\(%rcx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d2 b2 00 f0 ff ff\s+vpdpwuud -0x1000\(%rdx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 a2 50 d2 b4 f5 00 00 00 10\s+vpdpwuud 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 50 d2 31\s+vpdpwuud \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d2 b1 f0 07 00 00\s+vpdpwuud 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d2 b2 00 f8 ff ff\s+vpdpwuud -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 54 d3 b4 f5 00 00 00 10\s+vpdpwuuds 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 c2 54 d3 31\s+vpdpwuuds \(%r9\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d3 b1 e0 0f 00 00\s+vpdpwuuds 0xfe0\(%rcx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d3 b2 00 f0 ff ff\s+vpdpwuuds -0x1000\(%rdx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 a2 50 d3 b4 f5 00 00 00 10\s+vpdpwuuds 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 50 d3 31\s+vpdpwuuds \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d3 b1 f0 07 00 00\s+vpdpwuuds 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d3 b2 00 f8 ff ff\s+vpdpwuuds -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 56 d2 b4 f5 00 00 00 10\s+vpdpwsud 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 c2 56 d2 31\s+vpdpwsud \(%r9\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d2 b1 e0 0f 00 00\s+vpdpwsud 0xfe0\(%rcx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d2 b2 00 f0 ff ff\s+vpdpwsud -0x1000\(%rdx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 a2 52 d2 b4 f5 00 00 00 10\s+vpdpwsud 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 52 d2 31\s+vpdpwsud \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d2 b1 f0 07 00 00\s+vpdpwsud 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d2 b2 00 f8 ff ff\s+vpdpwsud -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 56 d3 b4 f5 00 00 00 10\s+vpdpwsuds 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 c2 56 d3 31\s+vpdpwsuds \(%r9\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d3 b1 e0 0f 00 00\s+vpdpwsuds 0xfe0\(%rcx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 d3 b2 00 f0 ff ff\s+vpdpwsuds -0x1000\(%rdx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 a2 52 d3 b4 f5 00 00 00 10\s+vpdpwsuds 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 52 d3 31\s+vpdpwsuds \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d3 b1 f0 07 00 00\s+vpdpwsuds 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 d3 b2 00 f8 ff ff\s+vpdpwsuds -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 55 d2 b4 f5 00 00 00 10\s+vpdpwusd 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 c2 55 d2 31\s+vpdpwusd \(%r9\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d2 b1 e0 0f 00 00\s+vpdpwusd 0xfe0\(%rcx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d2 b2 00 f0 ff ff\s+vpdpwusd -0x1000\(%rdx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 a2 51 d2 b4 f5 00 00 00 10\s+vpdpwusd 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 51 d2 31\s+vpdpwusd \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d2 b1 f0 07 00 00\s+vpdpwusd 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d2 b2 00 f8 ff ff\s+vpdpwusd -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 55 d3 b4 f5 00 00 00 10\s+vpdpwusds 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 c2 55 d3 31\s+vpdpwusds \(%r9\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d3 b1 e0 0f 00 00\s+vpdpwusds 0xfe0\(%rcx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 55 d3 b2 00 f0 ff ff\s+vpdpwusds -0x1000\(%rdx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 a2 51 d3 b4 f5 00 00 00 10\s+vpdpwusds 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 51 d3 31\s+vpdpwusds \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d3 b1 f0 07 00 00\s+vpdpwusds 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 d3 b2 00 f8 ff ff\s+vpdpwusds -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 54 d2 b4 f5 00 00 00 10\s+vpdpwuud 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 c2 54 d2 31\s+vpdpwuud \(%r9\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d2 b1 e0 0f 00 00\s+vpdpwuud 0xfe0\(%rcx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d2 b2 00 f0 ff ff\s+vpdpwuud -0x1000\(%rdx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 a2 50 d2 b4 f5 00 00 00 10\s+vpdpwuud 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 50 d2 31\s+vpdpwuud \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d2 b1 f0 07 00 00\s+vpdpwuud 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d2 b2 00 f8 ff ff\s+vpdpwuud -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 54 d3 b4 f5 00 00 00 10\s+vpdpwuuds 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 c2 54 d3 31\s+vpdpwuuds \(%r9\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d3 b1 e0 0f 00 00\s+vpdpwuuds 0xfe0\(%rcx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 54 d3 b2 00 f0 ff ff\s+vpdpwuuds -0x1000\(%rdx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 a2 50 d3 b4 f5 00 00 00 10\s+vpdpwuuds 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 50 d3 31\s+vpdpwuuds \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d3 b1 f0 07 00 00\s+vpdpwuuds 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 d3 b2 00 f8 ff ff\s+vpdpwuuds -0x800\(%rdx\),%xmm5,%xmm6 diff --git a/gas/testsuite/gas/i386/x86-64-avx-vnni-int16.s b/gas/testsuite/gas/i386/x86-64-avx-vnni-int16.s new file mode 100644 index 00000000000..8ba0f54e45d --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx-vnni-int16.s @@ -0,0 +1,127 @@ +# Check 64bit AVX-VNNI-INT16 instructions + + .allow_index_reg + .text +_start: + vpdpwsud %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwsud %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwsud 0x10000000(%rbp, %r14, 8), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwsud (%r9), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwsud 4064(%rcx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwsud -4096(%rdx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwsud 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwsud (%r9), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwsud 2032(%rcx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwsud -2048(%rdx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwsuds %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwsuds %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwsuds 0x10000000(%rbp, %r14, 8), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwsuds (%r9), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwsuds 4064(%rcx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwsuds -4096(%rdx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwsuds 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwsuds (%r9), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwsuds 2032(%rcx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwsuds -2048(%rdx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwusd %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwusd %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwusd 0x10000000(%rbp, %r14, 8), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwusd (%r9), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwusd 4064(%rcx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwusd -4096(%rdx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwusd 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwusd (%r9), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwusd 2032(%rcx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwusd -2048(%rdx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwusds %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwusds %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwusds 0x10000000(%rbp, %r14, 8), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwusds (%r9), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwusds 4064(%rcx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwusds -4096(%rdx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwusds 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwusds (%r9), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwusds 2032(%rcx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwusds -2048(%rdx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwuud %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwuud %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwuud 0x10000000(%rbp, %r14, 8), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwuud (%r9), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwuud 4064(%rcx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwuud -4096(%rdx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwuud 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwuud (%r9), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwuud 2032(%rcx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwuud -2048(%rdx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwuuds %ymm4, %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwuuds %xmm4, %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwuuds 0x10000000(%rbp, %r14, 8), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwuuds (%r9), %ymm5, %ymm6 #AVX-VNNI-INT16 + vpdpwuuds 4064(%rcx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwuuds -4096(%rdx), %ymm5, %ymm6 #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwuuds 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwuuds (%r9), %xmm5, %xmm6 #AVX-VNNI-INT16 + vpdpwuuds 2032(%rcx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwuuds -2048(%rdx), %xmm5, %xmm6 #AVX-VNNI-INT16 Disp32(00f8ffff) + +.intel_syntax noprefix + vpdpwsud ymm6, ymm5, ymm4 #AVX-VNNI-INT16 + vpdpwsud xmm6, xmm5, xmm4 #AVX-VNNI-INT16 + vpdpwsud ymm6, ymm5, YMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16 + vpdpwsud ymm6, ymm5, YMMWORD PTR [r9] #AVX-VNNI-INT16 + vpdpwsud ymm6, ymm5, YMMWORD PTR [rcx+4064] #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwsud ymm6, ymm5, YMMWORD PTR [rdx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwsud xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16 + vpdpwsud xmm6, xmm5, XMMWORD PTR [r9] #AVX-VNNI-INT16 + vpdpwsud xmm6, xmm5, XMMWORD PTR [rcx+2032] #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwsud xmm6, xmm5, XMMWORD PTR [rdx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwsuds ymm6, ymm5, ymm4 #AVX-VNNI-INT16 + vpdpwsuds xmm6, xmm5, xmm4 #AVX-VNNI-INT16 + vpdpwsuds ymm6, ymm5, YMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16 + vpdpwsuds ymm6, ymm5, YMMWORD PTR [r9] #AVX-VNNI-INT16 + vpdpwsuds ymm6, ymm5, YMMWORD PTR [rcx+4064] #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwsuds ymm6, ymm5, YMMWORD PTR [rdx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwsuds xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16 + vpdpwsuds xmm6, xmm5, XMMWORD PTR [r9] #AVX-VNNI-INT16 + vpdpwsuds xmm6, xmm5, XMMWORD PTR [rcx+2032] #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwsuds xmm6, xmm5, XMMWORD PTR [rdx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwusd ymm6, ymm5, ymm4 #AVX-VNNI-INT16 + vpdpwusd xmm6, xmm5, xmm4 #AVX-VNNI-INT16 + vpdpwusd ymm6, ymm5, YMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16 + vpdpwusd ymm6, ymm5, YMMWORD PTR [r9] #AVX-VNNI-INT16 + vpdpwusd ymm6, ymm5, YMMWORD PTR [rcx+4064] #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwusd ymm6, ymm5, YMMWORD PTR [rdx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwusd xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16 + vpdpwusd xmm6, xmm5, XMMWORD PTR [r9] #AVX-VNNI-INT16 + vpdpwusd xmm6, xmm5, XMMWORD PTR [rcx+2032] #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwusd xmm6, xmm5, XMMWORD PTR [rdx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwusds ymm6, ymm5, ymm4 #AVX-VNNI-INT16 + vpdpwusds xmm6, xmm5, xmm4 #AVX-VNNI-INT16 + vpdpwusds ymm6, ymm5, YMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16 + vpdpwusds ymm6, ymm5, YMMWORD PTR [r9] #AVX-VNNI-INT16 + vpdpwusds ymm6, ymm5, YMMWORD PTR [rcx+4064] #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwusds ymm6, ymm5, YMMWORD PTR [rdx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwusds xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16 + vpdpwusds xmm6, xmm5, XMMWORD PTR [r9] #AVX-VNNI-INT16 + vpdpwusds xmm6, xmm5, XMMWORD PTR [rcx+2032] #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwusds xmm6, xmm5, XMMWORD PTR [rdx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwuud ymm6, ymm5, ymm4 #AVX-VNNI-INT16 + vpdpwuud xmm6, xmm5, xmm4 #AVX-VNNI-INT16 + vpdpwuud ymm6, ymm5, YMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16 + vpdpwuud ymm6, ymm5, YMMWORD PTR [r9] #AVX-VNNI-INT16 + vpdpwuud ymm6, ymm5, YMMWORD PTR [rcx+4064] #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwuud ymm6, ymm5, YMMWORD PTR [rdx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwuud xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16 + vpdpwuud xmm6, xmm5, XMMWORD PTR [r9] #AVX-VNNI-INT16 + vpdpwuud xmm6, xmm5, XMMWORD PTR [rcx+2032] #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwuud xmm6, xmm5, XMMWORD PTR [rdx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff) + vpdpwuuds ymm6, ymm5, ymm4 #AVX-VNNI-INT16 + vpdpwuuds xmm6, xmm5, xmm4 #AVX-VNNI-INT16 + vpdpwuuds ymm6, ymm5, YMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16 + vpdpwuuds ymm6, ymm5, YMMWORD PTR [r9] #AVX-VNNI-INT16 + vpdpwuuds ymm6, ymm5, YMMWORD PTR [rcx+4064] #AVX-VNNI-INT16 Disp32(e00f0000) + vpdpwuuds ymm6, ymm5, YMMWORD PTR [rdx-4096] #AVX-VNNI-INT16 Disp32(00f0ffff) + vpdpwuuds xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000] #AVX-VNNI-INT16 + vpdpwuuds xmm6, xmm5, XMMWORD PTR [r9] #AVX-VNNI-INT16 + vpdpwuuds xmm6, xmm5, XMMWORD PTR [rcx+2032] #AVX-VNNI-INT16 Disp32(f0070000) + vpdpwuuds xmm6, xmm5, XMMWORD PTR [rdx-2048] #AVX-VNNI-INT16 Disp32(00f8ffff) diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp index 49205f9b996..0f2903c6185 100644 --- a/gas/testsuite/gas/i386/x86-64.exp +++ b/gas/testsuite/gas/i386/x86-64.exp @@ -438,6 +438,8 @@ run_list_test "x86-64-amx-complex-inval" run_dump_test "x86-64-fred" run_dump_test "x86-64-lkgs" run_list_test "x86-64-lkgs-inval" +run_dump_test "x86-64-avx-vnni-int16" +run_dump_test "x86-64-avx-vnni-int16-intel" run_dump_test "x86-64-clzero" run_dump_test "x86-64-mwaitx-bdver4" run_list_test "x86-64-mwaitx-reg" diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 9905317c110..9311d832342 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -1062,6 +1062,8 @@ enum PREFIX_VEX_0F3872, PREFIX_VEX_0F38B0_W_0, PREFIX_VEX_0F38B1_W_0, + PREFIX_VEX_0F38D2_W_0, + PREFIX_VEX_0F38D3_W_0, PREFIX_VEX_0F38F5_L_0, PREFIX_VEX_0F38F6_L_0, PREFIX_VEX_0F38F7_L_0, @@ -1472,6 +1474,8 @@ enum VEX_W_0F38B4, VEX_W_0F38B5, VEX_W_0F38CF, + VEX_W_0F38D2, + VEX_W_0F38D3, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1, VEX_W_0F3A02, @@ -3909,7 +3913,21 @@ static const struct dis386 prefix_table[][4] = { { "vbcstnebf162ps", { XM, Mw }, 0 }, { "vbcstnesh2ps", { XM, Mw }, 0 }, }, - + + /* PREFIX_VEX_0F38D2 */ + { + { "vpdpwuud", { XM, Vex, EXx }, 0 }, + { "vpdpwsud", { XM, Vex, EXx }, 0 }, + { "vpdpwusd", { XM, Vex, EXx }, 0 }, + }, + + /* PREFIX_VEX_0F38D3 */ + { + { "vpdpwuuds", { XM, Vex, EXx }, 0 }, + { "vpdpwsuds", { XM, Vex, EXx }, 0 }, + { "vpdpwusds", { XM, Vex, EXx }, 0 }, + }, + /* PREFIX_VEX_0F38F5_L_0 */ { { "bzhiS", { Gdq, Edq, VexGdq }, 0 }, @@ -6370,8 +6388,8 @@ static const struct dis386 vex_table[][256] = { /* d0 */ { Bad_Opcode }, { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F38D2) }, + { VEX_W_TABLE (VEX_W_0F38D3) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, @@ -7600,6 +7618,14 @@ static const struct dis386 vex_w_table[][2] = { /* VEX_W_0F38CF */ { "%XEvgf2p8mulb", { XM, Vex, EXx }, PREFIX_DATA }, }, + { + /* VEX_W_0F38D2 */ + { PREFIX_TABLE (PREFIX_VEX_0F38D2_W_0) }, + }, + { + /* VEX_W_0F38D3 */ + { PREFIX_TABLE (PREFIX_VEX_0F38D3_W_0) }, + }, { /* VEX_W_0F3A00_L_1 */ { Bad_Opcode }, diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 1db555d8615..9796977a2aa 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -166,6 +166,8 @@ static const dependency isa_dependencies[] = "AVX2" }, { "FRED", "LKGS" }, + { "AVX_VNNI_INT16", + "AVX2" }, { "AVX512F", "AVX2" }, { "AVX512CD", @@ -366,6 +368,7 @@ static bitfield cpu_flags[] = BITFIELD (RAO_INT), BITFIELD (FRED), BITFIELD (LKGS), + BITFIELD (AVX_VNNI_INT16), BITFIELD (MWAITX), BITFIELD (CLZERO), BITFIELD (OSPKE), diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 3318bcfec33..4a225202e64 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -233,6 +233,8 @@ enum CpuFRED, /* lkgs instruction required */ CpuLKGS, + /* Intel AVX VNNI-INT16 Instructions support required. */ + CpuAVX_VNNI_INT16, /* mwaitx instruction required */ CpuMWAITX, /* Clzero instruction required */ @@ -430,6 +432,7 @@ typedef union i386_cpu_flags unsigned int cpurao_int:1; unsigned int cpufred:1; unsigned int cpulkgs:1; + unsigned int cpuavx_vnni_int16:1; unsigned int cpumwaitx:1; unsigned int cpuclzero:1; unsigned int cpuospke:1; diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index b6263f88605..4903d3b2361 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -3364,3 +3364,14 @@ erets, 0xf20f01ca, FRED|x64, NoSuf, {} eretu, 0xf30f01ca, FRED|x64, NoSuf, {} // FRED instructions end. + +// AVX_VNNI_INT16 instructions. + +vpdpwuud, 0xd2, AVX_VNNI_INT16, Modrm|Vex|Space0F38|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM } +vpdpwuuds, 0xd3, AVX_VNNI_INT16, Modrm|Vex|Space0F38|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM } +vpdpwusd, 0x66d2, AVX_VNNI_INT16, Modrm|Vex|Space0F38|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM } +vpdpwusds, 0x66d3, AVX_VNNI_INT16, Modrm|Vex|Space0F38|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM } +vpdpwsud, 0xf3d2, AVX_VNNI_INT16, Modrm|Vex|Space0F38|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM } +vpdpwsuds, 0xf3d3, AVX_VNNI_INT16, Modrm|Vex|Space0F38|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM } + +// AVX_VNNI_INT16 instructions end. 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[8.43.85.97]) by mx.google.com with ESMTPS id u6-20020a05640207c600b0051df8ee23f5si6305955edy.175.2023.07.12.23.37.08 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 23:37:08 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b="QT5/xmiF"; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C9C783854EB7 for ; Thu, 13 Jul 2023 06:34:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C9C783854EB7 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1689230063; bh=m9661rqNXSlNZiTqDPPKgBlku+dw56/JE3WFtb9ulnY=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=QT5/xmiFGM2P41dYFliYsyXuJYQyA+U+9UGPPwwmqhjqJl0qZgNlvGWIsve8NEVFC EUxZvYK+keoD2sbouXM93hXpuZiBRbnXJFuB08W+tiiusOVYyAKNFM8RyXxu4Nreaz FkYiW3aXvVPL/hYjDBaJXBhqCEMPUJrBG8UFzN68= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by sourceware.org (Postfix) with ESMTPS id 0ECCE385AF8F for ; Thu, 13 Jul 2023 06:33:11 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0ECCE385AF8F X-IronPort-AV: E=McAfee;i="6600,9927,10769"; a="431253773" X-IronPort-AV: E=Sophos;i="6.01,201,1684825200"; d="scan'208";a="431253773" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2023 23:33:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10769"; a="791914382" X-IronPort-AV: E=Sophos;i="6.01,201,1684825200"; d="scan'208";a="791914382" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmsmga004.fm.intel.com with ESMTP; 12 Jul 2023 23:33:06 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 7444D1005698; Thu, 13 Jul 2023 14:33:05 +0800 (CST) To: binutils@sourceware.org Cc: jbeulich@suse.com, hjl.tools@gmail.com, amodra@gmail.com Subject: [PATCH 2/5] Support Intel SHA512 Date: Thu, 13 Jul 2023 14:33:00 +0800 Message-Id: <20230713063303.205862-3-haochen.jiang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230713063303.205862-1-haochen.jiang@intel.com> References: <20230713063303.205862-1-haochen.jiang@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-10.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Binutils From: "Jiang, Haochen" Reply-To: Haochen Jiang Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771286276225272727 X-GMAIL-MSGID: 1771286276225272727 Hi Jan, In SHA512 patch, I have considered to eliminate the ModR/M table pass for vsha512msg1 and vsha512rnds2 since you just introduced OP_R with Uxmm. However, xmm_mode in OP_R requires VEX128 or less. But unfortunately, for both instructions, they are VEX256. Therefore, I still keep the ModR/M table pass in the patch. BRs, Haochen gas/ChangeLog: * NEWS: Support Intel SHA512. * config/tc-i386.c: Add sha512. * doc/c-i386.texi: Document .sha512. * testsuite/gas/i386/i386.exp: Run SHA512 tests. * testsuite/gas/i386/x86-64.exp: Ditto. * testsuite/gas/i386/sha512-intel.d: New test. * testsuite/gas/i386/sha512-inval.l: Ditto. * testsuite/gas/i386/sha512-inval.s: Ditto. * testsuite/gas/i386/sha512.d: Ditto. * testsuite/gas/i386/sha512.s: Ditto. * testsuite/gas/i386/x86-64-sha512-intel.d: Ditto. * testsuite/gas/i386/x86-64-sha512-inval.l: Ditto. * testsuite/gas/i386/x86-64-sha512-inval.s: Ditto. * testsuite/gas/i386/x86-64-sha512.d: Ditto. * testsuite/gas/i386/x86-64-sha512.s: Ditto. opcodes/ChangeLog: * i386-dis.c (Uymm): New. (MOD_VEX_0F38CB_P_3_W_0_L_1): Ditto. (MOD_VEX_0F38CC_P_3_W_0_L_1): Ditto. (PREFIX_VEX_0F38CB): Ditto. (PREFIX_VEX_0F38CC): Ditto. (PREFIX_VEX_0F38CD): Ditto. (VEX_LEN_0F38CB_P_3_W_0): Ditto. (VEX_LEN_0F38CC_P_3_W_0): Ditto. (VEX_LEN_0F38CD_P_3_W_0): Ditto. (VEX_W_0F38CB_P_3): Ditto. (VEX_W_0F38CC_P_3): Ditto. (VEX_W_0F38CD_P_3): Ditto. (mod_table): Add MOD_VEX_0F38CB_P_3_W_0_L_1, MOD_VEX_0F38CC_P_3_W_0_L_1, (prefix_table): Add PREFIX_VEX_0F38CB, PREFIX_VEX_0F38CC, PREFIX_VEX_0F38CD. (vex_len_table): Add VEX_LEN_0F38CB_P_3_W_0, VEX_LEN_0F38CC_P_3_W_0, VEX_LEN_0F38CD_P_3_W_0. (vex_w_table): Add VEX_W_0F38CB_P_3, VEX_W_0F38CC_P_3, VEX_W_0F38CD_P_3. * i386-gen.c (isa_dependencies): Add SHA512. (cpu_flags): Ditto. * i386-init.h: Regenerated. * i386-mnem.h: Ditto. * i386-opc.h (CpuSHA512): New. (i386_cpu_flags): Add cpusha512. * i386-opc.tbl: Add SHA512 instructions. * i386-tbl.h: Regenerated. --- gas/NEWS | 2 + gas/config/tc-i386.c | 1 + gas/doc/c-i386.texi | 3 +- gas/testsuite/gas/i386/i386.exp | 2 + gas/testsuite/gas/i386/sha512-intel.d | 16 + gas/testsuite/gas/i386/sha512.d | 16 + gas/testsuite/gas/i386/sha512.s | 13 + gas/testsuite/gas/i386/x86-64-sha512-intel.d | 16 + gas/testsuite/gas/i386/x86-64-sha512.d | 16 + gas/testsuite/gas/i386/x86-64-sha512.s | 13 + gas/testsuite/gas/i386/x86-64.exp | 2 + opcodes/i386-dis.c | 82 +- opcodes/i386-gen.c | 3 + opcodes/i386-init.h | 648 +- opcodes/i386-mnem.h | 3949 ++++---- opcodes/i386-opc.h | 3 + opcodes/i386-opc.tbl | 8 + opcodes/i386-tbl.h | 8555 +++++++++--------- 18 files changed, 6806 insertions(+), 6542 deletions(-) create mode 100644 gas/testsuite/gas/i386/sha512-intel.d create mode 100644 gas/testsuite/gas/i386/sha512.d create mode 100644 gas/testsuite/gas/i386/sha512.s create mode 100644 gas/testsuite/gas/i386/x86-64-sha512-intel.d create mode 100644 gas/testsuite/gas/i386/x86-64-sha512.d create mode 100644 gas/testsuite/gas/i386/x86-64-sha512.s diff --git a/gas/NEWS b/gas/NEWS index 5e9ed5ab4bc..fe2c055fa7f 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -1,5 +1,7 @@ -*- text -*- +* Add support for Intel SHA512 instructions. + * Add support for Intel AVX-VNNI-INT16 instructions. Changes in 2.41: diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 0d3d7560efe..836640d9123 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1152,6 +1152,7 @@ static const arch_entry cpu_arch[] = SUBARCH (fred, FRED, ANY_FRED, false), SUBARCH (lkgs, LKGS, ANY_LKGS, false), SUBARCH (avx_vnni_int16, AVX_VNNI_INT16, ANY_AVX_VNNI_INT16, false), + SUBARCH (sha512, SHA512, ANY_SHA512, false), }; #undef SUBARCH diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 40ba942d9cb..21fb71e54ab 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -208,6 +208,7 @@ accept various extension mnemonics. For example, @code{fred}, @code{lkgs}, @code{avx_vnni_int16}, +@code{sha512}, @code{amx_int8}, @code{amx_bf16}, @code{amx_fp16}, @@ -1637,7 +1638,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.prefetchi} @tab @samp{.avx_ifma} @tab @samp{.avx_vnni_int8} @item @samp{.cmpccxadd} @tab @samp{.wrmsrns} @tab @samp{.msrlist} @item @samp{.avx_ne_convert} @tab @samp{.rao_int} @tab @samp{.fred} @tab @samp{.lkgs} -@item @samp{.avx_vnni_int16} +@item @samp{.avx_vnni_int16} @tab @samp{.sha512} @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote} @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq} @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk} diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index b69c692cd16..487811ad988 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -498,6 +498,8 @@ if [gas_32_check] then { run_list_test "amx-complex-inval" run_dump_test "avx-vnni-int16" run_dump_test "avx-vnni-int16-intel" + run_dump_test "sha512" + run_dump_test "sha512-intel" run_list_test "sg" run_dump_test "clzero" run_dump_test "invlpgb" diff --git a/gas/testsuite/gas/i386/sha512-intel.d b/gas/testsuite/gas/i386/sha512-intel.d new file mode 100644 index 00000000000..c1cc85b9f26 --- /dev/null +++ b/gas/testsuite/gas/i386/sha512-intel.d @@ -0,0 +1,16 @@ +#as: +#objdump: -dw -Mintel +#name: i386 SHA512 insns (Intel disassembly) +#source: sha512.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 7f cc f5\s+vsha512msg1 ymm6,xmm5 +\s*[a-f0-9]+:\s*c4 e2 7f cd f5\s+vsha512msg2 ymm6,ymm5 +\s*[a-f0-9]+:\s*c4 e2 57 cb f4\s+vsha512rnds2 ymm6,ymm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 7f cc f5\s+vsha512msg1 ymm6,xmm5 +\s*[a-f0-9]+:\s*c4 e2 7f cd f5\s+vsha512msg2 ymm6,ymm5 +\s*[a-f0-9]+:\s*c4 e2 57 cb f4\s+vsha512rnds2 ymm6,ymm5,xmm4 diff --git a/gas/testsuite/gas/i386/sha512.d b/gas/testsuite/gas/i386/sha512.d new file mode 100644 index 00000000000..b90019954ea --- /dev/null +++ b/gas/testsuite/gas/i386/sha512.d @@ -0,0 +1,16 @@ +#as: +#objdump: -dw +#name: i386 SHA512 insns +#source: sha512.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 7f cc f5\s+vsha512msg1 %xmm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7f cd f5\s+vsha512msg2 %ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 57 cb f4\s+vsha512rnds2 %xmm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7f cc f5\s+vsha512msg1 %xmm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7f cd f5\s+vsha512msg2 %ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 57 cb f4\s+vsha512rnds2 %xmm4,%ymm5,%ymm6 diff --git a/gas/testsuite/gas/i386/sha512.s b/gas/testsuite/gas/i386/sha512.s new file mode 100644 index 00000000000..e238c272970 --- /dev/null +++ b/gas/testsuite/gas/i386/sha512.s @@ -0,0 +1,13 @@ +# Check 32bit SHA512 instructions + + .allow_index_reg + .text +_start: + vsha512msg1 %xmm5, %ymm6 #SHA512 + vsha512msg2 %ymm5, %ymm6 #SHA512 + vsha512rnds2 %xmm4, %ymm5, %ymm6 #SHA512 + +.intel_syntax noprefix + vsha512msg1 ymm6, xmm5 #SHA512 + vsha512msg2 ymm6, ymm5 #SHA512 + vsha512rnds2 ymm6, ymm5, xmm4 #SHA512 diff --git a/gas/testsuite/gas/i386/x86-64-sha512-intel.d b/gas/testsuite/gas/i386/x86-64-sha512-intel.d new file mode 100644 index 00000000000..e644168e311 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-sha512-intel.d @@ -0,0 +1,16 @@ +#as: +#objdump: -dw -Mintel +#name: x86_64 SHA512 insns (Intel disassembly) +#source: x86-64-sha512.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 7f cc f5\s+vsha512msg1 ymm6,xmm5 +\s*[a-f0-9]+:\s*c4 e2 7f cd f5\s+vsha512msg2 ymm6,ymm5 +\s*[a-f0-9]+:\s*c4 e2 57 cb f4\s+vsha512rnds2 ymm6,ymm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 7f cc f5\s+vsha512msg1 ymm6,xmm5 +\s*[a-f0-9]+:\s*c4 e2 7f cd f5\s+vsha512msg2 ymm6,ymm5 +\s*[a-f0-9]+:\s*c4 e2 57 cb f4\s+vsha512rnds2 ymm6,ymm5,xmm4 diff --git a/gas/testsuite/gas/i386/x86-64-sha512.d b/gas/testsuite/gas/i386/x86-64-sha512.d new file mode 100644 index 00000000000..fcb8ae61fee --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-sha512.d @@ -0,0 +1,16 @@ +#as: +#objdump: -dw +#name: x86_64 SHA512 insns +#source: x86-64-sha512.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 7f cc f5\s+vsha512msg1 %xmm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7f cd f5\s+vsha512msg2 %ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 57 cb f4\s+vsha512rnds2 %xmm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7f cc f5\s+vsha512msg1 %xmm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 7f cd f5\s+vsha512msg2 %ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 57 cb f4\s+vsha512rnds2 %xmm4,%ymm5,%ymm6 diff --git a/gas/testsuite/gas/i386/x86-64-sha512.s b/gas/testsuite/gas/i386/x86-64-sha512.s new file mode 100644 index 00000000000..5eaadb3bade --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-sha512.s @@ -0,0 +1,13 @@ +# Check 64bit SHA512 instructions + + .allow_index_reg + .text +_start: + vsha512msg1 %xmm5, %ymm6 #SHA512 + vsha512msg2 %ymm5, %ymm6 #SHA512 + vsha512rnds2 %xmm4, %ymm5, %ymm6 #SHA512 + +.intel_syntax noprefix + vsha512msg1 ymm6, xmm5 #SHA512 + vsha512msg2 ymm6, ymm5 #SHA512 + vsha512rnds2 ymm6, ymm5, xmm4 #SHA512 diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp index 0f2903c6185..64d8c3726d4 100644 --- a/gas/testsuite/gas/i386/x86-64.exp +++ b/gas/testsuite/gas/i386/x86-64.exp @@ -440,6 +440,8 @@ run_dump_test "x86-64-lkgs" run_list_test "x86-64-lkgs-inval" run_dump_test "x86-64-avx-vnni-int16" run_dump_test "x86-64-avx-vnni-int16-intel" +run_dump_test "x86-64-sha512" +run_dump_test "x86-64-sha512-intel" run_dump_test "x86-64-clzero" run_dump_test "x86-64-mwaitx-bdver4" run_list_test "x86-64-mwaitx-reg" diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 9311d832342..430238c3e4e 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -530,6 +530,7 @@ fetch_error (const instr_info *ins) #define Nq { OP_R, q_mode } #define Ux { OP_R, x_mode } #define Uxmm { OP_R, xmm_mode } +#define Uymm { OP_R, ymm_mode } #define Rtmm { OP_R, tmm_mode } #define EMCq { OP_EMC, q_mode } #define MXC { OP_MXC, 0 } @@ -895,6 +896,8 @@ enum MOD_0F38DC_PREFIX_1, MOD_VEX_0F3849_X86_64_L_0_W_0, + MOD_VEX_0F38CB_P_3_W_0_L_1, + MOD_VEX_0F38CC_P_3_W_0_L_1, }; enum @@ -1064,6 +1067,9 @@ enum PREFIX_VEX_0F38B1_W_0, PREFIX_VEX_0F38D2_W_0, PREFIX_VEX_0F38D3_W_0, + PREFIX_VEX_0F38CB, + PREFIX_VEX_0F38CC, + PREFIX_VEX_0F38CD, PREFIX_VEX_0F38F5_L_0, PREFIX_VEX_0F38F6_L_0, PREFIX_VEX_0F38F7_L_0, @@ -1306,6 +1312,9 @@ enum VEX_LEN_0F385C_X86_64, VEX_LEN_0F385E_X86_64, VEX_LEN_0F386C_X86_64, + VEX_LEN_0F38CB_P_3_W_0, + VEX_LEN_0F38CC_P_3_W_0, + VEX_LEN_0F38CD_P_3_W_0, VEX_LEN_0F38DB, VEX_LEN_0F38F2, VEX_LEN_0F38F3, @@ -1473,6 +1482,9 @@ enum VEX_W_0F38B1, VEX_W_0F38B4, VEX_W_0F38B5, + VEX_W_0F38CB_P_3, + VEX_W_0F38CC_P_3, + VEX_W_0F38CD_P_3, VEX_W_0F38CF, VEX_W_0F38D2, VEX_W_0F38D3, @@ -3928,6 +3940,30 @@ static const struct dis386 prefix_table[][4] = { { "vpdpwusds", { XM, Vex, EXx }, 0 }, }, + /* PREFIX_VEX_0F38CB */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F38CB_P_3) }, + }, + + /* PREFIX_VEX_0F38CC */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F38CC_P_3) }, + }, + + /* PREFIX_VEX_0F38CD */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F38CD_P_3) }, + }, + /* PREFIX_VEX_0F38F5_L_0 */ { { "bzhiS", { Gdq, Edq, VexGdq }, 0 }, @@ -6380,9 +6416,9 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_VEX_0F38CB) }, + { PREFIX_TABLE (PREFIX_VEX_0F38CC) }, + { PREFIX_TABLE (PREFIX_VEX_0F38CD) }, { Bad_Opcode }, { VEX_W_TABLE (VEX_W_0F38CF) }, /* d0 */ @@ -6944,6 +6980,24 @@ static const struct dis386 vex_len_table[][2] = { { VEX_W_TABLE (VEX_W_0F386C_X86_64_L_0) }, }, + /* VEX_LEN_0F38CB_P_3_W_0 */ + { + { Bad_Opcode }, + { MOD_TABLE (MOD_VEX_0F38CB_P_3_W_0_L_1) }, + }, + + /* VEX_LEN_0F38CC_P_3_W_0 */ + { + { Bad_Opcode }, + { MOD_TABLE (MOD_VEX_0F38CC_P_3_W_0_L_1) }, + }, + + /* VEX_LEN_0F38CD_P_3_W_0 */ + { + { Bad_Opcode }, + { "vsha512msg2", { XM, Uymm }, 0 }, + }, + /* VEX_LEN_0F38DB */ { { "vaesimc", { XM, EXx }, PREFIX_DATA }, @@ -7614,6 +7668,18 @@ static const struct dis386 vex_w_table[][2] = { { Bad_Opcode }, { "%XVvpmadd52huq", { XM, Vex, EXx }, PREFIX_DATA }, }, + { + /* VEX_W_0F38CB_P_3 */ + { VEX_LEN_TABLE (VEX_LEN_0F38CB_P_3_W_0) }, + }, + { + /* VEX_W_0F38CC_P_3 */ + { VEX_LEN_TABLE (VEX_LEN_0F38CC_P_3_W_0) }, + }, + { + /* VEX_W_0F38CD_P_3 */ + { VEX_LEN_TABLE (VEX_LEN_0F38CD_P_3_W_0) }, + }, { /* VEX_W_0F38CF */ { "%XEvgf2p8mulb", { XM, Vex, EXx }, PREFIX_DATA }, @@ -8055,6 +8121,16 @@ static const struct dis386 mod_table[][2] = { { PREFIX_TABLE (PREFIX_VEX_0F3849_X86_64_L_0_W_0_M_0) }, { PREFIX_TABLE (PREFIX_VEX_0F3849_X86_64_L_0_W_0_M_1) }, }, + { + /* MOD_VEX_0F38CB_P_3_W_0_L_1 */ + { Bad_Opcode }, + { "vsha512rnds2", { XM, Vex, EXxmm }, 0 }, + }, + { + /* MOD_VEX_0F38CC_P_3_W_0_L_1 */ + { Bad_Opcode }, + { "vsha512msg1", { XM, EXxmm }, 0 }, + }, #include "i386-dis-evex-mod.h" }; diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 9796977a2aa..8a163533eeb 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -168,6 +168,8 @@ static const dependency isa_dependencies[] = "LKGS" }, { "AVX_VNNI_INT16", "AVX2" }, + { "SHA512", + "AVX" }, { "AVX512F", "AVX2" }, { "AVX512CD", @@ -369,6 +371,7 @@ static bitfield cpu_flags[] = BITFIELD (FRED), BITFIELD (LKGS), BITFIELD (AVX_VNNI_INT16), + BITFIELD (SHA512), BITFIELD (MWAITX), BITFIELD (CLZERO), BITFIELD (OSPKE), diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 4a225202e64..224ca04661e 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -235,6 +235,8 @@ enum CpuLKGS, /* Intel AVX VNNI-INT16 Instructions support required. */ CpuAVX_VNNI_INT16, + /* Intel SHA512 Instructions support required. */ + CpuSHA512, /* mwaitx instruction required */ CpuMWAITX, /* Clzero instruction required */ @@ -433,6 +435,7 @@ typedef union i386_cpu_flags unsigned int cpufred:1; unsigned int cpulkgs:1; unsigned int cpuavx_vnni_int16:1; + unsigned int cpusha512:1; unsigned int cpumwaitx:1; unsigned int cpuclzero:1; unsigned int cpuospke:1; diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 4903d3b2361..18ea2f1500e 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -3375,3 +3375,11 @@ vpdpwsud, 0xf3d2, AVX_VNNI_INT16, Modrm|Vex|Space0F38|VexVVVV|VexW0|CheckOperand vpdpwsuds, 0xf3d3, AVX_VNNI_INT16, Modrm|Vex|Space0F38|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM } // AVX_VNNI_INT16 instructions end. + +// SHA512 instructions. + +vsha512rnds2, 0xf2cb, SHA512, Vex256|Space0F38|Modrm|VexVVVV|VexW0|NoSuf, { RegXMM, RegYMM, RegYMM } +vsha512msg1, 0xf2cc, SHA512, Vex256|Space0F38|Modrm|VexW0|NoSuf, { RegXMM, RegYMM } +vsha512msg2, 0xf2cd, SHA512, Vex256|Space0F38|Modrm|VexW0|NoSuf, { RegYMM, RegYMM } + +// SHA512 instructions end. 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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id f19-20020a056402151300b0051e2549c4a4si6247069edw.217.2023.07.12.23.34.27 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 23:34:28 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b="YvT/oaIZ"; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id F1C56385DC00 for ; Thu, 13 Jul 2023 06:33:31 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org F1C56385DC00 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1689230012; bh=nn9dk+mYSi3IAFuQfhUA5ykarBEXi3TRpwyUfKA8tKk=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=YvT/oaIZOrzahp/GoHtMbETANrEJm1uFdLYeeDxNAcoiG9xqVCnHXDBxaeSlXM3Nf 76ivGDf485ZgKPq0dvSEc/ibUvo4IyTyGGc5XwjXjAMLtToTGoXPPjjruaMTSIWRoT oVLXwR08cphZPR/YxQ9P+Zj9pnPdEKeY3zvbvz+w= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by sourceware.org (Postfix) with ESMTPS id 83566385697B for ; Thu, 13 Jul 2023 06:33:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 83566385697B X-IronPort-AV: E=McAfee;i="6600,9927,10769"; a="431253784" X-IronPort-AV: E=Sophos;i="6.01,201,1684825200"; d="scan'208";a="431253784" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2023 23:33:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10769"; a="791914381" X-IronPort-AV: E=Sophos;i="6.01,201,1684825200"; d="scan'208";a="791914381" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmsmga004.fm.intel.com with ESMTP; 12 Jul 2023 23:33:06 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 783F0100569D; Thu, 13 Jul 2023 14:33:05 +0800 (CST) To: binutils@sourceware.org Cc: jbeulich@suse.com, hjl.tools@gmail.com, amodra@gmail.com Subject: [PATCH 3/5] Support Intel SM3 Date: Thu, 13 Jul 2023 14:33:01 +0800 Message-Id: <20230713063303.205862-4-haochen.jiang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230713063303.205862-1-haochen.jiang@intel.com> References: <20230713063303.205862-1-haochen.jiang@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-9.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, LOTS_OF_MONEY, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Binutils From: "Jiang, Haochen" Reply-To: Haochen Jiang Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771286107573502689 X-GMAIL-MSGID: 1771286107573502689 gas/ChangeLog: * NEWS: Support Intel SM3. * config/tc-i386.c: Add sm3. * doc/c-i386.texi: Document .sm3 and nosm3. * testsuite/gas/i386/i386.exp: Run sm3 tests. * testsuite/gas/i386/x86-64.exp: Ditto. * testsuite/gas/i386/sm3-intel.d: New test. * testsuite/gas/i386/sm3.d: Ditto. * testsuite/gas/i386/sm3.s: Ditto. * testsuite/gas/i386/x86-64-sm3-intel.d: Ditto. * testsuite/gas/i386/x86-64-sm3.d: Ditto. * testsuite/gas/i386/x86-64-sm3.s: Ditto. opcodes/ChangeLog: * i386-dis.c (PREFIX_VEX_0F38DA_W_0_L_0): New. (VEX_LEN_0F38DA_W_0): Ditto. (VEX_LEN_0F3ADE_W_0): Ditto. (VEX_W_0F38DA): Ditto. (VEX_W_0F3ADE): Ditto. (prefix_table): Add PREFIX_VEX_0F38DA_W_0_L_0. (vex_len_table): Add VEX_LEN_0F38DA_W_0, VEX_LEN_0F3ADE_W_0. (vex_w_table): Add VEX_W_0F38DA, VEX_W_0F3ADE. * i386-gen.c (isa_dependencies): Add SM3. (cpu_flags): Ditto. * i386-init.h: Regenerated. * i386-mnem.h: Ditto. * i386-opc.h (CpuSM3): New. (i386_cpu_flags): Add cpusm3. * i386-opc.tbl: Add SM3 instructions. * i386-tbl.h: Regenerated. --- gas/NEWS | 2 + gas/config/tc-i386.c | 1 + gas/doc/c-i386.texi | 3 +- gas/testsuite/gas/i386/i386.exp | 2 + gas/testsuite/gas/i386/sm3-intel.d | 40 + gas/testsuite/gas/i386/sm3.d | 40 + gas/testsuite/gas/i386/sm3.s | 37 + gas/testsuite/gas/i386/x86-64-sm3-intel.d | 40 + gas/testsuite/gas/i386/x86-64-sm3.d | 40 + gas/testsuite/gas/i386/x86-64-sm3.s | 37 + gas/testsuite/gas/i386/x86-64.exp | 2 + opcodes/i386-dis.c | 34 +- opcodes/i386-gen.c | 3 + opcodes/i386-init.h | 652 +- opcodes/i386-mnem.h | 3953 +++++----- opcodes/i386-opc.h | 3 + opcodes/i386-opc.tbl | 7 + opcodes/i386-tbl.h | 8401 +++++++++++---------- 18 files changed, 6832 insertions(+), 6465 deletions(-) create mode 100644 gas/testsuite/gas/i386/sm3-intel.d create mode 100644 gas/testsuite/gas/i386/sm3.d create mode 100644 gas/testsuite/gas/i386/sm3.s create mode 100644 gas/testsuite/gas/i386/x86-64-sm3-intel.d create mode 100644 gas/testsuite/gas/i386/x86-64-sm3.d create mode 100644 gas/testsuite/gas/i386/x86-64-sm3.s diff --git a/gas/NEWS b/gas/NEWS index fe2c055fa7f..42bda657f21 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -1,5 +1,7 @@ -*- text -*- +* Add support for Intel SM3 instructions. + * Add support for Intel SHA512 instructions. * Add support for Intel AVX-VNNI-INT16 instructions. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 836640d9123..7424fa41c44 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1153,6 +1153,7 @@ static const arch_entry cpu_arch[] = SUBARCH (lkgs, LKGS, ANY_LKGS, false), SUBARCH (avx_vnni_int16, AVX_VNNI_INT16, ANY_AVX_VNNI_INT16, false), SUBARCH (sha512, SHA512, ANY_SHA512, false), + SUBARCH (sm3, SM3, ANY_SM3, false), }; #undef SUBARCH diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 21fb71e54ab..6ef1da21370 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -209,6 +209,7 @@ accept various extension mnemonics. For example, @code{lkgs}, @code{avx_vnni_int16}, @code{sha512}, +@code{sm3}, @code{amx_int8}, @code{amx_bf16}, @code{amx_fp16}, @@ -1638,7 +1639,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.prefetchi} @tab @samp{.avx_ifma} @tab @samp{.avx_vnni_int8} @item @samp{.cmpccxadd} @tab @samp{.wrmsrns} @tab @samp{.msrlist} @item @samp{.avx_ne_convert} @tab @samp{.rao_int} @tab @samp{.fred} @tab @samp{.lkgs} -@item @samp{.avx_vnni_int16} @tab @samp{.sha512} +@item @samp{.avx_vnni_int16} @tab @samp{.sha512} @tab @samp{.sm3} @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote} @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq} @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk} diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 487811ad988..87ddd71be14 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -500,6 +500,8 @@ if [gas_32_check] then { run_dump_test "avx-vnni-int16-intel" run_dump_test "sha512" run_dump_test "sha512-intel" + run_dump_test "sm3" + run_dump_test "sm3-intel" run_list_test "sg" run_dump_test "clzero" run_dump_test "invlpgb" diff --git a/gas/testsuite/gas/i386/sm3-intel.d b/gas/testsuite/gas/i386/sm3-intel.d new file mode 100644 index 00000000000..4ab4ce2ddb4 --- /dev/null +++ b/gas/testsuite/gas/i386/sm3-intel.d @@ -0,0 +1,40 @@ +#as: +#objdump: -dw -Mintel +#name: i386 SM3 insns (Intel disassembly) +#source: sm3.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 50 da f4\s+vsm3msg1 xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 50 da b4 f4 00 00 00 10\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 50 da 31\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 50 da b1 f0 07 00 00\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 50 da b2 00 f8 ff ff\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 51 da f4\s+vsm3msg2 xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 51 da b4 f4 00 00 00 10\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 51 da 31\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 51 da b1 f0 07 00 00\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 51 da b2 00 f8 ff ff\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e3 51 de f4 7b\s+vsm3rnds2 xmm6,xmm5,xmm4,0x7b +\s*[a-f0-9]+:\s*c4 e3 51 de b4 f4 00 00 00 10 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*c4 e3 51 de 31 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[ecx\],0x7b +\s*[a-f0-9]+:\s*c4 e3 51 de b1 f0 07 00 00 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\],0x7b +\s*[a-f0-9]+:\s*c4 e3 51 de b2 00 f8 ff ff 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[edx-0x800\],0x7b +\s*[a-f0-9]+:\s*c4 e2 50 da f4\s+vsm3msg1 xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 50 da b4 f4 00 00 00 10\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 50 da 31\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 50 da b1 f0 07 00 00\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 50 da b2 00 f8 ff ff\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 51 da f4\s+vsm3msg2 xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 51 da b4 f4 00 00 00 10\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 51 da 31\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 51 da b1 f0 07 00 00\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 51 da b2 00 f8 ff ff\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e3 51 de f4 7b\s+vsm3rnds2 xmm6,xmm5,xmm4,0x7b +\s*[a-f0-9]+:\s*c4 e3 51 de b4 f4 00 00 00 10 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*c4 e3 51 de 31 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[ecx\],0x7b +\s*[a-f0-9]+:\s*c4 e3 51 de b1 f0 07 00 00 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\],0x7b +\s*[a-f0-9]+:\s*c4 e3 51 de b2 00 f8 ff ff 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[edx-0x800\],0x7b diff --git a/gas/testsuite/gas/i386/sm3.d b/gas/testsuite/gas/i386/sm3.d new file mode 100644 index 00000000000..7507a8b4c7f --- /dev/null +++ b/gas/testsuite/gas/i386/sm3.d @@ -0,0 +1,40 @@ +#as: +#objdump: -dw +#name: i386 SM3 insns +#source: sm3.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 50 da f4\s+vsm3msg1 %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 da b4 f4 00 00 00 10\s+vsm3msg1 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 da 31\s+vsm3msg1 \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 da b1 f0 07 00 00\s+vsm3msg1 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 da b2 00 f8 ff ff\s+vsm3msg1 -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 da f4\s+vsm3msg2 %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 da b4 f4 00 00 00 10\s+vsm3msg2 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 da 31\s+vsm3msg2 \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 da b1 f0 07 00 00\s+vsm3msg2 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 da b2 00 f8 ff ff\s+vsm3msg2 -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e3 51 de f4 7b\s+vsm3rnds2 \$0x7b,%xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e3 51 de b4 f4 00 00 00 10 7b\s+vsm3rnds2 \$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e3 51 de 31 7b\s+vsm3rnds2 \$0x7b,\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e3 51 de b1 f0 07 00 00 7b\s+vsm3rnds2 \$0x7b,0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e3 51 de b2 00 f8 ff ff 7b\s+vsm3rnds2 \$0x7b,-0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 da f4\s+vsm3msg1 %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 da b4 f4 00 00 00 10\s+vsm3msg1 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 da 31\s+vsm3msg1 \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 da b1 f0 07 00 00\s+vsm3msg1 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 da b2 00 f8 ff ff\s+vsm3msg1 -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 da f4\s+vsm3msg2 %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 da b4 f4 00 00 00 10\s+vsm3msg2 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 da 31\s+vsm3msg2 \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 da b1 f0 07 00 00\s+vsm3msg2 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 da b2 00 f8 ff ff\s+vsm3msg2 -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e3 51 de f4 7b\s+vsm3rnds2 \$0x7b,%xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e3 51 de b4 f4 00 00 00 10 7b\s+vsm3rnds2 \$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e3 51 de 31 7b\s+vsm3rnds2 \$0x7b,\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e3 51 de b1 f0 07 00 00 7b\s+vsm3rnds2 \$0x7b,0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e3 51 de b2 00 f8 ff ff 7b\s+vsm3rnds2 \$0x7b,-0x800\(%edx\),%xmm5,%xmm6 diff --git a/gas/testsuite/gas/i386/sm3.s b/gas/testsuite/gas/i386/sm3.s new file mode 100644 index 00000000000..d1bc967a6f3 --- /dev/null +++ b/gas/testsuite/gas/i386/sm3.s @@ -0,0 +1,37 @@ +# Check 32bit SM3 instructions + + .allow_index_reg + .text +_start: + vsm3msg1 %xmm4, %xmm5, %xmm6 #SM3 + vsm3msg1 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 #SM3 + vsm3msg1 (%ecx), %xmm5, %xmm6 #SM3 + vsm3msg1 2032(%ecx), %xmm5, %xmm6 #SM3 Disp32(f0070000) + vsm3msg1 -2048(%edx), %xmm5, %xmm6 #SM3 Disp32(00f8ffff) + vsm3msg2 %xmm4, %xmm5, %xmm6 #SM3 + vsm3msg2 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 #SM3 + vsm3msg2 (%ecx), %xmm5, %xmm6 #SM3 + vsm3msg2 2032(%ecx), %xmm5, %xmm6 #SM3 Disp32(f0070000) + vsm3msg2 -2048(%edx), %xmm5, %xmm6 #SM3 Disp32(00f8ffff) + vsm3rnds2 $123, %xmm4, %xmm5, %xmm6 #SM3 + vsm3rnds2 $123, 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 #SM3 + vsm3rnds2 $123, (%ecx), %xmm5, %xmm6 #SM3 + vsm3rnds2 $123, 2032(%ecx), %xmm5, %xmm6 #SM3 Disp32(f0070000) + vsm3rnds2 $123, -2048(%edx), %xmm5, %xmm6 #SM3 Disp32(00f8ffff) + +.intel_syntax noprefix + vsm3msg1 xmm6, xmm5, xmm4 #SM3 + vsm3msg1 xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000] #SM3 + vsm3msg1 xmm6, xmm5, XMMWORD PTR [ecx] #SM3 + vsm3msg1 xmm6, xmm5, XMMWORD PTR [ecx+2032] #SM3 Disp32(f0070000) + vsm3msg1 xmm6, xmm5, XMMWORD PTR [edx-2048] #SM3 Disp32(00f8ffff) + vsm3msg2 xmm6, xmm5, xmm4 #SM3 + vsm3msg2 xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000] #SM3 + vsm3msg2 xmm6, xmm5, XMMWORD PTR [ecx] #SM3 + vsm3msg2 xmm6, xmm5, XMMWORD PTR [ecx+2032] #SM3 Disp32(f0070000) + vsm3msg2 xmm6, xmm5, XMMWORD PTR [edx-2048] #SM3 Disp32(00f8ffff) + vsm3rnds2 xmm6, xmm5, xmm4, 123 #SM3 + vsm3rnds2 xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000], 123 #SM3 + vsm3rnds2 xmm6, xmm5, XMMWORD PTR [ecx], 123 #SM3 + vsm3rnds2 xmm6, xmm5, XMMWORD PTR [ecx+2032], 123 #SM3 Disp32(f0070000) + vsm3rnds2 xmm6, xmm5, XMMWORD PTR [edx-2048], 123 #SM3 Disp32(00f8ffff) diff --git a/gas/testsuite/gas/i386/x86-64-sm3-intel.d b/gas/testsuite/gas/i386/x86-64-sm3-intel.d new file mode 100644 index 00000000000..5b533681029 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-sm3-intel.d @@ -0,0 +1,40 @@ +#as: +#objdump: -dw -Mintel +#name: x86_64 SM3 insns (Intel disassembly) +#source: x86-64-sm3.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 50 da f4\s+vsm3msg1 xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 50 da b4 f5 00 00 00 10\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 50 da 31\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 50 da b1 f0 07 00 00\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 50 da b2 00 f8 ff ff\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 51 da f4\s+vsm3msg2 xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 51 da b4 f5 00 00 00 10\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 51 da 31\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 51 da b1 f0 07 00 00\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 51 da b2 00 f8 ff ff\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e3 51 de f4 7b\s+vsm3rnds2 xmm6,xmm5,xmm4,0x7b +\s*[a-f0-9]+:\s*c4 a3 51 de b4 f5 00 00 00 10 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*c4 c3 51 de 31 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[r9\],0x7b +\s*[a-f0-9]+:\s*c4 e3 51 de b1 f0 07 00 00 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\],0x7b +\s*[a-f0-9]+:\s*c4 e3 51 de b2 00 f8 ff ff 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[rdx-0x800\],0x7b +\s*[a-f0-9]+:\s*c4 e2 50 da f4\s+vsm3msg1 xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 50 da b4 f5 00 00 00 10\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 50 da 31\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 50 da b1 f0 07 00 00\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 50 da b2 00 f8 ff ff\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 51 da f4\s+vsm3msg2 xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 51 da b4 f5 00 00 00 10\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 51 da 31\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 51 da b1 f0 07 00 00\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 51 da b2 00 f8 ff ff\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e3 51 de f4 7b\s+vsm3rnds2 xmm6,xmm5,xmm4,0x7b +\s*[a-f0-9]+:\s*c4 a3 51 de b4 f5 00 00 00 10 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*c4 c3 51 de 31 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[r9\],0x7b +\s*[a-f0-9]+:\s*c4 e3 51 de b1 f0 07 00 00 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\],0x7b +\s*[a-f0-9]+:\s*c4 e3 51 de b2 00 f8 ff ff 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[rdx-0x800\],0x7b diff --git a/gas/testsuite/gas/i386/x86-64-sm3.d b/gas/testsuite/gas/i386/x86-64-sm3.d new file mode 100644 index 00000000000..8f417de4f7f --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-sm3.d @@ -0,0 +1,40 @@ +#as: +#objdump: -dw +#name: x86_64 SM3 insns +#source: x86-64-sm3.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 50 da f4\s+vsm3msg1 %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 50 da b4 f5 00 00 00 10\s+vsm3msg1 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 50 da 31\s+vsm3msg1 \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 da b1 f0 07 00 00\s+vsm3msg1 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 da b2 00 f8 ff ff\s+vsm3msg1 -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 da f4\s+vsm3msg2 %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 51 da b4 f5 00 00 00 10\s+vsm3msg2 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 51 da 31\s+vsm3msg2 \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 da b1 f0 07 00 00\s+vsm3msg2 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 da b2 00 f8 ff ff\s+vsm3msg2 -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e3 51 de f4 7b\s+vsm3rnds2 \$0x7b,%xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a3 51 de b4 f5 00 00 00 10 7b\s+vsm3rnds2 \$0x7b,0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c3 51 de 31 7b\s+vsm3rnds2 \$0x7b,\(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e3 51 de b1 f0 07 00 00 7b\s+vsm3rnds2 \$0x7b,0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e3 51 de b2 00 f8 ff ff 7b\s+vsm3rnds2 \$0x7b,-0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 da f4\s+vsm3msg1 %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 50 da b4 f5 00 00 00 10\s+vsm3msg1 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 50 da 31\s+vsm3msg1 \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 da b1 f0 07 00 00\s+vsm3msg1 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 50 da b2 00 f8 ff ff\s+vsm3msg1 -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 da f4\s+vsm3msg2 %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 51 da b4 f5 00 00 00 10\s+vsm3msg2 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 51 da 31\s+vsm3msg2 \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 da b1 f0 07 00 00\s+vsm3msg2 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 51 da b2 00 f8 ff ff\s+vsm3msg2 -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e3 51 de f4 7b\s+vsm3rnds2 \$0x7b,%xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a3 51 de b4 f5 00 00 00 10 7b\s+vsm3rnds2 \$0x7b,0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c3 51 de 31 7b\s+vsm3rnds2 \$0x7b,\(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e3 51 de b1 f0 07 00 00 7b\s+vsm3rnds2 \$0x7b,0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e3 51 de b2 00 f8 ff ff 7b\s+vsm3rnds2 \$0x7b,-0x800\(%rdx\),%xmm5,%xmm6 diff --git a/gas/testsuite/gas/i386/x86-64-sm3.s b/gas/testsuite/gas/i386/x86-64-sm3.s new file mode 100644 index 00000000000..fa80b4b15a8 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-sm3.s @@ -0,0 +1,37 @@ +# Check 64bit SM3 instructions + + .allow_index_reg + .text +_start: + vsm3msg1 %xmm4, %xmm5, %xmm6 #SM3 + vsm3msg1 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6 #SM3 + vsm3msg1 (%r9), %xmm5, %xmm6 #SM3 + vsm3msg1 2032(%rcx), %xmm5, %xmm6 #SM3 Disp32(f0070000) + vsm3msg1 -2048(%rdx), %xmm5, %xmm6 #SM3 Disp32(00f8ffff) + vsm3msg2 %xmm4, %xmm5, %xmm6 #SM3 + vsm3msg2 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6 #SM3 + vsm3msg2 (%r9), %xmm5, %xmm6 #SM3 + vsm3msg2 2032(%rcx), %xmm5, %xmm6 #SM3 Disp32(f0070000) + vsm3msg2 -2048(%rdx), %xmm5, %xmm6 #SM3 Disp32(00f8ffff) + vsm3rnds2 $123, %xmm4, %xmm5, %xmm6 #SM3 + vsm3rnds2 $123, 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6 #SM3 + vsm3rnds2 $123, (%r9), %xmm5, %xmm6 #SM3 + vsm3rnds2 $123, 2032(%rcx), %xmm5, %xmm6 #SM3 Disp32(f0070000) + vsm3rnds2 $123, -2048(%rdx), %xmm5, %xmm6 #SM3 Disp32(00f8ffff) + +.intel_syntax noprefix + vsm3msg1 xmm6, xmm5, xmm4 #SM3 + vsm3msg1 xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000] #SM3 + vsm3msg1 xmm6, xmm5, XMMWORD PTR [r9] #SM3 + vsm3msg1 xmm6, xmm5, XMMWORD PTR [rcx+2032] #SM3 Disp32(f0070000) + vsm3msg1 xmm6, xmm5, XMMWORD PTR [rdx-2048] #SM3 Disp32(00f8ffff) + vsm3msg2 xmm6, xmm5, xmm4 #SM3 + vsm3msg2 xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000] #SM3 + vsm3msg2 xmm6, xmm5, XMMWORD PTR [r9] #SM3 + vsm3msg2 xmm6, xmm5, XMMWORD PTR [rcx+2032] #SM3 Disp32(f0070000) + vsm3msg2 xmm6, xmm5, XMMWORD PTR [rdx-2048] #SM3 Disp32(00f8ffff) + vsm3rnds2 xmm6, xmm5, xmm4, 123 #SM3 + vsm3rnds2 xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000], 123 #SM3 + vsm3rnds2 xmm6, xmm5, XMMWORD PTR [r9], 123 #SM3 + vsm3rnds2 xmm6, xmm5, XMMWORD PTR [rcx+2032], 123 #SM3 Disp32(f0070000) + vsm3rnds2 xmm6, xmm5, XMMWORD PTR [rdx-2048], 123 #SM3 Disp32(00f8ffff) diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp index 64d8c3726d4..5717443d2f6 100644 --- a/gas/testsuite/gas/i386/x86-64.exp +++ b/gas/testsuite/gas/i386/x86-64.exp @@ -442,6 +442,8 @@ run_dump_test "x86-64-avx-vnni-int16" run_dump_test "x86-64-avx-vnni-int16-intel" run_dump_test "x86-64-sha512" run_dump_test "x86-64-sha512-intel" +run_dump_test "x86-64-sm3" +run_dump_test "x86-64-sm3-intel" run_dump_test "x86-64-clzero" run_dump_test "x86-64-mwaitx-bdver4" run_list_test "x86-64-mwaitx-reg" diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 430238c3e4e..da9568acdd5 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -1070,6 +1070,7 @@ enum PREFIX_VEX_0F38CB, PREFIX_VEX_0F38CC, PREFIX_VEX_0F38CD, + PREFIX_VEX_0F38DA_W_0_L_0, PREFIX_VEX_0F38F5_L_0, PREFIX_VEX_0F38F6_L_0, PREFIX_VEX_0F38F7_L_0, @@ -1315,6 +1316,7 @@ enum VEX_LEN_0F38CB_P_3_W_0, VEX_LEN_0F38CC_P_3_W_0, VEX_LEN_0F38CD_P_3_W_0, + VEX_LEN_0F38DA_W_0, VEX_LEN_0F38DB, VEX_LEN_0F38F2, VEX_LEN_0F38F3, @@ -1345,6 +1347,7 @@ enum VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, + VEX_LEN_0F3ADE_W_0, VEX_LEN_0F3ADF, VEX_LEN_0F3AF0, VEX_LEN_XOP_08_85, @@ -1488,6 +1491,7 @@ enum VEX_W_0F38CF, VEX_W_0F38D2, VEX_W_0F38D3, + VEX_W_0F38DA, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1, VEX_W_0F3A02, @@ -1505,6 +1509,7 @@ enum VEX_W_0F3A4C, VEX_W_0F3ACE, VEX_W_0F3ACF, + VEX_W_0F3ADE, VEX_W_XOP_08_85_L_0, VEX_W_XOP_08_86_L_0, @@ -3964,6 +3969,13 @@ static const struct dis386 prefix_table[][4] = { { VEX_W_TABLE (VEX_W_0F38CD_P_3) }, }, + /* PREFIX_VEX_0F38DA_W_0_L_0 */ + { + { "vsm3msg1", { XM, Vex, EXxmm }, 0 }, + { Bad_Opcode }, + { "vsm3msg2", { XM, Vex, EXxmm }, 0 }, + }, + /* PREFIX_VEX_0F38F5_L_0 */ { { "bzhiS", { Gdq, Edq, VexGdq }, 0 }, @@ -6433,7 +6445,7 @@ static const struct dis386 vex_table[][256] = { /* d8 */ { Bad_Opcode }, { Bad_Opcode }, - { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F38DA) }, { VEX_LEN_TABLE (VEX_LEN_0F38DB) }, { "vaesenc", { XM, Vex, EXx }, PREFIX_DATA }, { "vaesenclast", { XM, Vex, EXx }, PREFIX_DATA }, @@ -6728,7 +6740,7 @@ static const struct dis386 vex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F3ADE) }, { VEX_LEN_TABLE (VEX_LEN_0F3ADF) }, /* e0 */ { Bad_Opcode }, @@ -6998,6 +7010,11 @@ static const struct dis386 vex_len_table[][2] = { { "vsha512msg2", { XM, Uymm }, 0 }, }, + /* VEX_LEN_0F38DA_W_0 */ + { + { PREFIX_TABLE (PREFIX_VEX_0F38DA_W_0_L_0) }, + }, + /* VEX_LEN_0F38DB */ { { "vaesimc", { XM, EXx }, PREFIX_DATA }, @@ -7156,6 +7173,11 @@ static const struct dis386 vex_len_table[][2] = { { "vpcmpistri", { XM, EXx, Ib }, PREFIX_DATA }, }, + /* VEX_LEN_0F3ADE_W_0 */ + { + { "vsm3rnds2", { XM, Vex, EXxmm, Ib }, PREFIX_DATA }, + }, + /* VEX_LEN_0F3ADF */ { { "vaeskeygenassist", { XM, EXx, Ib }, PREFIX_DATA }, @@ -7692,6 +7714,10 @@ static const struct dis386 vex_w_table[][2] = { /* VEX_W_0F38D3 */ { PREFIX_TABLE (PREFIX_VEX_0F38D3_W_0) }, }, + { + /* VEX_W_0F38DA */ + { VEX_LEN_TABLE (VEX_LEN_0F38DA_W_0) }, + }, { /* VEX_W_0F3A00_L_1 */ { Bad_Opcode }, @@ -7764,6 +7790,10 @@ static const struct dis386 vex_w_table[][2] = { { Bad_Opcode }, { "%XEvgf2p8affineinvqb", { XM, Vex, EXx, Ib }, PREFIX_DATA }, }, + { + /* VEX_W_0F3ADE */ + { VEX_LEN_TABLE (VEX_LEN_0F3ADE_W_0) }, + }, /* VEX_W_XOP_08_85_L_0 */ { { "vpmacssww", { XM, Vex, EXx, XMVexI4 }, 0 }, diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 8a163533eeb..a5743cd5ee5 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -170,6 +170,8 @@ static const dependency isa_dependencies[] = "AVX2" }, { "SHA512", "AVX" }, + { "SM3", + "AVX" }, { "AVX512F", "AVX2" }, { "AVX512CD", @@ -372,6 +374,7 @@ static bitfield cpu_flags[] = BITFIELD (LKGS), BITFIELD (AVX_VNNI_INT16), BITFIELD (SHA512), + BITFIELD (SM3), BITFIELD (MWAITX), BITFIELD (CLZERO), BITFIELD (OSPKE), diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 224ca04661e..42d69167c8a 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -237,6 +237,8 @@ enum CpuAVX_VNNI_INT16, /* Intel SHA512 Instructions support required. */ CpuSHA512, + /* Intel SM3 Instructions support required. */ + CpuSM3, /* mwaitx instruction required */ CpuMWAITX, /* Clzero instruction required */ @@ -436,6 +438,7 @@ typedef union i386_cpu_flags unsigned int cpulkgs:1; unsigned int cpuavx_vnni_int16:1; unsigned int cpusha512:1; + unsigned int cpusm3:1; unsigned int cpumwaitx:1; unsigned int cpuclzero:1; unsigned int cpuospke:1; diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 18ea2f1500e..630337b108b 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -3383,3 +3383,10 @@ vsha512msg1, 0xf2cc, SHA512, Vex256|Space0F38|Modrm|VexW0|NoSuf, { RegXMM, RegYM vsha512msg2, 0xf2cd, SHA512, Vex256|Space0F38|Modrm|VexW0|NoSuf, { RegYMM, RegYMM } // SHA512 instructions end. + +// SM3 instructions. +vsm3rnds2, 0x66de, SM3, Modrm|Space0F3A|Vex128|VexVVVV|VexW0|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM, RegXMM } +vsm3msg1, 0xda, SM3, Modrm|Space0F38|Vex128|VexVVVV|VexW0|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM, RegXMM } +vsm3msg2, 0x66da, SM3, Modrm|Space0F38|Vex128|VexVVVV|VexW0|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM, RegXMM } + +// SM3 instructions end. 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[8.43.85.97]) by mx.google.com with ESMTPS id xo26-20020a170907bb9a00b0099280a7eeeasi7348518ejc.526.2023.07.12.23.37.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 23:37:50 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=RMcHCDkV; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3A97F3870882 for ; Thu, 13 Jul 2023 06:34:39 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 3A97F3870882 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1689230079; bh=OP/MZ5e8y51kemie6K3cryg6XZ/RkDKSsH+SMwGWuCU=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=RMcHCDkVeE785LtMKp8mZI806zC4IXaBUsRLle3c86yDMj6+ob+0y2kvD/ERI7HLr LZZzrlZFEnoTiuWBUU34mcvIi1PFC4ZFY+ERE73bP6N+sH50rnr3Rl7E0+SmhjATC/ 9hl/aLB4v1JbXJGtxRSmvoo/ZZslNF3UN10dIk38= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by sourceware.org (Postfix) with ESMTPS id AC889385C017 for ; Thu, 13 Jul 2023 06:33:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org AC889385C017 X-IronPort-AV: E=McAfee;i="6600,9927,10769"; a="431253792" X-IronPort-AV: E=Sophos;i="6.01,201,1684825200"; d="scan'208";a="431253792" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2023 23:33:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10769"; a="791914385" X-IronPort-AV: E=Sophos;i="6.01,201,1684825200"; d="scan'208";a="791914385" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmsmga004.fm.intel.com with ESMTP; 12 Jul 2023 23:33:06 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 7CC911005052; Thu, 13 Jul 2023 14:33:05 +0800 (CST) To: binutils@sourceware.org Cc: jbeulich@suse.com, hjl.tools@gmail.com, amodra@gmail.com Subject: [PATCH 4/5] Support Intel SM4 Date: Thu, 13 Jul 2023 14:33:02 +0800 Message-Id: <20230713063303.205862-5-haochen.jiang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230713063303.205862-1-haochen.jiang@intel.com> References: <20230713063303.205862-1-haochen.jiang@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-10.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Binutils From: "Jiang, Haochen" Reply-To: Haochen Jiang Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771286320019424994 X-GMAIL-MSGID: 1771286320019424994 gas/ChangeLog: * NEWS: Support Intel SM4. * config/tc-i386.c: Add sm4. * doc/c-i386.texi: Document .sm4. * testsuite/gas/i386/i386.exp: Run SM4 tests. * testsuite/gas/i386/x86-64.exp: Ditto. * testsuite/gas/i386/sm4-intel.d: Add SM4 tests. * testsuite/gas/i386/sm4.d: Ditto. * testsuite/gas/i386/sm4.s: Ditto. * testsuite/gas/i386/x86-64-sm4-intel.d: Ditto. * testsuite/gas/i386/x86-64-sm4.d: Ditto. * testsuite/gas/i386/x86-64-sm4.s: Ditto. opcodes/ChangeLog: * i386-dis.c (PREFIX_VEX_0F38DA_W_0_L_0): Remove. (VEX_LEN_0F38DA_W_0): Ditto. (PREFIX_VEX_0F38DA_W_0): New. (VEX_LEN_0F38DA_W_0_P_0): Ditto. (VEX_LEN_0F38DA_W_0_P_2): Ditto. (prefix_table): Change from PREFIX_VEX_0F38DA_W_0_L_0 to PREFIX_VEX_0F38DA_W_0. Add SM4 instruction table entry and adjust SM3 table entry. (vex_len_table): Remove VEX_LEN_0F38DA_W_0. Add VEX_LEN_0F38DA_W_0_P_0, VEX_LEN_0F38DA_W_0_P_2. (vex_w_table): Adjust table entry from vex_len_table to prefix_table. * i386-gen.c (isa_dependencies): Add SM4. (cpu_flags): Ditto. * i386-init.h: Regenerated. * i386-mnem.h: Ditto. * i386-opc.h (CpuSM4): New. (i386_cpu_flags): Add cpusm4. * i386-opc.tbl: Add SM4 instructions. * i386-tbl.h: Regenerated. --- gas/NEWS | 2 + gas/config/tc-i386.c | 1 + gas/doc/c-i386.texi | 3 +- gas/testsuite/gas/i386/i386.exp | 2 + gas/testsuite/gas/i386/sm4-intel.d | 50 + gas/testsuite/gas/i386/sm4.d | 50 + gas/testsuite/gas/i386/sm4.s | 47 + gas/testsuite/gas/i386/x86-64-sm4-intel.d | 50 + gas/testsuite/gas/i386/x86-64-sm4.d | 50 + gas/testsuite/gas/i386/x86-64-sm4.s | 47 + gas/testsuite/gas/i386/x86-64.exp | 2 + opcodes/i386-dis.c | 25 +- opcodes/i386-gen.c | 3 + opcodes/i386-init.h | 660 +- opcodes/i386-mnem.h | 3854 +++++----- opcodes/i386-opc.h | 3 + opcodes/i386-opc.tbl | 7 + opcodes/i386-tbl.h | 7972 +++++++++++---------- 18 files changed, 6605 insertions(+), 6223 deletions(-) create mode 100644 gas/testsuite/gas/i386/sm4-intel.d create mode 100644 gas/testsuite/gas/i386/sm4.d create mode 100644 gas/testsuite/gas/i386/sm4.s create mode 100644 gas/testsuite/gas/i386/x86-64-sm4-intel.d create mode 100644 gas/testsuite/gas/i386/x86-64-sm4.d create mode 100644 gas/testsuite/gas/i386/x86-64-sm4.s diff --git a/gas/NEWS b/gas/NEWS index 42bda657f21..26e75bde391 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -1,5 +1,7 @@ -*- text -*- +* Add support for Intel SM4 instructions. + * Add support for Intel SM3 instructions. * Add support for Intel SHA512 instructions. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 7424fa41c44..686dd4c70f4 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1154,6 +1154,7 @@ static const arch_entry cpu_arch[] = SUBARCH (avx_vnni_int16, AVX_VNNI_INT16, ANY_AVX_VNNI_INT16, false), SUBARCH (sha512, SHA512, ANY_SHA512, false), SUBARCH (sm3, SM3, ANY_SM3, false), + SUBARCH (sm4, SM4, ANY_SM4, false), }; #undef SUBARCH diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 6ef1da21370..54b0d7d738c 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -210,6 +210,7 @@ accept various extension mnemonics. For example, @code{avx_vnni_int16}, @code{sha512}, @code{sm3}, +@code{sm4}, @code{amx_int8}, @code{amx_bf16}, @code{amx_fp16}, @@ -1639,7 +1640,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.prefetchi} @tab @samp{.avx_ifma} @tab @samp{.avx_vnni_int8} @item @samp{.cmpccxadd} @tab @samp{.wrmsrns} @tab @samp{.msrlist} @item @samp{.avx_ne_convert} @tab @samp{.rao_int} @tab @samp{.fred} @tab @samp{.lkgs} -@item @samp{.avx_vnni_int16} @tab @samp{.sha512} @tab @samp{.sm3} +@item @samp{.avx_vnni_int16} @tab @samp{.sha512} @tab @samp{.sm3} @tab @samp{.sm4} @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote} @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq} @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk} diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 87ddd71be14..5e575660d7c 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -502,6 +502,8 @@ if [gas_32_check] then { run_dump_test "sha512-intel" run_dump_test "sm3" run_dump_test "sm3-intel" + run_dump_test "sm4" + run_dump_test "sm4-intel" run_list_test "sg" run_dump_test "clzero" run_dump_test "invlpgb" diff --git a/gas/testsuite/gas/i386/sm4-intel.d b/gas/testsuite/gas/i386/sm4-intel.d new file mode 100644 index 00000000000..03ccdb4a67b --- /dev/null +++ b/gas/testsuite/gas/i386/sm4-intel.d @@ -0,0 +1,50 @@ +#as: +#objdump: -dw -Mintel +#name: i386 SM4 insns (Intel disassembly) +#source: sm4.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 56 da f4\s+vsm4key4 ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 52 da f4\s+vsm4key4 xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 56 da b4 f4 00 00 00 10\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 56 da 31\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 56 da b1 e0 0f 00 00\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 56 da b2 00 f0 ff ff\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 52 da b4 f4 00 00 00 10\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 52 da 31\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 52 da b1 f0 07 00 00\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 52 da b2 00 f8 ff ff\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 57 da f4\s+vsm4rnds4 ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 53 da f4\s+vsm4rnds4 xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 57 da b4 f4 00 00 00 10\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 57 da 31\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 57 da b1 e0 0f 00 00\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 57 da b2 00 f0 ff ff\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 53 da b4 f4 00 00 00 10\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 53 da 31\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 53 da b1 f0 07 00 00\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 53 da b2 00 f8 ff ff\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 56 da f4\s+vsm4key4 ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 52 da f4\s+vsm4key4 xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 56 da b4 f4 00 00 00 10\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 56 da 31\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 56 da b1 e0 0f 00 00\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 56 da b2 00 f0 ff ff\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 52 da b4 f4 00 00 00 10\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 52 da 31\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 52 da b1 f0 07 00 00\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 52 da b2 00 f8 ff ff\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[edx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 57 da f4\s+vsm4rnds4 ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 53 da f4\s+vsm4rnds4 xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 e2 57 da b4 f4 00 00 00 10\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 57 da 31\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 57 da b1 e0 0f 00 00\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 57 da b2 00 f0 ff ff\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[edx-0x1000\] +\s*[a-f0-9]+:\s*c4 e2 53 da b4 f4 00 00 00 10\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 e2 53 da 31\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*c4 e2 53 da b1 f0 07 00 00\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 53 da b2 00 f8 ff ff\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[edx-0x800\] diff --git a/gas/testsuite/gas/i386/sm4.d b/gas/testsuite/gas/i386/sm4.d new file mode 100644 index 00000000000..48dcda66271 --- /dev/null +++ b/gas/testsuite/gas/i386/sm4.d @@ -0,0 +1,50 @@ +#as: +#objdump: -dw +#name: i386 SM4 insns +#source: sm4.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 56 da f4\s+vsm4key4 %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 da f4\s+vsm4key4 %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 56 da b4 f4 00 00 00 10\s+vsm4key4 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 da 31\s+vsm4key4 \(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 da b1 e0 0f 00 00\s+vsm4key4 0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 da b2 00 f0 ff ff\s+vsm4key4 -0x1000\(%edx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 da b4 f4 00 00 00 10\s+vsm4key4 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 da 31\s+vsm4key4 \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 da b1 f0 07 00 00\s+vsm4key4 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 da b2 00 f8 ff ff\s+vsm4key4 -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 57 da f4\s+vsm4rnds4 %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 53 da f4\s+vsm4rnds4 %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 57 da b4 f4 00 00 00 10\s+vsm4rnds4 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 57 da 31\s+vsm4rnds4 \(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 57 da b1 e0 0f 00 00\s+vsm4rnds4 0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 57 da b2 00 f0 ff ff\s+vsm4rnds4 -0x1000\(%edx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 53 da b4 f4 00 00 00 10\s+vsm4rnds4 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 53 da 31\s+vsm4rnds4 \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 53 da b1 f0 07 00 00\s+vsm4rnds4 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 53 da b2 00 f8 ff ff\s+vsm4rnds4 -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 56 da f4\s+vsm4key4 %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 da f4\s+vsm4key4 %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 56 da b4 f4 00 00 00 10\s+vsm4key4 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 da 31\s+vsm4key4 \(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 da b1 e0 0f 00 00\s+vsm4key4 0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 da b2 00 f0 ff ff\s+vsm4key4 -0x1000\(%edx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 da b4 f4 00 00 00 10\s+vsm4key4 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 da 31\s+vsm4key4 \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 da b1 f0 07 00 00\s+vsm4key4 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 da b2 00 f8 ff ff\s+vsm4key4 -0x800\(%edx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 57 da f4\s+vsm4rnds4 %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 53 da f4\s+vsm4rnds4 %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 57 da b4 f4 00 00 00 10\s+vsm4rnds4 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 57 da 31\s+vsm4rnds4 \(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 57 da b1 e0 0f 00 00\s+vsm4rnds4 0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 57 da b2 00 f0 ff ff\s+vsm4rnds4 -0x1000\(%edx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 53 da b4 f4 00 00 00 10\s+vsm4rnds4 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 53 da 31\s+vsm4rnds4 \(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 53 da b1 f0 07 00 00\s+vsm4rnds4 0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 53 da b2 00 f8 ff ff\s+vsm4rnds4 -0x800\(%edx\),%xmm5,%xmm6 diff --git a/gas/testsuite/gas/i386/sm4.s b/gas/testsuite/gas/i386/sm4.s new file mode 100644 index 00000000000..0eb7b2fcb7b --- /dev/null +++ b/gas/testsuite/gas/i386/sm4.s @@ -0,0 +1,47 @@ +# Check 32bit SM4 instructions + + .allow_index_reg + .text +_start: + vsm4key4 %ymm4, %ymm5, %ymm6 + vsm4key4 %xmm4, %xmm5, %xmm6 + vsm4key4 0x10000000(%esp, %esi, 8), %ymm5, %ymm6 + vsm4key4 (%ecx), %ymm5, %ymm6 + vsm4key4 4064(%ecx), %ymm5, %ymm6 + vsm4key4 -4096(%edx), %ymm5, %ymm6 + vsm4key4 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 + vsm4key4 (%ecx), %xmm5, %xmm6 + vsm4key4 2032(%ecx), %xmm5, %xmm6 + vsm4key4 -2048(%edx), %xmm5, %xmm6 + vsm4rnds4 %ymm4, %ymm5, %ymm6 + vsm4rnds4 %xmm4, %xmm5, %xmm6 + vsm4rnds4 0x10000000(%esp, %esi, 8), %ymm5, %ymm6 + vsm4rnds4 (%ecx), %ymm5, %ymm6 + vsm4rnds4 4064(%ecx), %ymm5, %ymm6 + vsm4rnds4 -4096(%edx), %ymm5, %ymm6 + vsm4rnds4 0x10000000(%esp, %esi, 8), %xmm5, %xmm6 + vsm4rnds4 (%ecx), %xmm5, %xmm6 + vsm4rnds4 2032(%ecx), %xmm5, %xmm6 + vsm4rnds4 -2048(%edx), %xmm5, %xmm6 + +.intel_syntax noprefix + vsm4key4 ymm6, ymm5, ymm4 + vsm4key4 xmm6, xmm5, xmm4 + vsm4key4 ymm6, ymm5, YMMWORD PTR [esp+esi*8+0x10000000] + vsm4key4 ymm6, ymm5, YMMWORD PTR [ecx] + vsm4key4 ymm6, ymm5, YMMWORD PTR [ecx+4064] + vsm4key4 ymm6, ymm5, YMMWORD PTR [edx-4096] + vsm4key4 xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000] + vsm4key4 xmm6, xmm5, XMMWORD PTR [ecx] + vsm4key4 xmm6, xmm5, XMMWORD PTR [ecx+2032] + vsm4key4 xmm6, xmm5, XMMWORD PTR [edx-2048] + vsm4rnds4 ymm6, ymm5, ymm4 + vsm4rnds4 xmm6, xmm5, xmm4 + vsm4rnds4 ymm6, ymm5, YMMWORD PTR [esp+esi*8+0x10000000] + vsm4rnds4 ymm6, ymm5, YMMWORD PTR [ecx] + vsm4rnds4 ymm6, ymm5, YMMWORD PTR [ecx+4064] + vsm4rnds4 ymm6, ymm5, YMMWORD PTR [edx-4096] + vsm4rnds4 xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000] + vsm4rnds4 xmm6, xmm5, XMMWORD PTR [ecx] + vsm4rnds4 xmm6, xmm5, XMMWORD PTR [ecx+2032] + vsm4rnds4 xmm6, xmm5, XMMWORD PTR [edx-2048] diff --git a/gas/testsuite/gas/i386/x86-64-sm4-intel.d b/gas/testsuite/gas/i386/x86-64-sm4-intel.d new file mode 100644 index 00000000000..9bfa59592ae --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-sm4-intel.d @@ -0,0 +1,50 @@ +#as: +#objdump: -dw -Mintel +#name: x86_64 SM4 insns (Intel disassembly) +#source: x86-64-sm4.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 56 da f4\s+vsm4key4 ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 52 da f4\s+vsm4key4 xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 56 da b4 f5 00 00 00 10\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 56 da 31\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 56 da b1 e0 0f 00 00\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 56 da b2 00 f0 ff ff\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 52 da b4 f5 00 00 00 10\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 52 da 31\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 52 da b1 f0 07 00 00\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 52 da b2 00 f8 ff ff\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 57 da f4\s+vsm4rnds4 ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 53 da f4\s+vsm4rnds4 xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 57 da b4 f5 00 00 00 10\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 57 da 31\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 57 da b1 e0 0f 00 00\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 57 da b2 00 f0 ff ff\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 53 da b4 f5 00 00 00 10\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 53 da 31\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 53 da b1 f0 07 00 00\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 53 da b2 00 f8 ff ff\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 56 da f4\s+vsm4key4 ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 52 da f4\s+vsm4key4 xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 56 da b4 f5 00 00 00 10\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 56 da 31\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 56 da b1 e0 0f 00 00\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 56 da b2 00 f0 ff ff\s+vsm4key4 ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 52 da b4 f5 00 00 00 10\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 52 da 31\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 52 da b1 f0 07 00 00\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 52 da b2 00 f8 ff ff\s+vsm4key4 xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*c4 e2 57 da f4\s+vsm4rnds4 ymm6,ymm5,ymm4 +\s*[a-f0-9]+:\s*c4 e2 53 da f4\s+vsm4rnds4 xmm6,xmm5,xmm4 +\s*[a-f0-9]+:\s*c4 a2 57 da b4 f5 00 00 00 10\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 57 da 31\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 57 da b1 e0 0f 00 00\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[rcx\+0xfe0\] +\s*[a-f0-9]+:\s*c4 e2 57 da b2 00 f0 ff ff\s+vsm4rnds4 ymm6,ymm5,YMMWORD PTR \[rdx-0x1000\] +\s*[a-f0-9]+:\s*c4 a2 53 da b4 f5 00 00 00 10\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*c4 c2 53 da 31\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*c4 e2 53 da b1 f0 07 00 00\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*c4 e2 53 da b2 00 f8 ff ff\s+vsm4rnds4 xmm6,xmm5,XMMWORD PTR \[rdx-0x800\] diff --git a/gas/testsuite/gas/i386/x86-64-sm4.d b/gas/testsuite/gas/i386/x86-64-sm4.d new file mode 100644 index 00000000000..2c1f6737d9a --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-sm4.d @@ -0,0 +1,50 @@ +#as: +#objdump: -dw +#name: x86_64 SM4 insns +#source: x86-64-sm4.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*c4 e2 56 da f4\s+vsm4key4 %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 da f4\s+vsm4key4 %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 56 da b4 f5 00 00 00 10\s+vsm4key4 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 c2 56 da 31\s+vsm4key4 \(%r9\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 da b1 e0 0f 00 00\s+vsm4key4 0xfe0\(%rcx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 da b2 00 f0 ff ff\s+vsm4key4 -0x1000\(%rdx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 a2 52 da b4 f5 00 00 00 10\s+vsm4key4 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 52 da 31\s+vsm4key4 \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 da b1 f0 07 00 00\s+vsm4key4 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 da b2 00 f8 ff ff\s+vsm4key4 -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 57 da f4\s+vsm4rnds4 %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 53 da f4\s+vsm4rnds4 %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 57 da b4 f5 00 00 00 10\s+vsm4rnds4 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 c2 57 da 31\s+vsm4rnds4 \(%r9\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 57 da b1 e0 0f 00 00\s+vsm4rnds4 0xfe0\(%rcx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 57 da b2 00 f0 ff ff\s+vsm4rnds4 -0x1000\(%rdx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 a2 53 da b4 f5 00 00 00 10\s+vsm4rnds4 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 53 da 31\s+vsm4rnds4 \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 53 da b1 f0 07 00 00\s+vsm4rnds4 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 53 da b2 00 f8 ff ff\s+vsm4rnds4 -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 56 da f4\s+vsm4key4 %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 52 da f4\s+vsm4key4 %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 56 da b4 f5 00 00 00 10\s+vsm4key4 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 c2 56 da 31\s+vsm4key4 \(%r9\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 da b1 e0 0f 00 00\s+vsm4key4 0xfe0\(%rcx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 56 da b2 00 f0 ff ff\s+vsm4key4 -0x1000\(%rdx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 a2 52 da b4 f5 00 00 00 10\s+vsm4key4 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 52 da 31\s+vsm4key4 \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 da b1 f0 07 00 00\s+vsm4key4 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 52 da b2 00 f8 ff ff\s+vsm4key4 -0x800\(%rdx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 57 da f4\s+vsm4rnds4 %ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 53 da f4\s+vsm4rnds4 %xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 a2 57 da b4 f5 00 00 00 10\s+vsm4rnds4 0x10000000\(%rbp,%r14,8\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 c2 57 da 31\s+vsm4rnds4 \(%r9\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 57 da b1 e0 0f 00 00\s+vsm4rnds4 0xfe0\(%rcx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 e2 57 da b2 00 f0 ff ff\s+vsm4rnds4 -0x1000\(%rdx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*c4 a2 53 da b4 f5 00 00 00 10\s+vsm4rnds4 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 c2 53 da 31\s+vsm4rnds4 \(%r9\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 53 da b1 f0 07 00 00\s+vsm4rnds4 0x7f0\(%rcx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*c4 e2 53 da b2 00 f8 ff ff\s+vsm4rnds4 -0x800\(%rdx\),%xmm5,%xmm6 diff --git a/gas/testsuite/gas/i386/x86-64-sm4.s b/gas/testsuite/gas/i386/x86-64-sm4.s new file mode 100644 index 00000000000..cc680cb1a89 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-sm4.s @@ -0,0 +1,47 @@ +# Check 64bit SM4 instructions + + .allow_index_reg + .text +_start: + vsm4key4 %ymm4, %ymm5, %ymm6 + vsm4key4 %xmm4, %xmm5, %xmm6 + vsm4key4 0x10000000(%rbp, %r14, 8), %ymm5, %ymm6 + vsm4key4 (%r9), %ymm5, %ymm6 + vsm4key4 4064(%rcx), %ymm5, %ymm6 + vsm4key4 -4096(%rdx), %ymm5, %ymm6 + vsm4key4 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6 + vsm4key4 (%r9), %xmm5, %xmm6 + vsm4key4 2032(%rcx), %xmm5, %xmm6 + vsm4key4 -2048(%rdx), %xmm5, %xmm6 + vsm4rnds4 %ymm4, %ymm5, %ymm6 + vsm4rnds4 %xmm4, %xmm5, %xmm6 + vsm4rnds4 0x10000000(%rbp, %r14, 8), %ymm5, %ymm6 + vsm4rnds4 (%r9), %ymm5, %ymm6 + vsm4rnds4 4064(%rcx), %ymm5, %ymm6 + vsm4rnds4 -4096(%rdx), %ymm5, %ymm6 + vsm4rnds4 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6 + vsm4rnds4 (%r9), %xmm5, %xmm6 + vsm4rnds4 2032(%rcx), %xmm5, %xmm6 + vsm4rnds4 -2048(%rdx), %xmm5, %xmm6 + +.intel_syntax noprefix + vsm4key4 ymm6, ymm5, ymm4 + vsm4key4 xmm6, xmm5, xmm4 + vsm4key4 ymm6, ymm5, YMMWORD PTR [rbp+r14*8+0x10000000] + vsm4key4 ymm6, ymm5, YMMWORD PTR [r9] + vsm4key4 ymm6, ymm5, YMMWORD PTR [rcx+4064] + vsm4key4 ymm6, ymm5, YMMWORD PTR [rdx-4096] + vsm4key4 xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000] + vsm4key4 xmm6, xmm5, XMMWORD PTR [r9] + vsm4key4 xmm6, xmm5, XMMWORD PTR [rcx+2032] + vsm4key4 xmm6, xmm5, XMMWORD PTR [rdx-2048] + vsm4rnds4 ymm6, ymm5, ymm4 + vsm4rnds4 xmm6, xmm5, xmm4 + vsm4rnds4 ymm6, ymm5, YMMWORD PTR [rbp+r14*8+0x10000000] + vsm4rnds4 ymm6, ymm5, YMMWORD PTR [r9] + vsm4rnds4 ymm6, ymm5, YMMWORD PTR [rcx+4064] + vsm4rnds4 ymm6, ymm5, YMMWORD PTR [rdx-4096] + vsm4rnds4 xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000] + vsm4rnds4 xmm6, xmm5, XMMWORD PTR [r9] + vsm4rnds4 xmm6, xmm5, XMMWORD PTR [rcx+2032] + vsm4rnds4 xmm6, xmm5, XMMWORD PTR [rdx-2048] diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp index 5717443d2f6..36bde0ac372 100644 --- a/gas/testsuite/gas/i386/x86-64.exp +++ b/gas/testsuite/gas/i386/x86-64.exp @@ -444,6 +444,8 @@ run_dump_test "x86-64-sha512" run_dump_test "x86-64-sha512-intel" run_dump_test "x86-64-sm3" run_dump_test "x86-64-sm3-intel" +run_dump_test "x86-64-sm4" +run_dump_test "x86-64-sm4-intel" run_dump_test "x86-64-clzero" run_dump_test "x86-64-mwaitx-bdver4" run_list_test "x86-64-mwaitx-reg" diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index da9568acdd5..e21ad7ae005 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -1070,7 +1070,7 @@ enum PREFIX_VEX_0F38CB, PREFIX_VEX_0F38CC, PREFIX_VEX_0F38CD, - PREFIX_VEX_0F38DA_W_0_L_0, + PREFIX_VEX_0F38DA_W_0, PREFIX_VEX_0F38F5_L_0, PREFIX_VEX_0F38F6_L_0, PREFIX_VEX_0F38F7_L_0, @@ -1316,7 +1316,8 @@ enum VEX_LEN_0F38CB_P_3_W_0, VEX_LEN_0F38CC_P_3_W_0, VEX_LEN_0F38CD_P_3_W_0, - VEX_LEN_0F38DA_W_0, + VEX_LEN_0F38DA_W_0_P_0, + VEX_LEN_0F38DA_W_0_P_2, VEX_LEN_0F38DB, VEX_LEN_0F38F2, VEX_LEN_0F38F3, @@ -3969,11 +3970,12 @@ static const struct dis386 prefix_table[][4] = { { VEX_W_TABLE (VEX_W_0F38CD_P_3) }, }, - /* PREFIX_VEX_0F38DA_W_0_L_0 */ + /* PREFIX_VEX_0F38DA_W_0 */ { - { "vsm3msg1", { XM, Vex, EXxmm }, 0 }, - { Bad_Opcode }, - { "vsm3msg2", { XM, Vex, EXxmm }, 0 }, + { VEX_LEN_TABLE (VEX_LEN_0F38DA_W_0_P_0) }, + { "vsm4key4", { XM, Vex, EXx }, 0 }, + { VEX_LEN_TABLE (VEX_LEN_0F38DA_W_0_P_2) }, + { "vsm4rnds4", { XM, Vex, EXx }, 0 }, }, /* PREFIX_VEX_0F38F5_L_0 */ @@ -7010,9 +7012,14 @@ static const struct dis386 vex_len_table[][2] = { { "vsha512msg2", { XM, Uymm }, 0 }, }, - /* VEX_LEN_0F38DA_W_0 */ + /* VEX_LEN_0F38DA_W_0_P_0 */ + { + { "vsm3msg1", { XM, Vex, EXxmm }, 0 }, + }, + + /* VEX_LEN_0F38DA_W_0_P_2 */ { - { PREFIX_TABLE (PREFIX_VEX_0F38DA_W_0_L_0) }, + { "vsm3msg2", { XM, Vex, EXxmm }, 0 }, }, /* VEX_LEN_0F38DB */ @@ -7716,7 +7723,7 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0F38DA */ - { VEX_LEN_TABLE (VEX_LEN_0F38DA_W_0) }, + { PREFIX_TABLE (PREFIX_VEX_0F38DA_W_0) }, }, { /* VEX_W_0F3A00_L_1 */ diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index a5743cd5ee5..24a9943da47 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -172,6 +172,8 @@ static const dependency isa_dependencies[] = "AVX" }, { "SM3", "AVX" }, + { "SM4", + "AVX" }, { "AVX512F", "AVX2" }, { "AVX512CD", @@ -375,6 +377,7 @@ static bitfield cpu_flags[] = BITFIELD (AVX_VNNI_INT16), BITFIELD (SHA512), BITFIELD (SM3), + BITFIELD (SM4), BITFIELD (MWAITX), BITFIELD (CLZERO), BITFIELD (OSPKE), diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 42d69167c8a..fcbdb4c5f8d 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -239,6 +239,8 @@ enum CpuSHA512, /* Intel SM3 Instructions support required. */ CpuSM3, + /* Intel SM4 Instructions support required. */ + CpuSM4, /* mwaitx instruction required */ CpuMWAITX, /* Clzero instruction required */ @@ -439,6 +441,7 @@ typedef union i386_cpu_flags unsigned int cpuavx_vnni_int16:1; unsigned int cpusha512:1; unsigned int cpusm3:1; + unsigned int cpusm4:1; unsigned int cpumwaitx:1; unsigned int cpuclzero:1; unsigned int cpuospke:1; diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 630337b108b..eca60b467f2 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -3390,3 +3390,10 @@ vsm3msg1, 0xda, SM3, Modrm|Space0F38|Vex128|VexVVVV|VexW0|NoSuf, { RegXMM|Unspec vsm3msg2, 0x66da, SM3, Modrm|Space0F38|Vex128|VexVVVV|VexW0|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM, RegXMM } // SM3 instructions end. + +// SM4 instructions. + +vsm4key4, 0xf3da, SM4, Modrm|Space0F38|Vex|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM } +vsm4rnds4, 0xf2da, SM4, Modrm|Space0F38|Vex|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM } + +// SM4 instructions end. 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[8.43.85.97]) by mx.google.com with ESMTPS id w6-20020a50fa86000000b0051dd43b81b0si6516801edr.25.2023.07.12.23.33.59 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 23:33:59 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=lAUUppR9; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 531983857726 for ; Thu, 13 Jul 2023 06:33:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 531983857726 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1689230003; bh=XSLZF7lkypmTBcOizK8rGf6KmDdTUZIuM/B/BoEepwo=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=lAUUppR9acHoGTLljL6WwnvUaHLvv+4vxIc/u4dwjUOE6FaxztecViIESsp37UH75 1GSO0HcEzDhuWZ1OE7M136+dhAkRPqC2nD01J/98+96xqHG6JVHbKm1btY3+8KdvaA 3lEKZ6CyHfW1U+iRGrhGd7XOLepd/Xwo7zkxUNos= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by sourceware.org (Postfix) with ESMTPS id 17C4C3858421 for ; Thu, 13 Jul 2023 06:33:12 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 17C4C3858421 X-IronPort-AV: E=McAfee;i="6600,9927,10769"; a="431253779" X-IronPort-AV: E=Sophos;i="6.01,201,1684825200"; d="scan'208";a="431253779" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2023 23:33:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10769"; a="791914406" X-IronPort-AV: E=Sophos;i="6.01,201,1684825200"; d="scan'208";a="791914406" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmsmga004.fm.intel.com with ESMTP; 12 Jul 2023 23:33:08 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 811B310079B6; Thu, 13 Jul 2023 14:33:05 +0800 (CST) To: binutils@sourceware.org Cc: jbeulich@suse.com, hjl.tools@gmail.com, amodra@gmail.com, "Hu, Lin1" Subject: [PATCH 5/5] Support Intel PBNDKB Date: Thu, 13 Jul 2023 14:33:03 +0800 Message-Id: <20230713063303.205862-6-haochen.jiang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230713063303.205862-1-haochen.jiang@intel.com> References: <20230713063303.205862-1-haochen.jiang@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-10.9 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Binutils From: "Jiang, Haochen" Reply-To: Haochen Jiang Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771286078458972026 X-GMAIL-MSGID: 1771286078458972026 From: "Hu, Lin1" gas/ChangeLog: * NEWS: Support Intel PBNDKB. * config/tc-i386.c: Add pbndkb. * doc/c-i386.texi: Document .pbndkb. * testsuite/gas/i386/i386.exp: Add PBNDKB tests. * testsuite/gas/i386/x86-64.exp: Ditto. * testsuite/gas/i386/pbndkb-inval.l: New test. * testsuite/gas/i386/pbndkb-inval.s: Ditto. * testsuite/gas/i386/x86-64-pbndkb-intel.d: Ditto. * testsuite/gas/i386/x86-64-pbndkb.d: Ditto. * testsuite/gas/i386/x86-64-pbndkb.s: Ditto. opcodes/ChangeLog: * i386-dis.c (X86_64_0F01_REG_0_MOD_3_RM_7): New. (X86_64_0F01_REG_0_MOD_3_RM_7_P_0): Ditto. (prefix_table): Add PREFIX_0F01_REG_0_MOD_3_RM_7. (x86_64_table): Add X86_64_0F01_REG_0_MOD_3_RM_7_P_0. (rm_table): New entry for pbndkb. * i386-gen.c (cpu_flag): Add PBNDKB. * i386-init.h: Regenerated. * i386-mnem.h: Ditto. * i386-opc.h (CpuPBNDKB): New. (i386_cpu_flags): Add cpupbndkb. * i386-opc.tbl: Add PBNDKB instructions. * i386-tbl.h: Regenerated. --- gas/NEWS | 2 + gas/config/tc-i386.c | 1 + gas/doc/c-i386.texi | 2 + gas/testsuite/gas/i386/i386.exp | 1 + gas/testsuite/gas/i386/pbndkb-inval.l | 2 + gas/testsuite/gas/i386/pbndkb-inval.s | 6 + gas/testsuite/gas/i386/x86-64-pbndkb-intel.d | 12 + gas/testsuite/gas/i386/x86-64-pbndkb.d | 12 + gas/testsuite/gas/i386/x86-64-pbndkb.s | 9 + gas/testsuite/gas/i386/x86-64.exp | 2 + opcodes/i386-dis.c | 14 + opcodes/i386-gen.c | 1 + opcodes/i386-init.h | 652 +- opcodes/i386-mnem.h | 3673 ++++---- opcodes/i386-opc.h | 3 + opcodes/i386-opc.tbl | 6 + opcodes/i386-tbl.h | 7949 +++++++++--------- 17 files changed, 6223 insertions(+), 6124 deletions(-) create mode 100644 gas/testsuite/gas/i386/pbndkb-inval.l create mode 100644 gas/testsuite/gas/i386/pbndkb-inval.s create mode 100644 gas/testsuite/gas/i386/x86-64-pbndkb-intel.d create mode 100644 gas/testsuite/gas/i386/x86-64-pbndkb.d create mode 100644 gas/testsuite/gas/i386/x86-64-pbndkb.s diff --git a/gas/NEWS b/gas/NEWS index 26e75bde391..1ed043511eb 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -1,5 +1,7 @@ -*- text -*- +* Add support for Intel PBNDKB instructions. + * Add support for Intel SM4 instructions. * Add support for Intel SM3 instructions. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 686dd4c70f4..e35e2660ed5 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1155,6 +1155,7 @@ static const arch_entry cpu_arch[] = SUBARCH (sha512, SHA512, ANY_SHA512, false), SUBARCH (sm3, SM3, ANY_SM3, false), SUBARCH (sm4, SM4, ANY_SM4, false), + SUBARCH (pbndkb, PBNDKB, PBNDKB, false), }; #undef SUBARCH diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 54b0d7d738c..dd06282a5a3 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -211,6 +211,7 @@ accept various extension mnemonics. For example, @code{sha512}, @code{sm3}, @code{sm4}, +@code{pbndkb}, @code{amx_int8}, @code{amx_bf16}, @code{amx_fp16}, @@ -1641,6 +1642,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.cmpccxadd} @tab @samp{.wrmsrns} @tab @samp{.msrlist} @item @samp{.avx_ne_convert} @tab @samp{.rao_int} @tab @samp{.fred} @tab @samp{.lkgs} @item @samp{.avx_vnni_int16} @tab @samp{.sha512} @tab @samp{.sm3} @tab @samp{.sm4} +@item @samp{.pbndkb} @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote} @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq} @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk} diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 5e575660d7c..90f6e20bf5a 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -504,6 +504,7 @@ if [gas_32_check] then { run_dump_test "sm3-intel" run_dump_test "sm4" run_dump_test "sm4-intel" + run_list_test "pbndkb-inval" run_list_test "sg" run_dump_test "clzero" run_dump_test "invlpgb" diff --git a/gas/testsuite/gas/i386/pbndkb-inval.l b/gas/testsuite/gas/i386/pbndkb-inval.l new file mode 100644 index 00000000000..673bfff67e7 --- /dev/null +++ b/gas/testsuite/gas/i386/pbndkb-inval.l @@ -0,0 +1,2 @@ +.* Assembler messages: +.*:6: Error: `pbndkb' is only supported in 64-bit mode diff --git a/gas/testsuite/gas/i386/pbndkb-inval.s b/gas/testsuite/gas/i386/pbndkb-inval.s new file mode 100644 index 00000000000..ac8aa00f8d1 --- /dev/null +++ b/gas/testsuite/gas/i386/pbndkb-inval.s @@ -0,0 +1,6 @@ +# Check Illegal PBNDKB instructions + + .allow_index_reg + .text +_start: + pbndkb #PBNDKB diff --git a/gas/testsuite/gas/i386/x86-64-pbndkb-intel.d b/gas/testsuite/gas/i386/x86-64-pbndkb-intel.d new file mode 100644 index 00000000000..0ac10b2d1ba --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-pbndkb-intel.d @@ -0,0 +1,12 @@ +#as: +#objdump: -dw -Mintel +#name: x86_64 PBNDKB insns (Intel disassembly) +#source: x86-64-pbndkb.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*0f 01 c7\s+pbndkb +\s*[a-f0-9]+:\s*0f 01 c7\s+pbndkb diff --git a/gas/testsuite/gas/i386/x86-64-pbndkb.d b/gas/testsuite/gas/i386/x86-64-pbndkb.d new file mode 100644 index 00000000000..cff4f509194 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-pbndkb.d @@ -0,0 +1,12 @@ +#as: +#objdump: -dw +#name: x86_64 PBNDKB insns +#source: x86-64-pbndkb.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*0f 01 c7\s+pbndkb +\s*[a-f0-9]+:\s*0f 01 c7\s+pbndkb diff --git a/gas/testsuite/gas/i386/x86-64-pbndkb.s b/gas/testsuite/gas/i386/x86-64-pbndkb.s new file mode 100644 index 00000000000..defcce9cb08 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-pbndkb.s @@ -0,0 +1,9 @@ +# Check 64bit PBNDKB instructions + + .allow_index_reg + .text +_start: + pbndkb #PBNDKB + +.intel_syntax noprefix + pbndkb #PBNDKB diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp index 36bde0ac372..5e329147ffd 100644 --- a/gas/testsuite/gas/i386/x86-64.exp +++ b/gas/testsuite/gas/i386/x86-64.exp @@ -446,6 +446,8 @@ run_dump_test "x86-64-sm3" run_dump_test "x86-64-sm3-intel" run_dump_test "x86-64-sm4" run_dump_test "x86-64-sm4-intel" +run_dump_test "x86-64-pbndkb" +run_dump_test "x86-64-pbndkb-intel" run_dump_test "x86-64-clzero" run_dump_test "x86-64-mwaitx-bdver4" run_list_test "x86-64-mwaitx-reg" diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index e21ad7ae005..c28522d4bcc 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -924,6 +924,7 @@ enum PREFIX_90 = 0, PREFIX_0F00_REG_6_X86_64, PREFIX_0F01_REG_0_MOD_3_RM_6, + PREFIX_0F01_REG_0_MOD_3_RM_7, PREFIX_0F01_REG_1_RM_2, PREFIX_0F01_REG_1_RM_4, PREFIX_0F01_REG_1_RM_5, @@ -1198,6 +1199,7 @@ enum X86_64_0F01_REG_0, X86_64_0F01_REG_0_MOD_3_RM_6_P_1, X86_64_0F01_REG_0_MOD_3_RM_6_P_3, + X86_64_0F01_REG_0_MOD_3_RM_7_P_0, X86_64_0F01_REG_1, X86_64_0F01_REG_1_RM_2_PREFIX_1, X86_64_0F01_REG_1_RM_2_PREFIX_3, @@ -2910,6 +2912,11 @@ static const struct dis386 prefix_table[][4] = { { X86_64_TABLE (X86_64_0F01_REG_0_MOD_3_RM_6_P_3) }, }, + /* PREFIX_0F01_REG_0_MOD_3_RM_7 */ + { + { X86_64_TABLE (X86_64_0F01_REG_0_MOD_3_RM_7_P_0) }, + }, + /* PREFIX_0F01_REG_1_RM_2 */ { { "clac", { Skip_MODRM }, 0 }, @@ -4194,6 +4201,12 @@ static const struct dis386 x86_64_table[][2] = { { "rdmsrlist", { Skip_MODRM }, 0 }, }, + /* X86_64_0F01_REG_0_MOD_3_RM_7_P_0 */ + { + { Bad_Opcode }, + { "pbndkb", { Skip_MODRM }, 0 }, + }, + /* X86_64_0F01_REG_1 */ { { "sidt{Q|Q}", { M }, 0 }, @@ -8190,6 +8203,7 @@ static const struct dis386 rm_table[][8] = { { "vmxoff", { Skip_MODRM }, 0 }, { "pconfig", { Skip_MODRM }, 0 }, { PREFIX_TABLE (PREFIX_0F01_REG_0_MOD_3_RM_6) }, + { PREFIX_TABLE (PREFIX_0F01_REG_0_MOD_3_RM_7) }, }, { /* RM_0F01_REG_1 */ diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 24a9943da47..17f17d38d35 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -378,6 +378,7 @@ static bitfield cpu_flags[] = BITFIELD (SHA512), BITFIELD (SM3), BITFIELD (SM4), + BITFIELD (PBNDKB), BITFIELD (MWAITX), BITFIELD (CLZERO), BITFIELD (OSPKE), diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index fcbdb4c5f8d..62067dde5a6 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -241,6 +241,8 @@ enum CpuSM3, /* Intel SM4 Instructions support required. */ CpuSM4, + /* Intel PBNDKB Instructions support required. */ + CpuPBNDKB, /* mwaitx instruction required */ CpuMWAITX, /* Clzero instruction required */ @@ -442,6 +444,7 @@ typedef union i386_cpu_flags unsigned int cpusha512:1; unsigned int cpusm3:1; unsigned int cpusm4:1; + unsigned int cpupbndkb:1; unsigned int cpumwaitx:1; unsigned int cpuclzero:1; unsigned int cpuospke:1; diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index eca60b467f2..6bd0f505118 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -3397,3 +3397,9 @@ vsm4key4, 0xf3da, SM4, Modrm|Space0F38|Vex|VexVVVV|VexW0|CheckOperandSize|NoSuf, vsm4rnds4, 0xf2da, SM4, Modrm|Space0F38|Vex|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM } // SM4 instructions end. + +// PBNDKB instruction. + +pbndkb, 0x0f01c7, PBNDKB|x64, NoSuf, {} + +// PBNDKB instruction end.