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[2620:137:e000::1:20]) by mx.google.com with ESMTP id u12-20020a654c0c000000b0055397816fc1si3002331pgq.758.2023.07.06.22.30.55; Thu, 06 Jul 2023 22:31:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=pHYA2kXB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232589AbjGGF0o (ORCPT + 99 others); Fri, 7 Jul 2023 01:26:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42856 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232489AbjGGF0a (ORCPT ); Fri, 7 Jul 2023 01:26:30 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 386161FE4; Thu, 6 Jul 2023 22:26:26 -0700 (PDT) X-UUID: cb4d5c521c8611eeb20a276fd37b9834-20230707 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=AezGOQP+D1v1bzBCXXR0/e4pZGQQF4EFtfBU/9TBFe4=; b=pHYA2kXBvPlBHxUo672BdUtFz2FK/1D9xsymN076WOf6yRlzhU0gk0NHHUSEVFXEkfTwkUF+pYiuyDOVGyFDLFGADIBZPNhZzGZKE6Xk9vLGlTIf4U88dGpphLZCWPpdPSTLMWfzrGQvIqsyIlE+KTFyTZQ94dlS1i27ZZb7H7I=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.27,REQID:c565321e-29ef-4568-937f-cf778af5c5ee,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:01c9525,CLOUDID:dd6caa0d-26a8-467f-b838-f99719a9c083,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: cb4d5c521c8611eeb20a276fd37b9834-20230707 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1338016942; Fri, 07 Jul 2023 13:26:15 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.186) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 7 Jul 2023 13:26:14 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 7 Jul 2023 13:26:14 +0800 From: Tinghan Shen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Tinghan Shen CC: , , , , , Subject: [PATCH v14 01/12] dt-bindings: remoteproc: mediatek: Improve the rpmsg subnode definition Date: Fri, 7 Jul 2023 13:26:01 +0800 Message-ID: <20230707052612.27521-2-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230707052612.27521-1-tinghan.shen@mediatek.com> References: <20230707052612.27521-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770738542920688646?= X-GMAIL-MSGID: =?utf-8?q?1770738542920688646?= Improve the definition of the rpmsg subnode by assigning a distinct node name and adding the definition source of node properties. Signed-off-by: Tinghan Shen Acked-by: Rob Herring Reviewed-by: AngeloGioacchino Del Regno --- .../bindings/remoteproc/mtk,scp.yaml | 31 +++++++++---------- 1 file changed, 15 insertions(+), 16 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml index 895415772d1d..271081df0e46 100644 --- a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml @@ -58,6 +58,18 @@ properties: memory-region: maxItems: 1 + cros-ec-rpmsg: + $ref: /schemas/mfd/google,cros-ec.yaml + description: + This subnode represents the rpmsg device. The properties + of this node are defined by the individual bindings for + the rpmsg devices. + + required: + - mediatek,rpmsg-name + + unevaluatedProperties: false + required: - compatible - reg @@ -89,21 +101,7 @@ allOf: reg-names: maxItems: 2 -additionalProperties: - type: object - description: - Subnodes of the SCP represent rpmsg devices. The names of the devices - are not important. The properties of these nodes are defined by the - individual bindings for the rpmsg devices. - properties: - mediatek,rpmsg-name: - $ref: /schemas/types.yaml#/definitions/string-array - description: - Contains the name for the rpmsg device. Used to match - the subnode to rpmsg device announced by SCP. - - required: - - mediatek,rpmsg-name +additionalProperties: false examples: - | @@ -118,7 +116,8 @@ examples: clocks = <&infracfg CLK_INFRA_SCPSYS>; clock-names = "main"; - cros_ec { + cros-ec-rpmsg { + compatible = "google,cros-ec-rpmsg"; mediatek,rpmsg-name = "cros-ec-rpmsg"; }; }; From patchwork Fri Jul 7 05:26:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 116969 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f45:0:b0:3ea:f831:8777 with SMTP id v5csp3038488vqx; Thu, 6 Jul 2023 22:34:30 -0700 (PDT) X-Google-Smtp-Source: APBJJlHmRn245YXZ5KjFSaKKdMfGOJ5kDtfyTixsMtfrmZYZ4tgg/EtxqlGI3sjdoHpKUfhtKmQO X-Received: by 2002:a05:6808:158:b0:3a1:eee6:774f with SMTP id h24-20020a056808015800b003a1eee6774fmr4313887oie.50.1688708070471; Thu, 06 Jul 2023 22:34:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688708070; cv=none; d=google.com; s=arc-20160816; b=vfoVoJR8SwK9hxeDsurSGX1GP6ZWxAdrPDHzWpZd1pCLRqkcCdR7ILHTVBuMD78XdH nkP+QhdOFdxMJI1X1kIROvzXNY0J1msN7LGl8sybI7OpC+L0NBOM+CWf6lex/2gwNF36 dWQbtW8/GBlvu0KExvmUWNnkPy9wqV2OQjtyUGBCAhsI3JUYDKBUPxF5/YnNZywNSxsE IxMlWxuwGJMKdusptfNfMt9v7f91YNDLs1o0Af86ynhd6OMD+VuP8RUnOEnX5/Y4NTUq 2KiYEisc5uU4rlnchHikw7XErZVux/GbWEQ3YUvP5nSoX5mgUCFk+6P6q2ZCOnc+vdoP ELUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=0v1sHSdRL6Qx9RsSEfvIFRQuGdYV7Ul8S2vCf20EzFw=; fh=fiUFlTmdXAnPLHH0bIyIc4brKi/t2/OmtpRJQ8s00Ug=; b=q82gIKDpVhBBKE8w7GrJbFo5FClucpF84z48WDVkimVSEAINycYJzrIarICDJsX9BL 5mLBEBFU/wAX03ta9AlMVYJumIgtMnXP5kxRLjZv23NYXOFIWv9Nkd6s8aOur7MIkPUA 1lmVyW7ONs+3FzR1L5z/5hSbkTSJweO09/Xf4m4V3RpU3x/Z51UXB7K60cAdWs5NwgZ3 ww/cB9aDSttR5INGVQI8oYIUZBTEg7d1U2i2tP+Ae3inVFZTPzJ9W8qKvP5D5TGRB1g3 LXdzk84mQTXc+UcV3VpOvZu7oJ6Falx6CETUDwRq6MOH1UgkiVw//JAt1ssKONZkaXkK 8qIA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=Mx6NeMhP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Tinghan Shen Reviewed-by: AngeloGioacchino Del Regno Acked-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 2 +- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi index 6ce16a265e05..34076ba28fd0 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -831,7 +831,7 @@ pinctrl-names = "default"; pinctrl-0 = <&scp_pins>; - cros_ec { + cros-ec-rpmsg { compatible = "google,cros-ec-rpmsg"; mediatek,rpmsg-name = "cros-ec-rpmsg"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index 0e8b34117090..1bbc994bc109 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -1284,7 +1284,7 @@ pinctrl-names = "default"; pinctrl-0 = <&scp_pins>; - cros-ec { + cros-ec-rpmsg { compatible = "google,cros-ec-rpmsg"; mediatek,rpmsg-name = "cros-ec-rpmsg"; }; From patchwork Fri Jul 7 05:26:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 116962 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f45:0:b0:3ea:f831:8777 with SMTP id v5csp3035632vqx; Thu, 6 Jul 2023 22:27:38 -0700 (PDT) X-Google-Smtp-Source: APBJJlGKpM9XI8KAJshbzyfOE89heqgIFH0xjqs2lRSi2TtS0gldZtc59Uu2saSaklDTzLhyRzFz X-Received: by 2002:a05:6870:a11d:b0:1b3:afdc:6c11 with SMTP id m29-20020a056870a11d00b001b3afdc6c11mr4825998oae.3.1688707658377; Thu, 06 Jul 2023 22:27:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688707658; cv=none; d=google.com; s=arc-20160816; b=MBYCNoJmQ5ea4aaOJfSncAaHc3Jee0hPBdU64cFMmIjuh1vcFD4Sq81aKMyEXY0afN mzRVRLD5iGzVgGBolt9F7uleUkADTHhSqMTnGFsfFkbtUdJrDdJCxYcSxp/w/YnqYUG4 gFO7RtC2BVQJJy95yck8TrRY5mWT9u6ZKByBSZ8rFj5bXLXIxSlOvaW1IsqXnM9I5yfb Vx0UpqLVvdYS/x9DjCDdXAN/N4Mx36QleSgb1e+rFKtqkov1c+Aav75ylzBvwSmcs/FW Oh5ALVgAN+nMIUy/FGjmYXV1GpO93v2FCFE8Tt9RoyAtISUio8T2goop3jSYHfCRSMm6 NtNg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=mHZvfrM0o5UaIt01vL+X0Xi78aCQjddfdApBpcmPqT8=; fh=fiUFlTmdXAnPLHH0bIyIc4brKi/t2/OmtpRJQ8s00Ug=; b=Owpu6EIj+9z3FG5zyrhJ4RJPq0UHOTHapJdSPJZF4CNVPnv12hFq3sLMApWne8Ye4a jKyRw5IDxDyhpmXGt8tgV94N+qleoT8UMOgI2JVRVe4EozCF+avwfyvMD07hiS/GWoqD uuwXJidaKTSNWU65PtEdNtD/pUWxWkNjaQAQ/O45HhLeFjDut1bu0wTUm5jdV5wgrfF2 6wzqS15qa5+iqSj8IpzaPcbe1HPmctQntBGEdF1IWO4OLHUNLL7Xc3DLXqYfcDyDmGUE oAQyayDX9ZRiwQzqLOatLS6KXF8SrTFVj5IiT8LWiW26t58Sp8iaYXv+i5Cx+g7XDydr PRbg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=nlndidr8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. 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Under different applications, the MT8195 SCP can be used as single-core or dual-core. This change keeps the single-core definitions and adds new definitions for the dual-core use case. Signed-off-by: Tinghan Shen Reviewed-by: Rob Herring Reviewed-by: AngeloGioacchino Del Regno --- .../bindings/remoteproc/mtk,scp.yaml | 145 +++++++++++++++++- 1 file changed, 141 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml index 271081df0e46..09102dda4942 100644 --- a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml @@ -21,6 +21,7 @@ properties: - mediatek,mt8188-scp - mediatek,mt8192-scp - mediatek,mt8195-scp + - mediatek,mt8195-scp-dual reg: description: @@ -31,10 +32,7 @@ properties: reg-names: minItems: 2 - items: - - const: sram - - const: cfg - - const: l1tcm + maxItems: 3 clocks: description: @@ -70,6 +68,81 @@ properties: unevaluatedProperties: false + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + + ranges: + description: + Standard ranges definition providing address translations for + local SCP SRAM address spaces to bus addresses. + +patternProperties: + "^scp@[a-f0-9]+$": + type: object + description: + The MediaTek SCP integrated to SoC might be a multi-core version. + The other cores are represented as child nodes of the boot core. + There are some integration differences for the IP like the usage of + address translator for translating SoC bus addresses into address space + for the processor. + + Each SCP core has own cache memory. The SRAM and L1TCM are shared by + cores. The power of cache, SRAM and L1TCM power should be enabled + before booting SCP cores. The size of cache, SRAM, and L1TCM are varied + on differnt SoCs. + + The SCP cores do not use an MMU, but has a set of registers to + control the translations between 32-bit CPU addresses into system bus + addresses. Cache and memory access settings are provided through a + Memory Protection Unit (MPU), programmable only from the SCP. + + properties: + compatible: + enum: + - mediatek,scp-core + + reg: + description: The base address and size of SRAM. + maxItems: 1 + + reg-names: + const: sram + + interrupts: + maxItems: 1 + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: + If present, name (or relative path) of the file within the + firmware search path containing the firmware image used when + initializing sub cores of multi-core SCP. + + memory-region: + maxItems: 1 + + cros-ec-rpmsg: + $ref: /schemas/mfd/google,cros-ec.yaml + description: + This subnode represents the rpmsg device. The properties + of this node are defined by the individual bindings for + the rpmsg devices. + + required: + - mediatek,rpmsg-name + + unevaluatedProperties: false + + required: + - compatible + - reg + - reg-names + + additionalProperties: false + required: - compatible - reg @@ -99,7 +172,37 @@ allOf: reg: maxItems: 2 reg-names: + items: + - const: sram + - const: cfg + - if: + properties: + compatible: + enum: + - mediatek,mt8192-scp + - mediatek,mt8195-scp + then: + properties: + reg: + maxItems: 3 + reg-names: + items: + - const: sram + - const: cfg + - const: l1tcm + - if: + properties: + compatible: + enum: + - mediatek,mt8195-scp-dual + then: + properties: + reg: maxItems: 2 + reg-names: + items: + - const: cfg + - const: l1tcm additionalProperties: false @@ -121,3 +224,37 @@ examples: mediatek,rpmsg-name = "cros-ec-rpmsg"; }; }; + + - | + scp@10500000 { + compatible = "mediatek,mt8195-scp-dual"; + reg = <0x10720000 0xe0000>, + <0x10700000 0x8000>; + reg-names = "cfg", "l1tcm"; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x10500000 0x100000>; + + scp@0 { + compatible = "mediatek,scp-core"; + reg = <0x0 0xa0000>; + reg-names = "sram"; + + cros-ec-rpmsg { + compatible = "google,cros-ec-rpmsg"; + mediatek,rpmsg-name = "cros-ec-rpmsg"; + }; + }; + + scp@a0000 { + compatible = "mediatek,scp-core"; + reg = <0xa0000 0x20000>; + reg-names = "sram"; + + cros-ec-rpmsg { + compatible = "google,cros-ec-rpmsg"; + mediatek,rpmsg-name = "cros-ec-rpmsg"; + }; + }; + }; From patchwork Fri Jul 7 05:26:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 116973 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f45:0:b0:3ea:f831:8777 with SMTP id v5csp3039252vqx; Thu, 6 Jul 2023 22:36:16 -0700 (PDT) X-Google-Smtp-Source: APBJJlGibtiEqCFY7cdXvqftVv5cIDwzeuujQyxIiS/seWAHqOP4TPOJRFTtjmVKjm3R/srGQyY2 X-Received: by 2002:a05:6a00:1303:b0:668:74e9:8eea with SMTP id j3-20020a056a00130300b0066874e98eeamr3845980pfu.33.1688708176187; Thu, 06 Jul 2023 22:36:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688708176; cv=none; d=google.com; s=arc-20160816; b=oeYffpKCwiUGtFMr11wvxyHEJsCE7jNw29lLbGhtLW2FO/nYALEU/Sb2x8Ffq/xO/z 1qtKaT2fOHTUy6JZ5uNb/CJhUNYeFbn6nG4jmQnU6tViZnlGXEw+TTE0+uB7p7o2vTBn C1FQLJMHIhzXwNfAGYR/Q1MQq2/UoNvesvMWg/8WNziwz7066SuF75GCY9vVKOQ8cOkX tVjBDlgsRdtRoIgndbOuwD7lzyFNZV/tAq91H0AczNpuhCIchciG0WqW3AV3Xy5jjgEO N5YGPmvvgAHn48T+Vhq87gHevtznJLF1gu18bpbGD9R0gfcgJxi9Fkjq627DH/ZpFibO Gpzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=j+QYraQbzb9ohLMzNn/JclhKPYuqSnCdv9f3/SYy3Jw=; fh=fiUFlTmdXAnPLHH0bIyIc4brKi/t2/OmtpRJQ8s00Ug=; b=iASHlpeb6JnQdyccJ4Y9apEZG7PZOyp9ehjknldfYOZbxceY4ftUXWgbEBx76eM/gx Ok4akDiSqbfVk6gHCvYomuhU8b9OD/WbxXQK5Jdm2qJ5YbudbbtLpojg3YBxCrSpywQY Dh0LVRnf3gQUIxJaI7GyB47KmxSto+q3jl7+owCaUbqDvFpIBVS2g3euwVr6E5jKmZc7 YWoDVVsjYdFxbxZHaZW2y4fvhi47EFNukIb9Jj1wJVG/sg1jOq+n4MXfDvJjCstMU+JZ ud1Im29g6+jlMR1JPEICwmT4yUYcabARuzsZCF3hQPbFzGt5L0ywhcj+HrsOvyWqH+YK SRWQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=Zlo5xWMm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id fa32-20020a056a002d2000b0068094fd547esi3255939pfb.99.2023.07.06.22.36.03; Thu, 06 Jul 2023 22:36:16 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=Zlo5xWMm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232691AbjGGF1W (ORCPT + 99 others); Fri, 7 Jul 2023 01:27:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42894 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232532AbjGGF0c (ORCPT ); Fri, 7 Jul 2023 01:26:32 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B9831FE6; Thu, 6 Jul 2023 22:26:29 -0700 (PDT) X-UUID: cb9bf4e81c8611eeb20a276fd37b9834-20230707 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=j+QYraQbzb9ohLMzNn/JclhKPYuqSnCdv9f3/SYy3Jw=; b=Zlo5xWMmyFssEPOw7EaHrPfajo5MZzZ95f3fYnUxoXgQwJi0Upwm2p7cgAQKfI/sgpnB5tkI14ScZms7rdPtDBBQbXVxfXFCGC0t1IVPm7r5UoKoQYsiY1uFo7771zJnAooX15rNjVRbJfnXyu1jJoBz2uUSdSgl5D7XMptuLdw=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.27,REQID:faae62f3-e05c-42cd-a6e9-7cd3ed1ee01e,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.27,REQID:faae62f3-e05c-42cd-a6e9-7cd3ed1ee01e,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:01c9525,CLOUDID:e16caa0d-26a8-467f-b838-f99719a9c083,B ulkID:230707132617S629QR2Y,BulkQuantity:0,Recheck:0,SF:38|29|28|17|19|48,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0,LES:1,SPR:NO X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_SDM,TF_CID_SPAM_ASC,TF_CID_SPAM_FAS, TF_CID_SPAM_FSD X-UUID: cb9bf4e81c8611eeb20a276fd37b9834-20230707 Received: from mtkmbs14n1.mediatek.inc [(172.21.101.75)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1081195434; Fri, 07 Jul 2023 13:26:16 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.186) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 7 Jul 2023 13:26:14 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 7 Jul 2023 13:26:14 +0800 From: Tinghan Shen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Tinghan Shen CC: , , , , , Subject: [PATCH v14 04/12] remoteproc: mediatek: Add MT8195 SCP core 1 operations Date: Fri, 7 Jul 2023 13:26:04 +0800 Message-ID: <20230707052612.27521-5-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230707052612.27521-1-tinghan.shen@mediatek.com> References: <20230707052612.27521-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770738864524696843?= X-GMAIL-MSGID: =?utf-8?q?1770738864524696843?= The SCP rproc driver has a set of chip dependent callbacks for boot sequence and IRQ handling. Implement these callbacks for MT8195 SCP core 1. Signed-off-by: Tinghan Shen Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger --- drivers/remoteproc/mtk_common.h | 9 ++++++ drivers/remoteproc/mtk_scp.c | 55 +++++++++++++++++++++++++++++++++ 2 files changed, 64 insertions(+) diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h index ea6fa1100a00..c0905aec3b4b 100644 --- a/drivers/remoteproc/mtk_common.h +++ b/drivers/remoteproc/mtk_common.h @@ -47,6 +47,7 @@ #define MT8192_SCP2SPM_IPC_CLR 0x4094 #define MT8192_GIPC_IN_SET 0x4098 #define MT8192_HOST_IPC_INT_BIT BIT(0) +#define MT8195_CORE1_HOST_IPC_INT_BIT BIT(4) #define MT8192_CORE0_SW_RSTN_CLR 0x10000 #define MT8192_CORE0_SW_RSTN_SET 0x10004 @@ -56,6 +57,14 @@ #define MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS GENMASK(7, 4) +#define MT8195_CPU1_SRAM_PD 0x1084 +#define MT8195_SSHUB2APMCU_IPC_SET 0x4088 +#define MT8195_SSHUB2APMCU_IPC_CLR 0x408C +#define MT8195_CORE1_SW_RSTN_CLR 0x20000 +#define MT8195_CORE1_SW_RSTN_SET 0x20004 +#define MT8195_CORE1_MEM_ATT_PREDEF 0x20008 +#define MT8195_CORE1_WDT_CFG 0x20034 + #define SCP_FW_VER_LEN 32 #define SCP_SHARE_BUFFER_SIZE 288 diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index dcc94ee2458d..48e759c2d486 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -176,6 +176,16 @@ static void mt8192_scp_reset_deassert(struct mtk_scp *scp) writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_CLR); } +static void mt8195_scp_c1_reset_assert(struct mtk_scp *scp) +{ + writel(1, scp->reg_base + MT8195_CORE1_SW_RSTN_SET); +} + +static void mt8195_scp_c1_reset_deassert(struct mtk_scp *scp) +{ + writel(1, scp->reg_base + MT8195_CORE1_SW_RSTN_CLR); +} + static void mt8183_scp_irq_handler(struct mtk_scp *scp) { u32 scp_to_host; @@ -212,6 +222,18 @@ static void mt8192_scp_irq_handler(struct mtk_scp *scp) } } +static void mt8195_scp_c1_irq_handler(struct mtk_scp *scp) +{ + u32 scp_to_host; + + scp_to_host = readl(scp->reg_base + MT8195_SSHUB2APMCU_IPC_SET); + + if (scp_to_host & MT8192_SCP_IPC_INT_BIT) + scp_ipi_handler(scp); + + writel(scp_to_host, scp->reg_base + MT8195_SSHUB2APMCU_IPC_CLR); +} + static irqreturn_t scp_irq_handler(int irq, void *priv) { struct mtk_scp *scp = priv; @@ -453,6 +475,18 @@ static int mt8195_scp_before_load(struct mtk_scp *scp) return 0; } +static int mt8195_scp_c1_before_load(struct mtk_scp *scp) +{ + scp->data->scp_reset_assert(scp); + + scp_sram_power_on(scp->reg_base + MT8195_CPU1_SRAM_PD, 0); + + /* enable MPU for all memory regions */ + writel(0xff, scp->reg_base + MT8195_CORE1_MEM_ATT_PREDEF); + + return 0; +} + static int scp_load(struct rproc *rproc, const struct firmware *fw) { struct mtk_scp *scp = rproc->priv; @@ -625,6 +659,15 @@ static void mt8195_scp_stop(struct mtk_scp *scp) writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG); } +static void mt8195_scp_c1_stop(struct mtk_scp *scp) +{ + /* Power off CPU SRAM */ + scp_sram_power_off(scp->reg_base + MT8195_CPU1_SRAM_PD, 0); + + /* Disable SCP watchdog */ + writel(0, scp->reg_base + MT8195_CORE1_WDT_CFG); +} + static int scp_stop(struct rproc *rproc) { struct mtk_scp *scp = rproc->priv; @@ -989,6 +1032,18 @@ static const struct mtk_scp_of_data mt8195_of_data = { .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT, }; +static const struct mtk_scp_of_data mt8195_of_data_c1 = { + .scp_clk_get = mt8195_scp_clk_get, + .scp_before_load = mt8195_scp_c1_before_load, + .scp_irq_handler = mt8195_scp_c1_irq_handler, + .scp_reset_assert = mt8195_scp_c1_reset_assert, + .scp_reset_deassert = mt8195_scp_c1_reset_deassert, + .scp_stop = mt8195_scp_c1_stop, + .scp_da_to_va = mt8192_scp_da_to_va, + .host_to_scp_reg = MT8192_GIPC_IN_SET, + .host_to_scp_int_bit = MT8195_CORE1_HOST_IPC_INT_BIT, +}; + static const struct of_device_id mtk_scp_of_match[] = { { .compatible = "mediatek,mt8183-scp", .data = &mt8183_of_data }, { .compatible = "mediatek,mt8186-scp", .data = &mt8186_of_data }, From patchwork Fri Jul 7 05:26:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 116970 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f45:0:b0:3ea:f831:8777 with SMTP id v5csp3038686vqx; Thu, 6 Jul 2023 22:35:04 -0700 (PDT) X-Google-Smtp-Source: APBJJlH96+CMjo27Gls7pwbH6kwEzmEJ+5houTyJzgCUj1jDihsKqaiY4lQnzEbGDu7PDr/Vz8pD X-Received: by 2002:a05:6a20:9694:b0:10f:1d33:d667 with SMTP id hp20-20020a056a20969400b0010f1d33d667mr3610076pzc.5.1688708103760; Thu, 06 Jul 2023 22:35:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688708103; cv=none; d=google.com; s=arc-20160816; b=FGQN/IVYz+TkwoJadSHLE3lk3X0lVe76gZ2fBUsa5OwlueWG3jnmef8Fnaqkqb6Ds2 Rd0lcbTeW5bKocGCMSdlm8FeDUu5rb0vIxWVqQOfVCrABqDiSAqMVMhL+WRROTibYJaD hFsXQtfoerESDl4BqBdNL3IKueXyDyV14ZcBpmUVHyHNSQBs4E+rjfQ4wLUEa6M3j8DN Y4HMg1Ih3tOPtj9bRmgWwGRJKJJQjs4HbUw2Cqy/LAID+DoT/51aXQa0XX8qeH3RwmtZ PC2vJY3ghXq3iMeGQS93ytFxM0j9k+njh7KQhs0lL1zbdqakCEbSvPWMepW8m0qWjswX 3ECQ== ARC-Message-Signature: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id cr7-20020a056a000f0700b00682d2ab09dbsi2329948pfb.306.2023.07.06.22.34.51; Thu, 06 Jul 2023 22:35:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=GOBhLrvb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232491AbjGGF1I (ORCPT + 99 others); Fri, 7 Jul 2023 01:27:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42886 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231666AbjGGF0c (ORCPT ); Fri, 7 Jul 2023 01:26:32 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 41C081FDA; Thu, 6 Jul 2023 22:26:25 -0700 (PDT) X-UUID: cbb95f561c8611eeb20a276fd37b9834-20230707 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=TyIzjFgJ3j/3OAYJZ/4iJ1rqksJJnLql1kpgM413Ykw=; b=GOBhLrvbi1wzA+YlPFgUU1SE9m+aAytVxCmtjjsyO7/8stfbdLPRhRaq3pBAvw/Hq8v7GHevedMgJPHCFqRyT4JeADjiY4fOc5+eIR0D5zycPHnLICGcfCYqAvb3U1j6McT+/tXjHsEhSrCbd4jMudzzrwh3/Y50F+8/xfp3zjU=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.27,REQID:989a1086-6add-4b58-bf18-64e7d5da2b93,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.27,REQID:989a1086-6add-4b58-bf18-64e7d5da2b93,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:01c9525,CLOUDID:14f3b9da-b4fa-43c8-9c3e-0d3fabd03ec0,B ulkID:230707132617WVTZBGHV,BulkQuantity:0,Recheck:0,SF:29|28|17|19|48|38,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0,LES:1,SPR:NO X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_SDM,TF_CID_SPAM_ASC,TF_CID_SPAM_FAS, TF_CID_SPAM_FSD X-UUID: cbb95f561c8611eeb20a276fd37b9834-20230707 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1325303499; Fri, 07 Jul 2023 13:26:16 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.186) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 7 Jul 2023 13:26:15 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 7 Jul 2023 13:26:15 +0800 From: Tinghan Shen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , "Tinghan Shen" CC: , , , , , Subject: [PATCH v14 05/12] remoteproc: mediatek: Introduce cluster on single-core SCP Date: Fri, 7 Jul 2023 13:26:05 +0800 Message-ID: <20230707052612.27521-6-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230707052612.27521-1-tinghan.shen@mediatek.com> References: <20230707052612.27521-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770738788654105903?= X-GMAIL-MSGID: =?utf-8?q?1770738788654105903?= This is the preliminary step for probing multi-core SCP. The initialization procedure for remoteproc is similar for both single-core and multi-core architectures and is reusing to avoid redundant code. Rewrite the probing flow of single-core SCP to adapt with the 'cluster' concept needed by probing the multi-core SCP. The main differences are, - the SCP core object(s) is maintained at the cluster list instead of at the platform device driver data property. - save the cluster information at the platform device driver data property. - In order to keep the compatibility of exported SCP APIs which getting the SCP core object by SCP node phandle, move the SCP core object pointers to the platform device platform data property. The registers of config and l1tcm are shared for multi-core SCP. Reuse the mapped addresses for all cores. Signed-off-by: Tinghan Shen --- drivers/remoteproc/mtk_common.h | 2 + drivers/remoteproc/mtk_scp.c | 151 +++++++++++++++++++++++--------- 2 files changed, 112 insertions(+), 41 deletions(-) diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h index c0905aec3b4b..56395e8664cb 100644 --- a/drivers/remoteproc/mtk_common.h +++ b/drivers/remoteproc/mtk_common.h @@ -128,6 +128,8 @@ struct mtk_scp { size_t dram_size; struct rproc_subdev *rpmsg_subdev; + + struct list_head elem; }; /** diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index 48e759c2d486..3a8c8bcfa46b 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -23,6 +23,14 @@ #define MAX_CODE_SIZE 0x500000 #define SECTION_NAME_IPI_BUFFER ".ipi_buffer" +struct mtk_scp_of_cluster { + void __iomem *reg_base; + void __iomem *l1tcm_base; + size_t l1tcm_size; + phys_addr_t l1tcm_phys; + struct list_head mtk_scp_list; +}; + /** * scp_get() - get a reference to SCP. * @@ -51,7 +59,7 @@ struct mtk_scp *scp_get(struct platform_device *pdev) return NULL; } - return platform_get_drvdata(scp_pdev); + return *(struct mtk_scp **)dev_get_platdata(&scp_pdev->dev); } EXPORT_SYMBOL_GPL(scp_get); @@ -809,14 +817,14 @@ static void scp_unmap_memory_region(struct mtk_scp *scp) static int scp_register_ipi(struct platform_device *pdev, u32 id, ipi_handler_t handler, void *priv) { - struct mtk_scp *scp = platform_get_drvdata(pdev); + struct mtk_scp *scp = *(struct mtk_scp **)dev_get_platdata(&pdev->dev); return scp_ipi_register(scp, id, handler, priv); } static void scp_unregister_ipi(struct platform_device *pdev, u32 id) { - struct mtk_scp *scp = platform_get_drvdata(pdev); + struct mtk_scp *scp = *(struct mtk_scp **)dev_get_platdata(&pdev->dev); scp_ipi_unregister(scp, id); } @@ -824,7 +832,7 @@ static void scp_unregister_ipi(struct platform_device *pdev, u32 id) static int scp_send_ipi(struct platform_device *pdev, u32 id, void *buf, unsigned int len, unsigned int wait) { - struct mtk_scp *scp = platform_get_drvdata(pdev); + struct mtk_scp *scp = *(struct mtk_scp **)dev_get_platdata(&pdev->dev); return scp_ipi_send(scp, id, buf, len, wait); } @@ -854,7 +862,8 @@ static void scp_remove_rpmsg_subdev(struct mtk_scp *scp) } } -static int scp_probe(struct platform_device *pdev) +static struct mtk_scp *scp_rproc_init(struct platform_device *pdev, + struct mtk_scp_of_cluster *scp_cluster) { struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; @@ -866,52 +875,42 @@ static int scp_probe(struct platform_device *pdev) ret = rproc_of_parse_firmware(dev, 0, &fw_name); if (ret < 0 && ret != -EINVAL) - return ret; + return ERR_PTR(ret); rproc = devm_rproc_alloc(dev, np->name, &scp_ops, fw_name, sizeof(*scp)); - if (!rproc) - return dev_err_probe(dev, -ENOMEM, "unable to allocate remoteproc\n"); + if (!rproc) { + dev_err(dev, "unable to allocate remoteproc\n"); + return ERR_PTR(-ENOMEM); + } scp = rproc->priv; scp->rproc = rproc; scp->dev = dev; scp->data = of_device_get_match_data(dev); - platform_set_drvdata(pdev, scp); + platform_device_add_data(pdev, &scp, sizeof(scp)); + + scp->reg_base = scp_cluster->reg_base; + scp->l1tcm_base = scp_cluster->l1tcm_base; + scp->l1tcm_size = scp_cluster->l1tcm_size; + scp->l1tcm_phys = scp_cluster->l1tcm_phys; res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sram"); scp->sram_base = devm_ioremap_resource(dev, res); - if (IS_ERR(scp->sram_base)) - return dev_err_probe(dev, PTR_ERR(scp->sram_base), - "Failed to parse and map sram memory\n"); + if (IS_ERR(scp->sram_base)) { + dev_err(dev, "Failed to parse and map sram memory\n"); + return ERR_CAST(scp->sram_base); + } scp->sram_size = resource_size(res); scp->sram_phys = res->start; - /* l1tcm is an optional memory region */ - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "l1tcm"); - scp->l1tcm_base = devm_ioremap_resource(dev, res); - if (IS_ERR(scp->l1tcm_base)) { - ret = PTR_ERR(scp->l1tcm_base); - if (ret != -EINVAL) { - return dev_err_probe(dev, ret, "Failed to map l1tcm memory\n"); - } - } else { - scp->l1tcm_size = resource_size(res); - scp->l1tcm_phys = res->start; - } - - scp->reg_base = devm_platform_ioremap_resource_byname(pdev, "cfg"); - if (IS_ERR(scp->reg_base)) - return dev_err_probe(dev, PTR_ERR(scp->reg_base), - "Failed to parse and map cfg memory\n"); - ret = scp->data->scp_clk_get(scp); if (ret) - return ret; + return ERR_PTR(ret); ret = scp_map_memory_region(scp); if (ret) - return ret; + return ERR_PTR(ret); mutex_init(&scp->send_lock); for (i = 0; i < SCP_IPI_MAX; i++) @@ -938,11 +937,7 @@ static int scp_probe(struct platform_device *pdev) goto remove_subdev; } - ret = rproc_add(rproc); - if (ret) - goto remove_subdev; - - return 0; + return scp; remove_subdev: scp_remove_rpmsg_subdev(scp); @@ -953,15 +948,13 @@ static int scp_probe(struct platform_device *pdev) mutex_destroy(&scp->ipi_desc[i].lock); mutex_destroy(&scp->send_lock); - return ret; + return ERR_PTR(ret); } -static void scp_remove(struct platform_device *pdev) +static void scp_free(struct mtk_scp *scp) { - struct mtk_scp *scp = platform_get_drvdata(pdev); int i; - rproc_del(scp->rproc); scp_remove_rpmsg_subdev(scp); scp_ipi_unregister(scp, SCP_IPI_INIT); scp_unmap_memory_region(scp); @@ -970,6 +963,82 @@ static void scp_remove(struct platform_device *pdev) mutex_destroy(&scp->send_lock); } +static int scp_cluster_init(struct platform_device *pdev) +{ + struct mtk_scp_of_cluster *scp_cluster = platform_get_drvdata(pdev); + struct list_head *cluster = &scp_cluster->mtk_scp_list; + struct mtk_scp *scp; + int ret; + + scp = scp_rproc_init(pdev, scp_cluster); + if (IS_ERR(scp)) + return PTR_ERR(scp); + + ret = rproc_add(scp->rproc); + if (ret) { + dev_err(dev, "Failed to add rproc\n"); + scp_free(scp); + return ret; + } + + list_add_tail(&scp->elem, cluster); + + return 0; +} + +static int scp_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct mtk_scp_of_cluster *scp_cluster; + struct resource *res; + int ret; + + scp_cluster = devm_kzalloc(dev, sizeof(*scp_cluster), GFP_KERNEL); + if (!scp_cluster) + return -ENOMEM; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg"); + scp_cluster->reg_base = devm_ioremap_resource(dev, res); + if (IS_ERR(scp_cluster->reg_base)) + return dev_err_probe(dev, PTR_ERR(scp_cluster->reg_base), + "Failed to parse and map cfg memory\n"); + + /* l1tcm is an optional memory region */ + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "l1tcm"); + scp_cluster->l1tcm_base = devm_ioremap_resource(dev, res); + if (IS_ERR(scp_cluster->l1tcm_base)) { + ret = PTR_ERR(scp_cluster->l1tcm_base); + if (ret != -EINVAL) + return dev_err_probe(dev, ret, "Failed to map l1tcm memory\n"); + + scp_cluster->l1tcm_base = NULL; + } else { + scp_cluster->l1tcm_size = resource_size(res); + scp_cluster->l1tcm_phys = res->start; + } + + INIT_LIST_HEAD(&scp_cluster->mtk_scp_list); + platform_set_drvdata(pdev, scp_cluster); + + ret = scp_cluster_init(pdev); + if (ret) + return ret; + + return 0; +} + +static void scp_remove(struct platform_device *pdev) +{ + struct mtk_scp_of_cluster *scp_cluster = platform_get_drvdata(pdev); + struct mtk_scp *scp, *temp; + + list_for_each_entry_safe_reverse(scp, temp, &scp_cluster->mtk_scp_list, elem) { + list_del(&scp->elem); + rproc_del(scp->rproc); + scp_free(scp); + } +} + static const struct mtk_scp_of_data mt8183_of_data = { .scp_clk_get = mt8183_scp_clk_get, .scp_before_load = mt8183_scp_before_load, From patchwork Fri Jul 7 05:26:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 116974 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f45:0:b0:3ea:f831:8777 with SMTP id v5csp3039403vqx; Thu, 6 Jul 2023 22:36:40 -0700 (PDT) X-Google-Smtp-Source: APBJJlHmDz73Ncl+HL/HTaVZrrCsS+L16wUWIxfran8aTssqEVv+wshfdjR2ZMRdXVpRe5KDDLKQ X-Received: by 2002:a05:6a00:2489:b0:668:99aa:3f17 with SMTP id c9-20020a056a00248900b0066899aa3f17mr4464786pfv.16.1688708200271; Thu, 06 Jul 2023 22:36:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688708200; cv=none; d=google.com; s=arc-20160816; b=wq9TodfezUEE6b0p02tgIImATIvvo4azHgFy93vmmYMfDLdrI+p2JcLJe6wNyNMRA4 sdOCXBDWaQfKi7/lsAYgVB0rK8lxQX4NOtNzXxKOnqas4VCNEZr45Qj4xHVUVeT4kc+p usLho9IkQI7eBc1Zxrxd1Qok9Ibo98aOipXYazNldseVAskej8K2kux4C1fxp1ghmsyE iEiRhpfx0aVd6YwjPGpn8nPErikmSPlIY2rSkzMbhD+txcPH+svSShSmoAgqhd999Lw8 /0N7FwHAgrSW3mjqfXULp0khdfp6bm5b/GvYx4JrZQ4pkU08U4WQ5cprtWAbReQnVPNJ 0AZQ== ARC-Message-Signature: i=1; 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The SCP driver populates the platform device and checks the child nodes to identify whether it's a single-core SCP or a multi-core SCP. Add the remoteproc instances of multi-core SCP to the SCP cluster list. When the SCP driver is removed, it cleanup resources by walking through the cluster list. Signed-off-by: Tinghan Shen Reviewed-by: AngeloGioacchino Del Regno --- drivers/remoteproc/mtk_scp.c | 115 +++++++++++++++++++++++++++++++++-- 1 file changed, 111 insertions(+), 4 deletions(-) diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index 3a8c8bcfa46b..3349488e5f21 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -863,7 +863,8 @@ static void scp_remove_rpmsg_subdev(struct mtk_scp *scp) } static struct mtk_scp *scp_rproc_init(struct platform_device *pdev, - struct mtk_scp_of_cluster *scp_cluster) + struct mtk_scp_of_cluster *scp_cluster, + const struct mtk_scp_of_data *of_data) { struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; @@ -886,7 +887,7 @@ static struct mtk_scp *scp_rproc_init(struct platform_device *pdev, scp = rproc->priv; scp->rproc = rproc; scp->dev = dev; - scp->data = of_device_get_match_data(dev); + scp->data = of_data; platform_device_add_data(pdev, &scp, sizeof(scp)); scp->reg_base = scp_cluster->reg_base; @@ -963,14 +964,15 @@ static void scp_free(struct mtk_scp *scp) mutex_destroy(&scp->send_lock); } -static int scp_cluster_init(struct platform_device *pdev) +static int scp_add_single_core(struct platform_device *pdev) { + struct device *dev = &pdev->dev; struct mtk_scp_of_cluster *scp_cluster = platform_get_drvdata(pdev); struct list_head *cluster = &scp_cluster->mtk_scp_list; struct mtk_scp *scp; int ret; - scp = scp_rproc_init(pdev, scp_cluster); + scp = scp_rproc_init(pdev, scp_cluster, of_device_get_match_data(dev)); if (IS_ERR(scp)) return PTR_ERR(scp); @@ -986,6 +988,100 @@ static int scp_cluster_init(struct platform_device *pdev) return 0; } +static int scp_add_multi_core(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *np = dev_of_node(dev); + struct platform_device *cpdev; + struct device_node *child; + struct mtk_scp_of_cluster *scp_cluster = platform_get_drvdata(pdev); + struct list_head *cluster = &scp_cluster->mtk_scp_list; + const struct mtk_scp_of_data **cluster_of_data; + struct mtk_scp *scp, *temp; + int core_id = 0; + int ret; + + cluster_of_data = (const struct mtk_scp_of_data **)of_device_get_match_data(dev); + + for_each_available_child_of_node(np, child) { + if (!cluster_of_data[core_id]) { + ret = -EINVAL; + dev_err(dev, "Not support core %d\n", core_id); + of_node_put(child); + goto init_fail; + } + + cpdev = of_find_device_by_node(child); + if (!cpdev) { + ret = -ENODEV; + dev_err(dev, "Not found platform device for core %d\n", core_id); + of_node_put(child); + goto init_fail; + } + + scp = scp_rproc_init(cpdev, scp_cluster, cluster_of_data[core_id]); + put_device(&cpdev->dev); + if (IS_ERR(scp)) { + ret = PTR_ERR(scp); + dev_err(dev, "Failed to initialize core %d rproc\n", core_id); + of_node_put(child); + goto init_fail; + } + + ret = rproc_add(scp->rproc); + if (ret) { + dev_err(dev, "Failed to add rproc of core %d\n", core_id); + of_node_put(child); + scp_free(scp); + goto init_fail; + } + + list_add_tail(&scp->elem, cluster); + core_id++; + } + + return 0; + +init_fail: + list_for_each_entry_safe_reverse(scp, temp, cluster, elem) { + list_del(&scp->elem); + rproc_del(scp->rproc); + scp_free(scp); + } + + return ret; +} + +static int scp_is_single_core(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *np = dev_of_node(dev); + struct device_node *child; + + child = of_get_next_available_child(np, NULL); + if (!child) + return dev_err_probe(dev, -ENODEV, "No child node\n"); + + of_node_put(child); + return of_node_name_eq(child, "cros-ec-rpmsg"); +} + +static int scp_cluster_init(struct platform_device *pdev) +{ + int ret; + + ret = scp_is_single_core(pdev); + if (ret < 0) + return ret; + + if (ret) + ret = scp_add_single_core(pdev); + else + ret = scp_add_multi_core(pdev); + + return ret; +} + static int scp_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -1020,6 +1116,10 @@ static int scp_probe(struct platform_device *pdev) INIT_LIST_HEAD(&scp_cluster->mtk_scp_list); platform_set_drvdata(pdev, scp_cluster); + ret = devm_of_platform_populate(dev); + if (ret) + return dev_err_probe(dev, ret, "Failed to populate platform devices\n"); + ret = scp_cluster_init(pdev); if (ret) return ret; @@ -1113,12 +1213,19 @@ static const struct mtk_scp_of_data mt8195_of_data_c1 = { .host_to_scp_int_bit = MT8195_CORE1_HOST_IPC_INT_BIT, }; +static const struct mtk_scp_of_data *mt8195_of_data_cores[] = { + &mt8195_of_data, + &mt8195_of_data_c1, + NULL +}; + static const struct of_device_id mtk_scp_of_match[] = { { .compatible = "mediatek,mt8183-scp", .data = &mt8183_of_data }, { .compatible = "mediatek,mt8186-scp", .data = &mt8186_of_data }, { .compatible = "mediatek,mt8188-scp", .data = &mt8188_of_data }, { .compatible = "mediatek,mt8192-scp", .data = &mt8192_of_data }, { .compatible = "mediatek,mt8195-scp", .data = &mt8195_of_data }, + { .compatible = "mediatek,mt8195-scp-dual", .data = &mt8195_of_data_cores }, {}, }; MODULE_DEVICE_TABLE(of, mtk_scp_of_match); From patchwork Fri Jul 7 05:26:07 2023 Content-Type: text/plain; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id k13-20020a170902c40d00b001b231cb6f22si3404608plk.111.2023.07.06.22.27.51; Thu, 06 Jul 2023 22:28:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=Bz+j3YXq; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232346AbjGGF1F (ORCPT + 99 others); Fri, 7 Jul 2023 01:27:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232508AbjGGF0b (ORCPT ); Fri, 7 Jul 2023 01:26:31 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EFFE7171D; Thu, 6 Jul 2023 22:26:27 -0700 (PDT) X-UUID: cbe7c3fa1c8611eeb20a276fd37b9834-20230707 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=D1lXYdyfOfRoaAcdJsP+/taOV2FLC2+fVs+lIM1Csuw=; b=Bz+j3YXqag27mf/JBj8XOhH5nAMUaYReRNt8phFWvkyYX871IqGsDUT47QFW2K8enKjZrAgDu9vz7hLX5pz8DiuuXUbjyRLymxlmlfdhdw973YS3nobEM+uakI+aVToznrOYg9WIIxaDp06x570AUJqSNMma3yfm6e2OCVr595s=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.27,REQID:e7fab1c8-0590-43aa-a74e-9b1ba804826a,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:01c9525,CLOUDID:e06caa0d-26a8-467f-b838-f99719a9c083,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: cbe7c3fa1c8611eeb20a276fd37b9834-20230707 Received: from mtkmbs13n2.mediatek.inc [(172.21.101.108)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1886057916; Fri, 07 Jul 2023 13:26:16 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 7 Jul 2023 13:26:15 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 7 Jul 2023 13:26:15 +0800 From: Tinghan Shen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Tinghan Shen CC: , , , , , Subject: [PATCH v14 07/12] remoteproc: mediatek: Remove dependency of MT8195 SCP L2TCM power control on dual-core SCP Date: Fri, 7 Jul 2023 13:26:07 +0800 Message-ID: <20230707052612.27521-8-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230707052612.27521-1-tinghan.shen@mediatek.com> References: <20230707052612.27521-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770738349547191026?= X-GMAIL-MSGID: =?utf-8?q?1770738349547191026?= Previously, SCP core 0 controlled the power of L2TCM and dictated that SCP core 1 could only boot after SCP core 0. To address this constraint, extracted the power control flow of L2TCM and made it shared between both cores, enabling support of arbitrary boot order. The flow for controlling L2TCM power has been incorporated into the mt8195_scp_before_load() and mt8195_scp_stop() APIs, which are respectively invoked during the rproc->ops->start() and rproc->ops->stop() operations. These APIs effectively serve the same purpose as the rproc prepare()/unprepare() APIs." Signed-off-by: Tinghan Shen --- drivers/remoteproc/mtk_common.h | 1 + drivers/remoteproc/mtk_scp.c | 80 ++++++++++++++++++++++++++------- 2 files changed, 66 insertions(+), 15 deletions(-) diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h index 56395e8664cb..41e1b4732b75 100644 --- a/drivers/remoteproc/mtk_common.h +++ b/drivers/remoteproc/mtk_common.h @@ -130,6 +130,7 @@ struct mtk_scp { struct rproc_subdev *rpmsg_subdev; struct list_head elem; + struct platform_device *cluster_pdev; }; /** diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index 3349488e5f21..94602272c05f 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -29,6 +29,10 @@ struct mtk_scp_of_cluster { size_t l1tcm_size; phys_addr_t l1tcm_phys; struct list_head mtk_scp_list; + + /* Prevent concurrent operations of L2TCM power control. */ + struct mutex l2tcm_lock; + u32 l2tcm_refcnt; }; /** @@ -449,7 +453,7 @@ static int mt8192_scp_before_load(struct mtk_scp *scp) writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET); - /* enable SRAM clock */ + /* enable SRAM power */ scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); @@ -462,19 +466,38 @@ static int mt8192_scp_before_load(struct mtk_scp *scp) return 0; } -static int mt8195_scp_before_load(struct mtk_scp *scp) +static int mt8195_scp_l2tcm_on(struct mtk_scp *scp) { - /* clear SPM interrupt, SCP2SPM_IPC_CLR */ - writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR); + struct mtk_scp_of_cluster *scp_cluster = platform_get_drvdata(scp->cluster_pdev); + + mutex_lock(&scp_cluster->l2tcm_lock); + + if (scp_cluster->l2tcm_refcnt == 0) { + /* clear SPM interrupt, SCP2SPM_IPC_CLR */ + writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR); + + /* Power on L2TCM */ + scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); + scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); + scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); + scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN, + MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS); + } + + scp_cluster->l2tcm_refcnt += 1; + mutex_unlock(&scp_cluster->l2tcm_lock); + + return 0; +} + +static int mt8195_scp_before_load(struct mtk_scp *scp) +{ writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET); + mt8195_scp_l2tcm_on(scp); + /* enable SRAM clock */ - scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); - scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); - scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); - scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN, - MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS); scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); /* enable MPU for all memory regions */ @@ -487,6 +510,8 @@ static int mt8195_scp_c1_before_load(struct mtk_scp *scp) { scp->data->scp_reset_assert(scp); + mt8195_scp_l2tcm_on(scp); + scp_sram_power_on(scp->reg_base + MT8195_CPU1_SRAM_PD, 0); /* enable MPU for all memory regions */ @@ -653,14 +678,30 @@ static void mt8192_scp_stop(struct mtk_scp *scp) writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG); } +static void mt8195_scp_l2tcm_off(struct mtk_scp *scp) +{ + struct mtk_scp_of_cluster *scp_cluster = platform_get_drvdata(scp->cluster_pdev); + + mutex_lock(&scp_cluster->l2tcm_lock); + + scp_cluster->l2tcm_refcnt -= 1; + + if (scp_cluster->l2tcm_refcnt == 0) { + /* Power off L2TCM */ + scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); + scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); + scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); + scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0); + scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); + } + + mutex_unlock(&scp_cluster->l2tcm_lock); +} + static void mt8195_scp_stop(struct mtk_scp *scp) { - /* Disable SRAM clock */ - scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); - scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); - scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); - scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN, - MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS); + mt8195_scp_l2tcm_off(scp); + scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); /* Disable SCP watchdog */ @@ -669,6 +710,8 @@ static void mt8195_scp_stop(struct mtk_scp *scp) static void mt8195_scp_c1_stop(struct mtk_scp *scp) { + mt8195_scp_l2tcm_off(scp); + /* Power off CPU SRAM */ scp_sram_power_off(scp->reg_base + MT8195_CPU1_SRAM_PD, 0); @@ -976,6 +1019,8 @@ static int scp_add_single_core(struct platform_device *pdev) if (IS_ERR(scp)) return PTR_ERR(scp); + scp->cluster_pdev = pdev; + ret = rproc_add(scp->rproc); if (ret) { dev_err(dev, "Failed to add rproc\n"); @@ -1028,6 +1073,8 @@ static int scp_add_multi_core(struct platform_device *pdev) goto init_fail; } + scp->cluster_pdev = pdev; + ret = rproc_add(scp->rproc); if (ret) { dev_err(dev, "Failed to add rproc of core %d\n", core_id); @@ -1114,6 +1161,7 @@ static int scp_probe(struct platform_device *pdev) } INIT_LIST_HEAD(&scp_cluster->mtk_scp_list); + mutex_init(&scp_cluster->l2tcm_lock); platform_set_drvdata(pdev, scp_cluster); ret = devm_of_platform_populate(dev); @@ -1137,6 +1185,8 @@ static void scp_remove(struct platform_device *pdev) rproc_del(scp->rproc); scp_free(scp); } + + mutex_destroy(&scp_cluster->l2tcm_lock); } static const struct mtk_scp_of_data mt8183_of_data = { From patchwork Fri Jul 7 05:26:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 116963 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f45:0:b0:3ea:f831:8777 with SMTP id v5csp3035692vqx; Thu, 6 Jul 2023 22:27:45 -0700 (PDT) X-Google-Smtp-Source: APBJJlFALD0Wng2BOxnh3Y9SD/qHWmJRax8JGj8lkvoWQAAfARZjO2I9It3QY8TPDfKUML0r36By X-Received: by 2002:a05:6a20:1050:b0:12e:ba2:7283 with SMTP id gt16-20020a056a20105000b0012e0ba27283mr2804270pzc.24.1688707665611; Thu, 06 Jul 2023 22:27:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688707665; cv=none; d=google.com; s=arc-20160816; b=02FPdLI9MkygC8BWumPcTB3CBYCPkDTzWmblji2YbbtMZICSslJEgDiT1pcfcTg5pk 3lWy7EtJIvUFxilENDPUcUr2T6cNEgEVqyoDFcFfSmxgRhl73w2cRuCRPAeKKYWwFGZ5 t38pVotog5bDBcQDCZsBncVPd2KJFaiWkkPKZY3GYfHYVom5r9IXpPxAp755cU+qMEVU HcBZOysxeBN/7ETbRRDxubHkFYoWUo7bqqYlOD8eaHeHTi78kgBxX6KRoVB9+ti6ZROn Ch4hGOyWWu7vDCH/s3Yw+WuSuZAZgkoPVfyz2KzGKvLohzTCo50mO1bISB6DvdhbasL5 UFKg== ARC-Message-Signature: i=1; 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The "core 1 SRAM offset" configuration is composed by a range and an offset. It works like a simple memory mapped mechanism. When SCP core 1 accesses a SRAM address located in the range, the SCP bus adds the configured offset to the address to shift the physical destination address on SCP SRAM. This shifting is transparent to the software running on SCP core 1. Signed-off-by: Tinghan Shen Reviewed-by: AngeloGioacchino Del Regno --- drivers/remoteproc/mtk_common.h | 7 +++++++ drivers/remoteproc/mtk_scp.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h index 41e1b4732b75..2f17e3edb2d3 100644 --- a/drivers/remoteproc/mtk_common.h +++ b/drivers/remoteproc/mtk_common.h @@ -65,6 +65,13 @@ #define MT8195_CORE1_MEM_ATT_PREDEF 0x20008 #define MT8195_CORE1_WDT_CFG 0x20034 +#define MT8195_SEC_CTRL 0x85000 +#define MT8195_CORE_OFFSET_ENABLE_D BIT(13) +#define MT8195_CORE_OFFSET_ENABLE_I BIT(12) +#define MT8195_L2TCM_OFFSET_RANGE_0_LOW 0x850b0 +#define MT8195_L2TCM_OFFSET_RANGE_0_HIGH 0x850b4 +#define MT8195_L2TCM_OFFSET 0x850d0 + #define SCP_FW_VER_LEN 32 #define SCP_SHARE_BUFFER_SIZE 288 diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index 94602272c05f..d6e1cc51b63f 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -508,6 +508,10 @@ static int mt8195_scp_before_load(struct mtk_scp *scp) static int mt8195_scp_c1_before_load(struct mtk_scp *scp) { + u32 sec_ctrl; + struct mtk_scp *scp_c0; + struct mtk_scp_of_cluster *scp_cluster = platform_get_drvdata(scp->cluster_pdev); + scp->data->scp_reset_assert(scp); mt8195_scp_l2tcm_on(scp); @@ -517,6 +521,30 @@ static int mt8195_scp_c1_before_load(struct mtk_scp *scp) /* enable MPU for all memory regions */ writel(0xff, scp->reg_base + MT8195_CORE1_MEM_ATT_PREDEF); + /* + * The L2TCM_OFFSET_RANGE and L2TCM_OFFSET shift the destination address + * on SRAM when SCP core 1 accesses SRAM. + * + * This configuration solves booting the SCP core 0 and core 1 from + * different SRAM address because core 0 and core 1 both boot from + * the head of SRAM by default. this must be configured before boot SCP core 1. + * + * The value of L2TCM_OFFSET_RANGE is from the viewpoint of SCP core 1. + * When SCP core 1 issues address within the range (L2TCM_OFFSET_RANGE), + * the address will be added with a fixed offset (L2TCM_OFFSET) on the bus. + * The shift action is tranparent to software. + */ + writel(0, scp->reg_base + MT8195_L2TCM_OFFSET_RANGE_0_LOW); + writel(scp->sram_size, scp->reg_base + MT8195_L2TCM_OFFSET_RANGE_0_HIGH); + + scp_c0 = list_first_entry(&scp_cluster->mtk_scp_list, struct mtk_scp, elem); + writel(scp->sram_phys - scp_c0->sram_phys, scp->reg_base + MT8195_L2TCM_OFFSET); + + /* enable SRAM offset when fetching instruction and data */ + sec_ctrl = readl(scp->reg_base + MT8195_SEC_CTRL); + sec_ctrl |= MT8195_CORE_OFFSET_ENABLE_I | MT8195_CORE_OFFSET_ENABLE_D; + writel(sec_ctrl, scp->reg_base + MT8195_SEC_CTRL); + return 0; } From patchwork Fri Jul 7 05:26:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 116971 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f45:0:b0:3ea:f831:8777 with SMTP id v5csp3038773vqx; Thu, 6 Jul 2023 22:35:14 -0700 (PDT) X-Google-Smtp-Source: APBJJlHgfvsee9dJTaqmbe3npwjUEgVR4Qhba2NLukIpVAWUNNxr6utFCbjQb6+a7f3t+NdiOD89 X-Received: by 2002:a05:620a:1488:b0:765:59d8:d421 with SMTP id w8-20020a05620a148800b0076559d8d421mr3532524qkj.1.1688708113949; Thu, 06 Jul 2023 22:35:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688708113; cv=none; d=google.com; s=arc-20160816; b=KL3/lC0uJIMOO/NqEZAVs6FvpjnllCfRGrwAOWKEWiYw0TWq31GG/EA/BrFzgmXGtp vDiGPPn9dnUIDvlG4b77xETHUwOPYmBX/vSDgBXH2ybxHE8OQMp5k4nP0AkxZXiX5FcL L9uKui0BUMQNpk0jJ8/4y9UrkL04Kr6ROSqwNGXbtyDBdZaGuscWCZZR+udapCuNiC5+ b11EyvAYE/3DPIqaMSAMndXYQfcXPukdwy1VuGGI320Ex9vV6SOD++lnTZRR2SqoxSU4 Y++MgYP0A0gVJCS4uGfa2gdgHxXM+yNMO90Uaf/JaWbPpliDksDFFUFG/wNe320phAps hNCA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=SlYlvpPw0hiqfSXw/N7B2oAuhPADqJhNrfYvoZbTYtw=; fh=fiUFlTmdXAnPLHH0bIyIc4brKi/t2/OmtpRJQ8s00Ug=; b=MjplfdYVU5uI3YR+kOze6xe4UrXQbsTeNFU6YpGv3/Mb4C3APQnoSiCj0rhq0GOb2O U/W7CKrP2mHK+3U0KETULgRLX4PS6lLn6tFKvq9rh+cIAJ2XEbgKzu28jpQcBpawNzIa tU1GG0L/MMYYpP6OOPuDUANHgdjjwk3/EWIoQWvF+bLzfIjR/ZDI0pl+QpVzi3dV9ycT vDs8ufZ2x1E9sx7kWG6eopTyJ+frHuQG3zIXRHWnMLg1ZhYuQHMwKJwNfrF43vfk80+y DuA2A907Wg5NaIo4+2yWw+DRX1PdhXgKO88ShwB+35qby++Xeubu1BTAKB98DZ6Q5glN 8MvA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=Reldj9kF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. 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MT8195 SCP has a watchdog status register to identify the watchdog timeout source when IRQ triggered. Signed-off-by: Tinghan Shen Reviewed-by: AngeloGioacchino Del Regno --- drivers/remoteproc/mtk_common.h | 5 +++++ drivers/remoteproc/mtk_scp.c | 25 ++++++++++++++++++++++++- 2 files changed, 29 insertions(+), 1 deletion(-) diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h index 2f17e3edb2d3..7bfc1db96db1 100644 --- a/drivers/remoteproc/mtk_common.h +++ b/drivers/remoteproc/mtk_common.h @@ -55,6 +55,10 @@ #define MT8192_CORE0_WDT_IRQ 0x10030 #define MT8192_CORE0_WDT_CFG 0x10034 +#define MT8195_SYS_STATUS 0x4004 +#define MT8195_CORE0_WDT BIT(16) +#define MT8195_CORE1_WDT BIT(17) + #define MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS GENMASK(7, 4) #define MT8195_CPU1_SRAM_PD 0x1084 @@ -63,6 +67,7 @@ #define MT8195_CORE1_SW_RSTN_CLR 0x20000 #define MT8195_CORE1_SW_RSTN_SET 0x20004 #define MT8195_CORE1_MEM_ATT_PREDEF 0x20008 +#define MT8195_CORE1_WDT_IRQ 0x20030 #define MT8195_CORE1_WDT_CFG 0x20034 #define MT8195_SEC_CTRL 0x85000 diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index d6e1cc51b63f..9fed5161f094 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -234,6 +234,29 @@ static void mt8192_scp_irq_handler(struct mtk_scp *scp) } } +static void mt8195_scp_irq_handler(struct mtk_scp *scp) +{ + u32 scp_to_host; + + scp_to_host = readl(scp->reg_base + MT8192_SCP2APMCU_IPC_SET); + + if (scp_to_host & MT8192_SCP_IPC_INT_BIT) { + scp_ipi_handler(scp); + } else { + u32 reason = readl(scp->reg_base + MT8195_SYS_STATUS); + + if (reason & MT8195_CORE0_WDT) + writel(1, scp->reg_base + MT8192_CORE0_WDT_IRQ); + + if (reason & MT8195_CORE1_WDT) + writel(1, scp->reg_base + MT8195_CORE1_WDT_IRQ); + + scp_wdt_handler(scp, reason); + } + + writel(scp_to_host, scp->reg_base + MT8192_SCP2APMCU_IPC_CLR); +} + static void mt8195_scp_c1_irq_handler(struct mtk_scp *scp) { u32 scp_to_host; @@ -1270,7 +1293,7 @@ static const struct mtk_scp_of_data mt8192_of_data = { static const struct mtk_scp_of_data mt8195_of_data = { .scp_clk_get = mt8195_scp_clk_get, .scp_before_load = mt8195_scp_before_load, - .scp_irq_handler = mt8192_scp_irq_handler, + .scp_irq_handler = mt8195_scp_irq_handler, .scp_reset_assert = mt8192_scp_reset_assert, .scp_reset_deassert = mt8192_scp_reset_deassert, .scp_stop = mt8195_scp_stop, From patchwork Fri Jul 7 05:26:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 116972 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f45:0:b0:3ea:f831:8777 with SMTP id v5csp3038854vqx; Thu, 6 Jul 2023 22:35:22 -0700 (PDT) X-Google-Smtp-Source: APBJJlHi76hAAlEGpdobjWGuDL99VeOHkKkdJ/bbyIvQ/d7A6JXvbmmDA/2x8txZBP1/yEzvloqa X-Received: by 2002:a05:6a00:2303:b0:64f:7a9c:cb15 with SMTP id h3-20020a056a00230300b0064f7a9ccb15mr3826264pfh.11.1688708121701; Thu, 06 Jul 2023 22:35:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688708121; cv=none; d=google.com; s=arc-20160816; b=HjPH20e7QCXpZ3sRFLKkvkTIYBP6FJIKU/im1gKYQFMtTszWuc8aHJN4b8asN3+2Ed ebohbCQEcJKiPlh1rrj89DLhJbmIn6UkQH/rGUJD/ojjSRKr8I/U6dJh/c6ZPWdXcZ9A IOREaSk2zsavjQzejEm6ugaBZElrESNCtvaxKnd/uK+h8VLVfZmi/86rY8mFRMGzbhOY rJRLUEKhokcz2FZT70tgetIDySbn4JRmlsSOxoq8sFDMoSJRLyuP4lNDWi/E1sAescRV uDBYYNndYC7cEoe0JLMLJ7AglTi53UvodD9qXKfBWTYip5Dpu0URaU7YnVxD9CugX+cG Zekw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=3sl11VhqG8akLMJjF6rGhsbeRgG3hMhhC2goJPD+85s=; fh=fiUFlTmdXAnPLHH0bIyIc4brKi/t2/OmtpRJQ8s00Ug=; b=ZhiiOAUc+r+yzbcsSzPrITRSS76fo7qaA9NZUKNz0tZyXMk6ehGoDlVX3pfMKwBInK OpG8fqwCxiKLJaeX04rD5OSJ0GnlEtbTw8YejwmXPoM0bpfyIOvYvn8UmFRfmvoh6my4 S7W03Ke0UezYb6XxXC9iHkT7jLTi+zuR6PAXI633jBf68sY69ha8DwHYDolMc7dMGNay O76Voc5Eq8gdLNkf++vUIHr5Bi/k6lOsIv1nGYfMVYMilLocov6csbSz9zVpHsa4znkw rWrArCnrmlhPhVdPzTHKcXXOHLSHMo7Ly0VfVbsC9GAZJ2r1B9yECbOgBManBCsIoe3k GsBA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=dOUcxSPR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Tinghan Shen --- drivers/remoteproc/mtk_scp.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index 9fed5161f094..7e786aaf04e1 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -80,8 +80,14 @@ EXPORT_SYMBOL_GPL(scp_put); static void scp_wdt_handler(struct mtk_scp *scp, u32 scp_to_host) { + struct mtk_scp_of_cluster *scp_cluster = platform_get_drvdata(scp->cluster_pdev); + struct mtk_scp *scp_node; + dev_err(scp->dev, "SCP watchdog timeout! 0x%x", scp_to_host); - rproc_report_crash(scp->rproc, RPROC_WATCHDOG); + + /* report watchdog timeout to all cores */ + list_for_each_entry(scp_node, &scp_cluster->mtk_scp_list, elem) + rproc_report_crash(scp_node->rproc, RPROC_WATCHDOG); } static void scp_init_ipi_handler(void *data, unsigned int len, void *priv) From patchwork Fri Jul 7 05:26:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 116968 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f45:0:b0:3ea:f831:8777 with SMTP id v5csp3038454vqx; Thu, 6 Jul 2023 22:34:26 -0700 (PDT) X-Google-Smtp-Source: APBJJlEbyc2ydfbPLqgpLe4VfK6SypZiLWLEIlbQ2SU8vUvqF4hURibQZKDhGEyd53UN9w0DDwO3 X-Received: by 2002:a05:6a20:1612:b0:130:7ef2:ff21 with SMTP id l18-20020a056a20161200b001307ef2ff21mr2451400pzj.19.1688708065673; Thu, 06 Jul 2023 22:34:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688708065; cv=none; d=google.com; s=arc-20160816; b=dlfhQKaYnbsBZexaMXdRtI086nclCtWV+Anj5LhHHnET/LjkUZbPPVh9vq6Mhq3mz3 hqHAdL0PqQiVVoOc7csbfMVebgHrkjbZUOcJiZi1Hip9z4jlAwExbEQAOnY1pBoH2ozk i5IgbVKjPFiQS4bydM8RGeqpD2hhisDBiZ82nsSkxoJYziFaDS0GDjcUncFwoO8MzuLe ug0z/QwEVOmh61Q5HJ6qW5vgY4bl19PMXqh5Sg82hksFNi6913EBeAFhlyMpMT814Yvz t2Q4YJvwsUbeouUfJ0mzLrCALQZHT3AEffIdjHR508TpwfDklCbytYLQVZ4qRTSUteml BakA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=na3HpXZNfOgnWVi+zI9ynCOM7wsQvJE3p5BPMO+7nXg=; fh=fiUFlTmdXAnPLHH0bIyIc4brKi/t2/OmtpRJQ8s00Ug=; b=HDZZfZUTp50U2g96mQLzX4l+0rfsu1RVXKigBdFgN657KJEo3aGcGBN83s18awtzII JPkpfz/b+azN/7HxlO3UTpnvYNDTqLUTE9xaA4lVGL5TY5DG+aeIWPhYGcdCmibt4IqI HYyfV2w2eeqDZKnwwNVbFQx2VCiw2xpX+LRLNoM/zguzrhFu5/AlnA7f6lozqgvE8tq2 dgyS5g15jLNKjT2KpSdsRPJiGxy89HWMEgJpoLd9dtgmpGMHtOqQLbo9yJ8v5fZeADAm N/jcUTbgBgzh5tMXIHPF9t27J2jZYXymEtr4pa4Uu/GvOJ31n2yo41OhZHvK/4Ur4KGY 2MBA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=Y6IKBiCJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b13-20020a631b4d000000b00543e355adb5si3035654pgm.294.2023.07.06.22.34.11; Thu, 06 Jul 2023 22:34:25 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=Y6IKBiCJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232035AbjGGF05 (ORCPT + 99 others); Fri, 7 Jul 2023 01:26:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42862 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232506AbjGGF0b (ORCPT ); Fri, 7 Jul 2023 01:26:31 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D79301FCE; Thu, 6 Jul 2023 22:26:24 -0700 (PDT) X-UUID: cc4c04461c8611ee9cb5633481061a41-20230707 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=na3HpXZNfOgnWVi+zI9ynCOM7wsQvJE3p5BPMO+7nXg=; b=Y6IKBiCJc1iF9ABt/BKyx33YHDmcsRmrYx/USan6xK6zWbg4Kp/fXv/b4Wp6L+AggD4WRrSiTOYFRWVgFHYK3bXdFjA9zL1bKpV3jFPKjB+guPWtnqgrykajyl7DpymHZwuFZzcND9U5ctpDBYEdSAOFY7AKQMeg1b6b92cEAc4=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.27,REQID:9364fcee-c9c8-43f2-a223-6f3e03261d3f,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:01c9525,CLOUDID:1ef3b9da-b4fa-43c8-9c3e-0d3fabd03ec0,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: cc4c04461c8611ee9cb5633481061a41-20230707 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 944066510; Fri, 07 Jul 2023 13:26:17 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.186) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 7 Jul 2023 13:26:15 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 7 Jul 2023 13:26:15 +0800 From: Tinghan Shen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Tinghan Shen CC: , , , , , Subject: [PATCH v14 11/12] remoteproc: mediatek: Refine ipi handler error message Date: Fri, 7 Jul 2023 13:26:11 +0800 Message-ID: <20230707052612.27521-12-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230707052612.27521-1-tinghan.shen@mediatek.com> References: <20230707052612.27521-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS, T_SCC_BODY_TEXT_LINE,T_SPF_TEMPERROR,UNPARSEABLE_RELAY,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770738748353915256?= X-GMAIL-MSGID: =?utf-8?q?1770738748353915256?= The error message doesn't accurately reflect the cause of the error. The error is due to a handler not being found, not an invalid IPI ID. Signed-off-by: Tinghan Shen Reviewed-by: AngeloGioacchino Del Regno --- drivers/remoteproc/mtk_scp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index 7e786aaf04e1..425d1947d498 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -124,7 +124,7 @@ static void scp_ipi_handler(struct mtk_scp *scp) scp_ipi_lock(scp, id); handler = ipi_desc[id].handler; if (!handler) { - dev_err(scp->dev, "No such ipi id = %d\n", id); + dev_err(scp->dev, "No handler for ipi id = %d\n", id); scp_ipi_unlock(scp, id); return; } From patchwork Fri Jul 7 05:26:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 116966 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f45:0:b0:3ea:f831:8777 with SMTP id v5csp3037014vqx; Thu, 6 Jul 2023 22:31:10 -0700 (PDT) X-Google-Smtp-Source: APBJJlGYPk2cdu2LIZl8KZFpuQB3w6n1oNk89OXKiTl8AqqeGVo8pWeLIX6/dosIeqUBbOrn1tcl X-Received: by 2002:a0d:d105:0:b0:56d:17f6:65d8 with SMTP id t5-20020a0dd105000000b0056d17f665d8mr4321376ywd.21.1688707869779; Thu, 06 Jul 2023 22:31:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688707869; cv=none; d=google.com; s=arc-20160816; b=qufOSVOnYVVs9O4TmAwOIOjpJextHdkjOjpeDg6kN72p6Ed+smw+FXUhtZZpEtkMbk n5MRSR33SPtAhca4UNr726JpeoLQw7EAYNj9RoX/H489jihTLYyLEjPPN35/vbgT8Bvi aKullZeXGxaqEIQNF7BOMY/FKM6oLZzAQ4/0M2ZTm/SPJF+2zqvfgRbsQpPhcpRdcpg6 K31IxEHv6ZNY8ho+gKd9y7NwN7XIHLeUKPXGh5EF4Bs/ZaSenO72pGS09MUlHb+/OUV2 dEZ3JwG9izo+igKZu8rNDDZ18rc7Ozveri1rg2nP1ExreU4pqwXoDb7VMq5juU6N+y0v FpKg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=EgTVB8/wFgscxLDYs3qg9WMPyo6Fp8L2xH8FV1ZxS8Y=; fh=h2/vjUCGtNC+BMuYkewKR/IrgUI087y/plyyI4iel/0=; b=zb/2RH5I9irc09cDF6wbrbrABoG9VEoDuDBqDqrhSYgUN/67nLkKYU9z70GXBvRq+T XxNOYB8hxCpiCBcEHJYUu18gOTXEvP+7fyT5ISiyg2E+YH5pzT/Wstyr7MMNjmyfUQtR qFRtLBDw8GCbk4taiqS7jvnHOb/lXDdTE27jIvFWJWvWPcodsNz9C4dt9zCOD7j4TDhZ XMSXwvbk/DHrxaKw+XSlEQAnor5TWVD9Qp5jdx++jG4LXqWugkAzi2HF43vcWvxhDpJ7 8q+mCFaP11EHwu+D6naLcB20S5JfTPqtmtqJadzS7c01ffQ51L3q6KXcwohv154BiFYy 9XjA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=u10n2+cZ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. 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Since the SCP device node is changed to multi-core structure, enable SCP cluster to enable probing SCP core 0. Signed-off-by: Tinghan Shen Reviewed-by: AngeloGioacchino Del Regno --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 6 +++- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 34 ++++++++++++++----- 2 files changed, 30 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index 37a3e9de90ff..4584077d3a4c 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -991,7 +991,11 @@ interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>; }; -&scp { +&scp_cluster { + status = "okay"; +}; + +&scp_c0 { status = "okay"; firmware-name = "mediatek/mt8195/scp.img"; diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 48b72b3645e1..7809118f74fb 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -922,14 +922,30 @@ clocks = <&infracfg_ao CLK_INFRA_AO_GCE2>; }; - scp: scp@10500000 { - compatible = "mediatek,mt8195-scp"; - reg = <0 0x10500000 0 0x100000>, - <0 0x10720000 0 0xe0000>, - <0 0x10700000 0 0x8000>; - reg-names = "sram", "cfg", "l1tcm"; - interrupts = ; + scp_cluster: scp@10500000 { + compatible = "mediatek,mt8195-scp-dual"; + reg = <0 0x10720000 0 0xe0000>, <0 0x10700000 0 0x8000>; + reg-names = "cfg", "l1tcm"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x10500000 0x100000>; status = "disabled"; + + scp_c0: scp@0 { + compatible = "mediatek,scp-core"; + reg = <0x0 0xa0000>; + reg-names = "sram"; + interrupts = ; + status = "disabled"; + }; + + scp_c1: scp@a0000 { + compatible = "mediatek,scp-core"; + reg = <0xa0000 0x20000>; + reg-names = "sram"; + interrupts = ; + status = "disabled"; + }; }; scp_adsp: clock-controller@10720000 { @@ -2374,7 +2390,7 @@ video-codec@18000000 { compatible = "mediatek,mt8195-vcodec-dec"; - mediatek,scp = <&scp>; + mediatek,scp = <&scp_c0>; iommus = <&iommu_vdo M4U_PORT_L21_VDEC_MC_EXT>; #address-cells = <2>; #size-cells = <2>; @@ -2540,7 +2556,7 @@ <&iommu_vdo M4U_PORT_L19_VENC_REF_LUMA>, <&iommu_vdo M4U_PORT_L19_VENC_REF_CHROMA>; interrupts = ; - mediatek,scp = <&scp>; + mediatek,scp = <&scp_c0>; clocks = <&vencsys CLK_VENC_VENC>; clock-names = "venc_sel"; assigned-clocks = <&topckgen CLK_TOP_VENC>;