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[8.43.85.97]) by mx.google.com with ESMTPS id w13-20020a05640234cd00b0043bd6cf51d1si10018545edc.530.2022.08.15.17.45.20 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Aug 2022 17:45:20 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@rivosinc-com.20210112.gappssmtp.com header.s=20210112 header.b=Mrca3exP; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7412538582A5 for ; Tue, 16 Aug 2022 00:45:16 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pg1-x534.google.com (mail-pg1-x534.google.com [IPv6:2607:f8b0:4864:20::534]) by sourceware.org (Postfix) with ESMTPS id 3F3793858C2D for ; Tue, 16 Aug 2022 00:44:47 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 3F3793858C2D Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-pg1-x534.google.com with SMTP id 24so7920367pgr.7 for ; Mon, 15 Aug 2022 17:44:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; h=to:subject:message-id:date:from:mime-version:from:to:cc; bh=poNRC37YtFvZqKQLJhwkSfqCg/hPTCIAojrY2iGo1D4=; b=Mrca3exPxIh7fwVbCFNJU5W+iWxRZjJDTBQofWlKWXfezXl9XeD+k30ZneX32SpduP 3jcR0Bmy9WdhDS3d9PmVp7JCo1GBlHFoeT3yUou3SBqdY5tBQwengzq0O1WHw9Gg6ux2 TvX2uWwcfKfkMbBHdF3l1HA+DUd9JRdX/HXYnNkOQqb+Ycq+5JoUjMM1C8ABS/Zf8/wt L+W3pD0ifhzpO+pQC+dhmDQ2zfONeJRyjzAAMx5xFC+AyoIFsYt0bW4FRrTcuOElvwt9 tUeCyO+loXGbLCGJVKrGmUe8BvFb+ZJt46RAaLks5C/FHUMdw9XwV9K8L/lvZ6MrS++q fiQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=to:subject:message-id:date:from:mime-version:x-gm-message-state :from:to:cc; bh=poNRC37YtFvZqKQLJhwkSfqCg/hPTCIAojrY2iGo1D4=; b=wlK6XrSjudCHUMuuNwt5m0vA6pPC7Mppj59n2FSTt+V+QnDofOEeQRo36LjVITd96S Himd82WEw+qaJQZX0xYnWsVYEe07yo2spm5zY7ycaJ4g8cP9HXO9NMGC/ZLHo82Dcf4z 5LUCvnHy6vAU9v45WI4gynUUxLOEMpkhpTx2QoxiUJrlkqmb5/cKFQ73Q9cfZi/KTxyJ g4D9lAUtpflqTI6A7+mdxpo77t4OX+0LyXdDwBM0K3K7Ld9C5RIh04Iz+OwEHi8OiWlW NinxqreUdK7HoEK2r/JemKXimSB65ylKkCKEQ9NPdsckKRQtso9UVtIKqg/ZPlS05GeR T3dg== X-Gm-Message-State: ACgBeo3YOFCqW8Ip2cpWX/gTx2YUwhu8Dfib3aV/VUZ5so1ELjzEvt1t mxXOEYuOrbAXaunnZ8rxwH3i8AgCU41bwVHB1bgBVKylIXl67A== X-Received: by 2002:a05:6a00:2906:b0:52a:bc7f:f801 with SMTP id cg6-20020a056a00290600b0052abc7ff801mr19322874pfb.49.1660610685776; Mon, 15 Aug 2022 17:44:45 -0700 (PDT) MIME-Version: 1.0 From: Kevin Lee Date: Mon, 15 Aug 2022 17:44:35 -0700 Message-ID: Subject: [PATCH] RISC-V missing __builtin_lceil and __builtin_lfloor To: gcc-patches@gcc.gnu.org X-Spam-Status: No, score=-8.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, HTML_MESSAGE, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-Content-Filtered-By: Mailman/MimeDel 2.1.29 X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1741276546651164958?= X-GMAIL-MSGID: =?utf-8?q?1741276546651164958?= Hello, Currently, __builtin_lceil and __builtin_lfloor doesn't generate an existing instruction fcvt, but rather calls ceil and floor from the library. This patch adds the missing iterator and attributes for lceil and lfloor to produce the optimized code. The test cases check the correct generation of the fcvt instruction for float/double to int/long/long long. Passed the test in riscv-linux. Could this patch be committed? gcc/ChangeLog: Michael Collison * config/riscv/riscv.md (RINT): Add iterator for lceil and lround. (rint_pattern): Add ceil and floor. (rint_rm): Add rup and rdn. gcc/testsuite/ChangeLog: Kevin Lee * gcc.target/riscv/lfloor-lceil.c: New test. Reviewed-by: Palmer Dabbelt Acked-by: Palmer Dabbelt --- gcc/config/riscv/riscv.md | 13 ++- gcc/testsuite/gcc.target/riscv/lfloor-lceil.c | 79 +++++++++++++++++++ 2 files changed, 88 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/lfloor-lceil.c diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index c6399b1389e..070004fa7fe 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -43,6 +43,9 @@ (define_c_enum "unspec" [ UNSPEC_LRINT UNSPEC_LROUND + UNSPEC_LCEIL + UNSPEC_LFLOOR + ;; Stack tie UNSPEC_TIE ]) @@ -345,10 +348,12 @@ (define_mode_attr UNITMODE [(SF "SF") (DF "DF")]) ;; the controlling mode. (define_mode_attr HALFMODE [(DF "SI") (DI "SI") (TF "DI")]) -;; Iterator and attributes for floating-point rounding instructions. -(define_int_iterator RINT [UNSPEC_LRINT UNSPEC_LROUND]) -(define_int_attr rint_pattern [(UNSPEC_LRINT "rint") (UNSPEC_LROUND "round")]) -(define_int_attr rint_rm [(UNSPEC_LRINT "dyn") (UNSPEC_LROUND "rmm")]) +;; Iterator and attributes for floating-point rounding instructions.f +(define_int_iterator RINT [UNSPEC_LRINT UNSPEC_LROUND UNSPEC_LCEIL UNSPEC_LFLOOR]) +(define_int_attr rint_pattern [(UNSPEC_LRINT "rint") (UNSPEC_LROUND "round") + (UNSPEC_LCEIL "ceil") (UNSPEC_LFLOOR "floor")]) +(define_int_attr rint_rm [(UNSPEC_LRINT "dyn") (UNSPEC_LROUND "rmm") + (UNSPEC_LCEIL "rup") (UNSPEC_LFLOOR "rdn")]) ;; Iterator and attributes for quiet comparisons. (define_int_iterator QUIET_COMPARISON [UNSPEC_FLT_QUIET UNSPEC_FLE_QUIET]) diff --git a/gcc/testsuite/gcc.target/riscv/lfloor-lceil.c b/gcc/testsuite/gcc.target/riscv/lfloor-lceil.c new file mode 100644 index 00000000000..4d81c12cefa --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/lfloor-lceil.c @@ -0,0 +1,79 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */ + +int +ceil1(float i) +{ + return __builtin_lceil(i); +} + +long +ceil2(float i) +{ + return __builtin_lceil(i); +} + +long long +ceil3(float i) +{ + return __builtin_lceil(i); +} + +int +ceil4(double i) +{ + return __builtin_lceil(i); +} + +long +ceil5(double i) +{ + return __builtin_lceil(i); +} + +long long +ceil6(double i) +{ + return __builtin_lceil(i); +} + +int +floor1(float i) +{ + return __builtin_lfloor(i); +} + +long +floor2(float i) +{ + return __builtin_lfloor(i); +} + +long long +floor3(float i) +{ + return __builtin_lfloor(i); +} + +int +floor4(double i) +{ + return __builtin_lfloor(i); +} + +long +floor5(double i) +{ + return __builtin_lfloor(i); +} + +long long +floor6(double i) +{ + return __builtin_lfloor(i); +} + +/* { dg-final { scan-assembler-times "fcvt.l.s" 6 } } */ +/* { dg-final { scan-assembler-times "fcvt.l.d" 6 } } */ +/* { dg-final { scan-assembler-not "call" } } */