From patchwork Tue Jul 4 09:04:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 115635 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f45:0:b0:3ea:f831:8777 with SMTP id v5csp1082680vqx; Tue, 4 Jul 2023 02:20:08 -0700 (PDT) X-Google-Smtp-Source: APBJJlEL3a4w1Hp/8dHsEgFJXKje8DfskC46rZXDIgtjI/vutfDHACfGpDU6ESUjzpettPUAG2y4 X-Received: by 2002:a05:6358:c116:b0:134:d329:c05b with SMTP id fh22-20020a056358c11600b00134d329c05bmr7258413rwb.15.1688462408163; Tue, 04 Jul 2023 02:20:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688462408; cv=none; d=google.com; s=arc-20160816; b=iEPGEPE5clQCjaeL4plwBOffCZxBkKHXee6x52tWGVZXOIMvXerwa3HIe8yWgcBSz6 1297kF+GokpEnrXiVS6sHKQhn4KaxuhUHarTkXcxu0SSvU7YCpsjXeY6Js83mnEHi9Hd 7RM3mxHox8ZF1yB2CCslijOhbFuuEwIj0NgnhLx8+3y62CfSDrt3/07lByQ/w62yytBK 42YHvxJs9z8lbDBNgpiyHMWf70iT6N9cn+0xPnRBl0OBpU2YWIWTFwOR1JhdAlyAT+Yz 3eut8RDvWOk0hbtlNBL0DXA8G1Iy94UBpubUYSCGW7BSadR6Ed12GH59ThBR7ljtcrGP Va4g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=EJ5Y4oZ9mGskbnswsLP7XY75FwWEUBmBo5J0iTDVhDY=; fh=9L4c8Y3Ztj8IJEHul2Oxap4WQbV4N6M3aZnulda9XVo=; b=QsoDobWWz+hYaHFbb5JwwdJ6pm3mRQAYi3yqmJoo+dq+YQvshT79seOxd6OKicEiiT N38TKoE1j56SOHycgCS3AAFqdCAOPv8ygFc4/E7A9QpM93TdkBtRK+9YbNA3CYOvElme Fl4ML96qnqPIvZoCjq8tVwClOasD+y/fbilzptqezh8KXll3a9xfaZl+GsmeRsU+QcMX OV+MsJhIAz5obBoG0JTb8o7UPZ6nWl4u5pd9q0V+UXE1Qx1CsofgI3xT6haf9N7GeZ/3 c6Rx0LoP6OBjvuMGVuN+3bmllluX3Tp3qPro+lLaQmlcjTdbVeqZIstQqP60baf1pgU2 Fyqg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id n38-20020a635c66000000b005303a26dbf8si20477364pgm.408.2023.07.04.02.19.53; Tue, 04 Jul 2023 02:20:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231953AbjGDJFZ convert rfc822-to-8bit (ORCPT + 99 others); Tue, 4 Jul 2023 05:05:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37706 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231854AbjGDJFJ (ORCPT ); Tue, 4 Jul 2023 05:05:09 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C901510E4; Tue, 4 Jul 2023 02:05:03 -0700 (PDT) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id BA27E24E2AD; Tue, 4 Jul 2023 17:04:55 +0800 (CST) Received: from EXMBX068.cuchost.com (172.16.6.68) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 4 Jul 2023 17:04:55 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX068.cuchost.com (172.16.6.68) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 4 Jul 2023 17:04:54 +0800 From: William Qiu To: , , , CC: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Ziv Xu , William Qiu Subject: [PATCH v4 1/3] dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoC Date: Tue, 4 Jul 2023 17:04:51 +0800 Message-ID: <20230704090453.83980-2-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230704090453.83980-1-william.qiu@starfivetech.com> References: <20230704090453.83980-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX068.cuchost.com (172.16.6.68) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770481158025744889?= X-GMAIL-MSGID: =?utf-8?q?1770481158025744889?= The QSPI controller needs three clock items to work properly on StarFive JH7110 SoC, so there is need to change the maxItems's value to 3. Signed-off-by: William Qiu Reviewed-by: Hal Feng Reviewed-by: Conor Dooley --- .../devicetree/bindings/spi/cdns,qspi-nor.yaml | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml index b310069762dd..e048cf63215b 100644 --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml @@ -70,7 +70,17 @@ properties: maxItems: 1 clocks: - maxItems: 1 + minItems: 1 + maxItems: 3 + + clock-names: + oneOf: + - items: + - const: ref + - items: + - const: ref + - const: ahb + - const: apb cdns,fifo-depth: description: From patchwork Tue Jul 4 09:04:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 115634 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f45:0:b0:3ea:f831:8777 with SMTP id v5csp1082405vqx; Tue, 4 Jul 2023 02:19:29 -0700 (PDT) X-Google-Smtp-Source: APBJJlGyxXm38HCj35/jRjcnnxmrriGCQ25SLleWkC7QzH2nuQd7fo4bjzmwc8o+0917+hHS1wmT X-Received: by 2002:a17:90a:1a0c:b0:262:fba5:2a8e with SMTP id 12-20020a17090a1a0c00b00262fba52a8emr11080174pjk.47.1688462369600; Tue, 04 Jul 2023 02:19:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688462369; cv=none; d=google.com; s=arc-20160816; b=pTOJMK14PjGPfXeczWAJbGi7k7272RrYVIMxM+XYOP4rWMVrNrP6XDQpvqULKAj19w OqLW8jNmrVS5DZinoJyFuXbg76vQYgOnTVL6gGwdEZD01X/B53er39RblMdCwN8cK+zv j8iybcmW3p95y6FmOtayfEU+lCfpGBEGF/C4ldKYx+qMeNlLcXfanIYrNPfLPDoVfRXx byKirl5gdnixOsAzpn9djvoYBOVkxMUBPgT/VrqJ/gi9KsES3+Z4//wpHzfs0th8Q4ax 7vhtT31PWeSXFTxoo8ZVtat8xFp/292d6mTQKICJ7T/3vvFX7skgJFtjwKHLeNY5c8co Cd5Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=xluEhI4EKcS6Ela8oCzsYF8MRp2x8idCGb6vy/ZteSc=; fh=9L4c8Y3Ztj8IJEHul2Oxap4WQbV4N6M3aZnulda9XVo=; b=rpkHnImeTqrBmCaBnvwxW3H6RhA/4UQdyhXdeIVTtcGLcGgF5fGBhklhdZEqjZSAA7 StgGnPau1GvazOUNzJHbjUtsB3j330NXeSw1tDri8XDUZQPBidMnOi8iOeJqZ481suLj eTk5T91XyXoDW+jlmXEsCNE467Fcw0yRt8HUOeny8l7iet6ubglMzk34GaO8Bi86vm80 sNeWo8dVW3V4KGInZVOW70o/KWTK0fcwoNtqe2oqwSw5E0iY/qbhID34PZ9v1hmCqE8G OXzcDDHu1q27pnP+elRw0YNgYnJNxTS524ItUBBEm9Qlx1j5M/K0hXJCjLxXtXFVhOuO yB1A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i9-20020a17090a650900b002509d96227esi22373158pjj.173.2023.07.04.02.19.16; Tue, 04 Jul 2023 02:19:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231904AbjGDJFQ convert rfc822-to-8bit (ORCPT + 99 others); Tue, 4 Jul 2023 05:05:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37646 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231843AbjGDJFG (ORCPT ); Tue, 4 Jul 2023 05:05:06 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 37BB3E6B; Tue, 4 Jul 2023 02:05:00 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 9D19D24E2B5; Tue, 4 Jul 2023 17:04:57 +0800 (CST) Received: from EXMBX068.cuchost.com (172.16.6.68) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 4 Jul 2023 17:04:56 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX068.cuchost.com (172.16.6.68) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 4 Jul 2023 17:04:55 +0800 From: William Qiu To: , , , CC: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Ziv Xu , William Qiu Subject: [PATCH v4 2/3] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI Date: Tue, 4 Jul 2023 17:04:52 +0800 Message-ID: <20230704090453.83980-3-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230704090453.83980-1-william.qiu@starfivetech.com> References: <20230704090453.83980-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX068.cuchost.com (172.16.6.68) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770481117649287718?= X-GMAIL-MSGID: =?utf-8?q?1770481117649287718?= Add QSPI clock operation in device probe. Signed-off-by: William Qiu Reviewed-by: Hal Feng Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202306022017.UbwjjWRN-lkp@intel.com/ Reported-by: Julia Lawall Closes: https://lore.kernel.org/r/202306040644.6ZHs55x4-lkp@intel.com/ --- drivers/spi/spi-cadence-quadspi.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 6ddb2dfc0f00..8774f9aaff61 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -63,6 +63,8 @@ struct cqspi_st { struct platform_device *pdev; struct spi_master *master; struct clk *clk; + struct clk_bulk_data *clks; + int num_clks; unsigned int sclk; void __iomem *iobase; @@ -1715,6 +1717,16 @@ static int cqspi_probe(struct platform_device *pdev) } if (of_device_is_compatible(pdev->dev.of_node, "starfive,jh7110-qspi")) { + cqspi->num_clks = devm_clk_bulk_get_all(dev, &cqspi->clks); + if (cqspi->num_clks < 0) { + dev_err(dev, "Cannot claim clock: %u\n", cqspi->num_clks); + return -EINVAL; + } + + ret = clk_bulk_prepare_enable(cqspi->num_clks, cqspi->clks); + if (ret) + dev_err(dev, "Cannot enable clock clks\n"); + rstc_ref = devm_reset_control_get_optional_exclusive(dev, "rstc_ref"); if (IS_ERR(rstc_ref)) { ret = PTR_ERR(rstc_ref); @@ -1816,6 +1828,9 @@ static void cqspi_remove(struct platform_device *pdev) clk_disable_unprepare(cqspi->clk); + if (of_device_is_compatible(pdev->dev.of_node, "starfive,jh7110-qspi")) + clk_bulk_disable_unprepare(cqspi->num_clks, cqspi->clks); + pm_runtime_put_sync(&pdev->dev); pm_runtime_disable(&pdev->dev); } @@ -1831,6 +1846,9 @@ static int cqspi_suspend(struct device *dev) clk_disable_unprepare(cqspi->clk); + if (of_device_is_compatible(dev->of_node, "starfive,jh7110-qspi")) + clk_bulk_disable_unprepare(cqspi->num_clks, cqspi->clks); + return ret; } @@ -1840,6 +1858,8 @@ static int cqspi_resume(struct device *dev) struct spi_master *master = dev_get_drvdata(dev); clk_prepare_enable(cqspi->clk); + if (of_device_is_compatible(dev->of_node, "starfive,jh7110-qspi")) + clk_bulk_prepare_enable(cqspi->num_clks, cqspi->clks); cqspi_wait_idle(cqspi); cqspi_controller_init(cqspi); From patchwork Tue Jul 4 09:04:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 115644 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f45:0:b0:3ea:f831:8777 with SMTP id v5csp1088483vqx; Tue, 4 Jul 2023 02:33:53 -0700 (PDT) X-Google-Smtp-Source: APBJJlEkIYQcsKaE6kDIGW0vd1j3uYzaKSIQxHScXIqvlL6be2WibomYd+qPmyWifg/jfr0ipVrO X-Received: by 2002:a05:6a00:1a13:b0:668:8705:57cf with SMTP id g19-20020a056a001a1300b00668870557cfmr16726551pfv.25.1688463233062; Tue, 04 Jul 2023 02:33:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688463233; cv=none; d=google.com; s=arc-20160816; b=H1kPK8ReVMdD2KE3Oer0ovMh1svGUKeqwXeu/G8QEwhDReAlYEApJhxsLfdYH6UzWk KrNoBYSQ4Pm0ufTpQofFz0Cp9AFX661yDgz1/iol9ttG7F5mpqVtEdsREFEW07BNgBrY t14KFyg00so79ZRYKEg65/Y5p6tibacyXv41yRfkZYW50m4W+7fPPYqt7KSDTf1LeuvX O7//0MY18EWm9jWOvP/aVcbTgRHHMrLeNCAPb9pVLt/uq5Ri9ZJgArswDOWvgO+yrUME ggAGEiqQ0G4UyAwjGQHArkmLuz7vo9Iq+tYIQhIrKWgiOnVMQ1VsKQnoIy7yf5rKnJ7S 9eHg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=0/wgD2i5CcYkO+mYo37OIKLs8J13AXK1s4C8XJ/yBu8=; fh=9L4c8Y3Ztj8IJEHul2Oxap4WQbV4N6M3aZnulda9XVo=; b=fEtfr5T9ALhMjT2lOzHaFqU+/OWRaeHSFIz9PVCDPgz4Q+WCGCYKsiDm6kQjNoGKn1 0dXPapnWGM6IKPmLC8Ksbmlo4i59HiMX6hzkkby6LXsT6TmsBgpfBEf4mho1vgjfXGea qOHYVKSItPDLJRgJIjMh1IFQlEgd0PHRVHVx65EsQdJZ8rOw1mxuZbQkkpVuUTZ/JxT2 Dsl33UYXnhH7IrAsz0NHbh5yMIiZO/7DIj7DkUePGNI8cQskESpFsPr1tH3lSwL9gnj+ NjyRp3KZuK8vplW0QgUrsMiRKm7XILjstVz/KpPrTwA0vskiGNMr0WD0xDaqSyDbsdAi 3X3Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u14-20020aa7848e000000b0066e96a581c8si18312414pfn.261.2023.07.04.02.33.39; Tue, 04 Jul 2023 02:33:53 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231895AbjGDJFO convert rfc822-to-8bit (ORCPT + 99 others); Tue, 4 Jul 2023 05:05:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37642 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231815AbjGDJFG (ORCPT ); Tue, 4 Jul 2023 05:05:06 -0400 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7B6E3136; Tue, 4 Jul 2023 02:04:59 -0700 (PDT) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 47FB9823D; Tue, 4 Jul 2023 17:04:57 +0800 (CST) Received: from EXMBX068.cuchost.com (172.16.6.68) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 4 Jul 2023 17:04:57 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX068.cuchost.com (172.16.6.68) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 4 Jul 2023 17:04:56 +0800 From: William Qiu To: , , , CC: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Ziv Xu , William Qiu Subject: [PATCH v4 3/3] riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC Date: Tue, 4 Jul 2023 17:04:53 +0800 Message-ID: <20230704090453.83980-4-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230704090453.83980-1-william.qiu@starfivetech.com> References: <20230704090453.83980-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX068.cuchost.com (172.16.6.68) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770482023113345832?= X-GMAIL-MSGID: =?utf-8?q?1770482023113345832?= Add the quad spi controller node for the StarFive JH7110 SoC. Co-developed-by: Ziv Xu Signed-off-by: Ziv Xu Signed-off-by: William Qiu Reviewed-by: Hal Feng --- .../jh7110-starfive-visionfive-2.dtsi | 32 +++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 18 +++++++++++ 2 files changed, 50 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 2a6d81609284..983b683e2f27 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -126,6 +126,38 @@ &i2c6 { status = "okay"; }; +&qspi { + #address-cells = <1>; + #size-cells = <0>; + + nor_flash: flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + cdns,read-delay = <5>; + spi-max-frequency = <12000000>; + cdns,tshsl-ns = <1>; + cdns,tsd2d-ns = <1>; + cdns,tchsh-ns = <1>; + cdns,tslch-ns = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + spl@0 { + reg = <0x0 0x20000>; + }; + uboot@100000 { + reg = <0x100000 0x300000>; + }; + data@f00000 { + reg = <0xf00000 0x100000>; + }; + }; + }; +}; + &sysgpio { i2c0_pins: i2c0-0 { i2c-pins { diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 4c5fdb905da8..fe33c5616565 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -440,6 +440,24 @@ i2c6: i2c@12060000 { status = "disabled"; }; + qspi: spi@13010000 { + compatible = "starfive,jh7110-qspi", "cdns,qspi-nor"; + reg = <0x0 0x13010000 0x0 0x10000>, + <0x0 0x21000000 0x0 0x400000>; + interrupts = <25>; + clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>, + <&syscrg JH7110_SYSCLK_QSPI_AHB>, + <&syscrg JH7110_SYSCLK_QSPI_APB>; + clock-names = "ref", "ahb", "apb"; + resets = <&syscrg JH7110_SYSRST_QSPI_APB>, + <&syscrg JH7110_SYSRST_QSPI_AHB>, + <&syscrg JH7110_SYSRST_QSPI_REF>; + reset-names = "qspi", "qspi-ocp", "rstc_ref"; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + }; + syscrg: clock-controller@13020000 { compatible = "starfive,jh7110-syscrg"; reg = <0x0 0x13020000 0x0 0x10000>;