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[83.9.29.26]) by smtp.gmail.com with ESMTPSA id ep7-20020a056512484700b004fbb1f70ceesm833417lfb.227.2023.07.03.06.31.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Jul 2023 06:31:14 -0700 (PDT) From: Konrad Dybcio Date: Mon, 03 Jul 2023 15:31:10 +0200 Subject: [PATCH 1/5] dt-bindings: spi: spi-geni-qcom: Allow no qup-core icc path MIME-Version: 1.0 Message-Id: <20230703-topic-8250_qup_icc-v1-1-fea39aa07525@linaro.org> References: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> In-Reply-To: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> To: Andy Gross , Bjorn Andersson , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Andi Shyti Cc: Marijn Suijten , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-i2c@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1688391072; l=1083; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=TQNTCWE+iBjVfoMqrm2paazex7hqvKkpoTz9pkEkyKc=; b=cStngA5XatURTQAcTPIg9usdXNHDCeFjDqHlJO5FM/ZH4iA7azJ01kuuVe06R9jsSSgwZ4aUm VBUl9Y1tbCiDUoxFvB6NfWRfJ1/5XpZHtnKTkXLnTdFJOWHEcbjMsUq X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770406558594705611?= X-GMAIL-MSGID: =?utf-8?q?1770406558594705611?= Some SoCs (like SM8150 and SM8250) don't seem to provide a qup-core path. Allow such case. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/spi/qcom,spi-geni-qcom.yaml | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml index 2e20ca313ec1..2890c4968c2a 100644 --- a/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml +++ b/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml @@ -49,11 +49,16 @@ properties: maxItems: 3 interconnect-names: - minItems: 2 - items: - - const: qup-core - - const: qup-config - - const: qup-memory + oneOf: + - items: + - const: qup-config + - const: qup-memory + + - minItems: 2 + items: + - const: qup-core + - const: qup-config + - const: qup-memory interrupts: maxItems: 1 From patchwork Mon Jul 3 13:31:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 115371 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f45:0:b0:3ea:f831:8777 with SMTP id v5csp539500vqx; Mon, 3 Jul 2023 06:52:51 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ57erKySynCxisFx86JV0h83itz9MiSemIO+J2tUwjduc+Ztjt8aZAoFNELLp+UjEECpU7z X-Received: by 2002:a05:6a20:8e01:b0:123:149b:a34f with SMTP id y1-20020a056a208e0100b00123149ba34fmr14794762pzj.1.1688392370705; Mon, 03 Jul 2023 06:52:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688392370; cv=none; d=google.com; s=arc-20160816; b=JpDG3bTZ49cIHBlGa4Yi8p+HmdVDXy8snSzgGkCN95eIuJyGvtZKkkCB6Z4FXMneRO 4qXrRuw27z62nos9EX+CQ7hp9cFRXRZlRRgPkqqXytaCiXkirC1j+6Kl8AaED+YCBd+Y Y6uLU6x5bwtGwCmAqk/LlfZX5J/sjj6EvBrbXLjkV/k8r6RqCBqQT7P6MAFDUehnv1fS VugcN9SN+Sz+y8xOsscveC7gTnQ3WwPjyMwldbrVEF87iNuLy4S0BRmNJXgxC+8IE9vO s/gDYXV7Ue4GMPBpnja/XbLpCInRrK5Yt2E1LCCG/LFNV3JN3JH2Zx6rA0jeXl3uZfPI zSgQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=C2RI3+66dTpZ9C4ox3q+m5S+xeRtBMTP/kVw+ytOXk4=; fh=EV+5bRVCKNG17q531vPQpoKiuN4tfzBrxhdEOIK2W5o=; b=Ct/if461ltQiSS7UAPbf7kMeCZlUTpQkR+G85K/+64hbajVc3rv7ixSf9JxqhTP7/g Wyi4dFUvoLY9LYsWFU0HthhOueLt36FZ+epLXfhx/JA4jVcEjrTrbxY9uCFzrdAulqhF 4KbJSfvwmCfWLLcO7dPNERmmnaQKz37Imxx8OZsDTa5yzlWQOFY4eeNpAAObw357PXly mtjTp7t6hnLdI9ynaxSyXuJD0KDIluT+ydDrk7vYpz0R7Shg1OcbLW42ZziAwjrv3sjS zkGHoT/3r14C03w08tiUF7trG3IKofAKBlWlrmauQQEzQHpb2WUCNs/mxAUKPQu0rShi 1/mQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=inpJ0Vov; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.26]) by smtp.gmail.com with ESMTPSA id ep7-20020a056512484700b004fbb1f70ceesm833417lfb.227.2023.07.03.06.31.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Jul 2023 06:31:16 -0700 (PDT) From: Konrad Dybcio Date: Mon, 03 Jul 2023 15:31:11 +0200 Subject: [PATCH 2/5] dt-bindings: serial: geni-qcom: Allow no qup-core icc path MIME-Version: 1.0 Message-Id: <20230703-topic-8250_qup_icc-v1-2-fea39aa07525@linaro.org> References: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> In-Reply-To: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> To: Andy Gross , Bjorn Andersson , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Andi Shyti Cc: Marijn Suijten , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-i2c@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1688391072; l=1333; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=PHLLf0dYHyrWiNleR3i9qlCgEBMco5J5FnlnRJYIuaA=; b=01sXMPmg4hRNAhe629YzVYzm5DQTEV0QMurBwgyti7/OIjJy3QP2fMez4fgR21njikOPBYNdP nTMfMisnZkeBTo+FNYNjyxjjfHD6CN/00DdYpJG5Ofwlc3CLNwE4Efu X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770407718311295325?= X-GMAIL-MSGID: =?utf-8?q?1770407718311295325?= Some SoCs (like SM8150 and SM8250) don't seem to provide a qup-core path. Allow such case. Signed-off-by: Konrad Dybcio --- .../bindings/serial/qcom,serial-geni-qcom.yaml | 26 +++++++++++++++------- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml index dd33794b3534..a0acba57bc06 100644 --- a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml +++ b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml @@ -25,14 +25,6 @@ properties: clock-names: const: se - interconnects: - maxItems: 2 - - interconnect-names: - items: - - const: qup-core - - const: qup-config - interrupts: minItems: 1 items: @@ -56,6 +48,24 @@ properties: reg: maxItems: 1 +oneOf: + - properties: + interconnects: + maxItems: 1 + + interconnect-names: + items: + - const: qup-config + + - properties: + interconnects: + minItems: 2 + + interconnect-names: + items: + - const: qup-core + - const: qup-config + required: - compatible - clocks From patchwork Mon Jul 3 13:31:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 115367 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f45:0:b0:3ea:f831:8777 with SMTP id v5csp529714vqx; Mon, 3 Jul 2023 06:36:39 -0700 (PDT) X-Google-Smtp-Source: APBJJlEnzOquZsrwLv4fesK3kMuHXbDsUzmwObU2H3O2XokTQ7pVRgLJGorPc8GZU2sn5Je+zxGB X-Received: by 2002:a05:6870:4187:b0:1b3:afdc:6c08 with SMTP id y7-20020a056870418700b001b3afdc6c08mr2310827oac.0.1688391399457; Mon, 03 Jul 2023 06:36:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688391399; cv=none; d=google.com; s=arc-20160816; b=r6tZhHG1r8+66k/1R9L5YU37tRneVK9xKgMJlS4JUvMPyhTvF909LT0ECkaS1ym7+N nvnURTsSzQSYoT80RgqEbtJzYWr9wZ3e7GbTxWo5uR86zll+B23k9cEvIdH78fCrAmZL EkxE1BMb94Z0os7Jt0nLbDikmJgOnEq4HhDrdpDZBWnC8W26Bpqnpfv3XChwyQ6hBzNy a1R9JKUafafs9O1+83vXlAjOAQUiFNWoucacjunG/PRZXAWREl27+Y/ffwTz0yAJje5c tGbUi0JiRtYOETpSvpIqOQM7bmounN4n7I+R2p4/pwjO2kHqNvm4P2MkUrBMc7McAHYu ZqBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=renX9kOzKpMBUHmq5hZ3jekycYbJefUYz//61Td5O/s=; fh=EV+5bRVCKNG17q531vPQpoKiuN4tfzBrxhdEOIK2W5o=; b=V1yuC/ocAynM3DWhjjboev0UnJmRzmIdTpFGUIf68g3nnwzKTwuOs94uGgfszH0r+u JVJ7F0clXecasJKIkccaN87EBVaj+KVIDtznjvscDXti3LFwM9RvVCtsiuTIuKh0GWCL VBXcxX/unncIKSZMXeVIrjzIQlTw486WWFJ6L9rODbJiaqT6ODy5P5U5oeOKWHdAqaqU X1cE6AK9S619231U4J18qldsTVXjmY0+Qm4HGL49sM27XwMQYXQdTWibTo5NXwRGf7qK lcIiPlA0iaHitYFwkGULys+BUGT/8wSP/DDBDZoHMuHp94lWe4TLllNGMfDHcPLzZGu9 2iBw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GQnx9pt3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.26]) by smtp.gmail.com with ESMTPSA id ep7-20020a056512484700b004fbb1f70ceesm833417lfb.227.2023.07.03.06.31.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Jul 2023 06:31:17 -0700 (PDT) From: Konrad Dybcio Date: Mon, 03 Jul 2023 15:31:12 +0200 Subject: [PATCH 3/5] dt-bindings: i2c: qcom,i2c-geni: Allow no qup-core icc path MIME-Version: 1.0 Message-Id: <20230703-topic-8250_qup_icc-v1-3-fea39aa07525@linaro.org> References: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> In-Reply-To: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> To: Andy Gross , Bjorn Andersson , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Andi Shyti Cc: Marijn Suijten , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-i2c@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1688391072; l=1429; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Efov7Nc3L7yYdK02wWwkMS19LIdgHhVcFqBbivRpHHg=; b=l/kFHoXLaDijhcPRgMraezLtExT+uw2/Dx6Ky5TCDCAYZRsOhWk4fguwnDe0BeiOpJwS8kMSZ UrlhHFlGtuPD0B9+mS/r23uC+zxZssYS+zHRdDknp1RU+G/ns8/x+oU X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770406699687138873?= X-GMAIL-MSGID: =?utf-8?q?1770406699687138873?= Some SoCs (like SM8150 and SM8250) don't seem to provide a qup-core path. Allow such case. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- .../bindings/i2c/qcom,i2c-geni-qcom.yaml | 27 +++++++++++++++------- 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml index 9f66a3bb1f80..f92b6d7fc7c5 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml @@ -108,14 +108,25 @@ allOf: clock-names: const: se - interconnects: - minItems: 3 - - interconnect-names: - items: - - const: qup-core - - const: qup-config - - const: qup-memory + oneOf: + - properties: + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: qup-config + - const: qup-memory + + - properties: + interconnects: + minItems: 3 + + interconnect-names: + items: + - const: qup-core + - const: qup-config + - const: qup-memory unevaluatedProperties: false From patchwork Mon Jul 3 13:31:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 115366 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f45:0:b0:3ea:f831:8777 with SMTP id v5csp528532vqx; Mon, 3 Jul 2023 06:34:49 -0700 (PDT) X-Google-Smtp-Source: APBJJlHemYgT7CGMQutQt3iXtCGAHflfyQO2jyIcGBXgZYOh8xj2MUalK4xHX3rNvuhdP4xSb2Bc X-Received: by 2002:a17:90b:889:b0:263:204c:3c80 with SMTP id bj9-20020a17090b088900b00263204c3c80mr11940427pjb.4.1688391289564; Mon, 03 Jul 2023 06:34:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688391289; cv=none; d=google.com; s=arc-20160816; b=N3gahdl0VTFnVUALNXY5zg7erxEIaB0ZrvZR3BVr4MgMRlsU6b9cU+pk+oFRg/FT8U rw8/vEFQ+6vCaDD488PBLDtczygRx/JtN7SJdXbQ6e3cJUPdVERyyrc7tWCHfFgFz4Fg Ai3Ero2iknNryfAB80/jckH8sQjNX5smcHfoFJvlkwId34P6/wurr/74v7/svl+EmEpD nsdYWStg7DKpFYcPIIOSZRIIAFoOgZVRmu+vEAWSTrZMfDqn4i9tOq6JT9r1ZRMzLj+t Zy90T3dt2wCmTmUq76JfZ9iug4A4GQWjo+KAWgcGsMzOv6021q5LC0owF+KYPBkok7Qo mhCA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=U0Tw3K884EqPljezRBvFH8q3oj/FtWnGBPlC6pRuCDw=; fh=EV+5bRVCKNG17q531vPQpoKiuN4tfzBrxhdEOIK2W5o=; b=p66lJOylp76veeLxvSE8xJSwzxuqTeFh//G0OPC90Bb40vGOaiGtvyCaPKHB8mqW/m f9tAOeu+6NYxXmLKkVLzIkqTe8+p5WohBV1d9bfKXCTsfpNGZ4mnCDVpbpvsoXY81BMO JZ+nkSIDTq61rol5NoHdofHA2XWsyBg8vzu92AjOWYcoRr7YBFuBNTGME3omDtMqycuD fcRMOmMXQOm6XHNtXvpFLPyVMdGUoHRqGwLER9+G0FMEaMfvbkFdqNRlMAJJ5G6uB1+a qiiDqGAQ6ygKNqWleV/HjCEBeYhIvAlwaXE7H78UkyUevjqClkdF0qZSZSakiqpL0tDa NA2w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="qW3/NAVc"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.26]) by smtp.gmail.com with ESMTPSA id ep7-20020a056512484700b004fbb1f70ceesm833417lfb.227.2023.07.03.06.31.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Jul 2023 06:31:19 -0700 (PDT) From: Konrad Dybcio Date: Mon, 03 Jul 2023 15:31:13 +0200 Subject: [PATCH 4/5] soc: qcom: geni-se: Allow any combination of icc paths MIME-Version: 1.0 Message-Id: <20230703-topic-8250_qup_icc-v1-4-fea39aa07525@linaro.org> References: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> In-Reply-To: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> To: Andy Gross , Bjorn Andersson , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Andi Shyti Cc: Marijn Suijten , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-i2c@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1688391072; l=1230; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=co9BdW2nWkUZOcUTizkeFw8YjDRYAbLHFxUe7vw2Hi8=; b=Ujk0LJDy05oagsVI8a6ZmnNEpYOuoJq5uyL6lqwIgDGgLZ20MpLNP89MZUyPsBsmv07eQPoRN Ej8VC4qyRHWCZhU8eSpTrxsn3vV2PM+Q5TalSz6YgYzA2YdP3bIRV8v X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770406584701580924?= X-GMAIL-MSGID: =?utf-8?q?1770406584701580924?= Not all SoCs provide all the usual paths. By the looks of it, at least SM8150 and SM8250 don't have one that would resemble "qup-core". Check for the error that icc_get throws and assign a NULL value to each path that can't be found to effectively allow any combination of icc paths (which, like previously, includes no icc paths). The ICC APIs gracefully handle a NULL path by exiting early. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/soc/qcom/qcom-geni-se.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c index ba788762835f..a5e2e8925c8e 100644 --- a/drivers/soc/qcom/qcom-geni-se.c +++ b/drivers/soc/qcom/qcom-geni-se.c @@ -813,8 +813,13 @@ int geni_icc_get(struct geni_se *se, const char *icc_ddr) continue; se->icc_paths[i].path = devm_of_icc_get(se->dev, icc_names[i]); - if (IS_ERR(se->icc_paths[i].path)) - goto err; + if (IS_ERR(se->icc_paths[i].path)) { + /* Not all SoCs implement all the paths */ + if (PTR_ERR(se->icc_paths[i].path) == -ENODATA) + se->icc_paths[i].path = NULL; + else + goto err; + } } return 0; From patchwork Mon Jul 3 13:31:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 115370 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f45:0:b0:3ea:f831:8777 with SMTP id v5csp539254vqx; Mon, 3 Jul 2023 06:52:18 -0700 (PDT) X-Google-Smtp-Source: APBJJlF3svcbiIY220lTO2OYOzPxvNT2weiI7RaYBzbOc6PG14kQ3eutC9omkXVJmi1hnOHK+b3B X-Received: by 2002:a17:903:94:b0:1ac:40f7:8b5a with SMTP id o20-20020a170903009400b001ac40f78b5amr10825820pld.3.1688392338321; Mon, 03 Jul 2023 06:52:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688392338; cv=none; d=google.com; s=arc-20160816; b=zSsKbAlN1thdVd5fH1ijd1JRJ7sGmVcOx/1hxPK6Oqh0n45qkCCMWYiEmHHdrzZDBt E5ZL7dUJ1pzAs27vSTSlo0mefcNzw2S96FpZ77Aciax2NHUbT7ia2UEiePHuvDktrFj6 g0fh4dAziFCGchH3ZSjyB9patyYxOSRkk8Z3YWjxtVYhnZ+WNjEoO9ZFhayY2Y6Nonbt LQs7epmvX32kvpn5agYbcnlGEb+UxhmZduzdR/JwC5nKbZyHfQJc0OWsAh0YwoiBFOgV H/H8QD5gNBq88zAuYzzsgaYuaHnBN4J4wnYMD5URap0OF17bNo6pCAy18oJS358Z5pGH kcIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=jrefK8/PwFCkX5pIXHy+fvuyVY7YugWgUcP56e2MTgw=; fh=EV+5bRVCKNG17q531vPQpoKiuN4tfzBrxhdEOIK2W5o=; b=RtKRrCYxalI/1q9JycuX3oDp8sljI2J1EQQvK2Qw1+PiRwIGusITWpbN8wCIkWftOt BmtvqJsi8kh+zB35ubM6Qyh6fbnxRYfp0+aUGP5+7sW8HjOULoa4lkpx9wVcoaE3+NIF sTFj4fJax6CRlr8Dmzygq8cfhxZT0JFGipy3ETyzDJgmGVBU0aJ8skpCKvIF9olkyjDt w6dBA012UvWDwjUSqhUbeo0S8A3cRDcZG8/BViwWMHFoFMmMi2nP5SLdqIAJ9YoEFDHU TzNVhLmnZnSNszPIf2jltM/oRCyz4tRx0Xk98ItQa12TYjJz68kdhC/QjJEOxrFNsIPJ 9a/Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HzCv0pW7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.26]) by smtp.gmail.com with ESMTPSA id ep7-20020a056512484700b004fbb1f70ceesm833417lfb.227.2023.07.03.06.31.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Jul 2023 06:31:20 -0700 (PDT) From: Konrad Dybcio Date: Mon, 03 Jul 2023 15:31:14 +0200 Subject: [PATCH 5/5] arm64: dts: qcom: sm8250: Add interconnects and power-domains to QUPs MIME-Version: 1.0 Message-Id: <20230703-topic-8250_qup_icc-v1-5-fea39aa07525@linaro.org> References: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> In-Reply-To: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> To: Andy Gross , Bjorn Andersson , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Andi Shyti Cc: Marijn Suijten , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-i2c@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1688391072; l=20635; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=6sUJWs3uxT99bYspriYn1C039w1VdT+N8WiwYSJREPo=; b=8lQCglMSF9hO/+Ac5DQiOSr/lbjk+1qBSxdwNkARdIUOVPweSFMlfQfxcfXyajIuNzL9lgKD6 WfxrfHGMwUnDXGK9N/q+0FV5G2Cvwd8g3r9372f54FjcbOQ7uZFbRzX X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770407684491052628?= X-GMAIL-MSGID: =?utf-8?q?1770407684491052628?= Describe the interconnect paths related to QUPs and add the power-domains powering them. This is required for icc sync_state, as otherwise QUP access is gated. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 150 +++++++++++++++++++++++++++++++++++ 1 file changed, 150 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 1efa07f2caff..35111fce898a 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -1022,6 +1022,10 @@ i2c14: i2c@880000 { dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>, <&gpi_dma2 1 0 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1038,6 +1042,9 @@ spi14: spi@880000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1054,6 +1061,10 @@ i2c15: i2c@884000 { dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>, <&gpi_dma2 1 1 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1070,6 +1081,9 @@ spi15: spi@884000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1086,6 +1100,10 @@ i2c16: i2c@888000 { dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>, <&gpi_dma2 1 2 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1102,6 +1120,9 @@ spi16: spi@888000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1118,6 +1139,10 @@ i2c17: i2c@88c000 { dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>, <&gpi_dma2 1 3 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1134,6 +1159,9 @@ spi17: spi@88c000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1149,6 +1177,8 @@ uart17: serial@88c000 { interrupts = ; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>; + interconnect-names = "qup-config"; status = "disabled"; }; @@ -1163,6 +1193,10 @@ i2c18: i2c@890000 { dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>, <&gpi_dma2 1 4 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1179,6 +1213,9 @@ spi18: spi@890000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1194,6 +1231,8 @@ uart18: serial@890000 { interrupts = ; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>; + interconnect-names = "qup-config"; status = "disabled"; }; @@ -1208,6 +1247,10 @@ i2c19: i2c@894000 { dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>, <&gpi_dma2 1 5 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1224,6 +1267,9 @@ spi19: spi@894000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1276,6 +1322,10 @@ i2c0: i2c@980000 { dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>, <&gpi_dma0 1 0 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1292,6 +1342,9 @@ spi0: spi@980000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1308,6 +1361,10 @@ i2c1: i2c@984000 { dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>, <&gpi_dma0 1 1 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1324,6 +1381,9 @@ spi1: spi@984000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1340,6 +1400,10 @@ i2c2: i2c@988000 { dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>, <&gpi_dma0 1 2 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1356,6 +1420,9 @@ spi2: spi@988000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1371,6 +1438,8 @@ uart2: serial@988000 { interrupts = ; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>; + interconnect-names = "qup-config"; status = "disabled"; }; @@ -1385,6 +1454,10 @@ i2c3: i2c@98c000 { dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>, <&gpi_dma0 1 3 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1401,6 +1474,9 @@ spi3: spi@98c000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1417,6 +1493,10 @@ i2c4: i2c@990000 { dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>, <&gpi_dma0 1 4 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1433,6 +1513,9 @@ spi4: spi@990000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1449,6 +1532,10 @@ i2c5: i2c@994000 { dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, <&gpi_dma0 1 5 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1465,6 +1552,9 @@ spi5: spi@994000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1481,6 +1571,10 @@ i2c6: i2c@998000 { dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>, <&gpi_dma0 1 6 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1497,6 +1591,9 @@ spi6: spi@998000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1512,6 +1609,8 @@ uart6: serial@998000 { interrupts = ; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>; + interconnect-names = "qup-config"; status = "disabled"; }; @@ -1526,6 +1625,10 @@ i2c7: i2c@99c000 { dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>, <&gpi_dma0 1 7 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1542,6 +1645,9 @@ spi7: spi@99c000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1591,6 +1697,10 @@ i2c8: i2c@a80000 { dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>, <&gpi_dma1 1 0 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1607,6 +1717,9 @@ spi8: spi@a80000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1623,6 +1736,10 @@ i2c9: i2c@a84000 { dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>, <&gpi_dma1 1 1 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1639,6 +1756,9 @@ spi9: spi@a84000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1655,6 +1775,10 @@ i2c10: i2c@a88000 { dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>, <&gpi_dma1 1 2 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1671,6 +1795,9 @@ spi10: spi@a88000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1687,6 +1814,10 @@ i2c11: i2c@a8c000 { dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>, <&gpi_dma1 1 3 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1703,6 +1834,9 @@ spi11: spi@a8c000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1719,6 +1853,10 @@ i2c12: i2c@a90000 { dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>, <&gpi_dma1 1 4 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1735,6 +1873,9 @@ spi12: spi@a90000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1750,6 +1891,8 @@ uart12: serial@a90000 { interrupts = ; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>; + interconnect-names = "qup-config"; status = "disabled"; }; @@ -1764,6 +1907,10 @@ i2c13: i2c@a94000 { dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>, <&gpi_dma1 1 5 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1780,6 +1927,9 @@ spi13: spi@a94000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled";