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[8.43.85.97]) by mx.google.com with ESMTPS id o6-20020a056402038600b0051d9bf91280si8775194edv.541.2023.07.03.03.58.07 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Jul 2023 03:58:07 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=AONHRrWb; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 46359385840E for ; Mon, 3 Jul 2023 10:58:06 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 46359385840E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1688381886; bh=uSXY5VKDxRa/OcTjw7sEytvCaaAcaZxfL9soDVLJCXQ=; h=To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=AONHRrWb/L0A40BdOa/sE5xqHGtnDYFUVmDVXpK/qAOyQyuj7b0an2w1pQeRn/rDe DOHp+tClmqvMfPIvJSvYI76xO4k3CasHa3nYsWa3X/xUb42yq5qNVDkM8ZPHKeUPhM L+2hbHQhjbw9vENgFQwDCaVlAUyi+lH2iug1zTjM= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by sourceware.org (Postfix) with ESMTPS id 520993858D28 for ; Mon, 3 Jul 2023 10:57:21 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 520993858D28 X-IronPort-AV: E=McAfee;i="6600,9927,10759"; a="362889041" X-IronPort-AV: E=Sophos;i="6.01,178,1684825200"; d="scan'208";a="362889041" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Jul 2023 03:57:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10759"; a="965154897" X-IronPort-AV: E=Sophos;i="6.01,178,1684825200"; d="scan'208";a="965154897" Received: from shvmail02.sh.intel.com ([10.239.244.9]) by fmsmga006.fm.intel.com with ESMTP; 03 Jul 2023 03:57:18 -0700 Received: from pli-ubuntu.sh.intel.com (pli-ubuntu.sh.intel.com [10.239.159.47]) by shvmail02.sh.intel.com (Postfix) with ESMTP id 513A310054E3; Mon, 3 Jul 2023 18:57:17 +0800 (CST) To: gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, jeffreyalaw@gmail.com, pan2.li@intel.com, yanzhang.wang@intel.com, kito.cheng@gmail.com Subject: [PATCH v1] RISC-V: Fix one typo for emit_mode_set. Date: Mon, 3 Jul 2023 18:57:16 +0800 Message-Id: <20230703105716.2909864-1-pan2.li@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-11.0 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Pan Li via Gcc-patches From: "Li, Pan2 via Gcc-patches" Reply-To: pan2.li@intel.com Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770396725558047181?= X-GMAIL-MSGID: =?utf-8?q?1770396725558047181?= From: Pan Li This patch would like to fix one typo for scaler[should be scalar] in emit_mode_set, as well as minor change for mov emit. Signed-off-by: Pan Li gcc/ChangeLog: * config/riscv/riscv.cc (riscv_emit_mode_set): Fix typo. Signed-off-by: Pan Li --- gcc/config/riscv/riscv.cc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index e4dc8115e69..7761e946761 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -7672,11 +7672,11 @@ riscv_emit_mode_set (int entity, int mode, int prev_mode, case RISCV_FRM: if (mode != FRM_MODE_NONE && mode != prev_mode) { - rtx scaler = gen_reg_rtx (SImode); + rtx scalar = gen_reg_rtx (SImode); rtx imm = gen_int_mode (mode, SImode); - emit_insn (gen_movsi (scaler, imm)); - emit_insn (gen_fsrm (scaler, scaler)); + emit_move_insn (scalar, imm); + emit_insn (gen_fsrm (scalar, scalar)); } break; default: