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[90.182.211.1]) by smtp.gmail.com with ESMTPSA id cw13-20020a056000090d00b003112f836d4esm15266322wrb.85.2023.06.29.01.37.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Jun 2023 01:37:36 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Amarula patchwork , Philippe Cornu , Raphael Gallais-Pou , Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v5 1/3] ARM: dts: stm32: add ltdc support on stm32f746 MCU Date: Thu, 29 Jun 2023 10:37:24 +0200 Message-Id: <20230629083726.84910-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230629083726.84910-1-dario.binacchi@amarulasolutions.com> References: <20230629083726.84910-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770026674352393696?= X-GMAIL-MSGID: =?utf-8?q?1770026674352393696?= Add LTDC (Lcd-tft Display Controller) support. Signed-off-by: Dario Binacchi Reviewed-by: Raphaël Gallais-Pou --- (no changes since v1) arch/arm/boot/dts/stm32f746.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi index dc868e6da40e..9c4ba0b7f239 100644 --- a/arch/arm/boot/dts/stm32f746.dtsi +++ b/arch/arm/boot/dts/stm32f746.dtsi @@ -507,6 +507,16 @@ pwm { }; }; + ltdc: display-controller@40016800 { + compatible = "st,stm32-ltdc"; + reg = <0x40016800 0x200>; + interrupts = <88>, <89>; + resets = <&rcc STM32F7_APB2_RESET(LTDC)>; + clocks = <&rcc 1 CLK_LCD>; + clock-names = "lcd"; + status = "disabled"; + }; + pwrcfg: power-config@40007000 { compatible = "st,stm32-power-config", "syscon"; reg = <0x40007000 0x400>; From patchwork Thu Jun 29 08:37:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 114250 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp9501363vqr; Thu, 29 Jun 2023 02:16:14 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7/xRtVVKEFhjBK1xdCLTbeYI/C5d0tUAO/q/AfW4sJhFlU/Cxpb7ajJR2fKM/EdZfkT7I7 X-Received: by 2002:a05:6a20:440d:b0:123:149b:a34f with SMTP id ce13-20020a056a20440d00b00123149ba34fmr27332274pzb.1.1688030172397; Thu, 29 Jun 2023 02:16:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688030172; cv=none; d=google.com; s=arc-20160816; b=IPoS0/m3dWF1qYmfS7ECj41UHHxcVqyxoZCjtJbkZ0YJlkOLmF2NsQWpuWTMHe+JY6 UYpeAT2FW+7mzIkJltboK+gR0kQJ1r6zYI0thbx9mBUupEVArkZhLhPa/CJ82cbHqlHo WMveUYRxKePVBXYoRznJa2MIWmWY0r/A2lFRJo8Ei1F+zLRJJM6TcKWD8Ezwtg2qnkek tniCZ1N4J6oq8eK0zKacOP3+Q4QHHlxmbHlQt/XKC/hZksspmWfMOYoEXG748IHt/onO NMPknfyCNxmnrZi1rtuzSfS2ph9wO/5YtauNdQYy5lHyZep2jJajMHxqWBR42PWfso+Q v/Rw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=VnEheSovvunB6I3AktXE1UaU+sD3f90l2AKOrWC4PB8=; fh=Hiy7Q8qPwQ3beEOigEtYc3oHRWyraRWB+Nlyxp+mVig=; b=1KNHG9qM2786AJzXro29OOLSMN8d0BYwKVm1kOFMJbrFRyt68ZFrdaYKCBXh+5o2uO t+Wo0luMS1DXeFj8u4AW5vNwDokVeGc8PSUJ2Qf/GF4kTMwY3xsnfbj7tSqWNskApbG9 7jVZIm6zQLgFoe7DOSGSf+sRq8CSiQmmXXa3i20THidXkmrvJQKHkI6vPCrAD06dhDOq aAs8drQ2eoqMZDjF6weS1t303V4QRkLQGbXxhlQivHVUc3PBYpM88L1YpvPHa/bhvoKL kP+79wuE1ZNEEBEbBdHCQwafDWycQGbVhuAi0TpIgBABA/VcIU2BwA9m2+F0jEM0N7tX XlsQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=oCEJRBlG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Received: from out1.vger.email (out1.vger.email. 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[90.182.211.1]) by smtp.gmail.com with ESMTPSA id cw13-20020a056000090d00b003112f836d4esm15266322wrb.85.2023.06.29.01.37.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Jun 2023 01:37:40 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Amarula patchwork , Philippe Cornu , Raphael Gallais-Pou , Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v5 2/3] ARM: dts: stm32: add pin map for LTDC on stm32f7 Date: Thu, 29 Jun 2023 10:37:25 +0200 Message-Id: <20230629083726.84910-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230629083726.84910-1-dario.binacchi@amarulasolutions.com> References: <20230629083726.84910-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770027858531462501?= X-GMAIL-MSGID: =?utf-8?q?1770027925954915429?= Add pin configurations for using LTDC (LCD-tft Display Controller) on stm32f746-disco board. Signed-off-by: Dario Binacchi --- (no changes since v3) Changes in v3: - rename ltdc-pins-a-0 to ltdc-0. arch/arm/boot/dts/stm32f7-pinctrl.dtsi | 35 ++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi index 9f65403295ca..36dad40dd0c7 100644 --- a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi @@ -365,6 +365,41 @@ pins2 { bias-pull-up; }; }; + + + ltdc_pins_a: ltdc-0 { + pins { + pinmux = , /* LCD_B0 */ + , /* LCD_B4 */ + , /* LCD_VSYNC */ + , /* LCD_HSYNC */ + , /* LCD_CLK */ + , /* LCD_R0 */ + , /* LCD_R1 */ + , /* LCD_R2 */ + , /* LCD_R3 */ + , /* LCD_R4 */ + , /* LCD_R5 */ + , /* LCD_R6 */ + , /* LCD_R7 */ + , /* LCD_G0 */ + , /* LCD_G1 */ + , /* LCD_G2 */ + , /* LCD_G3 */ + , /* LCD_G4 */ + , /* LCD_B1 */ + , /* LCD_B2 */ + , /* LCD_B3 */ + , /* LCD_G5 */ + , /* LCD_G6 */ + , /* LCD_G7 */ + , /* LCD_B5 */ + , /* LCD_B6 */ + , /* LCD_B7 */ + ; /* LCD_DE */ + slew-rate = <2>; + }; + }; }; }; }; From patchwork Thu Jun 29 08:37:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 114245 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp9494009vqr; Thu, 29 Jun 2023 02:00:50 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6TUtlLEqlyea4htoTeR7zkVu2Nng4jwcXtGk/LvK02t/jqVeyierTkuR6PeNj8sniYqZBF X-Received: by 2002:a05:6a00:1d18:b0:668:70af:b5c1 with SMTP id a24-20020a056a001d1800b0066870afb5c1mr2647250pfx.1.1688029250564; Thu, 29 Jun 2023 02:00:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688029250; cv=none; d=google.com; s=arc-20160816; b=qzIiRixnJRWv42rlOxq9/IAjinac6jMQvLGSpbTtgXPwKQ6OvSUnvc3a2lwwxRdBTg MvkMc6A1hDnLMY05XymqQF8ES1nEITDnFHQxrgCJIVeJsYNe8VBaoORtizitGeYkJp+r YTL6fWTVEKpFvhzA820JRYqVsOJF4ocniwyELxg/GPirUFEQJCh1TGP4UrfHHIIuuYpw hRRBmnqkJEWgXwvmu3J8v/CdCvwgDm3nZtCPdHCZpJ8bLZ0y1bARE+x14WOVDypMDP// 7t55FnJf2/BCreL7e8GK5NuX7QIRDnhpz7ydS2WzBeqtPVs4NvvHEg/2M19ypO/ax0MJ GMkA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vRivB2eYzBBWqVP0G0XxZsVcBa1nGVGm8hEC37qyLwQ=; fh=Hiy7Q8qPwQ3beEOigEtYc3oHRWyraRWB+Nlyxp+mVig=; b=rnY7xTmUawqdyODugse51+ML7xWBoa3h240PUczltT5K+TK3bFw3xPp23x7n2AucIf 1wWLAqpvLRNbgPRbuhQa4HPkNBlj+xr30fanHBl1yXuy7gCGPMhihyjUGGwSyBXIUYZI wM0Jsizakcmq0pziMXrESCq1ognJ/P7/gHMaUfx35o+b1LpUDAmiGyslq47jaH7Bxk/a hfkqIglo4sWIViLU8jZV+POzzwQklKlbbo5lCQPBoXivuu/kTCDuNYEmxruc3iCEvmCm Mdyqtz1BgODoNZxN7Hub3QPY0hoAFz8LkJVu1BR8dbhzNBxwfXcEaW+AhxFxuUD141X8 Pi9A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=CNQGj3hB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Received: from out1.vger.email (out1.vger.email. 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[90.182.211.1]) by smtp.gmail.com with ESMTPSA id cw13-20020a056000090d00b003112f836d4esm15266322wrb.85.2023.06.29.01.37.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Jun 2023 01:37:42 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Amarula patchwork , Philippe Cornu , Raphael Gallais-Pou , Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v5 3/3] ARM: dts: stm32: support display on stm32f746-disco board Date: Thu, 29 Jun 2023 10:37:26 +0200 Message-Id: <20230629083726.84910-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230629083726.84910-1-dario.binacchi@amarulasolutions.com> References: <20230629083726.84910-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770026959094620452?= X-GMAIL-MSGID: =?utf-8?q?1770026959094620452?= Add support to Rocktech RK043FN48H display on stm32f746-disco board. Signed-off-by: Dario Binacchi Reviewed-by: Raphaël Gallais-Pou --- Changes in v5: I am confident that framebuffer sizing is a real requirement for STM32 boards, but I need some time to understand if and how to introduce this functionality. Therefore, I drop the following patches to allow the series to be fully merged: - [4/6] dt-bindings: display: stm32-ltdc: add optional st,fb-bpp property - [5/6] ARM: dts: stm32: set framebuffer bit depth on stm32f746-disco - [6/6] drm/stm: set framebuffer bit depth through DTS property Changes in v4: - Use DTS property instead of module parameter to set the framebuffer bit depth. Changes in v3: - drop [4/6] dt-bindings: display: simple: add Rocktech RK043FN48H Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next): https://cgit.freedesktop.org/drm/drm-misc/commit/?id=c42a37a27c777d63961dd634a30f7c887949491a - drop [5/6] drm/panel: simple: add support for Rocktech RK043FN48H panel Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next) https://cgit.freedesktop.org/drm/drm-misc/commit/?id=13cdd12a9f934158f4ec817cf048fcb4384aa9dc arch/arm/boot/dts/stm32f746-disco.dts | 51 +++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/arch/arm/boot/dts/stm32f746-disco.dts b/arch/arm/boot/dts/stm32f746-disco.dts index c11616ed5fc6..cda423b6a874 100644 --- a/arch/arm/boot/dts/stm32f746-disco.dts +++ b/arch/arm/boot/dts/stm32f746-disco.dts @@ -60,10 +60,41 @@ memory@c0000000 { reg = <0xC0000000 0x800000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + no-map; + size = <0x80000>; + linux,dma-default; + }; + }; + aliases { serial0 = &usart1; }; + backlight: backlight { + compatible = "gpio-backlight"; + gpios = <&gpiok 3 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + panel_rgb: panel-rgb { + compatible = "rocktech,rk043fn48h"; + backlight = <&backlight>; + enable-gpios = <&gpioi 12 GPIO_ACTIVE_HIGH>; + status = "okay"; + port { + panel_in_rgb: endpoint { + remote-endpoint = <<dc_out_rgb>; + }; + }; + }; + usbotg_hs_phy: usb-phy { #phy-cells = <0>; compatible = "usb-nop-xceiv"; @@ -99,6 +130,26 @@ &i2c1 { status = "okay"; }; +&dma1 { + status = "okay"; +}; + +&dma2 { + status = "okay"; +}; + +<dc { + pinctrl-0 = <<dc_pins_a>; + pinctrl-names = "default"; + status = "okay"; + + port { + ltdc_out_rgb: endpoint { + remote-endpoint = <&panel_in_rgb>; + }; + }; +}; + &sdio1 { status = "okay"; vmmc-supply = <&mmc_vcard>;