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[78.22.137.109]) by smtp.gmail.com with ESMTPSA id 17-20020a170906319100b00730df07629fsm2349839ejy.174.2022.10.28.08.26.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Oct 2022 08:26:50 -0700 (PDT) From: Maarten Zanders To: Lars-Peter Clausen , =?utf-8?q?Nuno_S=C3=A1?= , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai Cc: Maarten Zanders , alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] ASoC: adau1372: fix mclk Date: Fri, 28 Oct 2022 17:26:23 +0200 Message-Id: <20221028152626.109603-2-maarten.zanders@mind.be> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221028152626.109603-1-maarten.zanders@mind.be> References: <20221028152626.109603-1-maarten.zanders@mind.be> MIME-Version: 1.0 X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747945905876775570?= X-GMAIL-MSGID: =?utf-8?q?1747945905876775570?= "mclk" is retrieved from the configuration and assigned to adau1372->clk. However adau1372->mclk (==NULL) is used for clk_prepare_enable() and clk_disable_unprepare() which don't have any effect. Remove .clk from struct adau1372 and use .mclk throughout. This change ensures that the input clock is switched on/off when the bias level is changed. Signed-off-by: Maarten Zanders --- sound/soc/codecs/adau1372.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/adau1372.c b/sound/soc/codecs/adau1372.c index a9f89e8565ec..00d0825e193b 100644 --- a/sound/soc/codecs/adau1372.c +++ b/sound/soc/codecs/adau1372.c @@ -25,7 +25,6 @@ #include "adau-utils.h" struct adau1372 { - struct clk *clk; struct regmap *regmap; void (*switch_mode)(struct device *dev); bool use_pll; @@ -925,9 +924,9 @@ int adau1372_probe(struct device *dev, struct regmap *regmap, if (!adau1372) return -ENOMEM; - adau1372->clk = devm_clk_get(dev, "mclk"); - if (IS_ERR(adau1372->clk)) - return PTR_ERR(adau1372->clk); + adau1372->mclk = devm_clk_get(dev, "mclk"); + if (IS_ERR(adau1372->mclk)) + return PTR_ERR(adau1372->mclk); adau1372->pd_gpio = devm_gpiod_get_optional(dev, "powerdown", GPIOD_OUT_HIGH); if (IS_ERR(adau1372->pd_gpio)) @@ -947,7 +946,7 @@ int adau1372_probe(struct device *dev, struct regmap *regmap, * 12.288MHz. Automatically choose a valid configuration from the * external clock. */ - rate = clk_get_rate(adau1372->clk); + rate = clk_get_rate(adau1372->mclk); switch (rate) { case 12288000: From patchwork Fri Oct 28 15:26:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maarten Zanders X-Patchwork-Id: 12390 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp897212wru; Fri, 28 Oct 2022 08:32:36 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6Y6kTtDqhmE+zUDjoVViDla2+v/LeQEf16uNao7Gm9lVs/KkYR3TDJEQmSQceXzrqC8G/1 X-Received: by 2002:a17:906:3287:b0:78d:8877:d50f with SMTP id 7-20020a170906328700b0078d8877d50fmr47204910ejw.486.1666971155940; Fri, 28 Oct 2022 08:32:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666971155; cv=none; d=google.com; s=arc-20160816; b=IGgcjb3JSUBjjzF1divsDaj1HKggi7J3A+OSKNaQcnfuTGFrOZXvFfZnXIMUWXEkmT iuTxkVkc9ObwfbcS3lDWp8m1nTwYZ9qpu1RP5P/ekc+Vsk+NDHRGYjyt+GUxC8w2B+0m MR4W86+RvizK7fpm215Ij0Y/KZMqXLaTJF/zWvM14sKVnl3DFQfKYlV9LdI9OF3yM0W/ ebPSGsTJcnatktuF/OARKvVvFj+X2MXunZ8SMEori9+F81KsNiyzZrw7ksIVpBQPSf/a sKdiZcWmS01dtodw/TSZPvsRqdShz67VfRJtA7tXjGe8pJfFQu8hgDNzQLPD5hD6LQYR AYPA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=qWOXtZdeE7MXcWYkV9UqH7xJWnsDsrChaSh5X+0ymME=; b=B+I5yavKbdug0AQu+plTxWOZYiBLCmw9gOYyVFISgJF4mcERYsr/ZKr9CfKzD1xqWR g2uIzIwcRcvP1pK1iywLKyuN1ff+0x5EfBaOPBFpnmK+XI8xNatlUP+H1grYQR9KFKMK qY0GQJaRgCIGMpwhZak6Dp98ASMriUoNHFpOlXZrYQkDJaSyAdkaQTW5f4HvODn+Z8PV MKxXih8oQFQRhDu4gEX7A86Y5D1u8YpEXyk8JpZQNuoMv9vLWxZuccvhC5paM+1EXf9Z uW1nEI7Ju0wbiYnaHFtiuykygeJtkWsBp0aP0JQPJ4IvpSc3ZLAxyjn9JqGB2kBzCBy9 /UMw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mind.be header.s=google header.b=A9tM9pd5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[78.22.137.109]) by smtp.gmail.com with ESMTPSA id 17-20020a170906319100b00730df07629fsm2349839ejy.174.2022.10.28.08.26.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Oct 2022 08:26:52 -0700 (PDT) From: Maarten Zanders To: Lars-Peter Clausen , =?utf-8?q?Nuno_S=C3=A1?= , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai Cc: Maarten Zanders , alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] ASoC: adau1372: add support for S24_LE mode Date: Fri, 28 Oct 2022 17:26:24 +0200 Message-Id: <20221028152626.109603-3-maarten.zanders@mind.be> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221028152626.109603-1-maarten.zanders@mind.be> References: <20221028152626.109603-1-maarten.zanders@mind.be> MIME-Version: 1.0 X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747945946429204700?= X-GMAIL-MSGID: =?utf-8?q?1747945946429204700?= The ADAU1372 contains 24bit ADCs and DACs. Allow the driver to use its native mode which uses the same settings as the current 32 bit mode. Signed-off-by: Maarten Zanders --- sound/soc/codecs/adau1372.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/adau1372.c b/sound/soc/codecs/adau1372.c index 00d0825e193b..6b35981c8777 100644 --- a/sound/soc/codecs/adau1372.c +++ b/sound/soc/codecs/adau1372.c @@ -662,6 +662,7 @@ static int adau1372_hw_params(struct snd_pcm_substream *substream, case 16: sai1 = ADAU1372_SAI1_BCLKRATE; break; + case 24: case 32: sai1 = 0; break; @@ -699,6 +700,7 @@ static int adau1372_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, case 16: sai1 = ADAU1372_SAI1_BCLK_TDMC; break; + case 24: case 32: sai1 = 0; break; @@ -869,7 +871,9 @@ static const struct snd_soc_dai_ops adau1372_dai_ops = { .startup = adau1372_startup, }; -#define ADAU1372_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) +#define ADAU1372_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S24_LE | \ + SNDRV_PCM_FMTBIT_S32_LE) static struct snd_soc_dai_driver adau1372_dai_driver = { .name = "adau1372", From patchwork Fri Oct 28 15:26:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maarten Zanders X-Patchwork-Id: 12391 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp897317wru; Fri, 28 Oct 2022 08:32:49 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6STKSyxxeSOh6jt7x+iZ+J3fjML/DNQGkRzUEgv1Ieo1mfRvsvWxhuxNpDS3UpqszVebSx X-Received: by 2002:a17:907:708:b0:77e:ff47:34b1 with SMTP id xb8-20020a170907070800b0077eff4734b1mr45470116ejb.493.1666971169085; Fri, 28 Oct 2022 08:32:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666971169; cv=none; d=google.com; s=arc-20160816; b=ASLrxSzOsGAiZbeGdE2hla4PHFg53pWz3sx54uq1aOmNjtEAFMRwHnpNfPIh1UNRi2 Xi2eIG6x7ux9KN69eNPpA2A4/5uxlHeUDfDn+FE1JYwaLiBGHAdcrLvYm65lodRdg0b5 rHbuk1suvgJsVtJhEqGvka7huryz3vCxpQvBrrg9MCQoyG0RcxlrQhZ5iCK0YVrLQOTS +HM7WiTNRfZz/UBkAiNVLz29EU5NQri1zcdivZprO39ILsreZiMAFEcdT4STnqMedUMf 9fMsAnmHUkMYnnmG2si4ByfbXJuI6uhNG+fubz8oESBGEr8NPwXwW59DPhkrPN6YYfhQ K8Rg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=eLsw+iN8jpJl9FHuzYsNNqJNfmeMGSrcPtNG/wbe8TE=; b=BQhvD5V3qNUp6kNT3+VA6saltiZCK3JfUIwjNWwx+Fq1YUCNHU5o/eMF/SED6wRj4S eJ1T4PVmv+fJ0VO9eoIUEofIERdgOUCfiBVn+iJIOlQvEYN1mtdn/B8cd5PBQQ2J+5sX 6KdX8B0JfLWW/ONxIvsGXkOPW4VQvCjVgG2r/yiqRJgdqtBIr6QDzZ4tGPNzknkUpXBz rur08ulFJrb/FbGzxZeHq78/eD9qNQoECiGu3baqgpsVD0ax9sRGBuHvv63pP4vcAIFq jXMYCbiYvGhSWY3dbIAIC/qGSub/zACTvceNC6UsqMdnB6VEYaP11dUJrDIADB/YzuzI hNLw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mind.be header.s=google header.b=EuqLHIac; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[78.22.137.109]) by smtp.gmail.com with ESMTPSA id 17-20020a170906319100b00730df07629fsm2349839ejy.174.2022.10.28.08.26.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Oct 2022 08:26:54 -0700 (PDT) From: Maarten Zanders To: Lars-Peter Clausen , =?utf-8?q?Nuno_S=C3=A1?= , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai Cc: Maarten Zanders , alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] ASoC: adau1372: correct PGA enable & mute bit Date: Fri, 28 Oct 2022 17:26:25 +0200 Message-Id: <20221028152626.109603-4-maarten.zanders@mind.be> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221028152626.109603-1-maarten.zanders@mind.be> References: <20221028152626.109603-1-maarten.zanders@mind.be> MIME-Version: 1.0 X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747945960310769617?= X-GMAIL-MSGID: =?utf-8?q?1747945960310769617?= The DAPM control for PGAx uses the PGA mute bit for power management. This bit is active high but is set to non-inverted (ie when powering, it will mute). The ALSA control "PGA x Capture Switch" uses the active high PGA_ENx bit, but is set to inverted. So when enabling this switch, the PGA gets disabled. To correct the behaviour, invert both these bits. Signed-off-by: Maarten Zanders --- sound/soc/codecs/adau1372.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/adau1372.c b/sound/soc/codecs/adau1372.c index 6b35981c8777..c5e0f10e6982 100644 --- a/sound/soc/codecs/adau1372.c +++ b/sound/soc/codecs/adau1372.c @@ -206,10 +206,10 @@ static const struct snd_kcontrol_new adau1372_controls[] = { 2, 1, 0, adau1372_pga_boost_tlv), SOC_SINGLE_TLV("PGA 3 Boost Capture Volume", ADAU1372_REG_PGA_BOOST, 3, 1, 0, adau1372_pga_boost_tlv), - SOC_SINGLE("PGA 0 Capture Switch", ADAU1372_REG_PGA_CTRL(0), 7, 1, 1), - SOC_SINGLE("PGA 1 Capture Switch", ADAU1372_REG_PGA_CTRL(1), 7, 1, 1), - SOC_SINGLE("PGA 2 Capture Switch", ADAU1372_REG_PGA_CTRL(2), 7, 1, 1), - SOC_SINGLE("PGA 3 Capture Switch", ADAU1372_REG_PGA_CTRL(3), 7, 1, 1), + SOC_SINGLE("PGA 0 Capture Switch", ADAU1372_REG_PGA_CTRL(0), 7, 1, 0), + SOC_SINGLE("PGA 1 Capture Switch", ADAU1372_REG_PGA_CTRL(1), 7, 1, 0), + SOC_SINGLE("PGA 2 Capture Switch", ADAU1372_REG_PGA_CTRL(2), 7, 1, 0), + SOC_SINGLE("PGA 3 Capture Switch", ADAU1372_REG_PGA_CTRL(3), 7, 1, 0), SOC_SINGLE_TLV("DAC 0 Playback Volume", ADAU1372_REG_DAC_VOL(0), 0, 0xff, 1, adau1372_digital_tlv), @@ -369,10 +369,10 @@ static const struct snd_soc_dapm_widget adau1372_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("MICBIAS0", ADAU1372_REG_MICBIAS, 4, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("MICBIAS1", ADAU1372_REG_MICBIAS, 5, 0, NULL, 0), - SND_SOC_DAPM_PGA("PGA0", ADAU1372_REG_PGA_CTRL(0), 6, 0, NULL, 0), - SND_SOC_DAPM_PGA("PGA1", ADAU1372_REG_PGA_CTRL(1), 6, 0, NULL, 0), - SND_SOC_DAPM_PGA("PGA2", ADAU1372_REG_PGA_CTRL(2), 6, 0, NULL, 0), - SND_SOC_DAPM_PGA("PGA3", ADAU1372_REG_PGA_CTRL(3), 6, 0, NULL, 0), + SND_SOC_DAPM_PGA("PGA0", ADAU1372_REG_PGA_CTRL(0), 6, 1, NULL, 0), + SND_SOC_DAPM_PGA("PGA1", ADAU1372_REG_PGA_CTRL(1), 6, 1, NULL, 0), + SND_SOC_DAPM_PGA("PGA2", ADAU1372_REG_PGA_CTRL(2), 6, 1, NULL, 0), + SND_SOC_DAPM_PGA("PGA3", ADAU1372_REG_PGA_CTRL(3), 6, 1, NULL, 0), SND_SOC_DAPM_ADC("ADC0", NULL, ADAU1372_REG_ADC_CTRL2, 0, 0), SND_SOC_DAPM_ADC("ADC1", NULL, ADAU1372_REG_ADC_CTRL2, 1, 0), SND_SOC_DAPM_ADC("ADC2", NULL, ADAU1372_REG_ADC_CTRL3, 0, 0),