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[2620:137:e000::1:20]) by mx.google.com with ESMTP id e12-20020a17090301cc00b0019c93e0dce0si1630274plh.254.2023.06.20.02.59.45; Tue, 20 Jun 2023 03:00:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="c/7ZNKL9"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232586AbjFTJx5 (ORCPT + 99 others); Tue, 20 Jun 2023 05:53:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58426 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230457AbjFTJxR (ORCPT ); Tue, 20 Jun 2023 05:53:17 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4460A1FD8; Tue, 20 Jun 2023 02:51:34 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (unknown [IPv6:2001:b07:2ed:14ed:c5f8:7372:f042:90a2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 22A376606F8A; Tue, 20 Jun 2023 10:51:32 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687254693; bh=CKq+lIos5lmp5IXI23bezl/YLNmNphPHjGKRjAumT9I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=c/7ZNKL9oxQI/8GLUCDiY/9wDR41k5QtZxRu6iP6nySvA2m3e2FnZ/JfVrXPZ57aY Xr8XmkJgDhIvImA9ZmX5r+bf2H81btv2TRXrflFw+Gw4HlQjuyjEj2QRuM4iqnnpVt DfDbDWTo7VcuQ7oAReldtF6sSWhmZlniHXUZIEgXsdUcKt0QlugWpalIb9ROBGYnkU e339L2/Mey2des3PqlUxJYwxgg1S1py+4YZnCvrcbQ5phwPWniaSpHiKde9HMiVmJR o6SrjokI91gaCEcfGwJ1k2cuy82bD32RsLabwuFPU50LZQBnazPW9HxO4WqFIhTZj7 flNQ7Jn8QEYMw== From: AngeloGioacchino Del Regno To: agross@kernel.org Cc: andersson@kernel.org, konrad.dybcio@linaro.org, dmitry.baryshkov@linaro.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, robdclark@gmail.com, linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno , kernel@collabora.com Subject: [PATCH v4 1/6] dt-bindings: iommu: qcom,iommu: Add qcom,ctx-num property Date: Tue, 20 Jun 2023 11:51:22 +0200 Message-Id: <20230620095127.96600-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230620095127.96600-1-angelogioacchino.delregno@collabora.com> References: <20230620095127.96600-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769215308793308846?= X-GMAIL-MSGID: =?utf-8?q?1769215308793308846?= Add a new "qcom,ctx-num" property to force an ASID number on IOMMU contexts where required. Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/iommu/qcom,iommu.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml b/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml index d9fabdf930d9..0446ccc4116e 100644 --- a/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml @@ -71,6 +71,11 @@ patternProperties: reg: maxItems: 1 + qcom,ctx-num: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The ASID number associated to the context bank. + required: - compatible - interrupts From patchwork Tue Jun 20 09:51:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 110392 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp3550789vqr; Tue, 20 Jun 2023 03:03:23 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6gZTUJ7OV7ySdVkmETOpH8shnRCngSEMens0vypFq3PnsH7WcE/k9Xp31iVRvZxZ8qfBlZ X-Received: by 2002:a05:6a20:a108:b0:10c:b1b0:3ee3 with SMTP id q8-20020a056a20a10800b0010cb1b03ee3mr16374118pzk.21.1687255402964; Tue, 20 Jun 2023 03:03:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687255402; cv=none; d=google.com; s=arc-20160816; b=zuZc1S+/yH/+uBGKG5DmFqZ15tzhGG2hzWhwqYKiDqgq7rjrjWg30j4rcqd4+fA3pj 2BdYVX/bCE3cFbza4Mb/GNRWtq2Gsr2PTJNkBIW7ks0Um9nNqcEvmiQxjOv85NYh3Qp7 /iYbTVDt+d+fh9tWMbBm+zCZ612H10U1ggEiwIajM7QpmoWMBslSF9CrM+vt45fAINhp pnk0x3O4c4af2CGASx2u6WobBBx8gQWufVtH3t+HsFE2CtohRKgLw8iYYaDKhXbUtyV1 +By5LhxonKCJ2i7lx7O5x5ycClm6yVr4odQs9qh36LXi94KtbJYYRU0OSsMdq8S14EK9 nb5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Ak5SqoAL/2Kn2aHuiTxZy93mPXCTG6ERVHFL658/Cic=; b=Zbvi0MuMlUBlenCbTOZsMtxzv3umNZ7FArxUw7lqWwEDZopAIWVH7fGN2D4kZ3XY9x gYC/dErEeQ0zAeiNcfoyhgui2y/Xz+Ktn7Cv/UFzcxv0kPGA+8HDUCxd+KsJq5JcKfgQ Jn14w9JsA67goYYOQ38COzgFF+bfFKNq+LXJQ3vYxqXV3VJCJaZO3DnJaSQPRLd8tMCF k04Kkw92FfDCe0BCbvTBnlKLkPhqbJJ9FujSJTFhUrY347thUBa1cu4IuVZQ3xTzehlB ubnfES0Bn4lr3vBEwNxD9f8y8AqpPURDcGJ62rgKNv45ZFYISPjJB430XWARUostpXcG MIkA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=VEXcYiVt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id bk13-20020a056a02028d00b005440dcf6d1asi1479003pgb.175.2023.06.20.03.03.09; Tue, 20 Jun 2023 03:03:22 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=VEXcYiVt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232592AbjFTJyA (ORCPT + 99 others); Tue, 20 Jun 2023 05:54:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231560AbjFTJxR (ORCPT ); Tue, 20 Jun 2023 05:53:17 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 676452113; Tue, 20 Jun 2023 02:51:35 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (unknown [IPv6:2001:b07:2ed:14ed:c5f8:7372:f042:90a2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 3F0EE6606F8D; Tue, 20 Jun 2023 10:51:33 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687254694; bh=3K/g1tbaM/y2c9YEm8HiMo7STgxOq2EJPtZTFgO09Ec=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VEXcYiVtv408pbwHBwLzhU9/pM2S1KmEAC7lbY5J7GiTjGsGWQH1z6OurDjb5dUT6 KhJe01jQ18k8Vf9/rVypZClSO2TEUVb5yVYzEV3uTW+9w03f1CVoHPKGxVW4819i1M hcXstTG1pGZ4icQLhqnn7+XA8qK/WI/4891y7ajDmBRhxk+A6ybC9srseCBfkptxnR YbEq5Dpk68nMoFFL7zAfBvd87PDxygRcADjoIjE/U6x3Gf2qWBwoXB6eoXlGa8ktpb 1hsMn9+Kk33ZYrbeVaZJ1RH3tffOrK3uG/9RjdDhHwbel1Fwfmr3r8RCRYDLE/MGZb BiRpWVPZAQ/sA== From: AngeloGioacchino Del Regno To: agross@kernel.org Cc: andersson@kernel.org, konrad.dybcio@linaro.org, dmitry.baryshkov@linaro.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, robdclark@gmail.com, linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno , kernel@collabora.com, Marijn Suijten Subject: [PATCH v4 2/6] iommu/qcom: Use the asid read from device-tree if specified Date: Tue, 20 Jun 2023 11:51:23 +0200 Message-Id: <20230620095127.96600-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230620095127.96600-1-angelogioacchino.delregno@collabora.com> References: <20230620095127.96600-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769215521044132154?= X-GMAIL-MSGID: =?utf-8?q?1769215521044132154?= As specified in this driver, the context banks are 0x1000 apart but on some SoCs the context number does not necessarily match this logic, hence we end up using the wrong ASID: keeping in mind that this IOMMU implementation relies heavily on SCM (TZ) calls, it is mandatory that we communicate the right context number. Since this is all about how context banks are mapped in firmware, which may be board dependent (as a different firmware version may eventually change the expected context bank numbers), introduce a new property "qcom,ctx-num": when found, the ASID will be forced as read from the devicetree. When "qcom,ctx-num" is not found, this driver retains the previous behavior as to avoid breaking older devicetrees or systems that do not require forcing ASID numbers. Signed-off-by: Marijn Suijten [Marijn: Rebased over next-20221111] Signed-off-by: AngeloGioacchino Del Regno --- drivers/iommu/arm/arm-smmu/qcom_iommu.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/qcom_iommu.c b/drivers/iommu/arm/arm-smmu/qcom_iommu.c index a503ed758ec3..b661b559ea01 100644 --- a/drivers/iommu/arm/arm-smmu/qcom_iommu.c +++ b/drivers/iommu/arm/arm-smmu/qcom_iommu.c @@ -531,7 +531,8 @@ static int qcom_iommu_of_xlate(struct device *dev, struct of_phandle_args *args) * index into qcom_iommu->ctxs: */ if (WARN_ON(asid < 1) || - WARN_ON(asid > qcom_iommu->num_ctxs)) { + WARN_ON(asid > qcom_iommu->num_ctxs) || + WARN_ON(qcom_iommu->ctxs[asid - 1] == NULL)) { put_device(&iommu_pdev->dev); return -EINVAL; } @@ -617,7 +618,8 @@ static int qcom_iommu_sec_ptbl_init(struct device *dev) static int get_asid(const struct device_node *np) { - u32 reg; + u32 reg, val; + int asid; /* read the "reg" property directly to get the relative address * of the context bank, and calculate the asid from that: @@ -625,7 +627,17 @@ static int get_asid(const struct device_node *np) if (of_property_read_u32_index(np, "reg", 0, ®)) return -ENODEV; - return reg / 0x1000; /* context banks are 0x1000 apart */ + /* + * Context banks are 0x1000 apart but, in some cases, the ASID + * number doesn't match to this logic and needs to be passed + * from the DT configuration explicitly. + */ + if (!of_property_read_u32(np, "qcom,ctx-num", &val)) + asid = val; + else + asid = reg / 0x1000; + + return asid; } static int qcom_iommu_ctx_probe(struct platform_device *pdev) From patchwork Tue Jun 20 09:51:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 110397 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp3552014vqr; Tue, 20 Jun 2023 03:05:27 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5i7gUoLYMG8aQx1H9eS0rPcqOW15wLPHrTI0/b3s33yk9nZoLCFn2EleDaiORFwgd2Fl7w X-Received: by 2002:a05:6a00:98d:b0:668:812d:a1e4 with SMTP id u13-20020a056a00098d00b00668812da1e4mr3785091pfg.22.1687255526630; Tue, 20 Jun 2023 03:05:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687255526; cv=none; d=google.com; s=arc-20160816; b=M1gXZ7i74tdGHs/ePnU2r3PIJiLA2/1/YES5qONQCsxGYOfeNPtmsiIbchrg4hgXFn eJ3JVtYcgZ8d8T9eHw473ll62dL4l4rPTDLFdtwLi7u8UNk/dprm9Ryl1eyxQotMruvc oxg7m+SPlF6OJBwgdcLG8IQ/UOymiRWcUHOsSNU7vK+e5C3/kz+oQjp/MByta9a/XnUC 8YbElorcs7o/Zy9HWGlrNmVRQFPKyxhDhs0i7doMxL0VvZ6p2l3YCXS5sIHdzRHfoy+v DDr0xbcBDyxgYImVp1yPYF7KD1JbEnE8mWxycY5suAKxe6Br7IsQFCCdeEIPiuCU/uUb AwPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Qcn9WiEqvG3WryGmzlKh/ivZ3O3mvCcHUR2Vl1fFQiQ=; b=oHMxs+yy+yQrZY+zW8j978RSTwLHsHOSUmJ7YqJWsGZXK59Ya8CsewpS5WhmOJOFwH DD62QbcBveHVXwVK8vHVzsADiyCL3VuxxHnXtFKrBk9WXfdrIq3M4VQOcbO3ksbScH5K KiCaswOl+DZfJAfyt/8nCVAniKJb8CR/1K5ojtcChLjBYPxhtuiKbF8c25kwr8FsU4uD q1YLwexrBIDO/A75vHVnHHA435o8e4yGgDYzbWHu58zrkwC5UtPsF6ifwwIq1Yd6JI9k odTQzuqjXdNCWcYgQmRSaSwLfqpzQGFbtuzB3d4+HnQP7g6CRY/dd5uv9jI/ChWWE75W 70sg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="K2h6/knE"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c192-20020a621cc9000000b006683174a49csi1380395pfc.198.2023.06.20.03.05.06; Tue, 20 Jun 2023 03:05:26 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="K2h6/knE"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232527AbjFTJyG (ORCPT + 99 others); Tue, 20 Jun 2023 05:54:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58192 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232033AbjFTJxU (ORCPT ); Tue, 20 Jun 2023 05:53:20 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 835AF211D; Tue, 20 Jun 2023 02:51:36 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (unknown [IPv6:2001:b07:2ed:14ed:c5f8:7372:f042:90a2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 615156606F8E; Tue, 20 Jun 2023 10:51:34 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687254695; bh=rcPOmjDU7rnsS/fpNTQ+CcSQ5KZFIIdniqaYNHmw7pQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=K2h6/knEKN+xECeFsxF507s+wQKQBlpzbNmCdzF6Nhw2c02DRNY2kD8zWwAsXWFei ZqnOkRxNcdhAAcpmiQm7bvrAqzAiVCzO5ss4OYQONtyGgLIzrMRhFDFkBJTUdrPFRB vTPz2WV4KYml9TujDp5lf/S67O3hP7fGHyA8DY6hDiH4WLbn6I4H5JV0xoKYljYXXI CvpyyMTL74wDVYIyIbpUD6QNqL9cljXOX3YQY5yaKv0YMjgZuxeOSX1PxlP9QjgVbJ /13Cvd2pGTmaFGwGbIUDxNjKv0iTIDEB7rlhxfagLQTHOyWPBTJZqHHZdjYifMctpl HXJb++yWbeb6Q== From: AngeloGioacchino Del Regno To: agross@kernel.org Cc: andersson@kernel.org, konrad.dybcio@linaro.org, dmitry.baryshkov@linaro.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, robdclark@gmail.com, linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno , kernel@collabora.com Subject: [PATCH v4 3/6] iommu/qcom: Disable and reset context bank before programming Date: Tue, 20 Jun 2023 11:51:24 +0200 Message-Id: <20230620095127.96600-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230620095127.96600-1-angelogioacchino.delregno@collabora.com> References: <20230620095127.96600-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769215651190620876?= X-GMAIL-MSGID: =?utf-8?q?1769215651190620876?= Writing the new TTBRs, TCRs and MAIRs on a previously enabled context bank may trigger a context fault, resulting in firmware driven AP resets: change the domain initialization programming sequence to disable the context bank(s) and to also clear the related fault address (CB_FAR) and fault status (CB_FSR) registers before writing new values to TTBR0/1, TCR/TCR2, MAIR0/1. Fixes: 0ae349a0f33f ("iommu/qcom: Add qcom_iommu") Signed-off-by: AngeloGioacchino Del Regno --- drivers/iommu/arm/arm-smmu/qcom_iommu.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu/qcom_iommu.c b/drivers/iommu/arm/arm-smmu/qcom_iommu.c index b661b559ea01..8b48f7e8f3db 100644 --- a/drivers/iommu/arm/arm-smmu/qcom_iommu.c +++ b/drivers/iommu/arm/arm-smmu/qcom_iommu.c @@ -273,6 +273,13 @@ static int qcom_iommu_init_domain(struct iommu_domain *domain, ctx->secure_init = true; } + /* Disable context bank before programming */ + iommu_writel(ctx, ARM_SMMU_CB_SCTLR, 0); + + /* Clear context bank fault address fault status registers */ + iommu_writel(ctx, ARM_SMMU_CB_FAR, 0); + iommu_writel(ctx, ARM_SMMU_CB_FSR, ARM_SMMU_FSR_FAULT); + /* TTBRs */ iommu_writeq(ctx, ARM_SMMU_CB_TTBR0, pgtbl_cfg.arm_lpae_s1_cfg.ttbr | From patchwork Tue Jun 20 09:51:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 110385 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp3547049vqr; Tue, 20 Jun 2023 02:55:52 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7+L48AscSvom4Eq2+F8ghFydc2Hi/hiCBtoVwNFXmzQzFmk0USVDUVI7ojS0UoggeRwjK4 X-Received: by 2002:a05:6a20:394b:b0:121:97f4:d063 with SMTP id r11-20020a056a20394b00b0012197f4d063mr6795838pzg.16.1687254951874; Tue, 20 Jun 2023 02:55:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687254951; cv=none; d=google.com; s=arc-20160816; b=fRPI0sJFvPwnzfgDC4k/EjVZhIPn53H8WoVJcOZQHisFDfuxvytZiUw/2aVWTWXpMp UXRtprCeLd90qP5Z145idbxdtWS1Z+xlKwV5+Ml6aSTzPbmST/c85f1nr8K58HzsXeLF 33MNkzuO561Ijv6B3aF4wOnt4Rhs9X8qYoLqyiM6IDOXTaPYVuavcMIC6JMgHTW3E5Pb Bf7ZLUKGbyAiAdV8VLG11b0Q4LNTm1rZgXJBPqHXCAdi/FuqkPrO/lZKKDIg7odKuy5u zehB//PpRoMQJs1PKucxtFN9ZMJwEsbj8em8S9aoWGalb4OBEe9JpH+BzjjerjtCua/y cirw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=+KFSqAOoSsDrXoX+S5LqSUTZsoGR3EGD2b0WzlALzu8=; b=U06PoYDvPsNRKN5qW2OU0STDWj0PpR4o9FRZExU2T4zS132xHfWu8jfmV58J7jSLdn GJXhwp3LebdX4A2WrBCnaAVeJ5K9T5uB6cUmmEUxz6dPsMc65TQ1T6zlloRO6w4QLtn/ Uuh77YlsDMatz1qJv166YYncqa+dtjTfa1WMWm4urE9d7OBs0362jA6Htp+KLFQwHHrN 4qYk6eo/hDOQSNnpXI3XZzQ+Z6nE1FERecw7pmx7XmbJcfeNHNGi3C240Svz81+aBZUz N1ivodMJvHrhgZoJwNaEAleQWPwVQPCVozF/V0hAT7KmGA5sUVSb/myq1GZJ7LQNpGXI 004Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=SFU8vTES; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id f29-20020aa79d9d000000b0066975f3a955si374857pfq.74.2023.06.20.02.55.37; Tue, 20 Jun 2023 02:55:51 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=SFU8vTES; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232614AbjFTJyM (ORCPT + 99 others); Tue, 20 Jun 2023 05:54:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58472 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232529AbjFTJxW (ORCPT ); Tue, 20 Jun 2023 05:53:22 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A76132127; Tue, 20 Jun 2023 02:51:37 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (unknown [IPv6:2001:b07:2ed:14ed:c5f8:7372:f042:90a2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 818096606F94; Tue, 20 Jun 2023 10:51:35 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687254696; bh=YU/50uDXcSxDqIMfavvqSq4fy2uuTpev475iPj7d5+M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SFU8vTESFZIg+fJV5pu+p9OJS54+H9S2wyzzXkQr5ekFwbvf0redMkop1j62Hgk75 2kUGVsms2ErwmW2LGjsS0f4sM2027aRjTbUmHMPLbmG4wu2oR5osu+Wx5+H3nPjyrS n/uNseaNWK1QXSRJRXXSr4qSLvXD0OkrIgtK25N/QhrfV/rwA1MgDiQw94cfn3qPhi 5rheZBgFizOA4RrSRbtwdtgTCK22WTCs+o1Rb1KwyIa0takutXrPSe65ZD+gc8Rm9W eXS5h7CHGmVdRj5du36qjcUGJA09DgSjwgCwul1IlAn41kqVQqP7yXjgi7BDzwnmbB qvy0skovxh6CA== From: AngeloGioacchino Del Regno To: agross@kernel.org Cc: andersson@kernel.org, konrad.dybcio@linaro.org, dmitry.baryshkov@linaro.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, robdclark@gmail.com, linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno , kernel@collabora.com Subject: [PATCH v4 4/6] iommu/qcom: Index contexts by asid number to allow asid 0 Date: Tue, 20 Jun 2023 11:51:25 +0200 Message-Id: <20230620095127.96600-5-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230620095127.96600-1-angelogioacchino.delregno@collabora.com> References: <20230620095127.96600-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769215048186449159?= X-GMAIL-MSGID: =?utf-8?q?1769215048186449159?= This driver was indexing the contexts by asid-1, which is probably done under the assumption that the first ASID is always 1. Unfortunately this is not always true: at least for MSM8956 and MSM8976's GPU IOMMU, the gpu_user context's ASID number is zero. To allow using a zero asid number, index the contexts by `asid` instead of by `asid - 1`. While at it, also enhance human readability by renaming the `num_ctxs` member of struct qcom_iommu_dev to `max_asid`. Signed-off-by: AngeloGioacchino Del Regno --- drivers/iommu/arm/arm-smmu/qcom_iommu.c | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/qcom_iommu.c b/drivers/iommu/arm/arm-smmu/qcom_iommu.c index 8b48f7e8f3db..f4b948a0bd1c 100644 --- a/drivers/iommu/arm/arm-smmu/qcom_iommu.c +++ b/drivers/iommu/arm/arm-smmu/qcom_iommu.c @@ -51,8 +51,8 @@ struct qcom_iommu_dev { struct clk_bulk_data clks[CLK_NUM]; void __iomem *local_base; u32 sec_id; - u8 num_ctxs; - struct qcom_iommu_ctx *ctxs[]; /* indexed by asid-1 */ + u8 max_asid; + struct qcom_iommu_ctx *ctxs[]; /* indexed by asid */ }; struct qcom_iommu_ctx { @@ -94,7 +94,7 @@ static struct qcom_iommu_ctx * to_ctx(struct qcom_iommu_domain *d, unsigned asid struct qcom_iommu_dev *qcom_iommu = d->iommu; if (!qcom_iommu) return NULL; - return qcom_iommu->ctxs[asid - 1]; + return qcom_iommu->ctxs[asid]; } static inline void @@ -534,12 +534,10 @@ static int qcom_iommu_of_xlate(struct device *dev, struct of_phandle_args *args) qcom_iommu = platform_get_drvdata(iommu_pdev); /* make sure the asid specified in dt is valid, so we don't have - * to sanity check this elsewhere, since 'asid - 1' is used to - * index into qcom_iommu->ctxs: + * to sanity check this elsewhere: */ - if (WARN_ON(asid < 1) || - WARN_ON(asid > qcom_iommu->num_ctxs) || - WARN_ON(qcom_iommu->ctxs[asid - 1] == NULL)) { + if (WARN_ON(asid > qcom_iommu->max_asid) || + WARN_ON(qcom_iommu->ctxs[asid] == NULL)) { put_device(&iommu_pdev->dev); return -EINVAL; } @@ -696,7 +694,7 @@ static int qcom_iommu_ctx_probe(struct platform_device *pdev) dev_dbg(dev, "found asid %u\n", ctx->asid); - qcom_iommu->ctxs[ctx->asid - 1] = ctx; + qcom_iommu->ctxs[ctx->asid] = ctx; return 0; } @@ -708,7 +706,7 @@ static void qcom_iommu_ctx_remove(struct platform_device *pdev) platform_set_drvdata(pdev, NULL); - qcom_iommu->ctxs[ctx->asid - 1] = NULL; + qcom_iommu->ctxs[ctx->asid] = NULL; } static const struct of_device_id ctx_of_match[] = { @@ -755,11 +753,11 @@ static int qcom_iommu_device_probe(struct platform_device *pdev) for_each_child_of_node(dev->of_node, child) max_asid = max(max_asid, get_asid(child)); - qcom_iommu = devm_kzalloc(dev, struct_size(qcom_iommu, ctxs, max_asid), + qcom_iommu = devm_kzalloc(dev, struct_size(qcom_iommu, ctxs, max_asid + 1), GFP_KERNEL); if (!qcom_iommu) return -ENOMEM; - qcom_iommu->num_ctxs = max_asid; + qcom_iommu->max_asid = max_asid; qcom_iommu->dev = dev; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); From patchwork Tue Jun 20 09:51:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 110408 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp3560916vqr; Tue, 20 Jun 2023 03:24:48 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5/TnDZ8iDCmdlNZsHWbpp5x8Q2wOLdxxIWZXeugGJPmEn0puWGk/5YIiXYSKXci6h+DQB7 X-Received: by 2002:a9d:74cc:0:b0:6b4:5c7d:34f6 with SMTP id a12-20020a9d74cc000000b006b45c7d34f6mr3084893otl.36.1687256688005; Tue, 20 Jun 2023 03:24:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687256687; cv=none; d=google.com; s=arc-20160816; b=QoVJS4ObX9JNTV5Kzuao7plt7HZHtCFG5QPgYpVWoFetrr+PUAeUH9cfTv7oUFvzCh qIRxu2s/KDESuh6EXmGDU7ir51A2iRyj3uPOvhnhcZ8Whc6WdlUDX1mcXVrLidTLtuhB 5oWGNxgTSnG9TByq9MqoxQ+ujWdtIfWxn9f1UkSudJ+H6dj7YKl7FTy31E960QSA/ZvP +VXl1AZrqepB8j6WU5+EM3fljIG9VGe3MwWB/ZSKldT4V7a6Z7TKUFlH9ZES7YS1HK6U sXjdvXLuVxx4g6LUGeFhnooRzA3AFzem7/1J/N7THICdqawTUaPRl4ljRdnMs5RBzgXR tf3A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=+0tbWT9cOVwWrxftDU1ugDsAAwllb6N8+Z4h4ov0+Lk=; b=elCqfubw8+a5NQVbEk89c/V6rwH5sU3scGvE9szconX6zGqseM/c9s+iexZstBidi6 nDNFtK2dJCKZbCyC9BW3pkq92+711/mZrCWG/Jrm/MTvRS9PpRW2XlmHEbesT/sdxUl4 dY1JWp52gHqJSVnNo2Wjl1PhUBZ2Z+v6jtLpR+fYYeZ+yzAOQp+PdFZUhF1PuE2ehQS0 xFIUHjEJIJ5bkfQsNT1DxVLPVwjPup5sq415O4/zWGY8/MwPM2sG+fpm/+6hUUGqHYPD MpGlpC59npJFxNJOsxuIkacPkZ/kRmBQp8FbUph17xaohD2g41/xyRGqoEsZgY4Z8YC1 A4rw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=Rw15G7lw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 186-20020a6300c3000000b005538a3e801esi1385888pga.535.2023.06.20.03.24.32; Tue, 20 Jun 2023 03:24:47 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=Rw15G7lw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232619AbjFTJyQ (ORCPT + 99 others); Tue, 20 Jun 2023 05:54:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58516 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230422AbjFTJxX (ORCPT ); Tue, 20 Jun 2023 05:53:23 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D0DEF212E; Tue, 20 Jun 2023 02:51:38 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (unknown [IPv6:2001:b07:2ed:14ed:c5f8:7372:f042:90a2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id A09C36602242; Tue, 20 Jun 2023 10:51:36 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687254697; bh=QLBgAOvVUGSBnz1U69YbD+N4tPMfF9fPwWDG2K6scpQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Rw15G7lwYSsOVlgVJnqtQZVRkUivdnpgzPE1z4BjrTuB/Wd0WkSj+y8CZ81ldIzag qdewAQSpY9pqwuXEwztUjWukfAQrEqwlOPfnioeSV/yTgmq5pjFuQfOy6uy1zK2Sy1 74VM+BpUvfzPX+BQBp/6cFORVaG9Pr/7XfSVeR4UeOGbMFL5DHaE+bnSPJ5DeLkQQX jIi1lVgs9C6vJyXxov5PmWgBBgvKHtiiyrVA9HFwkhaAkz2aXtrSBZfS9itCL+Xndx Sn9n3wvkn4HHej8o+yP3csl0hvUSwzoCA/6cxgaIOhwXf9EXg1v8AJ/ZXEm4Ldtwkh CqeLeYvGmAuLw== From: AngeloGioacchino Del Regno To: agross@kernel.org Cc: andersson@kernel.org, konrad.dybcio@linaro.org, dmitry.baryshkov@linaro.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, robdclark@gmail.com, linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno , kernel@collabora.com Subject: [PATCH v4 5/6] dt-bindings: iommu: qcom,iommu: Add QSMMUv2 and MSM8976 compatibles Date: Tue, 20 Jun 2023 11:51:26 +0200 Message-Id: <20230620095127.96600-6-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230620095127.96600-1-angelogioacchino.delregno@collabora.com> References: <20230620095127.96600-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769216868555076110?= X-GMAIL-MSGID: =?utf-8?q?1769216868555076110?= Add compatible string "qcom,msm-iommu-v2" for the inner node, along with "qcom,msm8976-iommu" as a first user of it and "qcom,msm-iommu-v2-ns" and "qcom,msm-iommu-v2-sec" for the context bank nodes to support Qualcomm's secure fw "SMMU v2" implementation. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring --- .../devicetree/bindings/iommu/qcom,iommu.yaml | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml b/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml index 0446ccc4116e..b94dbab1e1f1 100644 --- a/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml @@ -17,11 +17,16 @@ description: | properties: compatible: - items: - - enum: - - qcom,msm8916-iommu - - qcom,msm8953-iommu - - const: qcom,msm-iommu-v1 + oneOf: + - items: + - enum: + - qcom,msm8916-iommu + - qcom,msm8953-iommu + - const: qcom,msm-iommu-v1 + - items: + - enum: + - qcom,msm8976-iommu + - const: qcom,msm-iommu-v2 clocks: items: @@ -64,6 +69,8 @@ patternProperties: enum: - qcom,msm-iommu-v1-ns - qcom,msm-iommu-v1-sec + - qcom,msm-iommu-v2-ns + - qcom,msm-iommu-v2-sec interrupts: maxItems: 1 From patchwork Tue Jun 20 09:51:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 110401 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp3552237vqr; Tue, 20 Jun 2023 03:05:51 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4wSHGG4WUa+iNtB3t5K+H3QM+wlZFmttKR2gwKbh6BBoSKmXxQU7A7sSMk7i/EMnHQU6Bs X-Received: by 2002:a92:c60a:0:b0:33d:16b6:3df8 with SMTP id p10-20020a92c60a000000b0033d16b63df8mr10305240ilm.24.1687255551684; Tue, 20 Jun 2023 03:05:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687255551; cv=none; d=google.com; s=arc-20160816; b=QCuCYxpNHUvLxBDkblGB03HQiTazOyDr9kHT+O93wXTERVo0nATOGOsIJaA0XU8gwg 8eUrHvFcFLfMNZfVUiRGi4aMoAvsJWHU3S0BcUYrD5IKb/DARSk0E9L5xGUOckGRbQWp 37uDH7hSvnRUr4S1xLeA/kcA5hlP+Txf5rEiUdPY5n/4MrN2H56UF4dwCwv0ywzMCDN1 d7jrBtCfXJ/ojzDL8ZSspHL22WYlykhtHiUYuvO1KUAZLgq1ODUkHVWFlVSlrVJb9j90 2AmJs7oTdrtID4i8GhCjydyx4wZm1aZ1V1wIGAvqa/wHse08JeLiB1AJ7YBEhiQckfxi B+rg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Wi9QPZqGp+7FOZWkAZxqIBuGwvC2AAEk4bRjxbryt60=; b=C0nq6MtC3ewM/nl5tl6AaI36SrXQsLcFIa+CsIBvSdUs6iZJHnB46U/Fbn5sp27PSd mttZ+koMZsUOuBPO4kR1XCS53DJ6hhUvC3nV0uMPtRTiBrYW+3VPOkZiCONq62XnG/Bk x5c2w71eAtxkONOSw7mDRlckZY6Ax6W4mz9VZNwxHI5czR+vX3ojDGjiRcOXu26EKgor jSJGDJCclovSUgmEx1xww1YsiaNHRIo654L3EKYdKZA98GpmKgvQ3Su0EhHglqHjzusB CU3FBTgRuVGn8hIlD7XgF2ALkh63Q/YjRl3Who/ZXoPwwLeCeqiec6gyDh/c98MXBsKq CrAg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=g1cv0+eA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i124-20020a639d82000000b005501b2005fasi1378155pgd.161.2023.06.20.03.05.28; Tue, 20 Jun 2023 03:05:51 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=g1cv0+eA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232475AbjFTJy1 (ORCPT + 99 others); Tue, 20 Jun 2023 05:54:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57458 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232471AbjFTJxZ (ORCPT ); Tue, 20 Jun 2023 05:53:25 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 11A46213A; Tue, 20 Jun 2023 02:51:40 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (unknown [IPv6:2001:b07:2ed:14ed:c5f8:7372:f042:90a2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id C03646606F8A; Tue, 20 Jun 2023 10:51:37 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687254698; bh=k+nsMftVQKFojPuOIYlMvR1FeQL9yk/GZjypHf7SXbs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=g1cv0+eAJHvUiVQz3QyVgp3i6kuvXb5dGqZI3w9NOBGG7arWRIVZVLCzYTG3nM/Nl 2KvOVygazZFszBMFnL1QBelMnf9B7EyM1nyvoQkgsQ3BmK+6Oyhkp7I1i+xYMoO8Ls sN5x9V4G7nFMhwshOUHgWSNx/w1C39MWp1ee3rXCFb3cjsIkHQ+xCwcDSAaNGonHG8 Kl5Aqd4ekDIVr/kZjCkkWW+kOQKa+5fNTQEewilAa+hho1J8MayiW+iQ71l1N0z8O1 MSGIa428Xe01M0Plqv1tAdbsI+Hlcyd/8flhqs6KWTIPUNVm2Q8yLsYdNSVPiQSUw9 oMbQ0+QgePfRw== From: AngeloGioacchino Del Regno To: agross@kernel.org Cc: andersson@kernel.org, konrad.dybcio@linaro.org, dmitry.baryshkov@linaro.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, robdclark@gmail.com, linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno , kernel@collabora.com, Marijn Suijten Subject: [PATCH v4 6/6] iommu/qcom: Add support for QSMMUv2 and QSMMU-500 secured contexts Date: Tue, 20 Jun 2023 11:51:27 +0200 Message-Id: <20230620095127.96600-7-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230620095127.96600-1-angelogioacchino.delregno@collabora.com> References: <20230620095127.96600-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769215677369256076?= X-GMAIL-MSGID: =?utf-8?q?1769215677369256076?= On some SoCs like MSM8956, MSM8976 and others, secure contexts are also secured: these get programmed by the bootloader or TZ (as usual) but their "interesting" registers are locked out by the hypervisor, disallowing direct register writes from Linux and, in many cases, completely disallowing the reprogramming of TTBR, TCR, MAIR and other registers including, but not limited to, resetting contexts. This is referred downstream as a "v2" IOMMU but this is effectively a "v2 firmware configuration" instead. Luckily, the described behavior of version 2 is effective only on secure contexts and not on non-secure ones: add support for that, finally getting a completely working IOMMU on at least MSM8956/76. Signed-off-by: Marijn Suijten [Marijn: Rebased over next-20221111] Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Dmitry Baryshkov --- drivers/iommu/arm/arm-smmu/qcom_iommu.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/qcom_iommu.c b/drivers/iommu/arm/arm-smmu/qcom_iommu.c index f4b948a0bd1c..5b69f336b797 100644 --- a/drivers/iommu/arm/arm-smmu/qcom_iommu.c +++ b/drivers/iommu/arm/arm-smmu/qcom_iommu.c @@ -59,6 +59,7 @@ struct qcom_iommu_ctx { struct device *dev; void __iomem *base; bool secure_init; + bool secured_ctx; u8 asid; /* asid and ctx bank # are 1:1 */ struct iommu_domain *domain; }; @@ -273,6 +274,12 @@ static int qcom_iommu_init_domain(struct iommu_domain *domain, ctx->secure_init = true; } + /* Secured QSMMU-500/QSMMU-v2 contexts cannot be programmed */ + if (ctx->secured_ctx) { + ctx->domain = domain; + continue; + } + /* Disable context bank before programming */ iommu_writel(ctx, ARM_SMMU_CB_SCTLR, 0); @@ -669,10 +676,14 @@ static int qcom_iommu_ctx_probe(struct platform_device *pdev) if (irq < 0) return -ENODEV; + if (of_device_is_compatible(dev->of_node, "qcom,msm-iommu-v2-sec")) + ctx->secured_ctx = true; + /* clear IRQs before registering fault handler, just in case the * boot-loader left us a surprise: */ - iommu_writel(ctx, ARM_SMMU_CB_FSR, iommu_readl(ctx, ARM_SMMU_CB_FSR)); + if (!ctx->secured_ctx) + iommu_writel(ctx, ARM_SMMU_CB_FSR, iommu_readl(ctx, ARM_SMMU_CB_FSR)); ret = devm_request_irq(dev, irq, qcom_iommu_fault, @@ -712,6 +723,8 @@ static void qcom_iommu_ctx_remove(struct platform_device *pdev) static const struct of_device_id ctx_of_match[] = { { .compatible = "qcom,msm-iommu-v1-ns" }, { .compatible = "qcom,msm-iommu-v1-sec" }, + { .compatible = "qcom,msm-iommu-v2-ns" }, + { .compatible = "qcom,msm-iommu-v2-sec" }, { /* sentinel */ } }; @@ -729,7 +742,8 @@ static bool qcom_iommu_has_secure_context(struct qcom_iommu_dev *qcom_iommu) struct device_node *child; for_each_child_of_node(qcom_iommu->dev->of_node, child) { - if (of_device_is_compatible(child, "qcom,msm-iommu-v1-sec")) { + if (of_device_is_compatible(child, "qcom,msm-iommu-v1-sec") || + of_device_is_compatible(child, "qcom,msm-iommu-v2-sec")) { of_node_put(child); return true; } @@ -873,6 +887,7 @@ static const struct dev_pm_ops qcom_iommu_pm_ops = { static const struct of_device_id qcom_iommu_of_match[] = { { .compatible = "qcom,msm-iommu-v1" }, + { .compatible = "qcom,msm-iommu-v2" }, { /* sentinel */ } };