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[2620:137:e000::1:20]) by mx.google.com with ESMTP id l8-20020a170903244800b001a1deff6062si781141pls.281.2023.06.19.17.14.47; Mon, 19 Jun 2023 17:15:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=DR4KIai6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229696AbjFTAEJ (ORCPT + 99 others); Mon, 19 Jun 2023 20:04:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57230 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229871AbjFTAEG (ORCPT ); Mon, 19 Jun 2023 20:04:06 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E963E1AD; Mon, 19 Jun 2023 17:04:04 -0700 (PDT) Received: from notapiano.myfiosgateway.com (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 2244F6606EEE; Tue, 20 Jun 2023 01:04:00 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687219443; bh=oL8x3kiYbUoDvILJoZNWHsiSmB2xU/ZPVSowy65Dw1M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DR4KIai6nxkCtFZdtfTS0T0oJtmBxcn3RP+Fo4c1yzE1wUsTkyQgGB7BDp70I68U6 /iqfAQ73WscOSP7pdMCgndkqo90cQk8ejwvF5/TPZ87uBzItx0jeAA3i7XtpB3Y98z ZUjcv9FMHhQTwx+JyCZ47ZIrIfjTn/gEqYvvOhE/4BRLgHBmEi2MT2sVsORPJ7K3GY t7X2fR+WlNqqz9spEAV8hH5Gra9vgbSQYXGqVdNi45U9sE8+bprKagvR9g7+W1vb1l dGF4ryn3LJO9uBal4+7EerhTdec1MgxKRKYOPqBv0z3hgvTKY95OrZdqU/I94q6a5f ljt7n0s0Jfhpg== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Andrew-CT Chen , Conor Dooley , Krzysztof Kozlowski , Mauro Carvalho Chehab , Rob Herring , Tiffany Lin , Yunfei Dong , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 1/6] media: dt-bindings: mediatek,vcodec: Allow single clock for mt8183 Date: Mon, 19 Jun 2023 20:03:34 -0400 Message-ID: <20230620000349.2122191-2-nfraprado@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230620000349.2122191-1-nfraprado@collabora.com> References: <20230620000349.2122191-1-nfraprado@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769178505219372027?= X-GMAIL-MSGID: =?utf-8?q?1769178505219372027?= MT8173 and MT8183 have different clocks, and consequently clock-names. Relax the number of clocks and set clock-names based on compatible. Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: Krzysztof Kozlowski --- Changes in v3: - Reintroduced this commit from v1 since the active clock is no longer used. - Further constrained clocks as suggested in v1. .../media/mediatek,vcodec-decoder.yaml | 37 ++++++++++++++----- 1 file changed, 28 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml index fad59b486d5d..1506d2693f7d 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml @@ -27,18 +27,12 @@ properties: maxItems: 1 clocks: + minItems: 1 maxItems: 8 clock-names: - items: - - const: vcodecpll - - const: univpll_d2 - - const: clk_cci400_sel - - const: vdec_sel - - const: vdecpll - - const: vencpll - - const: venc_lt_sel - - const: vdec_bus_clk_src + minItems: 1 + maxItems: 8 assigned-clocks: true @@ -88,6 +82,15 @@ allOf: required: - mediatek,scp + properties: + clocks: + minItems: 1 + maxItems: 1 + + clock-names: + items: + - const: vdec + - if: properties: compatible: @@ -99,6 +102,22 @@ allOf: required: - mediatek,vpu + properties: + clocks: + minItems: 8 + maxItems: 8 + + clock-names: + items: + - const: vcodecpll + - const: univpll_d2 + - const: clk_cci400_sel + - const: vdec_sel + - const: vdecpll + - const: vencpll + - const: venc_lt_sel + - const: vdec_bus_clk_src + additionalProperties: false examples: From patchwork Tue Jun 20 00:03:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 110200 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp3328106vqr; Mon, 19 Jun 2023 17:15:57 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6mCTUGAmVewCdjmGlwUGkwnSp7y/0jrxlRaCmsJtWzjrI3vjTq2GMmVL6VnDzEewHx62C7 X-Received: by 2002:a05:6358:41e:b0:12b:df77:ebbd with SMTP id 30-20020a056358041e00b0012bdf77ebbdmr1690541rwd.24.1687220157443; Mon, 19 Jun 2023 17:15:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687220157; cv=none; d=google.com; s=arc-20160816; b=wHMv4t3k9HwN28K3SxeoOU+fiZLWCyAS7pB2Y+wNkSiLFEq/Bt50zrp+8m0NaV1LUQ jL8/15Y+NOT5Q5KXlR7kGSpq1jVzMhZ1D52g/8+fSQ2BMwcT7JTlzIwx1FVCBcx0RVm/ aVsti3TsHN1KXARgGPfy0BYvEMcFr1IIgyrUK2e6NnIA+yaLU7kjRkzVKgC4dXb/bdZy zA2D0LBkCJKEW37WJtVlJ/lC6ii9jpF/8enR46XG7t15XpAMUG67AOlSzO0scRXnCuba GoPuj0RjXH/hQq4IXPMrpBTEsxECYgvvsprWjTECXKqklV8V62CKlvIRmDUVEpG4Vz/K vflg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=U/1728/8lz7c18NWge1qSqmZxN9V+tKYzr5/NRHcY1A=; b=TMB5TwbjKigkxmoFBtJOxNz9yAVO/RaU6PAtrzzdNcQl09NQm0ljbiYtaUZFT/OTbI ehOR10GIOfl5TH/aS6bzv25uKtg3gGaCqpUFhrBZ2uAMJI/VF9uP74JR8UOfDWE5CacS BX9gLrjuxo+qEr5Tw59Fn+rLHVgY4RQqgkKt9LjbvFCBWoRb/7zAqluhdvpHywkl3Ey5 7abfiXU5TAU3ivQJEUr79ync3PxhUzlw2BoxDIn7mpCf8XLLVoZ4N/UrMa79a4aMfF3L UkIaLNr3Pdj6CSB9GeuaxDs42kFWbPwfMv/FrKi5+P7CLC/Qm+8FDkv4SVxvo/+7uuMR KgMw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=NOzUtIjF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id r142-20020a632b94000000b005538026cc36si544896pgr.152.2023.06.19.17.15.44; Mon, 19 Jun 2023 17:15:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=NOzUtIjF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229893AbjFTAEM (ORCPT + 99 others); Mon, 19 Jun 2023 20:04:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57252 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229726AbjFTAEJ (ORCPT ); Mon, 19 Jun 2023 20:04:09 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C2179E4A; Mon, 19 Jun 2023 17:04:07 -0700 (PDT) Received: from notapiano.myfiosgateway.com (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 16D756606F6C; Tue, 20 Jun 2023 01:04:03 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687219446; bh=9a46aNnESj501/E03oYlm9sAjEXaazXllJOV13stIS8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NOzUtIjFSr2clm3a6T2fzUKteoU+kcoP8OHu2+TsI5DEmtENrpe47KpB4ST2XlTxl gYRKarP7wiyatbDwaUrJ/a5wAlZdBwOETlaxwCWNZ7GFqC0bam9Z35QzSIx3sThSIa 57Pu5JP/JYQ2r+C/ip82AyPj4CH1XL+dNR4Y4u1ulkEwcLbx4SiCipehQpUOzev3Dv myhMTJcFCBZYPTLpkT5RnHFTALqDEkws3p6BfEPIPMLH2VkZaMdtortpaF040ZByu4 SSWbxojrlVU8Vhiw/x+hDgy/DBguU9wBaGs37ERXh6aMLMazs6yR9sY8FRNlO6V9YF PBB4SUHth9svg== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Andrew-CT Chen , Conor Dooley , Krzysztof Kozlowski , Mauro Carvalho Chehab , Rob Herring , Tiffany Lin , Yunfei Dong , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 2/6] media: dt-bindings: mediatek,vcodec: Don't require assigned-clocks Date: Mon, 19 Jun 2023 20:03:35 -0400 Message-ID: <20230620000349.2122191-3-nfraprado@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230620000349.2122191-1-nfraprado@collabora.com> References: <20230620000349.2122191-1-nfraprado@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769178563530576316?= X-GMAIL-MSGID: =?utf-8?q?1769178563530576316?= On MT8183 it's not necessary to configure the parent for the clocks. Remove the assigned-clocks and assigned-clock-parents from the required list. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: Matthias Brugger Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski --- (no changes since v1) .../devicetree/bindings/media/mediatek,vcodec-decoder.yaml | 2 -- 1 file changed, 2 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml index 1506d2693f7d..1e56ece44aee 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml @@ -67,8 +67,6 @@ required: - clocks - clock-names - iommus - - assigned-clocks - - assigned-clock-parents allOf: - if: From patchwork Tue Jun 20 00:03:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 110198 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp3325105vqr; Mon, 19 Jun 2023 17:09:15 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ65CN3gxDaTElt+kGdig/LYk3lXcrk9n+WXMEcznFAMRcsg00JR0kv4CK91pX1gBthx8ubt X-Received: by 2002:a9d:5d06:0:b0:6b5:920c:649c with SMTP id b6-20020a9d5d06000000b006b5920c649cmr521930oti.29.1687219755335; Mon, 19 Jun 2023 17:09:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687219755; cv=none; d=google.com; s=arc-20160816; b=AoLWTGU1Khc2V4mJLQpuz01Ry7TMRFBag3dwxfsP9FuNv9gLNJhXkPZMu7I7erNXfn rcLrHnin/VBPF1cOrAznV2ERs3d8367DjiwuiOk6ugQYrjlItCRi6mtvz4zwaGgWhctS ghk5Lyr8G76QsHo439zeRY6Qo99ZkLLf4j+cq8w96TMYwSBwspkNgRCEkSuBonqqWLD/ lEXIai5dTZPIt7Lp+l3W8gVyHTF8pr/M+pNP2519Bv/2t9O3ID3DwjpnEMxtbyoBuyVt rstexO4xRWnS7//LeIy/3d4KpfTJ+SkdZ2XZ7oJxEkcEXXb6WValPueJ7e999oRmOYZ7 D2GQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=qot6kX7stD8FU7LcvFVHSNmc7h31VVlAnmFGgyUYlB0=; b=p3e5AJINo8oTn4Of/xkgboSA/etvttxSULXdlgFBuAb0tCC8TGRHogpgCoznTyLjCb MUweY12ZvjNMG0M18NI15jsRRFuNAGFN5PU4Aj5E6hrPh9/Lr7PDDE8x7Rn8KzikM6Fl Me49YsV0o/QLVrQZwt5sQm8RjnjkBbH3plEgcF58623O3dWg4j77SiC/dCL7bNkwC/xO qv/tdBfdWmpceOr2AaOZX7glt6d8NB2LwJ3KM7A0AexUHkFXRGW4Ids8L9z33ehKEXAl EtJRsArf67EIRKuoppnToA2fpkrE+W5ozFznI+7XxUaKbRs4A3b3PLqWq9A9ukOTGZeY yezg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=hrb8e9Zq; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z4-20020a633304000000b0053f212830aesi524472pgz.311.2023.06.19.17.09.02; Mon, 19 Jun 2023 17:09:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=hrb8e9Zq; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229674AbjFTAEV (ORCPT + 99 others); Mon, 19 Jun 2023 20:04:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57324 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229897AbjFTAEN (ORCPT ); Mon, 19 Jun 2023 20:04:13 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF87DE60; Mon, 19 Jun 2023 17:04:10 -0700 (PDT) Received: from notapiano.myfiosgateway.com (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 1483E6605992; Tue, 20 Jun 2023 01:04:06 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687219449; bh=huc4PCyi2wohDcBEAt/Zmelm5/+bM8JEir6rTSmhk94=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hrb8e9Zq/JK4DTXUleA0EF6LIMnSoHA16pBv694k0kb4kALUEU3Z8GY/eD3e9KIKX C1BTIl3SJ0O8YHwE3KCZkRdL0vjRLrTTKxC46qntc4s0uZL9oyJdfYDOq1l5/6l1gu UZhHJaBtkdogV/6rLphp4LQEBcQmpo7jsv8mRjE7+FuKg98+lH/vf0P2SA/bWzci7+ rolgPLlxl/75fyAnjUiRVJMF0zt5h4XbHqI6TdspyrLfnYtbgb9Z4Kjcdmej48akcN GdDDZNe/mQlQTWT0uU7AjH7a2dhMmetuLnGJ1S8lHefS8P9+wDVe4FRphJw9zfV7Lk SjsM+CwEssQtw== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Andrew-CT Chen , Conor Dooley , Krzysztof Kozlowski , Mauro Carvalho Chehab , Rob Herring , Tiffany Lin , Yunfei Dong , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 3/6] media: dt-bindings: mediatek,vcodec: Remove VDEC_SYS for mt8183 Date: Mon, 19 Jun 2023 20:03:36 -0400 Message-ID: <20230620000349.2122191-4-nfraprado@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230620000349.2122191-1-nfraprado@collabora.com> References: <20230620000349.2122191-1-nfraprado@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769178142143517789?= X-GMAIL-MSGID: =?utf-8?q?1769178142143517789?= The binding expects the first register space to be VDEC_SYS. But on mt8183, which uses the stateless decoders, this space is used only for controlling clocks and resets, which are better described as separate clock-controller and reset-controller nodes. In fact, in mt8173's devicetree there are already such separate clock-controller nodes, which cause duplicate addresses between the vdecsys node and the vcodec node. But for this SoC, since the stateful decoder code makes other uses of the VDEC_SYS register space, it's not straightforward to remove it. In order to avoid the same address conflict to happen on mt8183, since the only current use of the VDEC_SYS register space in the driver is to read the status of a hardware controlled clock, remove the VDEC_SYS register space from the binding and describe an extra syscon that will be used to directly check the hardware status. Also add reg-names to be able to tell that this new register schema is used, so the driver can keep backward compatibility. Signed-off-by: Nícolas F. R. A. Prado --- I dropped the tags from this commit since a syscon is now used instead of an extra clock. Changes in v3: - Removed the active clock - Added a mediatek,vdecsys syscon property Changes in v2: - Merged with patch 1 (media: dt-bindings: mediatek,vcodec: Allow single clock for mt8183) to avoid changing number of clocks twice - Added maxItems to reg-names - Constrained clocks for each compatible - Reordered properties for each compatible .../media/mediatek,vcodec-decoder.yaml | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml index 1e56ece44aee..2f625c50bbfe 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml @@ -21,8 +21,13 @@ properties: - mediatek,mt8183-vcodec-dec reg: + minItems: 11 maxItems: 12 + reg-names: + minItems: 11 + maxItems: 11 + interrupts: maxItems: 1 @@ -60,6 +65,10 @@ properties: description: Describes point to scp. + mediatek,vdecsys: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to the vdecsys syscon node. + required: - compatible - reg @@ -79,8 +88,26 @@ allOf: then: required: - mediatek,scp + - mediatek,vdecsys properties: + reg: + maxItems: 11 + + reg-names: + items: + - const: misc + - const: ld + - const: top + - const: cm + - const: ad + - const: av + - const: pp + - const: hwd + - const: hwq + - const: hwb + - const: hwg + clocks: minItems: 1 maxItems: 1 @@ -101,6 +128,9 @@ allOf: - mediatek,vpu properties: + reg: + minItems: 12 + clocks: minItems: 8 maxItems: 8 From patchwork Tue Jun 20 00:03:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 110196 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp3323458vqr; Mon, 19 Jun 2023 17:05:38 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6V7SAQFBqg8Uat5uN36Caf65ySoqfW581Yjm/r6C+jeampgtjYJ+UHaqkkPXA75Zgkaywx X-Received: by 2002:a05:6a20:4426:b0:122:663b:4a77 with SMTP id ce38-20020a056a20442600b00122663b4a77mr1484171pzb.61.1687219538613; Mon, 19 Jun 2023 17:05:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687219538; cv=none; d=google.com; s=arc-20160816; b=SCFyL2NkrACVwWtl6Uok29VMbyllvR8Xmov2ZhPuw5LqeWdTa55cPJ5/KTikTiWr1A fFJF2Mz8cAfLn3mjfnH61IGOjIHzyEm1Pqs1xMomlkdFoWCGzOoBd0OpRpmPxGI7q5hQ jSQ2M+KVIPW+hGb1jacXIixn9w2gqlMltKN8x+7Z7BdTNkcwGWG+tkVxd9m+yk/NH714 r2u7ZFqIyrrAqgqRNIwUJvde6ya3ozspQBevsWHFbTSSlNM4kA6ABgjA3e/rEQ1ir6Kf dLV2QDJJRTRGdPrNBzMzL1SxnM3+6xofvhx3Et0rHPttAg7/P0kG7eas+DEAu8pvVgwb hzOw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=33caRk3iw2OyVExBRRCCCAEMajBFRVt+eMBiRLksWio=; b=o8rA+1R3/B8ilrIbu9jzi2g/8AqlL+3jTTBu4LwKp5aX6avs/12SwGmu8VdV04Er9Z SEM53isq/HnEltEJt8n6ctJoTEcuynjH/UHLx+igDSdeOTM5T8XtJKMbaPU5Sh6jmWQI hB8LqhwITqajIc14U8mnAgnZu4ZXC0PWcBM/Y3/kFl2YjVWVQpoP+3L2t/bjDao2vu36 VZdfm1nNIraToBjrgPwZO9jjdh+DeA5hEBeAoa1vsGpWo6hVfQAHQnNuh8vhi9kMhyhz IfYOrXZ/2yZ5CC7S8afLa0xXR81gGZ68MmKBuEgZBbFC3Myn5Oe3X7cMRzs1wNv9O+Mk Dfyw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=dWqhE043; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id kw13-20020a170902f90d00b001b03eebfe25si654362plb.465.2023.06.19.17.05.25; Mon, 19 Jun 2023 17:05:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=dWqhE043; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229900AbjFTAEZ (ORCPT + 99 others); Mon, 19 Jun 2023 20:04:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229901AbjFTAET (ORCPT ); Mon, 19 Jun 2023 20:04:19 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 541D6E6E; Mon, 19 Jun 2023 17:04:13 -0700 (PDT) Received: from notapiano.myfiosgateway.com (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 204676606EEE; Tue, 20 Jun 2023 01:04:10 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687219452; bh=iwwomfdUx93+Ln71BQuSZg3ngJLCV9nENl+PCMxyK+U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dWqhE043lwgeCxQPR2b6NxTnFJEb0rjyqeA9h79yXl4A5NMDvlDSWYspWv637bwh+ ZeLV8haL/wyLrM6otgQWFHpLD/pKhMcBQsCG/d6uXIo7c+trovWR2ZamHQdpy6tRPl Rn328a/8kc6AZX1JnO3VIAAPl+cm6urqtOApjl8TOFsUHM5DMjREzKS3apuvri78vV 0enWRX7WUDHlgh0inm86JfudOH/qOXjYJUep9dKUME81NU8dbXiGMNFTpMm1PLxQtD WCe1JVM+M1zc0xBDNuSvg38kK/GOAuUQ/qUln+XUqH9OHrceOQwiOuydvl+C+M/aNe 3rSKAzv5uCnSg== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Andrew-CT Chen , Mauro Carvalho Chehab , Tiffany Lin , Yunfei Dong , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 4/6] media: mediatek: vcodec: Define address for VDEC_HW_ACTIVE Date: Mon, 19 Jun 2023 20:03:37 -0400 Message-ID: <20230620000349.2122191-5-nfraprado@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230620000349.2122191-1-nfraprado@collabora.com> References: <20230620000349.2122191-1-nfraprado@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769177914743775566?= X-GMAIL-MSGID: =?utf-8?q?1769177914743775566?= The VDEC_HW_ACTIVE bit is located at offset 0, bit 4 of the VDECSYS iospace. Only the mask was previously defined, with the address being implicit. Explicitly define the address, and append a '_MASK' suffix to the mask, to make accesses to this bit clearer. This commit brings no functional change. Signed-off-by: Nícolas F. R. A. Prado --- Changes in v3: - Added this commit drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c | 4 ++-- drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c | 4 ++-- drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h | 3 ++- 3 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c index d41f2121b94f..83780d29a9cf 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c @@ -50,8 +50,8 @@ static irqreturn_t mtk_vcodec_dec_irq_handler(int irq, void *priv) ctx = mtk_vcodec_get_curr_ctx(dev, MTK_VDEC_CORE); /* check if HW active or not */ - cg_status = readl(dev->reg_base[0]); - if ((cg_status & VDEC_HW_ACTIVE) != 0) { + cg_status = readl(dev->reg_base[0] + VDEC_HW_ACTIVE_ADDR); + if ((cg_status & VDEC_HW_ACTIVE_MASK) != 0) { mtk_v4l2_err("DEC ISR, VDEC active is not 0x0 (0x%08x)", cg_status); return IRQ_HANDLED; diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c index e1cb2f8dca33..41aa66c7295b 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c @@ -75,8 +75,8 @@ static irqreturn_t mtk_vdec_hw_irq_handler(int irq, void *priv) ctx = mtk_vcodec_get_curr_ctx(dev->main_dev, dev->hw_idx); /* check if HW active or not */ - cg_status = readl(dev->reg_base[VDEC_HW_SYS]); - if (cg_status & VDEC_HW_ACTIVE) { + cg_status = readl(dev->reg_base[VDEC_HW_SYS] + VDEC_HW_ACTIVE_ADDR); + if (cg_status & VDEC_HW_ACTIVE_MASK) { mtk_v4l2_err("vdec active is not 0x0 (0x%08x)", cg_status); return IRQ_HANDLED; diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h index 36faa8d9d681..caa2d0a48a90 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h @@ -12,7 +12,8 @@ #include "mtk_vcodec_drv.h" -#define VDEC_HW_ACTIVE 0x10 +#define VDEC_HW_ACTIVE_ADDR 0x0 +#define VDEC_HW_ACTIVE_MASK 0x10 #define VDEC_IRQ_CFG 0x11 #define VDEC_IRQ_CLR 0x10 #define VDEC_IRQ_CFG_REG 0xa4 From patchwork Tue Jun 20 00:03:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 110201 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp3328537vqr; Mon, 19 Jun 2023 17:16:59 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6w9ORM/Qa3ifWmrvHE3W946aa0zHopAiZJylnucJBMDP70h1augVVM8fdKpl+JjKrFx+uW X-Received: by 2002:a1f:3f41:0:b0:471:b111:455a with SMTP id m62-20020a1f3f41000000b00471b111455amr1911720vka.12.1687220219458; Mon, 19 Jun 2023 17:16:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687220219; cv=none; d=google.com; s=arc-20160816; b=w9DaqoWUbxxRGLPs7i1F4B57xw3Y7BhMxgwT4HcwFmUpYycWWzmevAURpyBVr5UnfF DkK33xkB+8MkLYCbwgn1Sc27EuXCBOrZKRigSyvlVfsZYAvsSd60skbw5gW0Ng/moyyh DXOArz9Ldd0zIOD63cX/SaCuKEXSJJih2SpyMXYIjFFbtTKDOb1tIyHpTCPmVtMZ3V6f KIwJLt2+1ntlGqZoK2PS+AivGt7MqfejlfmID9X7DFdB1jkw0EYlqW404NLzqMFMkVSo Ksacm2VG3JHM6I+YE2VMQ5kilGlJniQaQ8b58ALthAJ8gCj7MAzfutZ2QSWD3iZbl3Gm Z5Ug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=pIJtlP1zNk8w21SKNHNT7bQKsyT2OZ7siYC0MtagoAE=; b=RS1DrOH0opCCqSBCHCTsQrX1sqQJqsfpJcsnaLr4XNc4/hg/OWNJUb63iRu8F1ivpe wg9Uhg6bRuPO5rHEMwmJP1h6gTkuEuXzrycsTfMiHP///6N0NIFWq7C7qtlqT/KM9Z2q G8QjSwHgjZCOJzkMxY6qoC2SXJ9TiWmqTnlWPqRZYbHGVCInxYlYV7pT5U+4upwSST45 U4AAj45bgBeHPsRYbOTtp6zFugTuFjQ95J/72UYHgaSDRWfs705Oys21aM69nWhqMS5i G3b7md4M0mJgDN4u1gCSIm24G6/46FNlm4ofAXsZ+c35N/t9RyhxPZWzvSCoGZU6MbZo lEHQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=LHdUfoMM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id q188-20020a632ac5000000b00543e3449f28si514408pgq.616.2023.06.19.17.16.46; Mon, 19 Jun 2023 17:16:59 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=LHdUfoMM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229973AbjFTAEd (ORCPT + 99 others); Mon, 19 Jun 2023 20:04:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57324 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229899AbjFTAEV (ORCPT ); Mon, 19 Jun 2023 20:04:21 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2850110D4; Mon, 19 Jun 2023 17:04:15 -0700 (PDT) Received: from notapiano.myfiosgateway.com (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 93BA36606F6C; Tue, 20 Jun 2023 01:04:12 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687219454; bh=7Uy90B8rQDsK2NiHlzH+mhXRwuLVWP2mVHok4MwIH/w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LHdUfoMMqWk9/DC5bGcZvuhel3P/C3YGLKPdSlnIVRi4TAspQfwfQaIXh2QKXPucH RkPn1EGwmauio7lAWuk9N16Uww+iw6GUM/2RcGRtAawWGEJXdw5wLUjT2TiZiMmkVZ de2mdmlwEJMHDMBi961heyztujhdXtaR0F92I9JRuCM5Y1uyqmvaRmb/RSMuTwTsUi 3nHk5i4fLLLeEZ4QIy1uUVJ/pbe2O2KnMB0rWbGxtkMOAQg3KkiNWxc8cTiZxwO2T/ C7BPGRPPpqPkzZiO1RI9WKpsH6XO4tsWjmlgtB1RE5V5Ap+MjCSd9LG/Dv8zuKIGwd dML0qerRUtztA== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Andrew-CT Chen , Mauro Carvalho Chehab , Tiffany Lin , Yunfei Dong , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 5/6] media: mediatek: vcodec: Read HW active status from syscon on MT8183 Date: Mon, 19 Jun 2023 20:03:38 -0400 Message-ID: <20230620000349.2122191-6-nfraprado@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230620000349.2122191-1-nfraprado@collabora.com> References: <20230620000349.2122191-1-nfraprado@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769178629080410386?= X-GMAIL-MSGID: =?utf-8?q?1769178629080410386?= Remove the requirement of a VDEC_SYS reg iospace for MT8183. To achieve that, rely on a vdecsys syscon to be passed through the DT, and use it to directly read the VDEC_HW_ACTIVE bit during IRQ handling to check whether the HW is active. The old behavior is still present when reg-names aren't supplied, as MT8173 still relies on it. Signed-off-by: Nícolas F. R. A. Prado --- I dropped the tags from this commit since a syscon is now used instead of an extra clock. Changes in v3: - Switched handling of VDEC_HW_ACTIVE to use a syscon instead of the 'active' clock - Reworded commit - Removed changes to subdev part of driver, since they aren't used by MT8183 .../mediatek/vcodec/mtk_vcodec_dec_drv.c | 71 ++++++++++++++++--- .../platform/mediatek/vcodec/mtk_vcodec_drv.h | 1 + 2 files changed, 61 insertions(+), 11 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c index 83780d29a9cf..387ed26d6d5d 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c @@ -8,10 +8,12 @@ #include #include #include +#include #include #include #include #include +#include #include #include #include @@ -38,22 +40,37 @@ static int mtk_vcodec_get_hw_count(struct mtk_vcodec_dev *dev) } } +static bool mtk_vcodec_is_hw_active(struct mtk_vcodec_dev *dev) +{ + u32 cg_status = 0; + int val, ret; + + if (!dev->reg_base[VDEC_SYS]) { + ret = regmap_read(dev->vdecsys_regmap, VDEC_HW_ACTIVE_ADDR, &val); + if (ret) { + mtk_v4l2_err("Failed to read VDEC active status"); + return false; + } + + return (val & VDEC_HW_ACTIVE_MASK) == 0; + } + + cg_status = readl(dev->reg_base[VDEC_SYS] + VDEC_HW_ACTIVE_ADDR); + return (cg_status & VDEC_HW_ACTIVE_MASK) == 0; +} + static irqreturn_t mtk_vcodec_dec_irq_handler(int irq, void *priv) { struct mtk_vcodec_dev *dev = priv; struct mtk_vcodec_ctx *ctx; - u32 cg_status = 0; unsigned int dec_done_status = 0; void __iomem *vdec_misc_addr = dev->reg_base[VDEC_MISC] + VDEC_IRQ_CFG_REG; ctx = mtk_vcodec_get_curr_ctx(dev, MTK_VDEC_CORE); - /* check if HW active or not */ - cg_status = readl(dev->reg_base[0] + VDEC_HW_ACTIVE_ADDR); - if ((cg_status & VDEC_HW_ACTIVE_MASK) != 0) { - mtk_v4l2_err("DEC ISR, VDEC active is not 0x0 (0x%08x)", - cg_status); + if (!mtk_vcodec_is_hw_active(dev)) { + mtk_v4l2_err("DEC ISR, VDEC active is not 0x0"); return IRQ_HANDLED; } @@ -82,6 +99,25 @@ static int mtk_vcodec_get_reg_bases(struct mtk_vcodec_dev *dev) { struct platform_device *pdev = dev->plat_dev; int reg_num, i; + struct resource *res; + bool no_vdecsys_reg = false; + static const char * const mtk_dec_reg_names[] = { + "misc", + "ld", + "top", + "cm", + "ad", + "av", + "pp", + "hwd", + "hwq", + "hwb", + "hwg" + }; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "misc"); + if (res) + no_vdecsys_reg = true; /* Sizeof(u32) * 4 bytes for each register base. */ reg_num = of_property_count_elems_of_size(pdev->dev.of_node, "reg", @@ -91,12 +127,22 @@ static int mtk_vcodec_get_reg_bases(struct mtk_vcodec_dev *dev) return -EINVAL; } - for (i = 0; i < reg_num; i++) { - dev->reg_base[i] = devm_platform_ioremap_resource(pdev, i); - if (IS_ERR(dev->reg_base[i])) - return PTR_ERR(dev->reg_base[i]); + if (!no_vdecsys_reg) { + for (i = 0; i < reg_num; i++) { + dev->reg_base[i] = devm_platform_ioremap_resource(pdev, i); + if (IS_ERR(dev->reg_base[i])) + return PTR_ERR(dev->reg_base[i]); + + mtk_v4l2_debug(2, "reg[%d] base=%p", i, dev->reg_base[i]); + } + } else { + for (i = 0; i < reg_num; i++) { + dev->reg_base[i+1] = devm_platform_ioremap_resource_byname(pdev, mtk_dec_reg_names[i]); + if (IS_ERR(dev->reg_base[i+1])) + return PTR_ERR(dev->reg_base[i+1]); - mtk_v4l2_debug(2, "reg[%d] base=%p", i, dev->reg_base[i]); + mtk_v4l2_debug(2, "reg[%d] base=%p", i+1, dev->reg_base[i+1]); + } } return 0; @@ -118,6 +164,9 @@ static int mtk_vcodec_init_dec_resources(struct mtk_vcodec_dev *dev) if (dev->dec_irq < 0) return dev->dec_irq; + dev->vdecsys_regmap = syscon_regmap_lookup_by_phandle_optional(pdev->dev.of_node, + "mediatek,vdecsys"); + irq_set_status_flags(dev->dec_irq, IRQ_NOAUTOEN); ret = devm_request_irq(&pdev->dev, dev->dec_irq, mtk_vcodec_dec_irq_handler, 0, pdev->name, dev); diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h index f17d67e781c9..0b430936f67d 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h @@ -489,6 +489,7 @@ struct mtk_vcodec_dev { void __iomem *reg_base[NUM_MAX_VCODEC_REG_BASE]; const struct mtk_vcodec_dec_pdata *vdec_pdata; const struct mtk_vcodec_enc_pdata *venc_pdata; + struct regmap *vdecsys_regmap; struct mtk_vcodec_fw *fw_handler; From patchwork Tue Jun 20 00:03:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 110197 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp3324072vqr; Mon, 19 Jun 2023 17:06:53 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5+ZW8IXyLTw6ItHD1cQivbmLjlghhIt7w82TkzenFW3F3Pq7IYuhm4ESmOOcgvAvOXBZmy X-Received: by 2002:aa7:8894:0:b0:663:78e6:6d0a with SMTP id z20-20020aa78894000000b0066378e66d0amr15049885pfe.7.1687219613639; Mon, 19 Jun 2023 17:06:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687219613; cv=none; d=google.com; s=arc-20160816; b=nlgZypLyYNqkacw/AowTSemyE6LgPSx/oW4dvPQtpXbLhojCASgvfwo3Ne2saZ33+4 Ge+1agL8KuRrWNZ5WwEwPXeEOv1OwV4eTvPG7Fs2yp18X2jD2pOz/aoFrFyM9hqdj6jK BkHDN5+8kgwKfYKtXK+EKGDFxMb8P0qA1NdhRud+ROmo73pGd4jttgtz+TicgbUzkp61 NiJNaLIVKgNVo8tYLAI4ScVRxgFKyDTM3ovzgsOZZZEl5QQJ8OzfcnXA9S+ppif2wWmG Yeyk8Ga8x73Q4HZY1SvA6bcpPuMdTz0Klw1tc+p4RM4RCqKblq+6xnymsqVQbDrp8evD Eihw== ARC-Message-Signature: i=1; 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Signed-off-by: Yunfei Dong Signed-off-by: Qianqian Yan Signed-off-by: Frederic Chen Signed-off-by: Alexandre Courbot Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- Changes in v3: - Dropped 'active' clock and added the 'mediatek,vdecsys' syscon phandle property instead Changes in v2: - Reformatted reg-names to fit in fewer lines arch/arm64/boot/dts/mediatek/mt8183.dtsi | 30 ++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 5169779d01df..4144f1ed3ff0 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -2019,6 +2019,36 @@ vdecsys: syscon@16000000 { #clock-cells = <1>; }; + vcodec_dec: video-codec@16020000 { + compatible = "mediatek,mt8183-vcodec-dec"; + reg = <0 0x16020000 0 0x1000>, /* VDEC_MISC */ + <0 0x16021000 0 0x800>, /* VDEC_VLD */ + <0 0x16021800 0 0x800>, /* VDEC_TOP */ + <0 0x16022000 0 0x1000>, /* VDEC_MC */ + <0 0x16023000 0 0x1000>, /* VDEC_AVCVLD */ + <0 0x16024000 0 0x1000>, /* VDEC_AVCMV */ + <0 0x16025000 0 0x1000>, /* VDEC_PP */ + <0 0x16026800 0 0x800>, /* VP8_VD */ + <0 0x16027000 0 0x800>, /* VP6_VD */ + <0 0x16027800 0 0x800>, /* VP8_VL */ + <0 0x16028400 0 0x400>; /* VP9_VD */ + reg-names = "misc", "ld", "top", "cm", "ad", "av", "pp", + "hwd", "hwq", "hwb", "hwg"; + interrupts = ; + iommus = <&iommu M4U_PORT_HW_VDEC_MC_EXT>, + <&iommu M4U_PORT_HW_VDEC_PP_EXT>, + <&iommu M4U_PORT_HW_VDEC_VLD_EXT>, + <&iommu M4U_PORT_HW_VDEC_AVC_MV_EXT>, + <&iommu M4U_PORT_HW_VDEC_PRED_RD_EXT>, + <&iommu M4U_PORT_HW_VDEC_PRED_WR_EXT>, + <&iommu M4U_PORT_HW_VDEC_PPWRAP_EXT>; + mediatek,scp = <&scp>; + mediatek,vdecsys = <&vdecsys>; + power-domains = <&spm MT8183_POWER_DOMAIN_VDEC>; + clocks = <&vdecsys CLK_VDEC_VDEC>; + clock-names = "vdec"; + }; + larb1: larb@16010000 { compatible = "mediatek,mt8183-smi-larb"; reg = <0 0x16010000 0 0x1000>;