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[83.9.31.242]) by smtp.gmail.com with ESMTPSA id d9-20020ac24c89000000b004f849605be7sm1774293lfl.292.2023.06.19.09.44.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 09:44:24 -0700 (PDT) From: Konrad Dybcio Date: Mon, 19 Jun 2023 18:44:21 +0200 Subject: [PATCH v3 1/6] drm/msm/a6xx: Add some missing header definitions MIME-Version: 1.0 Message-Id: <20230517-topic-a7xx_prep-v3-1-a3ce3725385b@linaro.org> References: <20230517-topic-a7xx_prep-v3-0-a3ce3725385b@linaro.org> In-Reply-To: <20230517-topic-a7xx_prep-v3-0-a3ce3725385b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: Marijn Suijten , Jonathan Marek , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687193061; l=862; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Kx6hGtFYbXC4+ZQmgSeqx9B48/cy4Oq5xhedcSdiIJ8=; b=OnXw3WN+NCUhzBUBk3dafn715zvedUkrCV0q0HBvZG8z537Nbfe7aX+wb40HJYP1gmD3mYT2h 74m/RiNDbQrCxoj1bxzaAKptoNt9xBoRY99JxQq6laKep3DHmP1LQPv X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769150525216718510?= X-GMAIL-MSGID: =?utf-8?q?1769150525216718510?= Add a definition of the GMU_AHB_FENCE_STATUS_CLR reg and CP_PROTECT_CNTL bitfields. This may be substituted with a mesa header sync. Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h b/drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h index 9ab15d91aced..fcd9eb53baf8 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h @@ -425,6 +425,8 @@ static inline uint32_t A6XX_GMU_GPU_NAP_CTRL_SID(uint32_t val) #define REG_A6XX_GMU_AHB_FENCE_STATUS 0x00009313 +#define REG_A6XX_GMU_AHB_FENCE_STATUS_CLR 0x00009314 + #define REG_A6XX_GMU_RBBM_INT_UNMASKED_STATUS 0x00009315 #define REG_A6XX_GMU_AO_SPARE_CNTL 0x00009316 From patchwork Mon Jun 19 16:44:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 110109 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp3130336vqr; Mon, 19 Jun 2023 09:50:24 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7X/svBxo/xvEFcBzhWEsmuo9nTUpDc0aBrzKki0P6OqBycP/k2e5bLE300QI2Ax6FnyUKe X-Received: by 2002:a05:6a21:3a88:b0:10d:6dc6:32c8 with SMTP id zv8-20020a056a213a8800b0010d6dc632c8mr10180576pzb.32.1687193424508; Mon, 19 Jun 2023 09:50:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687193424; cv=none; d=google.com; s=arc-20160816; b=hAQx4imO6eompcWCnwGMPmKownEuL/1RzFbRZlvLsjP866S07Ipld9FAlIRiq0PYcz Od/SR+1LYtnLwqsbZw4PKcpu2Tt4ET3AtIzgE6iZtzyy7/OlJcG8TBkCzaO/yg0xsglN dXGtBB6V4o4u+mbtsh8lWfzUXWoC8L5U5bMncGq+zuxyRCqzJ/+U7bQK+WIgqhT8a2pm 2qRn+efQBNkWWCbhBtGkz2or7GphkBjRMkzvrdxHp1K/sR4ZSQQhPnHLq0YgGdTahwo5 XJhR7Vr1yQFxcubm2Yj0ALE66gXxtL65oVN6zaJWroIsznDhJxPNYor2std0Lum8tlEF Z8gA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=QubfL4PWG3Qkdn7Jup1M3+20t3ogTcgbRp6X+RErkfY=; b=DE007G+QpX/qIN/MVk40LabFXDyy0r8Ea7a/d04tsJCcxIj6fj/zhzcUNiP6vCV8Ql PjW9Kp5vAVtxPaZ7xQl0MAwzCNCN5eloMi/18bsNAU7dTSUd+yXYJbH19Jwwp3aQTcJK o5DnggXjb996C1/HeQ4at6GcopqIzB+7uyLVj/xX6IZp5Rs96voL7cvUFp+FGUQ535JD zsf+KfTY8DJ/KrxnqDXvsb4EAJVSExFJ+BXVBsSyqdqtr8U4wnskMAbdNcxxMFzjLq25 E9zQD+X9w9F8pq+78HalEkx5wrF/aVJFxzYlUn2WzaX4gRFl4sKRP/v6fmHPCBW+wQWk xV3Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=izWEN3U+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.31.242]) by smtp.gmail.com with ESMTPSA id d9-20020ac24c89000000b004f849605be7sm1774293lfl.292.2023.06.19.09.44.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 09:44:25 -0700 (PDT) From: Konrad Dybcio Date: Mon, 19 Jun 2023 18:44:22 +0200 Subject: [PATCH v3 2/6] drm/msm/a6xx: Use descriptive bitfield names for CP_PROTECT_CNTL MIME-Version: 1.0 Message-Id: <20230517-topic-a7xx_prep-v3-2-a3ce3725385b@linaro.org> References: <20230517-topic-a7xx_prep-v3-0-a3ce3725385b@linaro.org> In-Reply-To: <20230517-topic-a7xx_prep-v3-0-a3ce3725385b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: Marijn Suijten , Jonathan Marek , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687193061; l=1047; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=M+YceCSQbhF8BD7s1Uycd683ewMShr4OUbGYlX/cKSo=; b=05fyUeuE1APciTv7RqvirSi20LUa6O3cBKWcbJhiSxYszAu7ZScuRA2/ZzhQT4ETFVRwRshdc aMX5IJHfw1pDY7MMvEffcq0+4ZHieGtJKYfUcP6+pwprQZhkceKutxE X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769150532451687147?= X-GMAIL-MSGID: =?utf-8?q?1769150532451687147?= We have the necessary information, so explain which bit does what. Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index b3ada1e7b598..cd0c9bccdc19 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -930,7 +930,10 @@ static void a6xx_set_cp_protect(struct msm_gpu *gpu) * protect violation and select the last span to protect from the start * address all the way to the end of the register address space */ - gpu_write(gpu, REG_A6XX_CP_PROTECT_CNTL, BIT(0) | BIT(1) | BIT(3)); + gpu_write(gpu, REG_A6XX_CP_PROTECT_CNTL, + A6XX_CP_PROTECT_CNTL_ACCESS_PROT_EN | + A6XX_CP_PROTECT_CNTL_ACCESS_FAULT_ON_VIOL_EN | + A6XX_CP_PROTECT_CNTL_LAST_SPAN_INF_RANGE); for (i = 0; i < count - 1; i++) gpu_write(gpu, REG_A6XX_CP_PROTECT(i), regs[i]); From patchwork Mon Jun 19 16:44:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 110110 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp3130384vqr; Mon, 19 Jun 2023 09:50:31 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7W2ll5uIBANvv4Jj7z+1idczHw37fopElBxuina65D0uaQPZ9ww2dz3r/jImI2H9WgOcne X-Received: by 2002:a17:902:8697:b0:1b4:f649:1151 with SMTP id g23-20020a170902869700b001b4f6491151mr8640415plo.2.1687193431277; Mon, 19 Jun 2023 09:50:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687193431; cv=none; d=google.com; s=arc-20160816; b=EBdcjFKRvRl+E+IVhuEx/gX2bvtFEtJ5Mt8xrwI0eov1Snh62G7tzE4m/wImr8tuV0 PwU/H7lK7GwKrtoyS3SblFOKyEAbR6OyAxk5OqmPpWBdZsc2apcAxvtmVL7ApLiXOqIu ixPjO4ugsD1klJH0X2zMWEJ0VHXmdiOmPRmIvBl8pGUWwPZ7ktXNOkRaG1ge2gLE9c9v +0K0vov4UqM4jH20T94ygpPmGh0gTNYNHt6dYA92/RZ0LAznwHzGWihNVNCcddOjnpYU U5ovaewSnv2bfs1CBzVsmG8cTsc4KDOooNtzHxIDNyNnjDPGwLm/cnsvfL0mNSIWA0ex 4TBQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=qXvgXObuLUXgh3jnIU3RKwPMBc4ZARc1+vOEfqXJtnQ=; b=oBfL9SM+K/g8SOp0h55VXsxk6TqmS+n0102DhSnlya6zgGPGyTdKz6zRlsmgQJqXCl S1SyZSUlyqJmfqVqST4iex7iTWMKxPIAgOUe3/joHAi2LTGYHyYMBGf6CzymbTx0AYna xMp5Oyq9UIaIiYLJQe6vgtYJVU4AgIAp6RvGdSYNzrgpc3H2kZLdbsIfsD2HepCmjx2G eVP71foVXTI2Zlc+e4Gdv53/Si1IHz2L3WUoBsSLWUp+z1goseomSXKnWQXrne5rwe9m NP2jNXr2uii12OqMcR82TUj24ZLA9zMsMigmP+UFLPoXLb73jiRF/SfzQA2Q+J7FMYwz 776w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IZ95yaZC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.31.242]) by smtp.gmail.com with ESMTPSA id d9-20020ac24c89000000b004f849605be7sm1774293lfl.292.2023.06.19.09.44.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 09:44:26 -0700 (PDT) From: Konrad Dybcio Date: Mon, 19 Jun 2023 18:44:23 +0200 Subject: [PATCH v3 3/6] drm/msm/a6xx: Skip empty protection ranges entries MIME-Version: 1.0 Message-Id: <20230517-topic-a7xx_prep-v3-3-a3ce3725385b@linaro.org> References: <20230517-topic-a7xx_prep-v3-0-a3ce3725385b@linaro.org> In-Reply-To: <20230517-topic-a7xx_prep-v3-0-a3ce3725385b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: Marijn Suijten , Jonathan Marek , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687193061; l=1073; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=p7u0J4uljF3tZrz5h1ZuKJqCS/MqBnjZGFZOc1JmV0E=; b=NQKGopdA8vA2ah+7eJ7S+RCXRZTEZj6j9vXtT+BhcHdPpfCuUpxjOrOOv+NEU8MSEZS12wiBv omlcv8IvEudBeJXSOa3mNC646auqe2up6nzof87KXGcAGLu/HnjG4bR X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769150539398582141?= X-GMAIL-MSGID: =?utf-8?q?1769150539398582141?= Some specific SKUs leave certain protection range registers empty. Allow for that behavior. Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index cd0c9bccdc19..488c69cf08d3 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -935,8 +935,11 @@ static void a6xx_set_cp_protect(struct msm_gpu *gpu) A6XX_CP_PROTECT_CNTL_ACCESS_FAULT_ON_VIOL_EN | A6XX_CP_PROTECT_CNTL_LAST_SPAN_INF_RANGE); - for (i = 0; i < count - 1; i++) - gpu_write(gpu, REG_A6XX_CP_PROTECT(i), regs[i]); + for (i = 0; i < count - 1; i++) { + /* Intentionally skip writing to some registers */ + if (regs[i]) + gpu_write(gpu, REG_A6XX_CP_PROTECT(i), regs[i]); + } /* last CP_PROTECT to have "infinite" length on the last entry */ gpu_write(gpu, REG_A6XX_CP_PROTECT(count_max - 1), regs[i]); } From patchwork Mon Jun 19 16:44:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 110111 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp3130680vqr; Mon, 19 Jun 2023 09:51:08 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7CrKKX5JKJv68wuASsYAK4E+vd3qPZIMgpe6hOd2z4suCjh5H8vlSUSTARXFCfDsAx2eqB X-Received: by 2002:a05:6a00:2303:b0:668:8c3c:313e with SMTP id h3-20020a056a00230300b006688c3c313emr1485617pfh.22.1687193468598; Mon, 19 Jun 2023 09:51:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687193468; cv=none; d=google.com; s=arc-20160816; b=prG79cgZF5eOB5I+5QvoDNSvy3iWuxokSu1pqQLPvUPpnjxWUUCllIjAg419TwbBgc JCpWRTuf8azJoemp96Bj/RokYSISUDukCo20PDIh17rxCZaN/nuB6Mp7B2Xrh+pdmwXa 2AgZb4vM5i98MnIJgrlnlm5SdGBh/YRiD8YJ9pkMDl+Z2xhOrqlTqIxDDs3LuN4Hl8UP e1zVFqg0iLbQmFNhMFVM5RdIhJTSTzppE+GzHjvoBnyuxF9HHHFVdrHSAh3H4/nFRaKQ eeiCAupTANsGW33CphVzD8/ZXzRJdgITZpAC/7NaCJVlr/tOEOOLd2ChCVlfk2cgCsmI QVTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=QFAqDiLltNdklyeWnFl2VhcGAm3uwoOV8Onj4m150Sc=; b=xAX7Zm5JPoBe2mqropBiJkbOIGRdGuS1JXBAxUC3bBtNi6rbto7v+dgygfndfvKAJr HQifMuCck8CkTvidDPg53Ejit36cgykD4SvrOUrNUCg6ITr4j3QysUaMIYp8RPLT7g2s iZZDxNAxVTMnBQQF2M1s5Py34Htbzqan+9GCBwqZfv1RGJYxezZ6r7tgQuI3nnZwslE+ GC2Jj4uV9bdHRSaMVWmPtHvNJ5+x5rx+Ar/ZMDcIGEd/c6dxmsPtz6b5mRaieWN2jsMF aRIpW6ahrRG7mf6hk37nFu3A528R4q991/S1rUqutbViVPqGl1X4Dq01DaChQCpAgbF3 f9Lw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ydvczJg9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.31.242]) by smtp.gmail.com with ESMTPSA id d9-20020ac24c89000000b004f849605be7sm1774293lfl.292.2023.06.19.09.44.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 09:44:27 -0700 (PDT) From: Konrad Dybcio Date: Mon, 19 Jun 2023 18:44:24 +0200 Subject: [PATCH v3 4/6] drm/msm/a6xx: Ensure clean GMU state in a6xx_gmu_fw_start MIME-Version: 1.0 Message-Id: <20230517-topic-a7xx_prep-v3-4-a3ce3725385b@linaro.org> References: <20230517-topic-a7xx_prep-v3-0-a3ce3725385b@linaro.org> In-Reply-To: <20230517-topic-a7xx_prep-v3-0-a3ce3725385b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: Marijn Suijten , Jonathan Marek , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687193061; l=1213; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=xLnqc6AHpOSP+ED80kyz8V2j7nuk18OJ2Jy8h13Cf1I=; b=dCZGseLgFqy+mQCr62XX8kh4lVXddSmsA/R+OcREroBFhCmvIVQXZ/rLg2/fzr8nh4/9VxGJU hqJVr4eX8zFDsryMCP6ihGHaz2PEVQGJ6qdRYjm5iBQfnC1QUYeCZ4A X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769150578700946190?= X-GMAIL-MSGID: =?utf-8?q?1769150578700946190?= While it's not very well understood, there is some sort of a fault handler implemented in the GMU firmware which triggers when a certain bit is set, resulting in the M3 core not booting up the way we expect it to. Write a magic value to a magic register to hopefully prevent that from happening. Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index 5deb79924897..9929ff187368 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -790,6 +790,12 @@ static int a6xx_gmu_fw_start(struct a6xx_gmu *gmu, unsigned int state) gmu_write(gmu, REG_A6XX_GMU_AHB_FENCE_RANGE_0, (1 << 31) | (0xa << 18) | (0xa0)); + /* + * Snapshots toggle the NMI bit which will result in a jump to the NMI + * handler instead of __main. Set the M3 config value to avoid that. + */ + gmu_write(gmu, REG_A6XX_GMU_CM3_CFG, 0x4052); + chipid = adreno_gpu->rev.core << 24; chipid |= adreno_gpu->rev.major << 16; chipid |= adreno_gpu->rev.minor << 12; From patchwork Mon Jun 19 16:44:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 110112 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp3130761vqr; Mon, 19 Jun 2023 09:51:17 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ42agRmjn/tSm1HHshNB/qhSQdIhv2k58YlY15A7fvWteFqKHuCWstgfNw7D5uA//LCtiAi X-Received: by 2002:a05:6a00:244a:b0:666:8cbb:6e02 with SMTP id d10-20020a056a00244a00b006668cbb6e02mr13230565pfj.8.1687193477193; Mon, 19 Jun 2023 09:51:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687193477; cv=none; d=google.com; s=arc-20160816; b=q5ktc4jykHmJZlCZacRMTHARJyMsO4qBm1WtWVYLx071y4x5XdoYURZ1vWhmGdycrF qmaG8B3DwG6B4ShiNXU9U4WQnDYr0VjoiKX5pT32Abo4JSNbIHMP7BHlCRjomhylIzas gpcT388SPEKv0O3P4W2jjts0TDkIXE2FXNkmuiscvSxgCFpdrxHr9gfotvlh3Dw6nU0c wKUpsIh7FgIFlCV+fc0G/StnrmaNN0Y9v5akuQT00C5Wcc9JZTmF0AvifXnwTcUy7iSw RGS9tHkKmNUsFBDdEQZ05AOZzZPEry3knJitGCBH9qMe5T3EUP1TQxiWibfFbK+Og8MP ZxNw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=uceOjOeFYW3YrOQKTUQY3Yfirv5mMIrxQprXiD+0ONY=; b=vd2Ya0zTyDUqq/8FzSvlqAMX6ClxFiYqSH+xK0JJ5kxdHv2H5rKV1BxdajLhMBHD0I PuLSmmuukeoflA+USvsVbbOEgl5SrR9p/dosfIwKCvPRu/9MA+45Q/8U1fOjN/NpQfEt 76I9FIw6YlwilhO091WX9Fm9SDTtEksnQk75IE+wnjAxZz8TqqZT7iQ1qQGDA17tnCUP yz3YLTNBzM0bCreFGPveR5y68NVyGd9n6bxm5OikBOQmdRm0lmqxm6GcDJeGA6fXfHC4 mgj31jiFbntNoFEtm1VZy/crGbgZ6MeeeLpRzsdah4qLwu1JSdnkJ1RRcfsdf4zT843Z Ehlg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xOpv7V8p; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.31.242]) by smtp.gmail.com with ESMTPSA id d9-20020ac24c89000000b004f849605be7sm1774293lfl.292.2023.06.19.09.44.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 09:44:29 -0700 (PDT) From: Konrad Dybcio Date: Mon, 19 Jun 2023 18:44:25 +0200 Subject: [PATCH v3 5/6] drm/msm/a6xx: Improve GMU force shutdown sequence MIME-Version: 1.0 Message-Id: <20230517-topic-a7xx_prep-v3-5-a3ce3725385b@linaro.org> References: <20230517-topic-a7xx_prep-v3-0-a3ce3725385b@linaro.org> In-Reply-To: <20230517-topic-a7xx_prep-v3-0-a3ce3725385b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: Marijn Suijten , Jonathan Marek , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687193061; l=999; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=HgL0AdZtJqxx0twaid3jHnuqKqCDcBlTAxb3JHJlxVw=; b=Pf6zJ0t2/uvlo+V9LyriSjXmfPMpP8Bno7oiFYGpMsSxVxwUMlFcB7vC+QzDp3HIKqNnv00kF IyI9s9s/9X7CNSdq1Wjolu7Eh34qSmxBKzhPddf6H7Ru943onBZn7t1 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769150587776572785?= X-GMAIL-MSGID: =?utf-8?q?1769150587776572785?= The GMU force shutdown sequence involves some additional register cleanup which was not implemented previously. Do so. Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index 9929ff187368..55b12a8066ee 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -893,6 +893,13 @@ static void a6xx_gmu_force_off(struct a6xx_gmu *gmu) /* Make sure there are no outstanding RPMh votes */ a6xx_gmu_rpmh_off(gmu); + /* Clear the WRITEDROPPED fields and put fence into allow mode */ + gmu_write(gmu, REG_A6XX_GMU_AHB_FENCE_STATUS_CLR, 0x7); + gmu_write(gmu, REG_A6XX_GMU_AO_AHB_FENCE_CTRL, 0); + + /* Make sure the above writes go through */ + wmb(); + /* Halt the gmu cm3 core */ gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 1); From patchwork Mon Jun 19 16:44:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 110113 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp3130959vqr; Mon, 19 Jun 2023 09:51:44 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5rZy+xQiJZ2bomSk4IrtSFIW1tpMLV3DCr4WrmDx8W4NPhqJdB1az+CtCvSSq5ezcd0V3N X-Received: by 2002:a05:6808:23c2:b0:39a:c1a0:7cbe with SMTP id bq2-20020a05680823c200b0039ac1a07cbemr8773668oib.12.1687193504525; Mon, 19 Jun 2023 09:51:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687193504; cv=none; d=google.com; s=arc-20160816; b=PmkYJKljd64f2TakPVGLP0hhi0F3874qD0wscM8o1HAkE7J7kplrATPspun3xtowzO 2icjDdAczY3hnqFB6HPD4QIED2isuJFxlhZBQuQlwXJsTsiDWjC9oxZGghn6urFMWm1B HJo1/flo1jXI5+f+KfJDi/WmZBvr4cXKgR2QbpDJpI64APu6q0ATTjjg0dN0K3oeXG4M Up+kQqKwQB42O0WYJVn1Pg8fxunBDn5E6ZOYa9cUkY7g+M6QFL/dsOLgs06RbtYtSWAs JQ+WFGAXIKBFWmHWxk8Gr5iepCz14KXERa2HrvMHLF5V5VDUzFJaqL7anbPwQa/IpogR ilsg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=pwTI7UHTcKqCvzBNFhABN4+E8WkvXM5Y1T6fiTPNJV4=; b=Ru69C+yaMwLMeYEQ+8n2sWlbCg5Img4/uEr3Iexkmiwchj3Loiimzg4/uV+ocoohAn oAD2cEqpnDjT/0gyyp5HH4GipgkF9lh5MBi/KMlD7yYIwHBNWq5P8r18vPSiYZCHZZnE QUM63onzQsEiWOqSSpgEtFuTIfgazA7YQ3A+G/StA3O7FLU91PLr6mQ4YYyqxl40vu3l 9jnmkECDErSUdSvLiDFZk3TONfqAW/OUpUVoWEZS6UwQhOwVvakGyIm7vuMe4ecU+r83 hjtMZd797WggI0S1DlNAJvppb9XBSpXW7aLHtAnJOB9+BfveIkBlP1+yEjwMqGz9XncT 981A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uWDRPGlk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.31.242]) by smtp.gmail.com with ESMTPSA id d9-20020ac24c89000000b004f849605be7sm1774293lfl.292.2023.06.19.09.44.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 09:44:30 -0700 (PDT) From: Konrad Dybcio Date: Mon, 19 Jun 2023 18:44:26 +0200 Subject: [PATCH v3 6/6] drm/msm/a6xx: Fix up GMU region reservations MIME-Version: 1.0 Message-Id: <20230517-topic-a7xx_prep-v3-6-a3ce3725385b@linaro.org> References: <20230517-topic-a7xx_prep-v3-0-a3ce3725385b@linaro.org> In-Reply-To: <20230517-topic-a7xx_prep-v3-0-a3ce3725385b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: Marijn Suijten , Jonathan Marek , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687193061; l=1342; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=yg0CsUYst1MC0yCvcYjryDQIsWMdtt76iHZrZNL17WI=; b=FknMc43zmZwkUD5y3nuDtPowX+jeCuLzVQmv1m9TogJq9v7mkOYVQ635wLUZM4nLlk2KbeTs6 AGZUKNJMwB2AHrgQwtbdu4Lzhm1KoBpZLUs9z8Px3BMlBD5HzvZt6f4 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769150616161487815?= X-GMAIL-MSGID: =?utf-8?q?1769150616161487815?= Change the order of region allocations to make the addresses match downstream. This shouldn't matter very much, but helps eliminate one more difference when comparing register accesses. Also, make the log region 16K long. That's what it is, unconditionally on A6xx and A7xx. Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index 55b12a8066ee..d682c1ed48db 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -1640,13 +1640,13 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) goto err_memory; } - /* Allocate memory for for the HFI queues */ - ret = a6xx_gmu_memory_alloc(gmu, &gmu->hfi, SZ_16K, 0, "hfi"); + /* Allocate memory for the GMU log region */ + ret = a6xx_gmu_memory_alloc(gmu, &gmu->log, SZ_16K, 0, "log"); if (ret) goto err_memory; - /* Allocate memory for the GMU log region */ - ret = a6xx_gmu_memory_alloc(gmu, &gmu->log, SZ_4K, 0, "log"); + /* Allocate memory for for the HFI queues */ + ret = a6xx_gmu_memory_alloc(gmu, &gmu->hfi, SZ_16K, 0, "hfi"); if (ret) goto err_memory;