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[92.145.124.62]) by smtp.gmail.com with ESMTPSA id c1-20020a5d5281000000b0030aded83385sm30971199wrv.27.2023.06.19.02.47.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 02:47:14 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Alexandre Ghiti Subject: [PATCH 1/2] Documentation: riscv: Add early boot document Date: Mon, 19 Jun 2023 11:47:04 +0200 Message-Id: <20230619094705.51337-1-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769124563556470274?= X-GMAIL-MSGID: =?utf-8?q?1769124563556470274?= This document describes the constraints and requirements of the early boot process in a RISC-V kernel. Szigned-off-by: Alexandre Ghiti Reviewed-by: Björn Töpel --- Documentation/riscv/boot-image-header.rst | 3 - Documentation/riscv/boot.rst | 181 ++++++++++++++++++++++ Documentation/riscv/index.rst | 1 + 3 files changed, 182 insertions(+), 3 deletions(-) create mode 100644 Documentation/riscv/boot.rst diff --git a/Documentation/riscv/boot-image-header.rst b/Documentation/riscv/boot-image-header.rst index d7752533865f..a4a45310c4c4 100644 --- a/Documentation/riscv/boot-image-header.rst +++ b/Documentation/riscv/boot-image-header.rst @@ -7,9 +7,6 @@ Boot image header in RISC-V Linux This document only describes the boot image header details for RISC-V Linux. -TODO: - Write a complete booting guide. - The following 64-byte header is present in decompressed Linux kernel image:: u32 code0; /* Executable code */ diff --git a/Documentation/riscv/boot.rst b/Documentation/riscv/boot.rst new file mode 100644 index 000000000000..b02230818b79 --- /dev/null +++ b/Documentation/riscv/boot.rst @@ -0,0 +1,181 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================================= +Early boot requirements/constraints on RISC-V +============================================= + +:Author: Alexandre Ghiti +:Date: 23 May 2023 + +This document describes what the RISC-V kernel expects from the previous stages +and the firmware, but also the constraints that any developer must have in mind +when touching the early boot process, e.g. before the final virtual mapping is +setup. + +Pre-kernel boot (Expectations from firmware) +============================================ + +Registers state +--------------- + +The RISC-V kernel expects: + + * `$a0` to contain the hartid of the current core. + * `$a1` to contain the address of the device tree in memory. + +CSR state +--------- + +The RISC-V kernel expects: + + * `$satp = 0`: the MMU must be disabled. + +Reserved memory for resident firmware +------------------------------------- + +The RISC-V kernel expects the firmware to mark any resident memory with the +`no-map` flag, thus the kernel won't map those regions in the direct mapping +(avoiding issues with hibernation, speculative accesses and probably other +subsystems). + +Kernel location +--------------- + +The RISC-V kernel expects to be placed at a PMD boundary (2MB for rv64 and 4MB +for rv32). Note though that the EFI stub will physically relocate the kernel if +that's not the case. + +Device-tree +----------- + +The RISC-V kernel always expects a device tree, it is: + +- either passed directly to the kernel from the previous stage using the `$a1` + register, +- or when booting with UEFI, the device tree will be retrieved by the EFI stub + using the EFI configuration table or it will be created. + +Bootflow +-------- + +There exist 2 methods to enter the kernel: + +- `RISCV_BOOT_SPINWAIT`: the firmware releases all harts in the kernel, one hart + wins a lottery and executes the early boot code while the other harts are + parked waiting for the initialization to finish. This method is now + **deprecated**. +- Ordered booting: the firmware releases only one hart that will execute the + initialization phase and then will start all other harts using the SBI HSM + extension. + +UEFI +---- + +UEFI memory map +~~~~~~~~~~~~~~~ + +When booting with UEFI, the RISC-V kernel will use only the EFI memory map to +populate the system memory. + +The UEFI firmware must parse the subnodes of the `/reserved-memory` device tree +node and abide by the device tree specification to convert the attributes of +those subnodes (`no-map` and `reusable`) into their correct EFI equivalent +(refer to section "3.5.4 /reserved-memory and UEFI" of the device tree +specification). + +RISCV_EFI_BOOT_PROTOCOL +~~~~~~~~~~~~~~~~~~~~~~~ + +When booting with UEFI, the EFI stub requires the boot hartid in order to pass +it to the RISC-V kernel in `$a1`. The EFI stub retrieves the boot hartid using +one of the following methods: + +- `RISCV_EFI_BOOT_PROTOCOL` (**preferred**). +- `boot-hartid` device tree subnode (**deprecated**). + +Any new firmware must implement `RISCV_EFI_BOOT_PROTOCOL` as the device tree +based approach is deprecated now. + +During kernel boot: (Kernel internals) +====================================== + +EFI stub and device tree +------------------------ + +When booting with UEFI, the device tree is supplemented by the EFI stub with the +following parameters (largely shared with arm64 in Documentation/arm/uefi.rst): + +========================== ====== =========================================== +Name Size Description +========================== ====== =========================================== +linux,uefi-system-table 64-bit Physical address of the UEFI System Table. + +linux,uefi-mmap-start 64-bit Physical address of the UEFI memory map, + populated by the UEFI GetMemoryMap() call. + +linux,uefi-mmap-size 32-bit Size in bytes of the UEFI memory map + pointed to in previous entry. + +linux,uefi-mmap-desc-size 32-bit Size in bytes of each entry in the UEFI + memory map. + +linux,uefi-mmap-desc-ver 32-bit Version of the mmap descriptor format. + +kaslr-seed 64-bit Entropy used to randomize the kernel image + base address location. + +bootargs Kernel command line +========================== ====== =========================================== + +Virtual mapping setup +--------------------- + +The installation of the virtual mapping is done in 2 steps in the RISC-V kernel: + +1. :c:func:`setup_vm` installs a temporary kernel mapping in + :c:var:`early_pg_dir` which allows to discover the system memory: only the + kernel text/data are mapped at this point. When establishing this mapping, + no allocation can be done (since the system memory is not known yet), so + :c:var:`early_pg_dir` page table is statically allocated (using only one + table for each level). + +2. :c:func:`setup_vm_final` creates the final kernel mapping in + :c:var:`swapper_pg_dir` and takes advantage of the discovered system memory + to create the linear mapping. When establishing this mapping, the kernel + can allocate memory but cannot access it directly (since the direct mapping + is not present yet), so it uses temporary mappings in the fixmap region to + be able to access the newly allocated page table levels. + +For :c:func:`virt_to_phys` and :c:func:`phys_to_virt` to be able to correctly +convert direct mapping addresses to physical addresses, it needs to know the +start of the DRAM: this happens after 1, right before 2 installs the direct +mapping (see :c:func:`setup_bootmem` function in arch/riscv/mm/init.c). So +any usage of those macros before the final virtual mapping is installed must be +carefully examined. + +Device-tree mapping via fixmap +------------------------------ + +The RISC-V kernel uses the fixmap region to map the device tree because the +device tree virtual mapping must remain the same between :c:func:`setup_vm` and +:c:func:`setup_vm_final` calls since :c:var:`reserved_mem` array is initialized +with virtual addresses established by :c:func:`setup_vm` and used with the +mapping established by :c:func:`setup_vm_final`. + +Pre-MMU execution +----------------- + +Any code that executes before even the first virtual mapping is established +must be very carefully compiled as: + +- `-fno-pie`: This is needed for relocatable kernels which use `-fPIE`, since + otherwise, any access to a global symbol would go through the GOT which is + only relocated virtually. +- `-mcmodel=medany`: Any access to a global symbol must be PC-relative to avoid + any relocations to happen before the MMU is setup. +- Also note that *all* instrumentation must also be disabled (that includes + KASAN, ftrace and others). + +As using a symbol from a different compilation unit requires this unit to be +compiled with those flags, we advise, as much as possible, not to use external +symbols. diff --git a/Documentation/riscv/index.rst b/Documentation/riscv/index.rst index 175a91db0200..1f66062def6d 100644 --- a/Documentation/riscv/index.rst +++ b/Documentation/riscv/index.rst @@ -5,6 +5,7 @@ RISC-V architecture .. toctree:: :maxdepth: 1 + boot boot-image-header vm-layout hwprobe From patchwork Mon Jun 19 09:47:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Ghiti X-Patchwork-Id: 109883 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp2885914vqr; Mon, 19 Jun 2023 03:05:43 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6LMmSvlnIGeQHDcjwVKx/2yswPAnd+jG0MJvdUY8W3Pl2Aj0aS21EAKcGlrxwxQmXF7OKY X-Received: by 2002:a17:903:1245:b0:1b0:56cf:b89d with SMTP id u5-20020a170903124500b001b056cfb89dmr20223437plh.12.1687169143363; Mon, 19 Jun 2023 03:05:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687169143; cv=none; d=google.com; s=arc-20160816; b=B3s+EEga46JSWT/TWsnZbJyCDxEpFfEb+lPiGihDChR73NMtWCCwKJ/jFzBKqH+psc pEIe37w8mzmSq9oPqOw6D5NdE6ai2euTBjssE38cEwbByTw1whXSNb3N7kpI6TZEWwwy akSeeDGEGhLw0dCtJsH639TWi5lR+bYSYNUX05KF8eZlpN8IkLzY6K5HrO9doLFjtCy0 1wXX8rgj92psFjNhsC4D6olZqwUgu2S20LaWeNxauBdjyPTTnTGhSFpud2mbjAVLAbRS RbOxdRl3DOpP5cb7Y1lCy8LnCM4qNyEtFlFzTkTeOjlKao6s9eQqtBWcTR/OXfd41inr ihZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=a7SPByKyVPiwN/2FqCBqpnqbBRCuyopKfDoQFMlp0Pg=; b=QgZ4vCsnojuUP69Pahqh9icA1gJOux9CYnvySfKWzZRNJ7XaDAJOStg3Aesq+Gb/ah 7ck8Lg2q5DxJf3A+KZQwgBpwlQAwAQwOORMiy9UVZ75Rog1Kd35TxRZodViXPp3cfSVR snTrxii7cBkq4UYyuwrA9t5RxVeXCQHpV6aYECLv8iFt7nW7Jp0H7kd3GkyMYsYPTHS2 ZlrRIk778OufSU5BlEai/W9YttZ2V1rRyDUyKp6q8hiCwpDjzsPVYmgmMHcJTvzMWksU dzmVCNhICVuVIH30Zrkr/UpSKmEj8nqvcqArViIXJyTnByNeYNPCMDhrbVq79HUHqV6P XfCA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@rivosinc-com.20221208.gappssmtp.com header.s=20221208 header.b=bmSQnUrS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[92.145.124.62]) by smtp.gmail.com with ESMTPSA id c25-20020a05600c0ad900b003f18b942338sm10217564wmr.3.2023.06.19.02.48.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 02:48:15 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Alexandre Ghiti Subject: [PATCH 2/2] Documentation: riscv: Update boot image header since EFI stub is supported Date: Mon, 19 Jun 2023 11:47:05 +0200 Message-Id: <20230619094705.51337-2-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230619094705.51337-1-alexghiti@rivosinc.com> References: <20230619094705.51337-1-alexghiti@rivosinc.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769125071732500754?= X-GMAIL-MSGID: =?utf-8?q?1769125071732500754?= The EFI stub is supported on RISC-V so update the documentation that explains how the boot image header was reused to support it. Signed-off-by: Alexandre Ghiti Reviewed-by: Atish Patra --- Documentation/riscv/boot-image-header.rst | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/Documentation/riscv/boot-image-header.rst b/Documentation/riscv/boot-image-header.rst index a4a45310c4c4..df2ffc173e80 100644 --- a/Documentation/riscv/boot-image-header.rst +++ b/Documentation/riscv/boot-image-header.rst @@ -28,11 +28,11 @@ header in future. Notes ===== -- This header can also be reused to support EFI stub for RISC-V in future. EFI - specification needs PE/COFF image header in the beginning of the kernel image - in order to load it as an EFI application. In order to support EFI stub, - code0 should be replaced with "MZ" magic string and res3(at offset 0x3c) should - point to the rest of the PE/COFF header. +- This header is also reused to support EFI stub for RISC-V. EFI specification + needs PE/COFF image header in the beginning of the kernel image in order to + load it as an EFI application. In order to support EFI stub, code0 is replaced + with "MZ" magic string and res3(at offset 0x3c) points to the rest of the + PE/COFF header. - version field indicate header version number