From patchwork Fri Jun 16 17:00:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 109289 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1513557vqr; Fri, 16 Jun 2023 10:47:17 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ68qoMQc531YTNnO9W8U+Ez8E58XknIW2TasRvrDm8vRg6RNp1D2KO3pUMD0tOTlAa9FT4N X-Received: by 2002:a05:6a20:7f99:b0:10e:d4fb:b031 with SMTP id d25-20020a056a207f9900b0010ed4fbb031mr2826242pzj.61.1686937637351; Fri, 16 Jun 2023 10:47:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686937637; cv=none; d=google.com; s=arc-20160816; b=MxXDnrWcg+jP/JjzVloTckA9RrR7n2js9ntfVC4TMvmNNmozDuPovVlxPo4TmgjgGX m9v7e+q/JEwrVIKerH8VecbHIkc+2aLsQaztyLM2fFCF7vYnEYDfRgqHBw7gqzZtz5KL 6kgMObKfcYlTtdGK5cGENmkbA+pK05gLimljpauZThGVN+J8IhA3hu+2IvKmH9PzwaOG DEtPO49NAjlRZISWB1u5EMCo447A2lX+HpoatRzQW5QACqmu8Ynasb9KqFaRh5siHz7e YAf8wZnsNmWnYrsPVEJxa/Q+Wv86M3KzvrWW8mIGyOACsbDK1sQyaRZYt5EqFhEFhBcL 8XVw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=wY5k9BCUoticnLHdvStU1y/Gue8B2dFWCqSV6qUBuZo=; b=vVFUigtoqGGTxssNRDI/P0GOh2qVOyCPTnUpEakPqAhr19Ojrjya47dP1WLvlE980R eA3xjQJdcUKOm1nB/RAO1gtz4Y1yEi8FC5ve8ULUuUneW5TD4woSB3x/WY7oAcuwSN63 jF3uPzzb/lxLKyQhMbPQ8vkK3VC0gO3rV1Dh2IwGW/AnUF+DqzkHL8gbSXhg1py4mDfB tgnkZRHNp/3B2HHzDDzgQz6jvJBKbMAUV4EkfKKYjMOvJU7+nGh/EIS5kBY0QXKmT3jA W9XlZwEvi/X3JtOAItp6Jhu0EX6+ZIy62AUZRWv32Ctlc5UtuO+ihXeZS3jwU5nlZVXp hgHw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=S1CdmAWz; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a9-20020aa78e89000000b00660d2553147si3439758pfr.212.2023.06.16.10.47.02; Fri, 16 Jun 2023 10:47:17 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=S1CdmAWz; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346008AbjFPRBj (ORCPT + 99 others); Fri, 16 Jun 2023 13:01:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43166 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345372AbjFPRAo (ORCPT ); Fri, 16 Jun 2023 13:00:44 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1F7F530F5; Fri, 16 Jun 2023 10:00:43 -0700 (PDT) Received: from jupiter.universe (dyndsl-091-248-215-052.ewe-ip-backbone.de [91.248.215.52]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sre) by madras.collabora.co.uk (Postfix) with ESMTPSA id 604026606F85; Fri, 16 Jun 2023 18:00:41 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1686934841; bh=mUHbgHwI0ryNn4lkHpGJMiFlejZz09YJSeHgaUj4sVs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=S1CdmAWzKuFM2OPpy48efHFqKqrkGIb8x97s4ZbEWcBxF8q5+lpT+Hrz3PXf47ERw sBj4/bCLkLcZ8UtHigoDGHI+aqatV8L56UUYix5NOYc9KF81pN6soxP21e1xIizYgT MTJ7l07paZki5dLIjjlsYMQkaG9eZAHZqpI88J6iT66mMjoNcBrBbJXwAzqyIgEljL qDPM6I7IWZw+5HBqDdxspiSHpoVh9Net8+ZcmyykbXUf253Ah06b+0xMFHW7BgOFBP p5fFMCQS/8UKcSogOo5SHKmWL4OvzJUldwxs/f3UtKxLC4GGX3cDQOmgcJWGPUr/4F KJv0MEivPOSMQ== Received: by jupiter.universe (Postfix, from userid 1000) id 10B6F480583; Fri, 16 Jun 2023 19:00:39 +0200 (CEST) From: Sebastian Reichel To: linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: Jingoo Han , Gustavo Pimentel , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Shawn Lin , Simon Xue , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sebastian Reichel , kernel@collabora.com Subject: [PATCH v1 1/4] dt-bindings: PCI: dwc: rockchip: Fix interrupt-names issue Date: Fri, 16 Jun 2023 19:00:19 +0200 Message-Id: <20230616170022.76107-2-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230616170022.76107-1-sebastian.reichel@collabora.com> References: <20230616170022.76107-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768882319660001868?= X-GMAIL-MSGID: =?utf-8?q?1768882319660001868?= The RK356x (and RK3588) have 5 ganged interrupts. For example the "legacy" interrupt combines "inta/intb/intc/intd" with a register providing the details. Currently the binding is not specifying these interrupts resulting in a bunch of errors for all rk356x boards using PCIe. Fix this by specifying the interrupts and add them to the example to prevent regressions. Signed-off-by: Sebastian Reichel Reviewed-by: Rob Herring --- .../bindings/pci/rockchip-dw-pcie.yaml | 18 ++++++++++++++++++ .../devicetree/bindings/pci/snps,dw-pcie.yaml | 15 ++++++++++++++- 2 files changed, 32 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index 24c88942e59e..98e45d2d8dfe 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -56,6 +56,17 @@ properties: - const: pclk - const: aux + interrupts: + maxItems: 5 + + interrupt-names: + items: + - const: sys + - const: pmc + - const: msg + - const: legacy + - const: err + msi-map: true num-lanes: true @@ -98,6 +109,7 @@ unevaluatedProperties: false examples: - | + #include bus { #address-cells = <2>; @@ -117,6 +129,12 @@ examples: "aclk_dbi", "pclk", "aux"; device_type = "pci"; + interrupts = , + , + , + , + ; + interrupt-names = "sys", "pmc", "msg", "legacy", "err"; linux,pci-domain = <2>; max-link-speed = <2>; msi-map = <0x2000 &its 0x2000 0x1000>; diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml index 1a83f0f65f19..9f605eb297f5 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml @@ -193,9 +193,22 @@ properties: oneOf: - description: See native "app" IRQ for details enum: [ intr ] + - description: Combined Legacy A/B/C/D interrupt signal. + const: legacy + - description: Combined System interrupt signal. + const: sys + - description: Combined Power Management interrupt signal. + const: pmc + - description: Combined Message Received interrupt signal. + const: msg + - description: Combined Error interrupt signal. + const: err + allOf: - contains: - const: msi + enum: + - msi + - msg additionalProperties: true From patchwork Fri Jun 16 17:00:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 109282 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1499026vqr; Fri, 16 Jun 2023 10:21:23 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5/hv0dKom2zuRy7C1zCoBgtazoHfSy2bKM2e7MUUcx5Uc8UjPMVXzc6bOjvvAYHbWpLbaV X-Received: by 2002:a05:6a20:8e08:b0:11f:64ec:694d with SMTP id y8-20020a056a208e0800b0011f64ec694dmr309791pzj.11.1686936082399; Fri, 16 Jun 2023 10:21:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686936082; cv=none; d=google.com; s=arc-20160816; b=m8Bev3y3vAST+X1H9V8LvSNUGrUsKAo5IrjSkkpweNO+G4G2L6OkSRATq5yiSHes2b A1X07+B84irhrc0Xb79YZtizCpHFhBoyMi2Zp+kG3VpjJkgZxkQpEAdPysSOyIPZyCVo E1VJzFGGLHjrS5NqEeAWeKeAl1+L7bP+65dFwOpKyfkOjhh0m8bWfBXbKMN+nydCKuwC nDpWPsyeGT3W2yTrh5rbq66fLlglc+ROwpjwvsyU08/hYZ6C2XmWOpt19458aLKOYSXb 96RnhUXkHdAxotrJkG3oA1fcZlY6yrMbGED+QELJe0RVF5QkXWwqq3JYHT86IClLNcAN Q8OQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=aQIgMlu9FxC0SprfoKqBI7smUP+WICFMmlJXdGytK18=; b=ZWl6DiT23QQ5r5l6WzSct2D9VhT3x5hIXZ8CaxhbXhyCc9MusIplr3G6BCdDEyUX1q xIbzIdVd8Iu7JYF1s0LOobcUDbGhDbxvj2REz2cSocoL6kbX64dF7U9Cvq/Myso+UAkO 6pK4OZGmgVFSm1PvPupzQ98pZNO8+eyQqA/U9OE8z/O+5qbcU09KW782RgUUscS9FCYU 05scnFcRzoL+HV1+gDy48MSJFHw/TVjvXQS5Kzabbobpp3z7RI0EKf0f46AWMEKSJksM lCcgCqkwDpxcfr+Rn3es/fWY0TFD2lB4mbkHQd91KaaCFdV7p1bbXv1NOycWo8lbPYy+ A/Qg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="msXBX3v/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. 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The RK356x DT implements this via a sub-node named "legacy-interrupt-controller", just like a couple of other PCIe implementations. This adds proper documentation for this and updates the example to avoid regressions. Signed-off-by: Sebastian Reichel Reviewed-by: Rob Herring --- .../bindings/pci/rockchip-dw-pcie.yaml | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index 98e45d2d8dfe..bf81d306cc80 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -67,6 +67,22 @@ properties: - const: legacy - const: err + legacy-interrupt-controller: + description: Interrupt controller node for handling legacy PCI interrupts. + type: object + properties: + "#address-cells": + const: 0 + + "#interrupt-cells": + const: 1 + + "interrupt-controller": true + + interrupts: + items: + - description: combined legacy interrupt + msi-map: true num-lanes: true @@ -148,6 +164,14 @@ examples: reset-names = "pipe"; #address-cells = <3>; #size-cells = <2>; + + legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = ; + }; }; }; ... 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id q12-20020a17090311cc00b0019ca7d69673si16265875plh.196.2023.06.16.10.24.05; Fri, 16 Jun 2023 10:24:18 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=WjWItqyG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345003AbjFPRBd (ORCPT + 99 others); Fri, 16 Jun 2023 13:01:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42488 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344739AbjFPRAo (ORCPT ); Fri, 16 Jun 2023 13:00:44 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0C37030EF; Fri, 16 Jun 2023 10:00:42 -0700 (PDT) Received: from jupiter.universe (dyndsl-091-248-215-052.ewe-ip-backbone.de [91.248.215.52]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sre) by madras.collabora.co.uk (Postfix) with ESMTPSA id 5C3ED6606F61; Fri, 16 Jun 2023 18:00:41 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1686934841; bh=X01oy+ihteZncXuvNTLu0v0W9yQ61BoqL+FIOTAimbo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WjWItqyG+6JtsUQmPKLZ06/+dqMQmlncIFF+Nkc7IP23kC09kxM99c1opbDaSrV8+ Y8/AboL6PR0kAV2/XrwdZt/97XF/WnqxWVJzXP3+4nOUq1oMHZtZ0WC0GzGzDFC3Pp wf5JxqyDKyCky07aT545/1JKhHyhNIIbV1Q6GbJ1nNR70N3VJlKrKszwwT49oYr+ub F8DNTiBQZVp56f4Dx+YMLueaP4cbePxUfoptrxy07mZGAE1I+7SIcMF238l3/p7UUS hbxqZCKJytCBCco+ZtLXypdq54qNpsNHMgh59eyAPXFxhC+uXVll4V2/B5D56F00tg 8yOh3YKQ6UqGA== Received: by jupiter.universe (Postfix, from userid 1000) id 14241480598; Fri, 16 Jun 2023 19:00:39 +0200 (CEST) From: Sebastian Reichel To: linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: Jingoo Han , Gustavo Pimentel , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Shawn Lin , Simon Xue , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sebastian Reichel , kernel@collabora.com Subject: [PATCH v1 3/4] dt-bindings: PCI: dwc: rockchip: Update for RK3588 Date: Fri, 16 Jun 2023 19:00:21 +0200 Message-Id: <20230616170022.76107-4-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230616170022.76107-1-sebastian.reichel@collabora.com> References: <20230616170022.76107-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768880874218810937?= X-GMAIL-MSGID: =?utf-8?q?1768880874218810937?= The PCIe 2.0 controllers on RK3588 need one additional clock, one additional reset line and one for ranges entry. Signed-off-by: Sebastian Reichel Reviewed-by: Rob Herring Reviewed-by: Serge Semin --- .../bindings/pci/rockchip-dw-pcie.yaml | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index bf81d306cc80..7897af0ec297 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -41,20 +41,24 @@ properties: - const: config clocks: + minItems: 5 items: - description: AHB clock for PCIe master - description: AHB clock for PCIe slave - description: AHB clock for PCIe dbi - description: APB clock for PCIe - description: Auxiliary clock for PCIe + - description: PIPE clock clock-names: + minItems: 5 items: - const: aclk_mst - const: aclk_slv - const: aclk_dbi - const: pclk - const: aux + - const: pipe interrupts: maxItems: 5 @@ -97,13 +101,19 @@ properties: maxItems: 1 ranges: - maxItems: 2 + minItems: 2 + maxItems: 3 resets: - maxItems: 1 + minItems: 1 + maxItems: 2 reset-names: - const: pipe + oneOf: + - const: pipe + - items: + - const: pwr + - const: pipe vpcie3v3-supply: true From patchwork Fri Jun 16 17:00:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 109291 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1518125vqr; Fri, 16 Jun 2023 10:56:46 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5CIgm1+4zopCZ5CCcVk4momgU13q8WyrFK56tlf20yfQ/WBUDzGzTxCgO/6OlohCrJWQbb X-Received: by 2002:a05:6808:2101:b0:39a:af56:4dda with SMTP id r1-20020a056808210100b0039aaf564ddamr3352390oiw.17.1686938205759; Fri, 16 Jun 2023 10:56:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686938205; cv=none; d=google.com; s=arc-20160816; b=SvYHWC7RClorahRExD+iXV6VmFbo20PGfuSWFZ4LTTxCXNXSqe5+kSSivvSIPjIDQO CGzO/0twCdov57I0J8ShkktT384TfsXvRHT8SadJ4yAxNfy1aH0YmFuuUkqRAjydLwxC OQ1R3RvLGxduRNzYPbFt/wL/y/lqVJFF1dIljttrfCiouDXv8j3h78iBiLsw6fksfe7a RVOb58cwIW1ahqO/N1BWgzaRuj53hrpWmjQfFCejFseh/A79DAoDsTv0CA+B+BCORGbZ RNQxW2xXn9gnx/7vnHOXOrECFipEQb78cF2sPrdeg34EmOnNEeAidUZnq7t0KZi8VKpV 4k2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=XILnT/kE980l0FfGZhQmu9dnURt54tc560nQjRX1lbA=; b=fbX1pilkoFLpg06g7Ba27QD2BPr97sM3ZeswQ673hkoNcAeAxun0zcx++qhmpk8tW6 4Q4FvKmR/mAbqWrnxcYfQ2C/HuKyHZTU39rupTro8JSEIjR9Wq1q3dXdWix3KMxgrI7Z 9OrMwkBPDhq8UCl00z97IpCHFyCVRckRj8qbvGqi+M7BZM54Ha6MWIUguEWUhdcyajAr lLSxb8ZzPro6ELGTHCXTAX/Q50Q99T/k0caSAoOK3jKdXrl/PIJIHvIdPm+dqflaD/fA 6BImC5yalERDaAjZFgvNTQNk4bu/gpO6sW9O+Bw7zyTzl8MTmU//aqDAADl2wWC833oq GcWw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=hkSnKHIN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. 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Note, that RK3588 also has two PCIe3 IP blocks, that will be handled separately. Co-developed-by: Kever Yang Signed-off-by: Kever Yang Signed-off-by: Sebastian Reichel --- arch/arm64/boot/dts/rockchip/rk3588.dtsi | 54 +++++++++++ arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 108 ++++++++++++++++++++++ 2 files changed, 162 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588.dtsi index b9508cea34f1..40fee1367b34 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588.dtsi @@ -80,6 +80,60 @@ i2s10_8ch: i2s@fde00000 { status = "disabled"; }; + pcie2x1l0: pcie@fe170000 { + compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x20 0x2f>; + clocks = <&cru ACLK_PCIE_1L0_MSTR>, <&cru ACLK_PCIE_1L0_SLV>, + <&cru ACLK_PCIE_1L0_DBI>, <&cru PCLK_PCIE_1L0>, + <&cru CLK_PCIE_AUX2>, <&cru CLK_PCIE1L0_PIPE>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux", "pipe"; + device_type = "pci"; + interrupts = , + , + , + , + ; + interrupt-names = "sys", "pmc", "msg", "legacy", "err"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie2x1l0_intc 0>, + <0 0 0 2 &pcie2x1l0_intc 1>, + <0 0 0 3 &pcie2x1l0_intc 2>, + <0 0 0 4 &pcie2x1l0_intc 3>; + linux,pci-domain = <2>; + num-ib-windows = <8>; + num-ob-windows = <8>; + num-viewport = <4>; + max-link-speed = <2>; + msi-map = <0x2000 &its0 0x2000 0x1000>; + num-lanes = <1>; + phys = <&combphy1_ps PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + power-domains = <&power RK3588_PD_PCIE>; + ranges = <0x01000000 0x0 0xf2100000 0x0 0xf2100000 0x0 0x00100000>, + <0x02000000 0x0 0xf2200000 0x0 0xf2200000 0x0 0x00e00000>, + <0x03000000 0x9 0x80000000 0x9 0x80000000 0x0 0x40000000>; + reg = <0xa 0x40800000 0x0 0x00400000>, + <0x0 0xfe170000 0x0 0x00010000>, + <0x0 0xf2000000 0x0 0x00100000>; + reg-names = "dbi", "apb", "config"; + resets = <&cru SRST_PCIE2_POWER_UP>, <&cru SRST_P_PCIE2>; + reset-names = "pwr", "pipe"; + status = "disabled"; + + pcie2x1l0_intc: legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = ; + }; + }; + gmac0: ethernet@fe1b0000 { compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a"; reg = <0x0 0xfe1b0000 0x0 0x10000>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index a73b17f597af..b5fdc046d8f7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1670,6 +1670,114 @@ qos_vop_m1: qos@fdf82200 { reg = <0x0 0xfdf82200 0x0 0x20>; }; + pcie2x1l1: pcie@fe180000 { + compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x30 0x3f>; + clocks = <&cru ACLK_PCIE_1L1_MSTR>, <&cru ACLK_PCIE_1L1_SLV>, + <&cru ACLK_PCIE_1L1_DBI>, <&cru PCLK_PCIE_1L1>, + <&cru CLK_PCIE_AUX3>, <&cru CLK_PCIE1L1_PIPE>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux", "pipe"; + device_type = "pci"; + interrupts = , + , + , + , + ; + interrupt-names = "sys", "pmc", "msg", "legacy", "err"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie2x1l1_intc 0>, + <0 0 0 2 &pcie2x1l1_intc 1>, + <0 0 0 3 &pcie2x1l1_intc 2>, + <0 0 0 4 &pcie2x1l1_intc 3>; + linux,pci-domain = <3>; + num-ib-windows = <8>; + num-ob-windows = <8>; + num-viewport = <4>; + max-link-speed = <2>; + msi-map = <0x3000 &its0 0x3000 0x1000>; + num-lanes = <1>; + phys = <&combphy2_psu PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + power-domains = <&power RK3588_PD_PCIE>; + ranges = <0x01000000 0x0 0xf3100000 0x0 0xf3100000 0x0 0x00100000>, + <0x02000000 0x0 0xf3200000 0x0 0xf3200000 0x0 0x00e00000>, + <0x03000000 0x9 0xc0000000 0x9 0xc0000000 0x0 0x40000000>; + reg = <0xa 0x40c00000 0x0 0x00400000>, + <0x0 0xfe180000 0x0 0x00010000>, + <0x0 0xf3000000 0x0 0x00100000>; + reg-names = "dbi", "apb", "config"; + resets = <&cru SRST_PCIE3_POWER_UP>, <&cru SRST_P_PCIE3>; + reset-names = "pwr", "pipe"; + status = "disabled"; + + pcie2x1l1_intc: legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = ; + }; + }; + + pcie2x1l2: pcie@fe190000 { + compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x40 0x4f>; + clocks = <&cru ACLK_PCIE_1L2_MSTR>, <&cru ACLK_PCIE_1L2_SLV>, + <&cru ACLK_PCIE_1L2_DBI>, <&cru PCLK_PCIE_1L2>, + <&cru CLK_PCIE_AUX4>, <&cru CLK_PCIE1L2_PIPE>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux", "pipe"; + device_type = "pci"; + interrupts = , + , + , + , + ; + interrupt-names = "sys", "pmc", "msg", "legacy", "err"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie2x1l2_intc 0>, + <0 0 0 2 &pcie2x1l2_intc 1>, + <0 0 0 3 &pcie2x1l2_intc 2>, + <0 0 0 4 &pcie2x1l2_intc 3>; + linux,pci-domain = <4>; + num-ib-windows = <8>; + num-ob-windows = <8>; + num-viewport = <4>; + max-link-speed = <2>; + msi-map = <0x4000 &its0 0x4000 0x1000>; + num-lanes = <1>; + phys = <&combphy0_ps PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + power-domains = <&power RK3588_PD_PCIE>; + ranges = <0x01000000 0x0 0xf4100000 0x0 0xf4100000 0x0 0x00100000>, + <0x02000000 0x0 0xf4200000 0x0 0xf4200000 0x0 0x00e00000>, + <0x03000000 0xa 0x00000000 0xa 0x00000000 0x0 0x40000000>; + reg = <0xa 0x41000000 0x0 0x00400000>, + <0x0 0xfe190000 0x0 0x00010000>, + <0x0 0xf4000000 0x0 0x00100000>; + reg-names = "dbi", "apb", "config"; + resets = <&cru SRST_PCIE4_POWER_UP>, <&cru SRST_P_PCIE4>; + reset-names = "pwr", "pipe"; + status = "disabled"; + + pcie2x1l2_intc: legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = ; + }; + }; + gmac1: ethernet@fe1c0000 { compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a"; reg = <0x0 0xfe1c0000 0x0 0x10000>;