From patchwork Thu Jun 15 13:53:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liang, Kan" X-Patchwork-Id: 108555 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp678922vqr; Thu, 15 Jun 2023 07:30:21 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4ekT+g+qKegyCHDjxf0HMCpSQMZ8hreIZlxLupEdADB0dtA1TcEZNCqUemYOsyS5VPMHVw X-Received: by 2002:a19:6508:0:b0:4f3:982a:8be1 with SMTP id z8-20020a196508000000b004f3982a8be1mr10636037lfb.69.1686839421209; Thu, 15 Jun 2023 07:30:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686839421; cv=none; d=google.com; s=arc-20160816; b=ML42mWxXjI2gWgxLF01ZSqA903olF4UCPJvdPRAVk+Z2b+ktO9ffS0wd1LUDf1PzLT cyVe1quvdJogRBqLasaHd5UBC0Qrfi2P85e3XRzjzlG9nMUraYZ7aNXTIfkUpEog/Sgh Ebz0su5LoLFVZE7uCPfdhe/m4B92vD5xOe2dkFnDEGCuzriFFRFOJqH6ON2cdN9pXQTC 9YnCd4QvvDq5bdXwn0FMCKmwkbpYm0EQvm0hE7uX9YOCA5db+MQOGWdMfcYgEsj/Z9nV ZULIoS7cKnO97s4eA1vWuvAkVwnnrFjFj0VPRaq2qVnSvHHCGFGjwgOXI84Ba8eISlYo W2xg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=0rn6gCOYsg3GxUj+SKCKSUdSlfF/U9JkTLsi/KvHf2o=; b=bbq/BY9u+Je15BvMILg1eAVi5KATbYEsRIE1Pwhn7Wb4Q77roFO/S7iv6Uf3JPr+0N OsO8l+jS0eLlo5vEzEUYPNbEq/4pc4J/i7hImPRFfMhfTlv9wsAoGneomBNX4+Q6cww6 v5+EB/LOPPbHKgO+BXV9a6Ewgz9zAuox7KGEQTNFPghMpa9OBv6vMHBoB75iI3DxSIxo E5PkYYjWWNA05tk1RS09gKGz52eQmHUMLV+M17xf/znEyejG3S4mohpeI3aFwmXwrcdN c+WR/g+svqw7TDzD+w+0eHaE9+lw3zQ8UmvJxmpT/+EkZtMBUdKqy9TZnx4YM1sNmRrc d2Vg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=UdgCB5w9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id t10-20020a1709064f0a00b0096f7c8c215bsi9281818eju.874.2023.06.15.07.29.50; Thu, 15 Jun 2023 07:30:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=UdgCB5w9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344634AbjFONyp (ORCPT + 99 others); Thu, 15 Jun 2023 09:54:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59516 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241356AbjFONyk (ORCPT ); Thu, 15 Jun 2023 09:54:40 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7388E1FC3; Thu, 15 Jun 2023 06:54:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686837279; x=1718373279; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=pzcNb5kzn61KFdcjmKe2H8uk6m6tCd/c1IAgVezvkmo=; b=UdgCB5w9RC+9Q8UwPeWd1lWxYWbLN6gFHG0/98Uywji7uQrQ648/Op1s SXLL18IJr8q/j3gSy6CPfs8/PpGMJzAunMwUkf/niZb01Zm/ybPewkoal fFzeyXn5eVMP998i1//p21Wt3BWImcDeh4p8AGnGyr+AB7+hvmZzBKVVN 4B+p1ERR4pemFmuZZwCmC+73IwB8OQdOVlOICEcPb37TKBiLUsMod6KGY H0wMFAG70Rs5b2ptmO1JzMb5lUfJGJIQdeiVoPHkbUmOqm71Hy7aybWvn KlnNxfwxxyiwtnOAnqblW03y8ZwrnMCnUvkX1CHHRO4Di91AeyZLrrt2L Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="356411384" X-IronPort-AV: E=Sophos;i="6.00,245,1681196400"; d="scan'208";a="356411384" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2023 06:54:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="782527046" X-IronPort-AV: E=Sophos;i="6.00,245,1681196400"; d="scan'208";a="782527046" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga004.fm.intel.com with ESMTP; 15 Jun 2023 06:54:36 -0700 From: kan.liang@linux.intel.com To: acme@kernel.org, mingo@redhat.com, peterz@infradead.org, irogers@google.com, namhyung@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org Cc: ak@linux.intel.com, eranian@google.com, ahmad.yasin@intel.com, Kan Liang Subject: [PATCH V3 1/8] perf evsel: Fix the annotation for hardware events on hybrid Date: Thu, 15 Jun 2023 06:53:08 -0700 Message-Id: <20230615135315.3662428-2-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230615135315.3662428-1-kan.liang@linux.intel.com> References: <20230615135315.3662428-1-kan.liang@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768779333169230488?= X-GMAIL-MSGID: =?utf-8?q?1768779333169230488?= From: Kan Liang The annotation for hardware events is wrong on hybrid. For example, # ./perf stat -a sleep 1 Performance counter stats for 'system wide': 32,148.85 msec cpu-clock # 32.000 CPUs utilized 374 context-switches # 11.633 /sec 33 cpu-migrations # 1.026 /sec 295 page-faults # 9.176 /sec 18,979,960 cpu_core/cycles/ # 590.378 K/sec 261,230,783 cpu_atom/cycles/ # 8.126 M/sec (54.21%) 17,019,732 cpu_core/instructions/ # 529.404 K/sec 38,020,470 cpu_atom/instructions/ # 1.183 M/sec (63.36%) 3,296,743 cpu_core/branches/ # 102.546 K/sec 6,692,338 cpu_atom/branches/ # 208.167 K/sec (63.40%) 96,421 cpu_core/branch-misses/ # 2.999 K/sec 1,016,336 cpu_atom/branch-misses/ # 31.613 K/sec (63.38%) The hardware events have extended type on hybrid, but the evsel__match() doesn't take it into account. Filter the config on hybrid before checking. With the patch, # ./perf stat -a sleep 1 Performance counter stats for 'system wide': 32,139.90 msec cpu-clock # 32.003 CPUs utilized 343 context-switches # 10.672 /sec 32 cpu-migrations # 0.996 /sec 73 page-faults # 2.271 /sec 13,712,841 cpu_core/cycles/ # 0.000 GHz 258,301,691 cpu_atom/cycles/ # 0.008 GHz (54.20%) 12,428,163 cpu_core/instructions/ # 0.91 insn per cycle 37,786,557 cpu_atom/instructions/ # 2.76 insn per cycle (63.35%) 2,418,826 cpu_core/branches/ # 75.259 K/sec 6,965,962 cpu_atom/branches/ # 216.739 K/sec (63.38%) 72,150 cpu_core/branch-misses/ # 2.98% of all branches 1,032,746 cpu_atom/branch-misses/ # 42.70% of all branches (63.35%) Suggested-by: Ian Rogers Reviewed-by: Ian Rogers Signed-off-by: Kan Liang --- tools/perf/util/evsel.h | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/tools/perf/util/evsel.h b/tools/perf/util/evsel.h index b365b449c6ea..cc6fb3049b99 100644 --- a/tools/perf/util/evsel.h +++ b/tools/perf/util/evsel.h @@ -10,6 +10,7 @@ #include #include #include "symbol_conf.h" +#include "pmus.h" struct bpf_object; struct cgroup; @@ -350,9 +351,19 @@ u64 format_field__intval(struct tep_format_field *field, struct perf_sample *sam struct tep_format_field *evsel__field(struct evsel *evsel, const char *name); -#define evsel__match(evsel, t, c) \ - (evsel->core.attr.type == PERF_TYPE_##t && \ - evsel->core.attr.config == PERF_COUNT_##c) +static inline bool __evsel__match(const struct evsel *evsel, u32 type, u64 config) +{ + if (evsel->core.attr.type != type) + return false; + + if ((type == PERF_TYPE_HARDWARE || type == PERF_TYPE_HW_CACHE) && + perf_pmus__supports_extended_type()) + return (evsel->core.attr.config & PERF_HW_EVENT_MASK) == config; + + return evsel->core.attr.config == config; +} + +#define evsel__match(evsel, t, c) __evsel__match(evsel, PERF_TYPE_##t, PERF_COUNT_##c) static inline bool evsel__match2(struct evsel *e1, struct evsel *e2) { From patchwork Thu Jun 15 13:53:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liang, Kan" X-Patchwork-Id: 108550 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp674987vqr; Thu, 15 Jun 2023 07:24:07 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5lHwTwPU6XxPgeD5Scd3cPR7X32tYYl5DF3f7HHY2wbEGy0k6WWdORM4yvW4nwzcbbVh3V X-Received: by 2002:a05:6870:1801:b0:184:d82:e13d with SMTP id t1-20020a056870180100b001840d82e13dmr12115310oaf.16.1686839047439; Thu, 15 Jun 2023 07:24:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686839047; cv=none; d=google.com; s=arc-20160816; b=stdZZebVP3gzvEH059UBmywekcWHptdilV5uDH0tJzB9LOI0Cq67qUYEA6eIE7Jho2 Bcyy5ZKLkrF6Bu37f6EJUP3skUpI4L5B/ZiGq3PvenEG4cFQgU/KqsK7AgjHV64+EU+x pGAvIt0Gqn8HD2VLHWWLVcbiNSEGiTvKX9CBhU9ZxVMHFd1viFdxlPZqK0ueoq3JJT8J w6RSkIds9b8oQY3RyqVXqbrkO1DsJe5HEdBK31d3minP0xnHwo12nCRJTPNNRbRB1Vx5 PXIycDZBawOhXeW4BDTawQdaYmBFRYLKmUZsrUKcW+CrepHPhpZQ2wTSfy464s0Q3ql2 Nbeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Xl9WUqrikKbBxy+H06Q6anqCLJfaGF8BEiDmPzvcdlY=; b=CQP1NN5tXHT7nbxJ9sDE77WJTJF/L8nAvWlqD1FIZSKTPn+dqfYy10A6gT/wgdy5Eh M/xlBVXZAJua3PRZlnzYzr538WV9PLnhFllZWGOdFJBxG9YqsiDOayX7hBarojM7C5GB jHUewe5zKqUevjjxgokHnRLOaRezShNm54iOiWmfbwDYCI9CNmiRQT69wgnklbIbLY0l U9h3vH7Y9OO++SHkOlI1ovNqcX5pXH2nNub6XLIQ0+g0ImSDarMsaW4QalnQqWE7rWNi sLKrwkqKK5XdsElsw4/l8tJ99xwz9p5BhceDKSe6KRUnv3mo+9ZumobJ5rP6C17W5wL0 KYAw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="RLp743/0"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id lb14-20020a17090b4a4e00b0024bc03cfa95si10165953pjb.156.2023.06.15.07.23.51; Thu, 15 Jun 2023 07:24:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="RLp743/0"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344739AbjFONzl (ORCPT + 99 others); Thu, 15 Jun 2023 09:55:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59564 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344624AbjFONyo (ORCPT ); Thu, 15 Jun 2023 09:54:44 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 336151FCC; Thu, 15 Jun 2023 06:54:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686837280; x=1718373280; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ibISdxCxH3dZZE/8tBcdYVkI1ZH7ec4GMtnaeXkhgZQ=; b=RLp743/0DgIfUjIJD3C9f4Lczeb24nGDTzMmLsPYg0ADOPpz9raPHYEE IJJpL+kiomu9YdIesQrxh0q5ETvjoPFk9eCIE6HXXaqXZfkzs7tmZJ6/B 01gyWTakkZC3u2hr0i+3i9PAf9JAGsOV+L4cOthzSAwZkXzl0agi/V0Ae mmrQGn4bkP+oY1lBGiKjsYUOYCMD6RhSMpqhoFxhVUDsNwq8f3KZDa5Ff 1bAu4IdC94dcwNNyJp+QTnZIPmSIp0+kcUDsv71kDWyoHAqHOL0jV9tDN 7IFUTOXtuuWNJKU0vEWmRboMSeMgkbCxz7nEzXSYR50EPbh+Una1+VJ17 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="356411393" X-IronPort-AV: E=Sophos;i="6.00,245,1681196400"; d="scan'208";a="356411393" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2023 06:54:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="782527050" X-IronPort-AV: E=Sophos;i="6.00,245,1681196400"; d="scan'208";a="782527050" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga004.fm.intel.com with ESMTP; 15 Jun 2023 06:54:38 -0700 From: kan.liang@linux.intel.com To: acme@kernel.org, mingo@redhat.com, peterz@infradead.org, irogers@google.com, namhyung@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org Cc: ak@linux.intel.com, eranian@google.com, ahmad.yasin@intel.com, Kan Liang Subject: [PATCH V3 2/8] perf metric: JSON flag to default metric group Date: Thu, 15 Jun 2023 06:53:09 -0700 Message-Id: <20230615135315.3662428-3-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230615135315.3662428-1-kan.liang@linux.intel.com> References: <20230615135315.3662428-1-kan.liang@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768778941115601073?= X-GMAIL-MSGID: =?utf-8?q?1768778941115601073?= From: Kan Liang For the default output, the default metric group could vary on different platforms. For example, on SPR, the TopdownL1 and TopdownL2 metrics should be displayed in the default mode. On ICL, only the TopdownL1 should be displayed. Add a flag so we can tag the default metric group for different platforms rather than hack the perf code. The flag is added to Intel TopdownL1 since ICL and ADL, TopdownL2 metrics since SPR. Add a new field, DefaultMetricgroupName, in the JSON file to indicate the real metric group name. Reviewed-by: Ian Rogers Signed-off-by: Kan Liang --- .../arch/x86/alderlake/adl-metrics.json | 45 ++++++++------ .../arch/x86/alderlaken/adln-metrics.json | 25 ++++---- .../arch/x86/icelake/icl-metrics.json | 20 ++++--- .../arch/x86/icelakex/icx-metrics.json | 20 ++++--- .../arch/x86/sapphirerapids/spr-metrics.json | 60 +++++++++++-------- .../arch/x86/tigerlake/tgl-metrics.json | 20 ++++--- 6 files changed, 114 insertions(+), 76 deletions(-) diff --git a/tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json b/tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json index c9f7e3d4ab08..85fb975b6f56 100644 --- a/tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json +++ b/tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json @@ -129,33 +129,36 @@ }, { "BriefDescription": "Counts the total number of issue slots that were not consumed by the backend due to backend stalls", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "TOPDOWN_BE_BOUND.ALL / tma_info_core_slots", - "MetricGroup": "TopdownL1;tma_L1_group", + "MetricGroup": "Default;TopdownL1;tma_L1_group", "MetricName": "tma_backend_bound", "MetricThreshold": "tma_backend_bound > 0.1", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "Counts the total number of issue slots that were not consumed by the backend due to backend stalls. Note that uops must be available for consumption in order for this event to count. If a uop is not available (IQ is empty), this event will not count. The rest of these subevents count backend stalls, in cycles, due to an outstanding request which is memory bound vs core bound. The subevents are not slot based events and therefore can not be precisely added or subtracted from the Backend_Bound_Aux subevents which are slot based.", "ScaleUnit": "100%", "Unit": "cpu_atom" }, { "BriefDescription": "Counts the total number of issue slots that were not consumed by the backend due to backend stalls", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "tma_backend_bound", - "MetricGroup": "TopdownL1;tma_L1_group", + "MetricGroup": "Default;TopdownL1;tma_L1_group", "MetricName": "tma_backend_bound_aux", "MetricThreshold": "tma_backend_bound_aux > 0.2", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "Counts the total number of issue slots that were not consumed by the backend due to backend stalls. Note that UOPS must be available for consumption in order for this event to count. If a uop is not available (IQ is empty), this event will not count. All of these subevents count backend stalls, in slots, due to a resource limitation. These are not cycle based events and therefore can not be precisely added or subtracted from the Backend_Bound subevents which are cycle based. These subevents are supplementary to Backend_Bound and can be used to analyze results from a resource perspective at allocation.", "ScaleUnit": "100%", "Unit": "cpu_atom" }, { "BriefDescription": "Counts the total number of issue slots that were not consumed by the backend because allocation is stalled due to a mispredicted jump or a machine clear", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "(tma_info_core_slots - (cpu_atom@TOPDOWN_FE_BOUND.ALL@ + cpu_atom@TOPDOWN_BE_BOUND.ALL@ + cpu_atom@TOPDOWN_RETIRING.ALL@)) / tma_info_core_slots", - "MetricGroup": "TopdownL1;tma_L1_group", + "MetricGroup": "Default;TopdownL1;tma_L1_group", "MetricName": "tma_bad_speculation", "MetricThreshold": "tma_bad_speculation > 0.15", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "Counts the total number of issue slots that were not consumed by the backend because allocation is stalled due to a mispredicted jump or a machine clear. Only issue slots wasted due to fast nukes such as memory ordering nukes are counted. Other nukes are not accounted for. Counts all issue slots blocked during this recovery window including relevant microcode flows and while uops are not yet available in the instruction queue (IQ). Also includes the issue slots that were consumed by the backend but were thrown away because they were younger than the mispredict or machine clear.", "ScaleUnit": "100%", "Unit": "cpu_atom" @@ -295,11 +298,12 @@ }, { "BriefDescription": "Counts the number of issue slots that were not consumed by the backend due to frontend stalls.", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "TOPDOWN_FE_BOUND.ALL / tma_info_core_slots", - "MetricGroup": "TopdownL1;tma_L1_group", + "MetricGroup": "Default;TopdownL1;tma_L1_group", "MetricName": "tma_frontend_bound", "MetricThreshold": "tma_frontend_bound > 0.2", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "ScaleUnit": "100%", "Unit": "cpu_atom" }, @@ -722,11 +726,12 @@ }, { "BriefDescription": "Counts the numer of issue slots that result in retirement slots.", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "TOPDOWN_RETIRING.ALL / tma_info_core_slots", - "MetricGroup": "TopdownL1;tma_L1_group", + "MetricGroup": "Default;TopdownL1;tma_L1_group", "MetricName": "tma_retiring", "MetricThreshold": "tma_retiring > 0.75", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "ScaleUnit": "100%", "Unit": "cpu_atom" }, @@ -832,22 +837,24 @@ }, { "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "cpu_core@topdown\\-be\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots", - "MetricGroup": "TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_backend_bound", "MetricThreshold": "tma_backend_bound > 0.2", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend. Backend is the portion of the processor core where the out-of-order scheduler dispatches ready uops into their respective execution units; and once completed these uops get retired according to program order. For example; stalls due to data-cache misses or stalls due to the divider unit being overloaded are both categorized under Backend Bound. Backend Bound is further divided into two main categories: Memory Bound and Core Bound. Sample with: TOPDOWN.BACKEND_BOUND_SLOTS", "ScaleUnit": "100%", "Unit": "cpu_core" }, { "BriefDescription": "This category represents fraction of slots wasted due to incorrect speculations", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "max(1 - (tma_frontend_bound + tma_backend_bound + tma_retiring), 0)", - "MetricGroup": "TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_bad_speculation", "MetricThreshold": "tma_bad_speculation > 0.15", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots wasted due to incorrect speculations. This include slots used to issue uops that do not eventually get retired and slots for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For example; wasted work due to miss-predicted branches are categorized under Bad Speculation category. Incorrect data speculation followed by Memory Ordering Nukes is another example.", "ScaleUnit": "100%", "Unit": "cpu_core" @@ -1112,11 +1119,12 @@ }, { "BriefDescription": "This category represents fraction of slots where the processor's Frontend undersupplies its Backend", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "cpu_core@topdown\\-fe\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) - cpu_core@INT_MISC.UOP_DROPPING@ / tma_info_thread_slots", - "MetricGroup": "PGO;TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;PGO;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_frontend_bound", "MetricThreshold": "tma_frontend_bound > 0.15", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots where the processor's Frontend undersupplies its Backend. Frontend denotes the first part of the processor core responsible to fetch operations that are executed later on by the Backend part. Within the Frontend; a branch predictor predicts the next address to fetch; cache-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into micro-operations (uops). Ideally the Frontend can issue Pipeline_Width uops every cycle to the Backend. Frontend Bound denotes unutilized issue-slots when there is no Backend stall; i.e. bubbles where Frontend delivered no uops while Backend could have accepted them. For example; stalls due to instruction-cache misses would be categorized under Frontend Bound. Sample with: FRONTEND_RETIRED.LATENCY_GE_4_PS", "ScaleUnit": "100%", "Unit": "cpu_core" @@ -2316,11 +2324,12 @@ }, { "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "cpu_core@topdown\\-retiring@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots", - "MetricGroup": "TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_retiring", "MetricThreshold": "tma_retiring > 0.7 | tma_heavy_operations > 0.1", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired. Ideally; all pipeline slots would be attributed to the Retiring category. Retiring of 100% would indicate the maximum Pipeline_Width throughput was achieved. Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no room for more performance. For example; Heavy-operations or Microcode Assists are categorized under Retiring. They often indicate suboptimal performance and can often be optimized or avoided. Sample with: UOPS_RETIRED.SLOTS", "ScaleUnit": "100%", "Unit": "cpu_core" diff --git a/tools/perf/pmu-events/arch/x86/alderlaken/adln-metrics.json b/tools/perf/pmu-events/arch/x86/alderlaken/adln-metrics.json index ed9ff25a03cf..0f1628d698da 100644 --- a/tools/perf/pmu-events/arch/x86/alderlaken/adln-metrics.json +++ b/tools/perf/pmu-events/arch/x86/alderlaken/adln-metrics.json @@ -94,31 +94,34 @@ }, { "BriefDescription": "Counts the total number of issue slots that were not consumed by the backend due to backend stalls", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "TOPDOWN_BE_BOUND.ALL / tma_info_core_slots", - "MetricGroup": "TopdownL1;tma_L1_group", + "MetricGroup": "Default;TopdownL1;tma_L1_group", "MetricName": "tma_backend_bound", "MetricThreshold": "tma_backend_bound > 0.1", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "Counts the total number of issue slots that were not consumed by the backend due to backend stalls. Note that uops must be available for consumption in order for this event to count. If a uop is not available (IQ is empty), this event will not count. The rest of these subevents count backend stalls, in cycles, due to an outstanding request which is memory bound vs core bound. The subevents are not slot based events and therefore can not be precisely added or subtracted from the Backend_Bound_Aux subevents which are slot based.", "ScaleUnit": "100%" }, { "BriefDescription": "Counts the total number of issue slots that were not consumed by the backend due to backend stalls", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "tma_backend_bound", - "MetricGroup": "TopdownL1;tma_L1_group", + "MetricGroup": "Default;TopdownL1;tma_L1_group", "MetricName": "tma_backend_bound_aux", "MetricThreshold": "tma_backend_bound_aux > 0.2", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "Counts the total number of issue slots that were not consumed by the backend due to backend stalls. Note that UOPS must be available for consumption in order for this event to count. If a uop is not available (IQ is empty), this event will not count. All of these subevents count backend stalls, in slots, due to a resource limitation. These are not cycle based events and therefore can not be precisely added or subtracted from the Backend_Bound subevents which are cycle based. These subevents are supplementary to Backend_Bound and can be used to analyze results from a resource perspective at allocation.", "ScaleUnit": "100%" }, { "BriefDescription": "Counts the total number of issue slots that were not consumed by the backend because allocation is stalled due to a mispredicted jump or a machine clear", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "(tma_info_core_slots - (TOPDOWN_FE_BOUND.ALL + TOPDOWN_BE_BOUND.ALL + TOPDOWN_RETIRING.ALL)) / tma_info_core_slots", - "MetricGroup": "TopdownL1;tma_L1_group", + "MetricGroup": "Default;TopdownL1;tma_L1_group", "MetricName": "tma_bad_speculation", "MetricThreshold": "tma_bad_speculation > 0.15", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "Counts the total number of issue slots that were not consumed by the backend because allocation is stalled due to a mispredicted jump or a machine clear. Only issue slots wasted due to fast nukes such as memory ordering nukes are counted. Other nukes are not accounted for. Counts all issue slots blocked during this recovery window including relevant microcode flows and while uops are not yet available in the instruction queue (IQ). Also includes the issue slots that were consumed by the backend but were thrown away because they were younger than the mispredict or machine clear.", "ScaleUnit": "100%" }, @@ -243,11 +246,12 @@ }, { "BriefDescription": "Counts the number of issue slots that were not consumed by the backend due to frontend stalls.", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "TOPDOWN_FE_BOUND.ALL / tma_info_core_slots", - "MetricGroup": "TopdownL1;tma_L1_group", + "MetricGroup": "Default;TopdownL1;tma_L1_group", "MetricName": "tma_frontend_bound", "MetricThreshold": "tma_frontend_bound > 0.2", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "ScaleUnit": "100%" }, { @@ -612,11 +616,12 @@ }, { "BriefDescription": "Counts the numer of issue slots that result in retirement slots.", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "TOPDOWN_RETIRING.ALL / tma_info_core_slots", - "MetricGroup": "TopdownL1;tma_L1_group", + "MetricGroup": "Default;TopdownL1;tma_L1_group", "MetricName": "tma_retiring", "MetricThreshold": "tma_retiring > 0.75", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "ScaleUnit": "100%" }, { diff --git a/tools/perf/pmu-events/arch/x86/icelake/icl-metrics.json b/tools/perf/pmu-events/arch/x86/icelake/icl-metrics.json index 20210742171d..cc4edf855064 100644 --- a/tools/perf/pmu-events/arch/x86/icelake/icl-metrics.json +++ b/tools/perf/pmu-events/arch/x86/icelake/icl-metrics.json @@ -111,21 +111,23 @@ }, { "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "topdown\\-be\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 5 * cpu@INT_MISC.RECOVERY_CYCLES\\,cmask\\=1\\,edge@ / tma_info_thread_slots", - "MetricGroup": "TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_backend_bound", "MetricThreshold": "tma_backend_bound > 0.2", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend. Backend is the portion of the processor core where the out-of-order scheduler dispatches ready uops into their respective execution units; and once completed these uops get retired according to program order. For example; stalls due to data-cache misses or stalls due to the divider unit being overloaded are both categorized under Backend Bound. Backend Bound is further divided into two main categories: Memory Bound and Core Bound. Sample with: TOPDOWN.BACKEND_BOUND_SLOTS", "ScaleUnit": "100%" }, { "BriefDescription": "This category represents fraction of slots wasted due to incorrect speculations", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "max(1 - (tma_frontend_bound + tma_backend_bound + tma_retiring), 0)", - "MetricGroup": "TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_bad_speculation", "MetricThreshold": "tma_bad_speculation > 0.15", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots wasted due to incorrect speculations. This include slots used to issue uops that do not eventually get retired and slots for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For example; wasted work due to miss-predicted branches are categorized under Bad Speculation category. Incorrect data speculation followed by Memory Ordering Nukes is another example.", "ScaleUnit": "100%" }, @@ -372,11 +374,12 @@ }, { "BriefDescription": "This category represents fraction of slots where the processor's Frontend undersupplies its Backend", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "topdown\\-fe\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) - INT_MISC.UOP_DROPPING / tma_info_thread_slots", - "MetricGroup": "PGO;TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;PGO;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_frontend_bound", "MetricThreshold": "tma_frontend_bound > 0.15", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots where the processor's Frontend undersupplies its Backend. Frontend denotes the first part of the processor core responsible to fetch operations that are executed later on by the Backend part. Within the Frontend; a branch predictor predicts the next address to fetch; cache-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into micro-operations (uops). Ideally the Frontend can issue Pipeline_Width uops every cycle to the Backend. Frontend Bound denotes unutilized issue-slots when there is no Backend stall; i.e. bubbles where Frontend delivered no uops while Backend could have accepted them. For example; stalls due to instruction-cache misses would be categorized under Frontend Bound. Sample with: FRONTEND_RETIRED.LATENCY_GE_4_PS", "ScaleUnit": "100%" }, @@ -1378,11 +1381,12 @@ }, { "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots", - "MetricGroup": "TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_retiring", "MetricThreshold": "tma_retiring > 0.7 | tma_heavy_operations > 0.1", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired. Ideally; all pipeline slots would be attributed to the Retiring category. Retiring of 100% would indicate the maximum Pipeline_Width throughput was achieved. Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no room for more performance. For example; Heavy-operations or Microcode Assists are categorized under Retiring. They often indicate suboptimal performance and can often be optimized or avoided. Sample with: UOPS_RETIRED.SLOTS", "ScaleUnit": "100%" }, diff --git a/tools/perf/pmu-events/arch/x86/icelakex/icx-metrics.json b/tools/perf/pmu-events/arch/x86/icelakex/icx-metrics.json index ef25cda019be..6f25b5b7aaf6 100644 --- a/tools/perf/pmu-events/arch/x86/icelakex/icx-metrics.json +++ b/tools/perf/pmu-events/arch/x86/icelakex/icx-metrics.json @@ -315,21 +315,23 @@ }, { "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "topdown\\-be\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 5 * cpu@INT_MISC.RECOVERY_CYCLES\\,cmask\\=1\\,edge@ / tma_info_thread_slots", - "MetricGroup": "TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_backend_bound", "MetricThreshold": "tma_backend_bound > 0.2", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend. Backend is the portion of the processor core where the out-of-order scheduler dispatches ready uops into their respective execution units; and once completed these uops get retired according to program order. For example; stalls due to data-cache misses or stalls due to the divider unit being overloaded are both categorized under Backend Bound. Backend Bound is further divided into two main categories: Memory Bound and Core Bound. Sample with: TOPDOWN.BACKEND_BOUND_SLOTS", "ScaleUnit": "100%" }, { "BriefDescription": "This category represents fraction of slots wasted due to incorrect speculations", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "max(1 - (tma_frontend_bound + tma_backend_bound + tma_retiring), 0)", - "MetricGroup": "TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_bad_speculation", "MetricThreshold": "tma_bad_speculation > 0.15", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots wasted due to incorrect speculations. This include slots used to issue uops that do not eventually get retired and slots for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For example; wasted work due to miss-predicted branches are categorized under Bad Speculation category. Incorrect data speculation followed by Memory Ordering Nukes is another example.", "ScaleUnit": "100%" }, @@ -576,11 +578,12 @@ }, { "BriefDescription": "This category represents fraction of slots where the processor's Frontend undersupplies its Backend", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "topdown\\-fe\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) - INT_MISC.UOP_DROPPING / tma_info_thread_slots", - "MetricGroup": "PGO;TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;PGO;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_frontend_bound", "MetricThreshold": "tma_frontend_bound > 0.15", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots where the processor's Frontend undersupplies its Backend. Frontend denotes the first part of the processor core responsible to fetch operations that are executed later on by the Backend part. Within the Frontend; a branch predictor predicts the next address to fetch; cache-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into micro-operations (uops). Ideally the Frontend can issue Pipeline_Width uops every cycle to the Backend. Frontend Bound denotes unutilized issue-slots when there is no Backend stall; i.e. bubbles where Frontend delivered no uops while Backend could have accepted them. For example; stalls due to instruction-cache misses would be categorized under Frontend Bound. Sample with: FRONTEND_RETIRED.LATENCY_GE_4_PS", "ScaleUnit": "100%" }, @@ -1674,11 +1677,12 @@ }, { "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots", - "MetricGroup": "TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_retiring", "MetricThreshold": "tma_retiring > 0.7 | tma_heavy_operations > 0.1", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired. Ideally; all pipeline slots would be attributed to the Retiring category. Retiring of 100% would indicate the maximum Pipeline_Width throughput was achieved. Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no room for more performance. For example; Heavy-operations or Microcode Assists are categorized under Retiring. They often indicate suboptimal performance and can often be optimized or avoided. Sample with: UOPS_RETIRED.SLOTS", "ScaleUnit": "100%" }, diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/spr-metrics.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/spr-metrics.json index 4f3dd85540b6..c732982f70b5 100644 --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/spr-metrics.json +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/spr-metrics.json @@ -340,31 +340,34 @@ }, { "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "topdown\\-be\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots", - "MetricGroup": "TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_backend_bound", "MetricThreshold": "tma_backend_bound > 0.2", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend. Backend is the portion of the processor core where the out-of-order scheduler dispatches ready uops into their respective execution units; and once completed these uops get retired according to program order. For example; stalls due to data-cache misses or stalls due to the divider unit being overloaded are both categorized under Backend Bound. Backend Bound is further divided into two main categories: Memory Bound and Core Bound. Sample with: TOPDOWN.BACKEND_BOUND_SLOTS", "ScaleUnit": "100%" }, { "BriefDescription": "This category represents fraction of slots wasted due to incorrect speculations", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "max(1 - (tma_frontend_bound + tma_backend_bound + tma_retiring), 0)", - "MetricGroup": "TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_bad_speculation", "MetricThreshold": "tma_bad_speculation > 0.15", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots wasted due to incorrect speculations. This include slots used to issue uops that do not eventually get retired and slots for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For example; wasted work due to miss-predicted branches are categorized under Bad Speculation category. Incorrect data speculation followed by Memory Ordering Nukes is another example.", "ScaleUnit": "100%" }, { "BriefDescription": "This metric represents fraction of slots the CPU has wasted due to Branch Misprediction", + "DefaultMetricgroupName": "TopdownL2", "MetricExpr": "topdown\\-br\\-mispredict / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots", - "MetricGroup": "BadSpec;BrMispredicts;TmaL2;TopdownL2;tma_L2_group;tma_bad_speculation_group;tma_issueBM", + "MetricGroup": "BadSpec;BrMispredicts;Default;TmaL2;TopdownL2;tma_L2_group;tma_bad_speculation_group;tma_issueBM", "MetricName": "tma_branch_mispredicts", "MetricThreshold": "tma_branch_mispredicts > 0.1 & tma_bad_speculation > 0.15", - "MetricgroupNoGroup": "TopdownL2", + "MetricgroupNoGroup": "TopdownL2;Default", "PublicDescription": "This metric represents fraction of slots the CPU has wasted due to Branch Misprediction. These slots are either wasted by uops fetched from an incorrectly speculated program path; or stalls when the out-of-order part of the machine needs to recover its state from a speculative path. Sample with: TOPDOWN.BR_MISPREDICT_SLOTS. Related metrics: tma_info_bad_spec_branch_misprediction_cost, tma_info_bottleneck_mispredictions, tma_mispredicts_resteers", "ScaleUnit": "100%" }, @@ -407,11 +410,12 @@ }, { "BriefDescription": "This metric represents fraction of slots where Core non-memory issues were of a bottleneck", + "DefaultMetricgroupName": "TopdownL2", "MetricExpr": "max(0, tma_backend_bound - tma_memory_bound)", - "MetricGroup": "Backend;Compute;TmaL2;TopdownL2;tma_L2_group;tma_backend_bound_group", + "MetricGroup": "Backend;Compute;Default;TmaL2;TopdownL2;tma_L2_group;tma_backend_bound_group", "MetricName": "tma_core_bound", "MetricThreshold": "tma_core_bound > 0.1 & tma_backend_bound > 0.2", - "MetricgroupNoGroup": "TopdownL2", + "MetricgroupNoGroup": "TopdownL2;Default", "PublicDescription": "This metric represents fraction of slots where Core non-memory issues were of a bottleneck. Shortage in hardware compute resources; or dependencies in software's instructions are both categorized under Core Bound. Hence it may indicate the machine ran out of an out-of-order resource; certain execution units are overloaded or dependencies in program's data- or instruction-flow are limiting the performance (e.g. FP-chained long-latency arithmetic operations).", "ScaleUnit": "100%" }, @@ -509,21 +513,23 @@ }, { "BriefDescription": "This metric represents fraction of slots the CPU was stalled due to Frontend bandwidth issues", + "DefaultMetricgroupName": "TopdownL2", "MetricExpr": "max(0, tma_frontend_bound - tma_fetch_latency)", - "MetricGroup": "FetchBW;Frontend;TmaL2;TopdownL2;tma_L2_group;tma_frontend_bound_group;tma_issueFB", + "MetricGroup": "Default;FetchBW;Frontend;TmaL2;TopdownL2;tma_L2_group;tma_frontend_bound_group;tma_issueFB", "MetricName": "tma_fetch_bandwidth", "MetricThreshold": "tma_fetch_bandwidth > 0.1 & tma_frontend_bound > 0.15 & tma_info_thread_ipc / 6 > 0.35", - "MetricgroupNoGroup": "TopdownL2", + "MetricgroupNoGroup": "TopdownL2;Default", "PublicDescription": "This metric represents fraction of slots the CPU was stalled due to Frontend bandwidth issues. For example; inefficiencies at the instruction decoders; or restrictions for caching in the DSB (decoded uops cache) are categorized under Fetch Bandwidth. In such cases; the Frontend typically delivers suboptimal amount of uops to the Backend. Sample with: FRONTEND_RETIRED.LATENCY_GE_2_BUBBLES_GE_1_PS;FRONTEND_RETIRED.LATENCY_GE_1_PS;FRONTEND_RETIRED.LATENCY_GE_2_PS. Related metrics: tma_dsb_switches, tma_info_botlnk_l2_dsb_misses, tma_info_frontend_dsb_coverage, tma_info_inst_mix_iptb, tma_lcp", "ScaleUnit": "100%" }, { "BriefDescription": "This metric represents fraction of slots the CPU was stalled due to Frontend latency issues", + "DefaultMetricgroupName": "TopdownL2", "MetricExpr": "topdown\\-fetch\\-lat / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) - INT_MISC.UOP_DROPPING / tma_info_thread_slots", - "MetricGroup": "Frontend;TmaL2;TopdownL2;tma_L2_group;tma_frontend_bound_group", + "MetricGroup": "Default;Frontend;TmaL2;TopdownL2;tma_L2_group;tma_frontend_bound_group", "MetricName": "tma_fetch_latency", "MetricThreshold": "tma_fetch_latency > 0.1 & tma_frontend_bound > 0.15", - "MetricgroupNoGroup": "TopdownL2", + "MetricgroupNoGroup": "TopdownL2;Default", "PublicDescription": "This metric represents fraction of slots the CPU was stalled due to Frontend latency issues. For example; instruction-cache misses; iTLB misses or fetch stalls after a branch misprediction are categorized under Frontend Latency. In such cases; the Frontend eventually delivers no uops for some period. Sample with: FRONTEND_RETIRED.LATENCY_GE_16_PS;FRONTEND_RETIRED.LATENCY_GE_8_PS", "ScaleUnit": "100%" }, @@ -611,11 +617,12 @@ }, { "BriefDescription": "This category represents fraction of slots where the processor's Frontend undersupplies its Backend", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "topdown\\-fe\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) - INT_MISC.UOP_DROPPING / tma_info_thread_slots", - "MetricGroup": "PGO;TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;PGO;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_frontend_bound", "MetricThreshold": "tma_frontend_bound > 0.15", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots where the processor's Frontend undersupplies its Backend. Frontend denotes the first part of the processor core responsible to fetch operations that are executed later on by the Backend part. Within the Frontend; a branch predictor predicts the next address to fetch; cache-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into micro-operations (uops). Ideally the Frontend can issue Pipeline_Width uops every cycle to the Backend. Frontend Bound denotes unutilized issue-slots when there is no Backend stall; i.e. bubbles where Frontend delivered no uops while Backend could have accepted them. For example; stalls due to instruction-cache misses would be categorized under Frontend Bound. Sample with: FRONTEND_RETIRED.LATENCY_GE_4_PS", "ScaleUnit": "100%" }, @@ -630,11 +637,12 @@ }, { "BriefDescription": "This metric represents fraction of slots where the CPU was retiring heavy-weight operations -- instructions that require two or more uops or micro-coded sequences", + "DefaultMetricgroupName": "TopdownL2", "MetricExpr": "topdown\\-heavy\\-ops / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots", - "MetricGroup": "Retire;TmaL2;TopdownL2;tma_L2_group;tma_retiring_group", + "MetricGroup": "Default;Retire;TmaL2;TopdownL2;tma_L2_group;tma_retiring_group", "MetricName": "tma_heavy_operations", "MetricThreshold": "tma_heavy_operations > 0.1", - "MetricgroupNoGroup": "TopdownL2", + "MetricgroupNoGroup": "TopdownL2;Default", "PublicDescription": "This metric represents fraction of slots where the CPU was retiring heavy-weight operations -- instructions that require two or more uops or micro-coded sequences. This highly-correlates with the uop length of these instructions/sequences. Sample with: UOPS_RETIRED.HEAVY", "ScaleUnit": "100%" }, @@ -1486,11 +1494,12 @@ }, { "BriefDescription": "This metric represents fraction of slots where the CPU was retiring light-weight operations -- instructions that require no more than one uop (micro-operation)", + "DefaultMetricgroupName": "TopdownL2", "MetricExpr": "max(0, tma_retiring - tma_heavy_operations)", - "MetricGroup": "Retire;TmaL2;TopdownL2;tma_L2_group;tma_retiring_group", + "MetricGroup": "Default;Retire;TmaL2;TopdownL2;tma_L2_group;tma_retiring_group", "MetricName": "tma_light_operations", "MetricThreshold": "tma_light_operations > 0.6", - "MetricgroupNoGroup": "TopdownL2", + "MetricgroupNoGroup": "TopdownL2;Default", "PublicDescription": "This metric represents fraction of slots where the CPU was retiring light-weight operations -- instructions that require no more than one uop (micro-operation). This correlates with total number of instructions used by the program. A uops-per-instruction (see UopPI metric) ratio of 1 or less should be expected for decently optimized software running on Intel Core/Xeon products. While this often indicates efficient X86 instructions were executed; high value does not necessarily mean better performance cannot be achieved. Sample with: INST_RETIRED.PREC_DIST", "ScaleUnit": "100%" }, @@ -1540,11 +1549,12 @@ }, { "BriefDescription": "This metric represents fraction of slots the CPU has wasted due to Machine Clears", + "DefaultMetricgroupName": "TopdownL2", "MetricExpr": "max(0, tma_bad_speculation - tma_branch_mispredicts)", - "MetricGroup": "BadSpec;MachineClears;TmaL2;TopdownL2;tma_L2_group;tma_bad_speculation_group;tma_issueMC;tma_issueSyncxn", + "MetricGroup": "BadSpec;Default;MachineClears;TmaL2;TopdownL2;tma_L2_group;tma_bad_speculation_group;tma_issueMC;tma_issueSyncxn", "MetricName": "tma_machine_clears", "MetricThreshold": "tma_machine_clears > 0.1 & tma_bad_speculation > 0.15", - "MetricgroupNoGroup": "TopdownL2", + "MetricgroupNoGroup": "TopdownL2;Default", "PublicDescription": "This metric represents fraction of slots the CPU has wasted due to Machine Clears. These slots are either wasted by uops fetched prior to the clear; or stalls the out-of-order portion of the machine needs to recover its state after the clear. For example; this can happen due to memory ordering Nukes (e.g. Memory Disambiguation) or Self-Modifying-Code (SMC) nukes. Sample with: MACHINE_CLEARS.COUNT. Related metrics: tma_clears_resteers, tma_contested_accesses, tma_data_sharing, tma_false_sharing, tma_l1_bound, tma_microcode_sequencer, tma_ms_switches, tma_remote_cache", "ScaleUnit": "100%" }, @@ -1576,11 +1586,12 @@ }, { "BriefDescription": "This metric represents fraction of slots the Memory subsystem within the Backend was a bottleneck", + "DefaultMetricgroupName": "TopdownL2", "MetricExpr": "topdown\\-mem\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots", - "MetricGroup": "Backend;TmaL2;TopdownL2;tma_L2_group;tma_backend_bound_group", + "MetricGroup": "Backend;Default;TmaL2;TopdownL2;tma_L2_group;tma_backend_bound_group", "MetricName": "tma_memory_bound", "MetricThreshold": "tma_memory_bound > 0.2 & tma_backend_bound > 0.2", - "MetricgroupNoGroup": "TopdownL2", + "MetricgroupNoGroup": "TopdownL2;Default", "PublicDescription": "This metric represents fraction of slots the Memory subsystem within the Backend was a bottleneck. Memory Bound estimates fraction of slots where pipeline is likely stalled due to demand load or store instructions. This accounts mainly for (1) non-completed in-flight memory demand loads which coincides with execution units starvation; in addition to (2) cases where stores could impose backpressure on the pipeline when many of them get buffered at the same time (less common out of the two).", "ScaleUnit": "100%" }, @@ -1784,11 +1795,12 @@ }, { "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots", - "MetricGroup": "TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_retiring", "MetricThreshold": "tma_retiring > 0.7 | tma_heavy_operations > 0.1", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired. Ideally; all pipeline slots would be attributed to the Retiring category. Retiring of 100% would indicate the maximum Pipeline_Width throughput was achieved. Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no room for more performance. For example; Heavy-operations or Microcode Assists are categorized under Retiring. They often indicate suboptimal performance and can often be optimized or avoided. Sample with: UOPS_RETIRED.SLOTS", "ScaleUnit": "100%" }, diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/tgl-metrics.json b/tools/perf/pmu-events/arch/x86/tigerlake/tgl-metrics.json index d0538a754288..83346911aa63 100644 --- a/tools/perf/pmu-events/arch/x86/tigerlake/tgl-metrics.json +++ b/tools/perf/pmu-events/arch/x86/tigerlake/tgl-metrics.json @@ -105,21 +105,23 @@ }, { "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "topdown\\-be\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 5 * cpu@INT_MISC.RECOVERY_CYCLES\\,cmask\\=1\\,edge@ / tma_info_thread_slots", - "MetricGroup": "TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_backend_bound", "MetricThreshold": "tma_backend_bound > 0.2", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend. Backend is the portion of the processor core where the out-of-order scheduler dispatches ready uops into their respective execution units; and once completed these uops get retired according to program order. For example; stalls due to data-cache misses or stalls due to the divider unit being overloaded are both categorized under Backend Bound. Backend Bound is further divided into two main categories: Memory Bound and Core Bound. Sample with: TOPDOWN.BACKEND_BOUND_SLOTS", "ScaleUnit": "100%" }, { "BriefDescription": "This category represents fraction of slots wasted due to incorrect speculations", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "max(1 - (tma_frontend_bound + tma_backend_bound + tma_retiring), 0)", - "MetricGroup": "TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_bad_speculation", "MetricThreshold": "tma_bad_speculation > 0.15", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots wasted due to incorrect speculations. This include slots used to issue uops that do not eventually get retired and slots for which the issue-pipeline was blocked due to recovery from earlier incorrect speculation. For example; wasted work due to miss-predicted branches are categorized under Bad Speculation category. Incorrect data speculation followed by Memory Ordering Nukes is another example.", "ScaleUnit": "100%" }, @@ -366,11 +368,12 @@ }, { "BriefDescription": "This category represents fraction of slots where the processor's Frontend undersupplies its Backend", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "topdown\\-fe\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) - INT_MISC.UOP_DROPPING / tma_info_thread_slots", - "MetricGroup": "PGO;TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;PGO;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_frontend_bound", "MetricThreshold": "tma_frontend_bound > 0.15", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots where the processor's Frontend undersupplies its Backend. Frontend denotes the first part of the processor core responsible to fetch operations that are executed later on by the Backend part. Within the Frontend; a branch predictor predicts the next address to fetch; cache-lines are fetched from the memory subsystem; parsed into instructions; and lastly decoded into micro-operations (uops). Ideally the Frontend can issue Pipeline_Width uops every cycle to the Backend. Frontend Bound denotes unutilized issue-slots when there is no Backend stall; i.e. bubbles where Frontend delivered no uops while Backend could have accepted them. For example; stalls due to instruction-cache misses would be categorized under Frontend Bound. Sample with: FRONTEND_RETIRED.LATENCY_GE_4_PS", "ScaleUnit": "100%" }, @@ -1392,11 +1395,12 @@ }, { "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired", + "DefaultMetricgroupName": "TopdownL1", "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots", - "MetricGroup": "TmaL1;TopdownL1;tma_L1_group", + "MetricGroup": "Default;TmaL1;TopdownL1;tma_L1_group", "MetricName": "tma_retiring", "MetricThreshold": "tma_retiring > 0.7 | tma_heavy_operations > 0.1", - "MetricgroupNoGroup": "TopdownL1", + "MetricgroupNoGroup": "TopdownL1;Default", "PublicDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired. Ideally; all pipeline slots would be attributed to the Retiring category. Retiring of 100% would indicate the maximum Pipeline_Width throughput was achieved. Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no room for more performance. For example; Heavy-operations or Microcode Assists are categorized under Retiring. They often indicate suboptimal performance and can often be optimized or avoided. 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id s10-20020a17090aad8a00b0024e3527e8e9si14437348pjq.9.2023.06.15.07.21.18; Thu, 15 Jun 2023 07:21:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=E5qf6IOf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344650AbjFONys (ORCPT + 99 others); Thu, 15 Jun 2023 09:54:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59524 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344612AbjFONyl (ORCPT ); Thu, 15 Jun 2023 09:54:41 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62AFB1FD4; Thu, 15 Jun 2023 06:54:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686837280; x=1718373280; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=15U0WIiyyq0rvPLxNQh5XmogtqMkEiklw2OKMcRnMoU=; b=E5qf6IOfdIO0fdDCbB5lGlf57oEcOCQq0TZMwZj8HdtpcqEePYLnLjwY 5c/4dat+Em07tmRg+dh7SciFyqPNHDC0GlpokP5N1nAC1YXO24nP4/n2N opzdVTsAVdrjI7x5eTQ0Ki5vwlax27Wh65Uh69cenXEoc5nhvYsmO3Wto b/yOQdJIi5aWqJ94u5QYPl7XDJVOzt0oKm8sMCBmaUzIcx17vuvgA+0b4 BJXc48ArTKJPbifVlm9YjlTZ3EvBb4Mfna8OnIu4A5xJKeJnXkjohd7eH EhVxRbPx39K2A+634RHdzwmkH8NDDfh9LNnGrTPZKW5rPbsd8gVKSf8Nw w==; X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="356411398" X-IronPort-AV: E=Sophos;i="6.00,245,1681196400"; d="scan'208";a="356411398" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2023 06:54:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="782527053" X-IronPort-AV: E=Sophos;i="6.00,245,1681196400"; d="scan'208";a="782527053" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga004.fm.intel.com with ESMTP; 15 Jun 2023 06:54:38 -0700 From: kan.liang@linux.intel.com To: acme@kernel.org, mingo@redhat.com, peterz@infradead.org, irogers@google.com, namhyung@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org Cc: ak@linux.intel.com, eranian@google.com, ahmad.yasin@intel.com, Kan Liang Subject: [PATCH V3 3/8] perf stat,jevents: Introduce Default tags for the default mode Date: Thu, 15 Jun 2023 06:53:10 -0700 Message-Id: <20230615135315.3662428-4-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230615135315.3662428-1-kan.liang@linux.intel.com> References: <20230615135315.3662428-1-kan.liang@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768778782614453439?= X-GMAIL-MSGID: =?utf-8?q?1768778782614453439?= From: Kan Liang Introduce a new metricgroup, Default, to tag all the metric groups which will be collected in the default mode. Add a new field, DefaultMetricgroupName, in the JSON file to indicate the real metric group name. It will be printed in the default output to replace the event names. There is nothing changed for the output format. On SPR, both TopdownL1 and TopdownL2 are displayed in the default output. On ARM, Intel ICL and later platforms (before SPR), only TopdownL1 is displayed in the default output. Suggested-by: Stephane Eranian Reviewed-by: Ian Rogers Signed-off-by: Kan Liang --- tools/perf/builtin-stat.c | 4 ++-- tools/perf/pmu-events/jevents.py | 5 +++-- tools/perf/pmu-events/pmu-events.h | 1 + tools/perf/util/metricgroup.c | 6 ++++++ 4 files changed, 12 insertions(+), 4 deletions(-) diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c index fc615bdeed4f..55601b4b5c34 100644 --- a/tools/perf/builtin-stat.c +++ b/tools/perf/builtin-stat.c @@ -2154,14 +2154,14 @@ static int add_default_attributes(void) * Add TopdownL1 metrics if they exist. To minimize * multiplexing, don't request threshold computation. */ - if (metricgroup__has_metric(pmu, "TopdownL1")) { + if (metricgroup__has_metric(pmu, "Default")) { struct evlist *metric_evlist = evlist__new(); struct evsel *metric_evsel; if (!metric_evlist) return -1; - if (metricgroup__parse_groups(metric_evlist, pmu, "TopdownL1", + if (metricgroup__parse_groups(metric_evlist, pmu, "Default", /*metric_no_group=*/false, /*metric_no_merge=*/false, /*metric_no_threshold=*/true, diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jevents.py index 7ed258be1829..12e80bb7939b 100755 --- a/tools/perf/pmu-events/jevents.py +++ b/tools/perf/pmu-events/jevents.py @@ -54,8 +54,8 @@ _json_event_attributes = [ # Attributes that are in pmu_metric rather than pmu_event. _json_metric_attributes = [ 'pmu', 'metric_name', 'metric_group', 'metric_expr', 'metric_threshold', - 'desc', 'long_desc', 'unit', 'compat', 'metricgroup_no_group', 'aggr_mode', - 'event_grouping' + 'desc', 'long_desc', 'unit', 'compat', 'metricgroup_no_group', + 'default_metricgroup_name', 'aggr_mode', 'event_grouping' ] # Attributes that are bools or enum int values, encoded as '0', '1',... _json_enum_attributes = ['aggr_mode', 'deprecated', 'event_grouping', 'perpkg'] @@ -307,6 +307,7 @@ class JsonEvent: self.metric_name = jd.get('MetricName') self.metric_group = jd.get('MetricGroup') self.metricgroup_no_group = jd.get('MetricgroupNoGroup') + self.default_metricgroup_name = jd.get('DefaultMetricgroupName') self.event_grouping = convert_metric_constraint(jd.get('MetricConstraint')) self.metric_expr = None if 'MetricExpr' in jd: diff --git a/tools/perf/pmu-events/pmu-events.h b/tools/perf/pmu-events/pmu-events.h index 8cd23d656a5d..caf59f23cd64 100644 --- a/tools/perf/pmu-events/pmu-events.h +++ b/tools/perf/pmu-events/pmu-events.h @@ -61,6 +61,7 @@ struct pmu_metric { const char *desc; const char *long_desc; const char *metricgroup_no_group; + const char *default_metricgroup_name; enum aggr_mode_class aggr_mode; enum metric_event_groups event_grouping; }; diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c index 74f2d8efc02d..8b19644ade7d 100644 --- a/tools/perf/util/metricgroup.c +++ b/tools/perf/util/metricgroup.c @@ -137,6 +137,11 @@ struct metric { * output. */ const char *metric_unit; + /** + * Optional name of the metric group reported + * if the Default metric group is being processed. + */ + const char *default_metricgroup_name; /** Optional null terminated array of referenced metrics. */ struct metric_ref *metric_refs; /** @@ -219,6 +224,7 @@ static struct metric *metric__new(const struct pmu_metric *pm, m->pmu = pm->pmu ?: "cpu"; m->metric_name = pm->metric_name; + m->default_metricgroup_name = pm->default_metricgroup_name; m->modifier = NULL; if (modifier) { m->modifier = strdup(modifier); From patchwork Thu Jun 15 13:53:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liang, Kan" X-Patchwork-Id: 108548 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp673450vqr; Thu, 15 Jun 2023 07:21:53 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ67nbK122EsNdznFIL3IJqd5//Exmx3ww30InsEcWor5kwboI6dilsnoCcngjmX2edaGVxc X-Received: by 2002:a17:902:c202:b0:1b5:cbc:b4c with SMTP id 2-20020a170902c20200b001b50cbc0b4cmr3593990pll.46.1686838911975; Thu, 15 Jun 2023 07:21:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686838911; cv=none; d=google.com; s=arc-20160816; b=gKOK42jN/giqVe8nu6d4K0Sg0LPWUM9Zz1tt3fgRaOSdFJiStRoJat45M416jay8ny g4U/DpNxAi9cWyWoOBhVvaHyU+0RvUDwIon9r7rPD24++L59smZNmq0GuKy8NGku9F0y xdUp5uicOfpyjjUn5/fjGJ+VP3vUvOKGL0484uJryXHs9FMqudlEUO2TXnCyVZPub+X+ WEZqIHMKduB06ErMOcFKmcctSkRQAEmhSHXV5AGQgIYOaY6vJD+N9RH7yLHulx3DnJ7j HkH/sAiTDw1ZNKdSGAPwzuhSMq0FwOgORryqP1xjUWgRh4bFzAN3ZOvSvNfWvou4+CsJ p+QQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=nAIoEKteGuS/+whE09eyo2fRctYAuKuATmVCkmsQI/Q=; b=Dld3a5GZ7XWnxRb+OCJXmjsxHdi85s46f1n3X2NE4xbflGq+mCngmU9Bn9X8PZhUo2 BuPpG73xQMcnOmKgrFQoJc1me8FO598SPiwylVZ5XPGe6XdkA1mHzMJFM18JJrYvIlQz mpwidsIA80ffRpP4oaFcpH+VPqL0Vuw4lB1ga4aNafzfzxP3s9lNzJeZ07tpgVVAkFn4 4PUxrn9CQIOC5IUyqrtQCHxXSyQ5/VzynMs8Hzam18KIHZl+orNQs3XxqgAh5GTtjhuR hKK55SSS8/KTlLqEeALvwjTDihaMTHy9hgG+2ZPmgfCeqQCPP3nciMlxhctV0do3WavD AaUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=U8IaThFl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j12-20020a170903024c00b001a68f933777si12487353plh.245.2023.06.15.07.21.37; Thu, 15 Jun 2023 07:21:51 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=U8IaThFl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344670AbjFONyv (ORCPT + 99 others); Thu, 15 Jun 2023 09:54:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344614AbjFONym (ORCPT ); Thu, 15 Jun 2023 09:54:42 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 79777193; Thu, 15 Jun 2023 06:54:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686837281; x=1718373281; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+nCEF4hUqsAINCLClog6L6xMQMgGVTLOJ+AMsAh4jPw=; b=U8IaThFlxQ70x63RDPvfO9jWN/SvHzSgQ6NXo7wgDuG6LQdcnLWn2R08 sYxBL8hXQHnhzQU3EEv8mjBtYVSLufx8i2YMUjoppVSqt2t2fsrTlpQ58 mSIs4t0XEzJ7RKNk01gSEamwjBc8AyrQQKv81ayf3KWNMTavj1VWytizN tkygwHIjNJktyXl9FIezIKZei/Vakww/Pzy8GSBm7LkZHOGhdNZdOpwQB 0WSc188ZCOwrvm2r6K8Bt5p006/LLdVZ3Y2LCLUAON7WnBVJnuWefexPU Qd/z52iW0BnwouohfLiREzq3qeqJYdHzfjOeCWrGMHE0fZv/NqI3x402B Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="356411404" X-IronPort-AV: E=Sophos;i="6.00,245,1681196400"; d="scan'208";a="356411404" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2023 06:54:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="782527057" X-IronPort-AV: E=Sophos;i="6.00,245,1681196400"; d="scan'208";a="782527057" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga004.fm.intel.com with ESMTP; 15 Jun 2023 06:54:39 -0700 From: kan.liang@linux.intel.com To: acme@kernel.org, mingo@redhat.com, peterz@infradead.org, irogers@google.com, namhyung@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org Cc: ak@linux.intel.com, eranian@google.com, ahmad.yasin@intel.com, Kan Liang Subject: [PATCH V3 4/8] perf metrics: Sort the Default metricgroup Date: Thu, 15 Jun 2023 06:53:11 -0700 Message-Id: <20230615135315.3662428-5-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230615135315.3662428-1-kan.liang@linux.intel.com> References: <20230615135315.3662428-1-kan.liang@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768778798862294415?= X-GMAIL-MSGID: =?utf-8?q?1768778798862294415?= From: Kan Liang The new default mode will print the metrics as a metric group. The metrics from the same metric group must be adjacent to each other in the metric list. But the metric_list_cmp() sorts metrics by the number of events. Add a new sort for the Default metricgroup, which sorts by default_metricgroup_name and metric_name. Add is_default in the struct metric_event to indicate that it's from the Default metricgroup. Store the displayed metricgroup name of the Default metricgroup into the metric expr for output. Signed-off-by: Kan Liang --- tools/perf/util/metricgroup.c | 37 +++++++++++++++++++++++++++++++++++ tools/perf/util/metricgroup.h | 3 +++ 2 files changed, 40 insertions(+) diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c index 8b19644ade7d..e20adbdd5b56 100644 --- a/tools/perf/util/metricgroup.c +++ b/tools/perf/util/metricgroup.c @@ -79,6 +79,7 @@ static struct rb_node *metric_event_new(struct rblist *rblist __maybe_unused, return NULL; memcpy(me, entry, sizeof(struct metric_event)); me->evsel = ((struct metric_event *)entry)->evsel; + me->is_default = false; INIT_LIST_HEAD(&me->head); return &me->nd; } @@ -1160,6 +1161,25 @@ static int metric_list_cmp(void *priv __maybe_unused, const struct list_head *l, return right_count - left_count; } +/** + * default_metricgroup_cmp - Implements complex key for the Default metricgroup + * that first sorts by default_metricgroup_name, then + * metric_name. + */ +static int default_metricgroup_cmp(void *priv __maybe_unused, + const struct list_head *l, + const struct list_head *r) +{ + const struct metric *left = container_of(l, struct metric, nd); + const struct metric *right = container_of(r, struct metric, nd); + int diff = strcmp(right->default_metricgroup_name, left->default_metricgroup_name); + + if (diff) + return diff; + + return strcmp(right->metric_name, left->metric_name); +} + struct metricgroup__add_metric_data { struct list_head *list; const char *pmu; @@ -1515,6 +1535,7 @@ static int parse_groups(struct evlist *perf_evlist, LIST_HEAD(metric_list); struct metric *m; bool tool_events[PERF_TOOL_MAX] = {false}; + bool is_default = !strcmp(str, "Default"); int ret; if (metric_events_list->nr_entries == 0) @@ -1549,6 +1570,9 @@ static int parse_groups(struct evlist *perf_evlist, goto out; } + if (is_default) + list_sort(NULL, &metric_list, default_metricgroup_cmp); + list_for_each_entry(m, &metric_list, nd) { struct metric_event *me; struct evsel **metric_events; @@ -1637,6 +1661,19 @@ static int parse_groups(struct evlist *perf_evlist, expr->metric_unit = m->metric_unit; expr->metric_events = metric_events; expr->runtime = m->pctx->sctx.runtime; + if (m->pmu && strcmp(m->pmu, "cpu")) { + char *name; + + if (asprintf(&name, "%s (%s)", m->default_metricgroup_name, m->pmu) < 0) + expr->default_metricgroup_name = m->default_metricgroup_name; + else { + expr->default_metricgroup_name = strdup(name); + free(name); + } + } else + expr->default_metricgroup_name = m->default_metricgroup_name; + if (is_default) + me->is_default = true; list_add(&expr->nd, &me->head); } diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h index bf18274c15df..d5325c6ec8e1 100644 --- a/tools/perf/util/metricgroup.h +++ b/tools/perf/util/metricgroup.h @@ -22,6 +22,7 @@ struct cgroup; struct metric_event { struct rb_node nd; struct evsel *evsel; + bool is_default; /* the metric evsel from the Default metricgroup */ struct list_head head; /* list of metric_expr */ }; @@ -55,6 +56,8 @@ struct metric_expr { * more human intelligible) and then add "MiB" afterward when displayed. */ const char *metric_unit; + /** Displayed metricgroup name of the Default metricgroup */ + const char *default_metricgroup_name; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id r83-20020a632b56000000b00542897dcc22si12704036pgr.516.2023.06.15.07.21.13; Thu, 15 Jun 2023 07:21:30 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=LyZmty9M; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344734AbjFONzi (ORCPT + 99 others); Thu, 15 Jun 2023 09:55:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59556 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344623AbjFONyo (ORCPT ); Thu, 15 Jun 2023 09:54:44 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 902B81FC3; Thu, 15 Jun 2023 06:54:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686837281; x=1718373281; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/FnJZdMwlQQZIUSxTi3LJ8ojDm8gHHob8sQIkP1gAag=; b=LyZmty9MGohiP+kj4x6TqcaMTKzHx5exVHfIMY6v1NBygjFjSsKQfJ9T aOCTcByaJv5w+ANfudbJud4OUQrn6X6CUfX4Zw8oF0/7hRyGrVa97vbMZ 97UwgoUbgFqignrUII1cuLcBTxkc933WZH4BrBme5tcYC9bl9g1e/zH5B 6aXTKwHgU5cWYFL8MA5uKHLN2+lGlDmOOg8Zngkmw89ApiWrVs4DMxoHS ZlnlqwfRQGw4tkcOAPWY4azHDVDYL2uMgxQv4FW4tVaXFjp0tcfbDOFn2 Sw3hJwhP9qb4rrBVSXPH/i7UG3FtaFxhPwM2tNRMHXR7oOQGvrpYgANYR Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="356411411" X-IronPort-AV: E=Sophos;i="6.00,245,1681196400"; d="scan'208";a="356411411" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2023 06:54:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="782527063" X-IronPort-AV: E=Sophos;i="6.00,245,1681196400"; d="scan'208";a="782527063" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga004.fm.intel.com with ESMTP; 15 Jun 2023 06:54:40 -0700 From: kan.liang@linux.intel.com To: acme@kernel.org, mingo@redhat.com, peterz@infradead.org, irogers@google.com, namhyung@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org Cc: ak@linux.intel.com, eranian@google.com, ahmad.yasin@intel.com, Kan Liang Subject: [PATCH V3 5/8] perf stat: New metricgroup output for the default mode Date: Thu, 15 Jun 2023 06:53:12 -0700 Message-Id: <20230615135315.3662428-6-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230615135315.3662428-1-kan.liang@linux.intel.com> References: <20230615135315.3662428-1-kan.liang@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768778775988193173?= X-GMAIL-MSGID: =?utf-8?q?1768778775988193173?= From: Kan Liang In the default mode, the current output of the metricgroup include both events and metrics, which is not necessary and just makes the output hard to read. Since different ARCHs (even different generations in the same ARCH) may use different events. The output also vary on different platforms. For a metricgroup, only outputting the value of each metric is good enough. Add a new field default_metricgroup in evsel to indicate an event of the default metricgroup. For those events, printout() should print the metricgroup name rather than each event. Add perf_stat__skip_metric_event() to skip the evsel in the Default metricgroup, if it's not running or not the metric event. Add print_metricgroup_header_t to pass the functions which print the display name of each metricgroup in the Default metricgroup. Support all three output methods. Factor out perf_stat__print_shadow_stats_metricgroup() to print out each metrics. On SPR Before: ./perf_old stat sleep 1 Performance counter stats for 'sleep 1': 0.54 msec task-clock:u # 0.001 CPUs utilized 0 context-switches:u # 0.000 /sec 0 cpu-migrations:u # 0.000 /sec 68 page-faults:u # 125.445 K/sec 540,970 cycles:u # 0.998 GHz 556,325 instructions:u # 1.03 insn per cycle 123,602 branches:u # 228.018 M/sec 6,889 branch-misses:u # 5.57% of all branches 3,245,820 TOPDOWN.SLOTS:u # 18.4 % tma_backend_bound # 17.2 % tma_retiring # 23.1 % tma_bad_speculation # 41.4 % tma_frontend_bound 564,859 topdown-retiring:u 1,370,999 topdown-fe-bound:u 603,271 topdown-be-bound:u 744,874 topdown-bad-spec:u 12,661 INT_MISC.UOP_DROPPING:u # 23.357 M/sec 1.001798215 seconds time elapsed 0.000193000 seconds user 0.001700000 seconds sys After: $ ./perf stat sleep 1 Performance counter stats for 'sleep 1': 0.51 msec task-clock:u # 0.001 CPUs utilized 0 context-switches:u # 0.000 /sec 0 cpu-migrations:u # 0.000 /sec 68 page-faults:u # 132.683 K/sec 545,228 cycles:u # 1.064 GHz 555,509 instructions:u # 1.02 insn per cycle 123,574 branches:u # 241.120 M/sec 6,957 branch-misses:u # 5.63% of all branches TopdownL1 # 17.5 % tma_backend_bound # 22.6 % tma_bad_speculation # 42.7 % tma_frontend_bound # 17.1 % tma_retiring TopdownL2 # 21.8 % tma_branch_mispredicts # 11.5 % tma_core_bound # 13.4 % tma_fetch_bandwidth # 29.3 % tma_fetch_latency # 2.7 % tma_heavy_operations # 14.5 % tma_light_operations # 0.8 % tma_machine_clears # 6.1 % tma_memory_bound 1.001712086 seconds time elapsed 0.000151000 seconds user 0.001618000 seconds sys Reviewed-by: Ian Rogers Signed-off-by: Kan Liang --- tools/perf/builtin-stat.c | 1 + tools/perf/util/evsel.h | 1 + tools/perf/util/stat-display.c | 108 ++++++++++++++++++++++++++++++--- tools/perf/util/stat-shadow.c | 108 +++++++++++++++++++++++++++++---- tools/perf/util/stat.h | 15 +++++ 5 files changed, 211 insertions(+), 22 deletions(-) diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c index 55601b4b5c34..3f4e76f76f94 100644 --- a/tools/perf/builtin-stat.c +++ b/tools/perf/builtin-stat.c @@ -2172,6 +2172,7 @@ static int add_default_attributes(void) evlist__for_each_entry(metric_evlist, metric_evsel) { metric_evsel->skippable = true; + metric_evsel->default_metricgroup = true; } evlist__splice_list_tail(evsel_list, &metric_evlist->core.entries); evlist__delete(metric_evlist); diff --git a/tools/perf/util/evsel.h b/tools/perf/util/evsel.h index cc6fb3049b99..9f06d6cd5379 100644 --- a/tools/perf/util/evsel.h +++ b/tools/perf/util/evsel.h @@ -131,6 +131,7 @@ struct evsel { bool reset_group; bool errored; bool needs_auxtrace_mmap; + bool default_metricgroup; /* A member of the Default metricgroup */ struct hashmap *per_pkg_mask; int err; struct { diff --git a/tools/perf/util/stat-display.c b/tools/perf/util/stat-display.c index a2bbdc25d979..7329b3340f88 100644 --- a/tools/perf/util/stat-display.c +++ b/tools/perf/util/stat-display.c @@ -25,6 +25,7 @@ #define CNTR_NOT_SUPPORTED "" #define CNTR_NOT_COUNTED "" +#define MGROUP_LEN 50 #define METRIC_LEN 38 #define EVNAME_LEN 32 #define COUNTS_LEN 18 @@ -364,16 +365,27 @@ static void new_line_std(struct perf_stat_config *config __maybe_unused, os->newline = true; } -static void do_new_line_std(struct perf_stat_config *config, - struct outstate *os) +static inline void __new_line_std_csv(struct perf_stat_config *config, + struct outstate *os) { fputc('\n', os->fh); if (os->prefix) fputs(os->prefix, os->fh); aggr_printout(config, os->evsel, os->id, os->aggr_nr); +} + +static inline void __new_line_std(struct outstate *os) +{ + fprintf(os->fh, " "); +} + +static void do_new_line_std(struct perf_stat_config *config, + struct outstate *os) +{ + __new_line_std_csv(config, os); if (config->aggr_mode == AGGR_NONE) fprintf(os->fh, " "); - fprintf(os->fh, " "); + __new_line_std(os); } static void print_metric_std(struct perf_stat_config *config, @@ -408,10 +420,7 @@ static void new_line_csv(struct perf_stat_config *config, void *ctx) struct outstate *os = ctx; int i; - fputc('\n', os->fh); - if (os->prefix) - fprintf(os->fh, "%s", os->prefix); - aggr_printout(config, os->evsel, os->id, os->aggr_nr); + __new_line_std_csv(config, os); for (i = 0; i < os->nfields; i++) fputs(config->csv_sep, os->fh); } @@ -462,6 +471,54 @@ static void new_line_json(struct perf_stat_config *config, void *ctx) aggr_printout(config, os->evsel, os->id, os->aggr_nr); } +static void print_metricgroup_header_json(struct perf_stat_config *config, + void *ctx, + const char *metricgroup_name) +{ + if (!metricgroup_name) + return; + + fprintf(config->output, "\"metricgroup\" : \"%s\"}", metricgroup_name); + new_line_json(config, ctx); +} + +static void print_metricgroup_header_csv(struct perf_stat_config *config, + void *ctx, + const char *metricgroup_name) +{ + struct outstate *os = ctx; + int i; + + if (!metricgroup_name) { + /* Leave space for running and enabling */ + for (i = 0; i < os->nfields - 2; i++) + fputs(config->csv_sep, os->fh); + return; + } + + for (i = 0; i < os->nfields; i++) + fputs(config->csv_sep, os->fh); + fprintf(config->output, "%s", metricgroup_name); + new_line_csv(config, ctx); +} + +static void print_metricgroup_header_std(struct perf_stat_config *config, + void *ctx, + const char *metricgroup_name) +{ + struct outstate *os = ctx; + int n; + + if (!metricgroup_name) { + __new_line_std(os); + return; + } + + n = fprintf(config->output, " %*s", EVNAME_LEN, metricgroup_name); + + fprintf(config->output, "%*s", MGROUP_LEN - n - 1, ""); +} + /* Filter out some columns that don't work well in metrics only mode */ static bool valid_only_metric(const char *unit) @@ -713,19 +770,23 @@ static void printout(struct perf_stat_config *config, struct outstate *os, struct perf_stat_output_ctx out; print_metric_t pm; new_line_t nl; + print_metricgroup_header_t pmh; bool ok = true; struct evsel *counter = os->evsel; if (config->csv_output) { pm = config->metric_only ? print_metric_only_csv : print_metric_csv; nl = config->metric_only ? new_line_metric : new_line_csv; + pmh = print_metricgroup_header_csv; os->nfields = 4 + (counter->cgrp ? 1 : 0); } else if (config->json_output) { pm = config->metric_only ? print_metric_only_json : print_metric_json; nl = config->metric_only ? new_line_metric : new_line_json; + pmh = print_metricgroup_header_json; } else { pm = config->metric_only ? print_metric_only : print_metric_std; nl = config->metric_only ? new_line_metric : new_line_std; + pmh = print_metricgroup_header_std; } if (run == 0 || ena == 0 || counter->counts->scaled == -1) { @@ -747,10 +808,11 @@ static void printout(struct perf_stat_config *config, struct outstate *os, out.print_metric = pm; out.new_line = nl; + out.print_metricgroup_header = pmh; out.ctx = os; out.force_header = false; - if (!config->metric_only) { + if (!config->metric_only && !counter->default_metricgroup) { abs_printout(config, os->id, os->aggr_nr, counter, uval, ok); print_noise(config, counter, noise, /*before_metric=*/true); @@ -758,8 +820,31 @@ static void printout(struct perf_stat_config *config, struct outstate *os, } if (ok) { - perf_stat__print_shadow_stats(config, counter, uval, aggr_idx, - &out, &config->metric_events); + if (!config->metric_only && counter->default_metricgroup) { + void *from = NULL; + + aggr_printout(config, os->evsel, os->id, os->aggr_nr); + /* Print out all the metricgroup with the same metric event. */ + do { + int num = 0; + + /* Print out the new line for the next new metricgroup. */ + if (from) { + if (config->json_output) + new_line_json(config, (void *)os); + else + __new_line_std_csv(config, os); + } + + print_noise(config, counter, noise, /*before_metric=*/true); + print_running(config, run, ena, /*before_metric=*/true); + from = perf_stat__print_shadow_stats_metricgroup(config, counter, aggr_idx, + &num, from, &out, + &config->metric_events); + } while (from != NULL); + } else + perf_stat__print_shadow_stats(config, counter, uval, aggr_idx, + &out, &config->metric_events); } else { pm(config, os, /*color=*/NULL, /*format=*/NULL, /*unit=*/"", /*val=*/0); } @@ -889,6 +974,9 @@ static void print_counter_aggrdata(struct perf_stat_config *config, ena = aggr->counts.ena; run = aggr->counts.run; + if (perf_stat__skip_metric_event(counter, &config->metric_events, ena, run)) + return; + if (val == 0 && should_skip_zero_counter(config, counter, &id)) return; diff --git a/tools/perf/util/stat-shadow.c b/tools/perf/util/stat-shadow.c index 1566a206ba42..b25974670d30 100644 --- a/tools/perf/util/stat-shadow.c +++ b/tools/perf/util/stat-shadow.c @@ -539,6 +539,83 @@ double test_generic_metric(struct metric_expr *mexp, int aggr_idx) return ratio; } +/** + * perf_stat__print_shadow_stats_metricgroup - Print out metrics associated with the evsel + * For the non-default, all metrics associated + * with the evsel are printed. + * For the default mode, only the metrics from + * the same metricgroup and the name of the + * metricgroup are printed. To print the metrics + * from the next metricgroup (if available), + * invoke the function with correspoinding + * metric_expr. + */ +void *perf_stat__print_shadow_stats_metricgroup(struct perf_stat_config *config, + struct evsel *evsel, + int aggr_idx, + int *num, + void *from, + struct perf_stat_output_ctx *out, + struct rblist *metric_events) +{ + struct metric_event *me; + struct metric_expr *mexp = from; + void *ctxp = out->ctx; + bool header_printed = false; + const char *name = NULL; + static const char *last_name; + + me = metricgroup__lookup(metric_events, evsel, false); + if (me == NULL) + return NULL; + + if (!mexp) + mexp = list_first_entry(&me->head, typeof(*mexp), nd); + + list_for_each_entry_from(mexp, &me->head, nd) { + /* Print the display name of the Default metricgroup */ + if (me->is_default) { + if (!name) + name = mexp->default_metricgroup_name; + /* + * Two or more metricgroup may share the same metric + * event, e.g., TopdownL1 and TopdownL2 on SPR. + * Return and print the prefix, e.g., noise, running + * for the next metricgroup. + */ + if (strcmp(name, mexp->default_metricgroup_name)) + return (void *)mexp; + /* Only print the name of the metricgroup once */ + if (!header_printed) { + header_printed = true; + if (!last_name || strcmp(last_name, name)) { + /* Print out the name for the new metricgroup. */ + out->print_metricgroup_header(config, ctxp, name); + last_name = name; + } else if (!strcmp(last_name, name)) { + /* + * A metricgroup may have several metric events, + * e.g.,TopdownL1 on e-core of ADL. + * The name has been output by the first metric + * event. Only align with other metics from + * different metric events. + */ + out->print_metricgroup_header(config, ctxp, NULL); + } + } + } + + if ((*num)++ > 0) + out->new_line(config, ctxp); + generic_metric(config, mexp->metric_expr, mexp->metric_threshold, + mexp->metric_events, mexp->metric_refs, evsel->name, + mexp->metric_name, mexp->metric_unit, mexp->runtime, + aggr_idx, out); + } + + return NULL; +} + void perf_stat__print_shadow_stats(struct perf_stat_config *config, struct evsel *evsel, double avg, int aggr_idx, @@ -565,7 +642,6 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, }; print_metric_t print_metric = out->print_metric; void *ctxp = out->ctx; - struct metric_event *me; int num = 1; if (config->iostat_run) { @@ -592,18 +668,26 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, } } - if ((me = metricgroup__lookup(metric_events, evsel, false)) != NULL) { - struct metric_expr *mexp; + perf_stat__print_shadow_stats_metricgroup(config, evsel, aggr_idx, + &num, NULL, out, metric_events); - list_for_each_entry (mexp, &me->head, nd) { - if (num++ > 0) - out->new_line(config, ctxp); - generic_metric(config, mexp->metric_expr, mexp->metric_threshold, - mexp->metric_events, mexp->metric_refs, evsel->name, - mexp->metric_name, mexp->metric_unit, mexp->runtime, - aggr_idx, out); - } - } if (num == 0) print_metric(config, ctxp, NULL, NULL, NULL, 0); } + +/** + * perf_stat__skip_metric_event - Skip the evsel in the Default metricgroup, + * if it's not running or not the metric event. + */ +bool perf_stat__skip_metric_event(struct evsel *evsel, + struct rblist *metric_events, + u64 ena, u64 run) +{ + if (!evsel->default_metricgroup) + return false; + + if (!ena || !run) + return true; + + return !metricgroup__lookup(metric_events, evsel, false); +} diff --git a/tools/perf/util/stat.h b/tools/perf/util/stat.h index 7abff7cbb5a1..934f79778cea 100644 --- a/tools/perf/util/stat.h +++ b/tools/perf/util/stat.h @@ -158,11 +158,16 @@ typedef void (*print_metric_t)(struct perf_stat_config *config, const char *fmt, double val); typedef void (*new_line_t)(struct perf_stat_config *config, void *ctx); +/* Used to print the display name of the Default metricgroup for now. */ +typedef void (*print_metricgroup_header_t)(struct perf_stat_config *config, + void *ctx, const char *metricgroup_name); + void perf_stat__reset_shadow_stats(void); struct perf_stat_output_ctx { void *ctx; print_metric_t print_metric; new_line_t new_line; + print_metricgroup_header_t print_metricgroup_header; bool force_header; }; @@ -171,6 +176,16 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, double avg, int aggr_idx, struct perf_stat_output_ctx *out, struct rblist *metric_events); +bool perf_stat__skip_metric_event(struct evsel *evsel, + struct rblist *metric_events, + u64 ena, u64 run); +void *perf_stat__print_shadow_stats_metricgroup(struct perf_stat_config *config, + struct evsel *evsel, + int aggr_idx, + int *num, + void *from, + struct perf_stat_output_ctx *out, + struct rblist *metric_events); int evlist__alloc_stats(struct perf_stat_config *config, struct evlist *evlist, bool alloc_raw); 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id l190-20020a6388c7000000b0054ff0a52bbesi1734221pgd.507.2023.06.15.07.04.18; Thu, 15 Jun 2023 07:04:48 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=ADYGDOf3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344104AbjFONze (ORCPT + 99 others); Thu, 15 Jun 2023 09:55:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59550 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344469AbjFONyn (ORCPT ); Thu, 15 Jun 2023 09:54:43 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9DC4A1FD5; Thu, 15 Jun 2023 06:54:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686837282; x=1718373282; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jazqzmxuygKHAVF1T3XyECyr+VZwL4+XwB2HASyrSgQ=; b=ADYGDOf3H+cdA92Ar+vhVwGS/K3msFYJKp68j/WHgNmfJbozrTlpdaxi wxKvXdT3ZZOw8COcUajuHlZnRaUpWTvoSVFgzeuBZhTzWu2HwCCNw5sy6 E7tIcw1Us2EXpNqAsVekoZfOVt/ky5LW1YRaAbURapoGZ6sqrwdk6K9Q8 VE+H4LQkqX/Fv1x294Pq8bi8llBWRLArLXHz60DwScbo3F51wG+DNeA6M nYYSZOGRyawnb5kE3Zij8k55VPQtU2dad5GumZbR3I3nlVey3zKsRBBDK gPKH4eBSv/YrBdifmII6piqGgw9xsuSNPpCcKbd9aGtBXHORXgRGVMLE2 g==; X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="356411418" X-IronPort-AV: E=Sophos;i="6.00,245,1681196400"; d="scan'208";a="356411418" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2023 06:54:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="782527066" X-IronPort-AV: E=Sophos;i="6.00,245,1681196400"; d="scan'208";a="782527066" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga004.fm.intel.com with ESMTP; 15 Jun 2023 06:54:40 -0700 From: kan.liang@linux.intel.com To: acme@kernel.org, mingo@redhat.com, peterz@infradead.org, irogers@google.com, namhyung@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org Cc: ak@linux.intel.com, eranian@google.com, ahmad.yasin@intel.com, Kan Liang Subject: [PATCH V3 6/8] pert tests: Update metric-value for perf stat JSON output Date: Thu, 15 Jun 2023 06:53:13 -0700 Message-Id: <20230615135315.3662428-7-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230615135315.3662428-1-kan.liang@linux.intel.com> References: <20230615135315.3662428-1-kan.liang@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768777725828253434?= X-GMAIL-MSGID: =?utf-8?q?1768777725828253434?= From: Kan Liang There may be multiplexing triggered, e.g., e-core of ADL. Reviewed-by: Ian Rogers Signed-off-by: Kan Liang --- tools/perf/tests/shell/lib/perf_json_output_lint.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tools/perf/tests/shell/lib/perf_json_output_lint.py b/tools/perf/tests/shell/lib/perf_json_output_lint.py index 5e9bd68c83fe..ea55d5ea1ced 100644 --- a/tools/perf/tests/shell/lib/perf_json_output_lint.py +++ b/tools/perf/tests/shell/lib/perf_json_output_lint.py @@ -66,10 +66,10 @@ def check_json_output(expected_items): for item in json.loads(input): if expected_items != -1: count = len(item) - if count != expected_items and count >= 1 and count <= 4 and 'metric-value' in item: + if count != expected_items and count >= 1 and count <= 6 and 'metric-value' in item: # Events that generate >1 metric may have isolated metric - # values and possibly other prefixes like interval, core and - # aggregate-number. + # values and possibly other prefixes like interval, core, + # aggregate-number, or event-runtime/pcnt-running from multiplexing. pass elif count != expected_items and count >= 1 and count <= 5 and 'metricgroup' in item: pass From patchwork Thu Jun 15 13:53:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liang, Kan" X-Patchwork-Id: 108557 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp679562vqr; Thu, 15 Jun 2023 07:31:07 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ54C7QZ62XZ46sErULu4BQJwGYBDovjMLBFt8qD0kcxskBbruOI2zu4RjefgU8IilPfAjdd X-Received: by 2002:a19:791e:0:b0:4f6:29b3:8df3 with SMTP id u30-20020a19791e000000b004f629b38df3mr10347172lfc.20.1686839467370; Thu, 15 Jun 2023 07:31:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686839467; cv=none; d=google.com; s=arc-20160816; b=Lgeav+aBvnRHO3RQPCeE7Bp/i7swO1tcOVb/oKtvnSLoc6cQCPz9bq4r+epx74AYtH GErOXe2EKbIxWKmKzf4wyrStYQ92hZFS+VlqDzL7vBnc8NoKi7tScwIUfLhdndE8mipk bnOiqiP9hFWlyytBJMv+BvNGi2XvlaiVEgEAnW0lF5LliC3wpFh74g7hep5Foos7N9hh PHSMjjrQ66Xeh0fYojj5dar6LIiEHn5LUTspW0Qi/HIOimdZTNB082fEVnNCkrb9TggD +zTVqOBf6LP3pwbrIMfLOtt3rsffHT9kixpnm/tn6PEbhXP5a2wTLTY1h9D7dARqfPeq 03gg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=rqxrLBZ6muGzKKitmUK3tGgIHMxXNoMV5za8L12KQ3Q=; b=dZ1WUgJ4mmWgOOo16mGrNPZeWMJs39fMZmu9YT2+0g+Vnc2KmoQD1eBsIAjqI8pvSB PTGiz/I/ZA6yzD7o/4VJPnks3+Usg32idLE3TVRkMKpd0/mJ3PlZoTxC475NhoPULn+o 0EbLughyAfoue/S/8eDNM1cv0KHS0QjSE8+kGh4zNX09o2b0IytaoGz1qIpM2GIukZUM 2hTNV7xjwW2+pAcjO4C9XsJXWB69mhhZ3+J9PiU0WzqtfYSaaFLyB0h/bUFMeC7pYpVj xddBMhwEcLU5pxRVeRMu1zSNAjgIcHi55Czk7vf+V7Uef1edGrv/3Kf8JjHw7M40CR2b 8onw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=NdukM1rX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v19-20020a170906181300b0097890115891si9969732eje.957.2023.06.15.07.30.35; Thu, 15 Jun 2023 07:31:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=NdukM1rX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344764AbjFONzv (ORCPT + 99 others); Thu, 15 Jun 2023 09:55:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59580 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344642AbjFONyq (ORCPT ); Thu, 15 Jun 2023 09:54:46 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 84ED71FF9; Thu, 15 Jun 2023 06:54:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686837283; x=1718373283; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EOzWNHuA05l8t1lT/on7ueUWwrY92i0s8PwEvMAtVIs=; b=NdukM1rXor77HpTTjpygOYIUTPmRhCQweDW3vN7WlyDVGaofLoL0+yLe ItzRyBri1+qyZS4GKtCKPjzLtqWnkCr3Tb2V1g/ZJ7Un0qV+f1+jH4fCR XOJ6OlMwjhp/SYg2t7iD6okBzKeNx11uugnj2iqSm3ZdJa7Fm97xcORzH ITTG2EkDG/U7yY/LKLVDGVUAp0mCGAvSjqzjpHivvtFxeLYnnWWsvOMjw 8nMEexylfB4vRMWUpZgSbYCaWh0jyXj9I363sp82LeRMsrnvZ1P/8tREH 955+0AgrCpDYGBYqJ35PCrQEN/cjP6Yzy+tKVq1/B1AHJR3MxXreVqd5k A==; X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="356411424" X-IronPort-AV: E=Sophos;i="6.00,245,1681196400"; d="scan'208";a="356411424" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2023 06:54:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="782527069" X-IronPort-AV: E=Sophos;i="6.00,245,1681196400"; d="scan'208";a="782527069" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga004.fm.intel.com with ESMTP; 15 Jun 2023 06:54:41 -0700 From: kan.liang@linux.intel.com To: acme@kernel.org, mingo@redhat.com, peterz@infradead.org, irogers@google.com, namhyung@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org Cc: ak@linux.intel.com, eranian@google.com, ahmad.yasin@intel.com, Kan Liang Subject: [PATCH V3 7/8] perf test: Move all the check functions of stat csv output to lib Date: Thu, 15 Jun 2023 06:53:14 -0700 Message-Id: <20230615135315.3662428-8-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230615135315.3662428-1-kan.liang@linux.intel.com> References: <20230615135315.3662428-1-kan.liang@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768779381202751870?= X-GMAIL-MSGID: =?utf-8?q?1768779381202751870?= From: Kan Liang These functions can be shared with the stat std output test. There is no functional change. Reviewed-by: Ian Rogers Signed-off-by: Kan Liang --- tools/perf/tests/shell/lib/stat_output.sh | 169 +++++++++++++++++++ tools/perf/tests/shell/stat+csv_output.sh | 188 ++-------------------- 2 files changed, 184 insertions(+), 173 deletions(-) create mode 100755 tools/perf/tests/shell/lib/stat_output.sh diff --git a/tools/perf/tests/shell/lib/stat_output.sh b/tools/perf/tests/shell/lib/stat_output.sh new file mode 100755 index 000000000000..363979b1123d --- /dev/null +++ b/tools/perf/tests/shell/lib/stat_output.sh @@ -0,0 +1,169 @@ +# SPDX-License-Identifier: GPL-2.0 + +# Return true if perf_event_paranoid is > $1 and not running as root. +function ParanoidAndNotRoot() +{ + [ "$(id -u)" != 0 ] && [ "$(cat /proc/sys/kernel/perf_event_paranoid)" -gt $1 ] +} + +# $1 name $2 extra_opt +check_no_args() +{ + echo -n "Checking $1 output: no args" + perf stat $2 true + commachecker --no-args + echo "[Success]" +} + +check_system_wide() +{ + echo -n "Checking $1 output: system wide " + if ParanoidAndNotRoot 0 + then + echo "[Skip] paranoid and not root" + return + fi + perf stat -a $2 true + commachecker --system-wide + echo "[Success]" +} + +check_system_wide_no_aggr() +{ + echo -n "Checking $1 output: system wide no aggregation " + if ParanoidAndNotRoot 0 + then + echo "[Skip] paranoid and not root" + return + fi + perf stat -A -a --no-merge $2 true + commachecker --system-wide-no-aggr + echo "[Success]" +} + +check_interval() +{ + echo -n "Checking $1 output: interval " + perf stat -I 1000 $2 true + commachecker --interval + echo "[Success]" +} + +check_event() +{ + echo -n "Checking $1 output: event " + perf stat -e cpu-clock $2 true + commachecker --event + echo "[Success]" +} + +check_per_core() +{ + echo -n "Checking $1 output: per core " + if ParanoidAndNotRoot 0 + then + echo "[Skip] paranoid and not root" + return + fi + perf stat --per-core -a $2 true + commachecker --per-core + echo "[Success]" +} + +check_per_thread() +{ + echo -n "Checking $1 output: per thread " + if ParanoidAndNotRoot 0 + then + echo "[Skip] paranoid and not root" + return + fi + perf stat --per-thread -a $2 true + commachecker --per-thread + echo "[Success]" +} + +check_per_cache_instance() +{ + echo -n "Checking $1 output: per cache instance " + if ParanoidAndNotRoot 0 + then + echo "[Skip] paranoid and not root" + return + fi + perf stat --per-cache -a $2 true + commachecker --per-cache + echo "[Success]" +} + +check_per_die() +{ + echo -n "Checking $1 output: per die " + if ParanoidAndNotRoot 0 + then + echo "[Skip] paranoid and not root" + return + fi + perf stat --per-die -a $2 true + commachecker --per-die + echo "[Success]" +} + +check_per_node() +{ + echo -n "Checking $1 output: per node " + if ParanoidAndNotRoot 0 + then + echo "[Skip] paranoid and not root" + return + fi + perf stat --per-node -a $2 true + commachecker --per-node + echo "[Success]" +} + +check_per_socket() +{ + echo -n "Checking $1 output: per socket " + if ParanoidAndNotRoot 0 + then + echo "[Skip] paranoid and not root" + return + fi + perf stat --per-socket -a $2 true + commachecker --per-socket + echo "[Success]" +} + +# The perf stat options for per-socket, per-core, per-die +# and -A ( no_aggr mode ) uses the info fetched from this +# directory: "/sys/devices/system/cpu/cpu*/topology". For +# example, socket value is fetched from "physical_package_id" +# file in topology directory. +# Reference: cpu__get_topology_int in util/cpumap.c +# If the platform doesn't expose topology information, values +# will be set to -1. For example, incase of pSeries platform +# of powerpc, value for "physical_package_id" is restricted +# and set to -1. Check here validates the socket-id read from +# topology file before proceeding further + +FILE_LOC="/sys/devices/system/cpu/cpu*/topology/" +FILE_NAME="physical_package_id" + +function check_for_topology() +{ + if ! ParanoidAndNotRoot 0 + then + socket_file=`ls $FILE_LOC/$FILE_NAME | head -n 1` + [ -z $socket_file ] && { + echo 0 + return + } + socket_id=`cat $socket_file` + [ $socket_id == -1 ] && { + echo 1 + return + } + fi + echo 0 +} diff --git a/tools/perf/tests/shell/stat+csv_output.sh b/tools/perf/tests/shell/stat+csv_output.sh index ed082daf839c..34a0701fee05 100755 --- a/tools/perf/tests/shell/stat+csv_output.sh +++ b/tools/perf/tests/shell/stat+csv_output.sh @@ -6,7 +6,8 @@ set -e -skip_test=0 +. $(dirname $0)/lib/stat_output.sh + csv_sep=@ stat_output=$(mktemp /tmp/__perf_test.stat_output.csv.XXXXX) @@ -63,181 +64,22 @@ function commachecker() return 0 } -# Return true if perf_event_paranoid is > $1 and not running as root. -function ParanoidAndNotRoot() -{ - [ "$(id -u)" != 0 ] && [ "$(cat /proc/sys/kernel/perf_event_paranoid)" -gt $1 ] -} - -check_no_args() -{ - echo -n "Checking CSV output: no args " - perf stat -x$csv_sep -o "${stat_output}" true - commachecker --no-args - echo "[Success]" -} - -check_system_wide() -{ - echo -n "Checking CSV output: system wide " - if ParanoidAndNotRoot 0 - then - echo "[Skip] paranoid and not root" - return - fi - perf stat -x$csv_sep -a -o "${stat_output}" true - commachecker --system-wide - echo "[Success]" -} - -check_system_wide_no_aggr() -{ - echo -n "Checking CSV output: system wide no aggregation " - if ParanoidAndNotRoot 0 - then - echo "[Skip] paranoid and not root" - return - fi - perf stat -x$csv_sep -A -a --no-merge -o "${stat_output}" true - commachecker --system-wide-no-aggr - echo "[Success]" -} - -check_interval() -{ - echo -n "Checking CSV output: interval " - perf stat -x$csv_sep -I 1000 -o "${stat_output}" true - commachecker --interval - echo "[Success]" -} - - -check_event() -{ - echo -n "Checking CSV output: event " - perf stat -x$csv_sep -e cpu-clock -o "${stat_output}" true - commachecker --event - echo "[Success]" -} - -check_per_core() -{ - echo -n "Checking CSV output: per core " - if ParanoidAndNotRoot 0 - then - echo "[Skip] paranoid and not root" - return - fi - perf stat -x$csv_sep --per-core -a -o "${stat_output}" true - commachecker --per-core - echo "[Success]" -} - -check_per_thread() -{ - echo -n "Checking CSV output: per thread " - if ParanoidAndNotRoot 0 - then - echo "[Skip] paranoid and not root" - return - fi - perf stat -x$csv_sep --per-thread -a -o "${stat_output}" true - commachecker --per-thread - echo "[Success]" -} - -check_per_cache_instance() -{ - echo -n "Checking CSV output: per cache instance " - if ParanoidAndNotRoot 0 - then - echo "[Skip] paranoid and not root" - return - fi - perf stat -x$csv_sep --per-cache -a true 2>&1 | commachecker --per-cache - echo "[Success]" -} - -check_per_die() -{ - echo -n "Checking CSV output: per die " - if ParanoidAndNotRoot 0 - then - echo "[Skip] paranoid and not root" - return - fi - perf stat -x$csv_sep --per-die -a -o "${stat_output}" true - commachecker --per-die - echo "[Success]" -} - -check_per_node() -{ - echo -n "Checking CSV output: per node " - if ParanoidAndNotRoot 0 - then - echo "[Skip] paranoid and not root" - return - fi - perf stat -x$csv_sep --per-node -a -o "${stat_output}" true - commachecker --per-node - echo "[Success]" -} - -check_per_socket() -{ - echo -n "Checking CSV output: per socket " - if ParanoidAndNotRoot 0 - then - echo "[Skip] paranoid and not root" - return - fi - perf stat -x$csv_sep --per-socket -a -o "${stat_output}" true - commachecker --per-socket - echo "[Success]" -} - -# The perf stat options for per-socket, per-core, per-die -# and -A ( no_aggr mode ) uses the info fetched from this -# directory: "/sys/devices/system/cpu/cpu*/topology". For -# example, socket value is fetched from "physical_package_id" -# file in topology directory. -# Reference: cpu__get_topology_int in util/cpumap.c -# If the platform doesn't expose topology information, values -# will be set to -1. For example, incase of pSeries platform -# of powerpc, value for "physical_package_id" is restricted -# and set to -1. Check here validates the socket-id read from -# topology file before proceeding further - -FILE_LOC="/sys/devices/system/cpu/cpu*/topology/" -FILE_NAME="physical_package_id" - -check_for_topology() -{ - if ! ParanoidAndNotRoot 0 - then - socket_file=`ls $FILE_LOC/$FILE_NAME | head -n 1` - [ -z $socket_file ] && return 0 - socket_id=`cat $socket_file` - [ $socket_id == -1 ] && skip_test=1 - return 0 - fi -} +perf_cmd="-x$csv_sep -o ${stat_output}" -check_for_topology -check_no_args -check_system_wide -check_interval -check_event -check_per_thread -check_per_node +skip_test=$(check_for_topology) +check_no_args "CSV" "$perf_cmd" +check_system_wide "CSV" "$perf_cmd" +check_interval "CSV" "$perf_cmd" +check_event "CSV" "$perf_cmd" +check_per_thread "CSV" "$perf_cmd" +check_per_node "CSV" "$perf_cmd" if [ $skip_test -ne 1 ] then - check_system_wide_no_aggr - check_per_core - check_per_cache_instance - check_per_die - check_per_socket + check_system_wide_no_aggr "CSV" "$perf_cmd" + check_per_core "CSV" "$perf_cmd" + check_per_cache_instance "CSV" "$perf_cmd" + check_per_die "CSV" "$perf_cmd" + check_per_socket "CSV" "$perf_cmd" else echo "[Skip] Skipping tests for system_wide_no_aggr, per_core, per_die and per_socket since socket id exposed via topology is invalid" fi From patchwork Thu Jun 15 13:53:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liang, Kan" X-Patchwork-Id: 108543 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp661253vqr; Thu, 15 Jun 2023 07:06:47 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4d4ssEdOXnBPKB3P/SCUDv+/X3UiFGRdwE2plGt8voAeI9HI4WF0BA6QqB6A96jqHf0lQY X-Received: by 2002:a05:6a20:918b:b0:114:6993:5a3b with SMTP id v11-20020a056a20918b00b0011469935a3bmr5084913pzd.13.1686838006808; Thu, 15 Jun 2023 07:06:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686838006; cv=none; d=google.com; s=arc-20160816; b=E/tgtPZpdokA5oGNeuVADK0AggrQotRbwxwdFdqanjfTGj9uIBxY96h92iEiDGyLb1 cCNIcgYvxQPWzVqEhbcS5UAWaKtWfEEZJKVqVFngYblq87wmYQIwzzL4YDYqtkFIqnwq nFlax/UVBNzodRY0NsShzB65o3ewEq8uAa08Vz3SyLRG13p20Q9LjbYhQtaGpiLNX3Sx 20CYic9MRLgqkpp5ZMKg2mTMAyOCsURvuOUJESl4XxnK4nZhKyQp54ZlD/xWHYOw50Mj gv7QhCS1eADLUNKuoAFqluTWszm6sM5Us3umCbpXxBjB9tPlwzCgQ7V3HAnHB31kdK3Y +hVg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ubz07SOSkkzofbiJoIJWpXmdasgLMbIvd37LN1Yd5Tw=; b=uSAZXILcjb8ClGwN/0Mj5V/CfDGm6BlMZ35LaNP0S0o1WcGHW6TAS6O+wB9AL/+hIt I53lp/njjbdgBYQPT4RbGs3YchlC/2c3ulTcJQ9RpkCggDcyCfZTy6soFH1HuJm95WD/ o5oaZhhQ5XxrKAizx80eoaWomoG6ohCgDxcxsJGPviRLbRsWwOPAJdlHsYNfmH/IwPh/ kV9ihDMJpx1qi1DS8U8/rtwEuBJZnPRUkgUptHoqSRncXHQRvV03+sMZiJUV4QdCODL4 /DWrvYBrRLaxPVSnTiPFRNjHmqwepLV44pz70hqzS82OQg4RIercfO160+UP2npJ3zQD kOcg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=kmXuT3uj; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id l190-20020a6388c7000000b0054ff0a52bbesi1734221pgd.507.2023.06.15.07.06.17; Thu, 15 Jun 2023 07:06:46 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=kmXuT3uj; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344753AbjFONzr (ORCPT + 99 others); Thu, 15 Jun 2023 09:55:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59582 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344641AbjFONyq (ORCPT ); Thu, 15 Jun 2023 09:54:46 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4AD0D1FD4; Thu, 15 Jun 2023 06:54:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686837284; x=1718373284; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=815xhyqBJVkUcTa8Wnb+dhIrshSrEjCMA06FFhOLA18=; b=kmXuT3ujwTcmvUdRvX4h+dVAgbOY5t3ACG20eWo3smlgfNTBOpBHQMZD 2D9XqijUdcNJEgBSMCa4g+A0Fy+T8Zb1sTJ84Nj/H0BD4cXmFxfB1BwpK f+LldfKonXADpSibh/lksv2p27AhHUP6yz7+VoDvkodfHvd2RSOU9wRtr 1Gl/Bv2PvpOl+5dyelAqVgPaiD2MltHgZOjc22paFZhmozAvqypB2AHf+ phgksY9Xph7ZduabuvhKgSg/REkX2uXDjplYFJhltBMJsGSwf1gUVF1ZD uQRM/lvflUoptMfwLVriqw8Bp5MELRh8Gtaf5F2+z+DcHQg9ALRr6zwZa Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="356411436" X-IronPort-AV: E=Sophos;i="6.00,245,1681196400"; d="scan'208";a="356411436" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2023 06:54:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="782527077" X-IronPort-AV: E=Sophos;i="6.00,245,1681196400"; d="scan'208";a="782527077" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga004.fm.intel.com with ESMTP; 15 Jun 2023 06:54:42 -0700 From: kan.liang@linux.intel.com To: acme@kernel.org, mingo@redhat.com, peterz@infradead.org, irogers@google.com, namhyung@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org Cc: ak@linux.intel.com, eranian@google.com, ahmad.yasin@intel.com, Kan Liang Subject: [PATCH V3 8/8] perf test: Add test case for the standard perf stat output Date: Thu, 15 Jun 2023 06:53:15 -0700 Message-Id: <20230615135315.3662428-9-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230615135315.3662428-1-kan.liang@linux.intel.com> References: <20230615135315.3662428-1-kan.liang@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768777849933060823?= X-GMAIL-MSGID: =?utf-8?q?1768777849933060823?= From: Kan Liang Add a new test case to verify the standard perf stat output with different options. Reviewed-by: Ian Rogers Signed-off-by: Kan Liang --- tools/perf/tests/shell/stat+std_output.sh | 108 ++++++++++++++++++++++ 1 file changed, 108 insertions(+) create mode 100755 tools/perf/tests/shell/stat+std_output.sh diff --git a/tools/perf/tests/shell/stat+std_output.sh b/tools/perf/tests/shell/stat+std_output.sh new file mode 100755 index 000000000000..98cc3356a04a --- /dev/null +++ b/tools/perf/tests/shell/stat+std_output.sh @@ -0,0 +1,108 @@ +#!/bin/bash +# perf stat STD output linter +# SPDX-License-Identifier: GPL-2.0 +# Tests various perf stat STD output commands for +# default event and metricgroup + +set -e + +. $(dirname $0)/lib/stat_output.sh + +stat_output=$(mktemp /tmp/__perf_test.stat_output.std.XXXXX) + +event_name=(cpu-clock task-clock context-switches cpu-migrations page-faults cycles instructions branches branch-misses stalled-cycles-frontend stalled-cycles-backend) +event_metric=("CPUs utilized" "CPUs utilized" "/sec" "/sec" "/sec" "GHz" "insn per cycle" "/sec" "of all branches" "frontend cycles idle" "backend cycles idle") + +metricgroup_name=(TopdownL1 TopdownL2) + +cleanup() { + rm -f "${stat_output}" + + trap - EXIT TERM INT +} + +trap_cleanup() { + cleanup + exit 1 +} +trap trap_cleanup EXIT TERM INT + +function commachecker() +{ + local -i cnt=0 + local prefix=1 + + case "$1" + in "--interval") prefix=2 + ;; "--per-thread") prefix=2 + ;; "--system-wide-no-aggr") prefix=2 + ;; "--per-core") prefix=3 + ;; "--per-socket") prefix=3 + ;; "--per-node") prefix=3 + ;; "--per-die") prefix=3 + ;; "--per-cache") prefix=3 + esac + + while read line + do + # Ignore initial "started on" comment. + x=${line:0:1} + [ "$x" = "#" ] && continue + # Ignore initial blank line. + [ "$line" = "" ] && continue + # Ignore "Performance counter stats" + x=${line:0:25} + [ "$x" = "Performance counter stats" ] && continue + # Ignore "seconds time elapsed" and break + [[ "$line" == *"time elapsed"* ]] && break + + main_body=$(echo $line | cut -d' ' -f$prefix-) + x=${main_body%#*} + # Check default metricgroup + y=$(echo $x | tr -d ' ') + [ "$y" = "" ] && continue + for i in "${!metricgroup_name[@]}"; do + [[ "$y" == *"${metricgroup_name[$i]}"* ]] && break + done + [[ "$y" == *"${metricgroup_name[$i]}"* ]] && continue + + # Check default event + for i in "${!event_name[@]}"; do + [[ "$x" == *"${event_name[$i]}"* ]] && break + done + + [[ ! "$x" == *"${event_name[$i]}"* ]] && { + echo "Unknown event name in $line" 1>&2 + exit 1; + } + + # Check event metric if it exists + [[ ! "$main_body" == *"#"* ]] && continue + [[ ! "$main_body" == *"${event_metric[$i]}"* ]] && { + echo "wrong event metric. expected ${event_metric[$i]} in $line" 1>&2 + exit 1; + } + done < "${stat_output}" + return 0 +} + +perf_cmd="-o ${stat_output}" + +skip_test=$(check_for_topology) +check_no_args "STD" "$perf_cmd" +check_system_wide "STD" "$perf_cmd" +check_interval "STD" "$perf_cmd" +check_per_thread "STD" "$perf_cmd" +check_per_node "STD" "$perf_cmd" +if [ $skip_test -ne 1 ] +then + check_system_wide_no_aggr "STD" "$perf_cmd" + check_per_core "STD" "$perf_cmd" + check_per_cache_instance "STD" "$perf_cmd" + check_per_die "STD" "$perf_cmd" + check_per_socket "STD" "$perf_cmd" +else + echo "[Skip] Skipping tests for system_wide_no_aggr, per_core, per_die and per_socket since socket id exposed via topology is invalid" +fi +cleanup +exit 0