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[2620:137:e000::1:20]) by mx.google.com with ESMTP id n23-20020aa7c457000000b0050bc6b7830fsi8500317edr.306.2023.06.14.10.48.30; Wed, 14 Jun 2023 10:48:55 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237237AbjFNRhJ (ORCPT + 99 others); Wed, 14 Jun 2023 13:37:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52510 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230388AbjFNRhD (ORCPT ); Wed, 14 Jun 2023 13:37:03 -0400 Received: from mail-io1-f44.google.com (mail-io1-f44.google.com [209.85.166.44]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 06DE9119; Wed, 14 Jun 2023 10:37:03 -0700 (PDT) Received: by mail-io1-f44.google.com with SMTP id ca18e2360f4ac-777ac4344f9so262076239f.0; Wed, 14 Jun 2023 10:37:02 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686764222; x=1689356222; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=htWbyJD2n8RFcV5K4ncv4g5SpZeEJ2ahD8odx4XGKqw=; b=MVPT+PbwEzWFtiviMuhSY1JUEs3Kq60Ul5HDK7cslzx0HUtaMguClr3ssWDfTepbtL ovw71FO+uB/p10MXXU5wV+FIxm0Alg9Xfg1lqmgaPK/yDdgBhQd5vPYVh0wLIgVDZZx3 dPAmXJguxPARU7QCPufSpOAUCeK5cRMp0B6imZW0V4ANInZvTJ7ajB0Inm4x0EjGp6Es Wbhnm26b0wmsT+fHGwEX6zAjQiYHHqHxJy3s6z89Aw7MPCfImieSNgdkVd2ObcJP/Wk8 /e4hxQL0Ul5uq82/NO0aycsMoBsd7TRX8K5nZ45NaS1+aftC4UtV28u1uZweZBmA1YUo 9jHg== X-Gm-Message-State: AC+VfDwcJODNBTdZeVedeemosg2fCE7nVno9zr4sK1JIqQHyCEtHpDaH 1c7wQsyEdYn4wtgKgzUORw== X-Received: by 2002:a6b:db14:0:b0:777:b765:661a with SMTP id t20-20020a6bdb14000000b00777b765661amr15349944ioc.14.1686764222059; Wed, 14 Jun 2023 10:37:02 -0700 (PDT) Received: from robh_at_kernel.org ([64.188.179.250]) by smtp.gmail.com with ESMTPSA id t13-20020a5edd0d000000b0076373f90e46sm5518847iop.33.2023.06.14.10.37.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Jun 2023 10:37:01 -0700 (PDT) Received: (nullmailer pid 2431248 invoked by uid 1000); Wed, 14 Jun 2023 17:36:59 -0000 From: Rob Herring To: Damien Le Moal , Sergey Shtylyov , Thomas Bogendoerfer Cc: linux-ide@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] MIPS: octeon: Fix cvmx_writeq_csr/cvmx_readq_csr on 32-bit builds Date: Wed, 14 Jun 2023 11:36:31 -0600 Message-Id: <20230614173633.2430653-1-robh@kernel.org> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768701228931920840?= X-GMAIL-MSGID: =?utf-8?q?1768701228931920840?= Test 32-bit builds have an error in cvmx_writeq_csr/cvmx_readq_csr: arch/mips/include/asm/octeon/cvmx.h:282:24: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast] As the default for allyesconfig/allmodconfig is 32-bit, fixing these functions for 32-bit is needed to enable Cavium Octeon drivers for COMPILE_TEST. Signed-off-by: Rob Herring Acked-by: Thomas Bogendoerfer --- arch/mips/include/asm/octeon/cvmx.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/octeon/cvmx.h b/arch/mips/include/asm/octeon/cvmx.h index 72e775bf31e6..2265a92995a8 100644 --- a/arch/mips/include/asm/octeon/cvmx.h +++ b/arch/mips/include/asm/octeon/cvmx.h @@ -279,7 +279,7 @@ static inline void cvmx_write_csr(uint64_t csr_addr, uint64_t val) static inline void cvmx_writeq_csr(void __iomem *csr_addr, uint64_t val) { - cvmx_write_csr((__force uint64_t)csr_addr, val); + cvmx_write_csr((__force uintptr_t)csr_addr, val); } static inline void cvmx_write_io(uint64_t io_addr, uint64_t val) @@ -296,7 +296,7 @@ static inline uint64_t cvmx_read_csr(uint64_t csr_addr) static inline uint64_t cvmx_readq_csr(void __iomem *csr_addr) { - return cvmx_read_csr((__force uint64_t) csr_addr); + return cvmx_read_csr((__force uintptr_t) csr_addr); } static inline void cvmx_send_single(uint64_t data) From patchwork Wed Jun 14 17:36:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 108074 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp132477vqr; Wed, 14 Jun 2023 11:02:27 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ40dkVGdvLoGhnpH3MGC8RTT0tG1VyMEhDeHQ79IL615zU3cTOyS7oAir0MIIXVQtPljQ/M X-Received: by 2002:aa7:d155:0:b0:518:7b8d:daae with SMTP id r21-20020aa7d155000000b005187b8ddaaemr2579222edo.9.1686765747534; Wed, 14 Jun 2023 11:02:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686765747; cv=none; d=google.com; s=arc-20160816; b=CtNEE+bSFyHXOkL6R0vPkYdHO3+5UyoaTAPdIed78JLyeKn+zsCHmw9dsn4x0lJ8ga /127GNfNkFi7hvuxEj/wezrDRmeZaRuBhzedhky8LxkzuP0QnuriBt8YC1Tt2tfQWJGw FZNu6H/yKmVe+9tifmcLZaIRUGA+a/rY8aJG6JNsgXOh1PV/lXkJaCo9V/wfT6fyhcwt cI6WLUfvSANzH3VyjaVJNkuFnkEoxwQ39D9X32ni0olC4hRgLb5c6Ctv9DZEZTK5ri3Q 8b6aZxw2ppVnAMUctxd3XZ7XS6mV7ErrvSSRQK95lXN44J6ZC5BHmsLKTktRWX28qRM0 Aw4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=4AzIfgp2T+o1encwZlg2BP9N2PGCvG8KAxb0WUXTbaA=; b=GJU0OH0zwv1+4qV2xLKP9O7OokAyZ8wnUn47Dna9FpRlQQ1w0ERVAF5Dz1FHz9sq+i 6YSKy35W6swqY1VW0wfV60BlG/FoQCLedMdJmCvMiBWZ/dP1hAk9/Fp7molLwG0bf8PY Tl+b0/kTNjJw52aCoVDl7tBc2rYJGzgFVM1OnK4IY6OG3H03sucf4tPICyPF/Jdmjnt8 6wWmkzucikgA94tCsR7vv4kwIZ9KNOFTcqnk+5n9af+AvK8bp4/zAAJdj0gpRq4iBCe8 p+q6lY925tyPD3OekWOr5V8wt60rVhH+suuSB3awJqQ3O2qY2GGoFnOvyqTETQuxXXs/ uEQg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. 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There's a dependency on MIPS headers, so other arches can't be enabled. Signed-off-by: Rob Herring --- Tested on allmodconfig build. Not sure if there's other MIPS configs where this doesn't work. We'll see what 0-day says. drivers/ata/Kconfig | 4 ++-- drivers/ata/pata_octeon_cf.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 42b51c9812a0..4572f837e504 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -239,7 +239,7 @@ config AHCI_MVEBU config AHCI_OCTEON tristate "Cavium Octeon Soc Serial ATA" - depends on SATA_AHCI_PLATFORM && CAVIUM_OCTEON_SOC + depends on SATA_AHCI_PLATFORM && MIPS && (CAVIUM_OCTEON_SOC || COMPILE_TEST) default y help This option enables support for Cavium Octeon SoC Serial ATA. @@ -373,7 +373,7 @@ config PDC_ADMA config PATA_OCTEON_CF tristate "OCTEON Boot Bus Compact Flash support" - depends on CAVIUM_OCTEON_SOC + depends on MIPS && (CAVIUM_OCTEON_SOC || COMPILE_TEST) select PATA_TIMINGS help This option enables a polled compact flash driver for use with diff --git a/drivers/ata/pata_octeon_cf.c b/drivers/ata/pata_octeon_cf.c index 57b2166a6d5d..cc9e4b63ded9 100644 --- a/drivers/ata/pata_octeon_cf.c +++ b/drivers/ata/pata_octeon_cf.c @@ -853,8 +853,8 @@ static int octeon_cf_probe(struct platform_device *pdev) of_node_put(dma_node); return -EINVAL; } - cf_port->dma_base = (u64)devm_ioremap(&pdev->dev, res_dma->start, - resource_size(res_dma)); + cf_port->dma_base = (uintptr_t)devm_ioremap(&pdev->dev, res_dma->start, + resource_size(res_dma)); if (!cf_port->dma_base) { put_device(&dma_dev->dev); of_node_put(dma_node);