From patchwork Wed Jun 14 01:30:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 107652 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp939561vqr; Tue, 13 Jun 2023 18:49:28 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6MhhrZ4/zOvcO+DkbbFOqZfrMtUoF4Y6VrTiJEt8n1QW2jwpUzVvq1bF9f17QidoXjbExL X-Received: by 2002:a17:907:3da6:b0:978:73fb:1771 with SMTP id he38-20020a1709073da600b0097873fb1771mr169966ejc.32.1686707368076; Tue, 13 Jun 2023 18:49:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686707368; cv=none; d=google.com; s=arc-20160816; b=qD7xYShnckKR8hMjoabo6nLosQ2gS7pQcQyJyaa76vIsat3In+EeQVzmXAs12o/dY8 NtoWdu9xsM8CIakpDvkLK2J2ZZZZtinH4G8D9g/Rxe+Itv0ryCyYEEy74s4K4kM4Q62n T4NlwMzpkGUcXMlduXd+0GoN7Apvr92+4ZIF2OyYXMZ47ps8B8PyqgL5P9RROWCdEW85 zRtwRUqksAdk6D0aa+1hnoeY8H7AeL5wZPWv0Dukgen1AXag6v93UfJJOYrqRhsqLdnL aZ7eHSE/U80vcAD6Ut8T/lTYfrK1IP3xo02rwXYaAX11uyl/DBMaLfrMWWLRw9X3d8wZ VUjw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=6TAvV77mdMeS1Cm1DOQui3yHEcsPmxpKLxP6oq6bkoM=; b=gS3LwioTy1FLb8XkVcxPLzZasv12RfGiN6ZSNeiSWoKLQAGLoYkqHdKXuCbBHY/brY YAwLx9akMwcEXLbAiApuUeNxKO6SXyWe5kiDBlgOBDNfWzBvl1O4tXf3dXiKSeHr5aAT 4RoQeOHm1KmqSz+8vuUwLntTelnyy4nJVKKzuiHOjQLVPy6Z1OciEzFR1T/1RWQmZBOe wdeeUzbd2TgWNXelbh6ty5Wbj8yKPEFzZfgJU2eFdg63fP2SZXYdzr9viSJMpABGByRn IaB+iQaOjmTm+yXlLLz3DL0Lzfb8KC0Onu6VwWDvfey/QP7Vay5fwrlTNY5aEO/uKjR2 h6Xw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=GsZ2ixvW; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id rp26-20020a170906d97a00b0096a97038da2si7512934ejb.598.2023.06.13.18.49.03; Tue, 13 Jun 2023 18:49:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=GsZ2ixvW; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242110AbjFNBap (ORCPT + 99 others); Tue, 13 Jun 2023 21:30:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43530 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232925AbjFNBai (ORCPT ); Tue, 13 Jun 2023 21:30:38 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B9D2A1727; Tue, 13 Jun 2023 18:30:29 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 6CB75638BD; Wed, 14 Jun 2023 01:30:28 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4EE05C433C0; Wed, 14 Jun 2023 01:30:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1686706227; bh=azzWoVCj3Bccwg8Kywl22aCyL/uPe8mZErp3ZfcZjno=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GsZ2ixvW1iFZ4XPLl767dRd6H3gGLs7hjL7T0Jj7qfH+6hOZXrFzkci3A0qRDvvpg I+E1WoX01vbgM43oqA6nWdcY6tqCWkkBTCyopRlxNy7vW9tleuqg3UKkpKNFKwAFCz VbmCnwfQuXDf1QdmF6wJFQCXowOxQj8fhfrOBogwrTIJWrtaqepKUnmdFwwwbaimEE XL7ZNdMA75gZOIki475U/VwE00wQrG9F8sbzGYaNxUlk+nyoMjFDi94L67KLHCtBRV o8Mz3Q7CtN6k+e3BusfhZZUuj3+wUhKbHEqBlCMHiWosOMbN6MryEFUtwf+f80hg6t yYZsBhYASZhxQ== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, bjorn@kernel.org, cleger@rivosinc.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren Subject: [PATCH -next V13 1/3] riscv: stack: Support HAVE_IRQ_EXIT_ON_IRQ_STACK Date: Tue, 13 Jun 2023 21:30:16 -0400 Message-Id: <20230614013018.2168426-2-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230614013018.2168426-1-guoren@kernel.org> References: <20230614013018.2168426-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768640865162748017?= X-GMAIL-MSGID: =?utf-8?q?1768640865162748017?= From: Guo Ren Add independent irq stacks for percpu to prevent kernel stack overflows. It is also compatible with VMAP_STACK by arch_alloc_vmap_stack. Tested-by: Jisheng Zhang Signed-off-by: Guo Ren Signed-off-by: Guo Ren Cc: Clément Léger --- arch/riscv/Kconfig | 7 ++++++ arch/riscv/include/asm/irq_stack.h | 30 ++++++++++++++++++++++++ arch/riscv/include/asm/thread_info.h | 2 ++ arch/riscv/kernel/irq.c | 33 ++++++++++++++++++++++++++ arch/riscv/kernel/traps.c | 35 ++++++++++++++++++++++++++-- 5 files changed, 105 insertions(+), 2 deletions(-) create mode 100644 arch/riscv/include/asm/irq_stack.h diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index a3d54cd14fca..a8368fe7be14 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -590,6 +590,13 @@ config FPU If you don't know what to do here, say Y. +config IRQ_STACKS + bool "Independent irq stacks" if EXPERT + default y + select HAVE_IRQ_EXIT_ON_IRQ_STACK + help + Add independent irq stacks for percpu to prevent kernel stack overflows. + endmenu # "Platform type" menu "Kernel features" diff --git a/arch/riscv/include/asm/irq_stack.h b/arch/riscv/include/asm/irq_stack.h new file mode 100644 index 000000000000..e4042d297580 --- /dev/null +++ b/arch/riscv/include/asm/irq_stack.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef _ASM_RISCV_IRQ_STACK_H +#define _ASM_RISCV_IRQ_STACK_H + +#include +#include +#include +#include +#include +#include + +DECLARE_PER_CPU(ulong *, irq_stack_ptr); + +#ifdef CONFIG_VMAP_STACK +/* + * To ensure that VMAP'd stack overflow detection works correctly, all VMAP'd + * stacks need to have the same alignment. + */ +static inline unsigned long *arch_alloc_vmap_stack(size_t stack_size, int node) +{ + void *p; + + p = __vmalloc_node(stack_size, THREAD_ALIGN, THREADINFO_GFP, node, + __builtin_return_address(0)); + return kasan_reset_tag(p); +} +#endif /* CONFIG_VMAP_STACK */ + +#endif /* _ASM_RISCV_IRQ_STACK_H */ diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h index 97e6f65ec176..2f32875276b0 100644 --- a/arch/riscv/include/asm/thread_info.h +++ b/arch/riscv/include/asm/thread_info.h @@ -40,6 +40,8 @@ #define OVERFLOW_STACK_SIZE SZ_4K #define SHADOW_OVERFLOW_STACK_SIZE (1024) +#define IRQ_STACK_SIZE THREAD_SIZE + #ifndef __ASSEMBLY__ extern long shadow_stack[SHADOW_OVERFLOW_STACK_SIZE / sizeof(long)]; diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c index eb9a68a539e6..a1dcf8e43b3c 100644 --- a/arch/riscv/kernel/irq.c +++ b/arch/riscv/kernel/irq.c @@ -28,6 +28,38 @@ struct fwnode_handle *riscv_get_intc_hwnode(void) } EXPORT_SYMBOL_GPL(riscv_get_intc_hwnode); +#ifdef CONFIG_IRQ_STACKS +#include + +DEFINE_PER_CPU(ulong *, irq_stack_ptr); + +#ifdef CONFIG_VMAP_STACK +static void init_irq_stacks(void) +{ + int cpu; + ulong *p; + + for_each_possible_cpu(cpu) { + p = arch_alloc_vmap_stack(IRQ_STACK_SIZE, cpu_to_node(cpu)); + per_cpu(irq_stack_ptr, cpu) = p; + } +} +#else +/* irq stack only needs to be 16 byte aligned - not IRQ_STACK_SIZE aligned. */ +DEFINE_PER_CPU_ALIGNED(ulong [IRQ_STACK_SIZE/sizeof(ulong)], irq_stack); + +static void init_irq_stacks(void) +{ + int cpu; + + for_each_possible_cpu(cpu) + per_cpu(irq_stack_ptr, cpu) = per_cpu(irq_stack, cpu); +} +#endif /* CONFIG_VMAP_STACK */ +#else +static void init_irq_stacks(void) {} +#endif /* CONFIG_IRQ_STACKS */ + int arch_show_interrupts(struct seq_file *p, int prec) { show_ipi_stats(p, prec); @@ -36,6 +68,7 @@ int arch_show_interrupts(struct seq_file *p, int prec) void __init init_IRQ(void) { + init_irq_stacks(); irqchip_init(); if (!handle_arch_irq) panic("No interrupt controller found."); diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c index 05ffdcd1424e..5158961ea977 100644 --- a/arch/riscv/kernel/traps.c +++ b/arch/riscv/kernel/traps.c @@ -27,6 +27,7 @@ #include #include #include +#include int show_unhandled_signals = 1; @@ -327,16 +328,46 @@ asmlinkage __visible noinstr void do_page_fault(struct pt_regs *regs) } #endif -asmlinkage __visible noinstr void do_irq(struct pt_regs *regs) +static void noinstr handle_riscv_irq(struct pt_regs *regs) { struct pt_regs *old_regs; - irqentry_state_t state = irqentry_enter(regs); irq_enter_rcu(); old_regs = set_irq_regs(regs); handle_arch_irq(regs); set_irq_regs(old_regs); irq_exit_rcu(); +} + +asmlinkage void noinstr do_irq(struct pt_regs *regs) +{ + irqentry_state_t state = irqentry_enter(regs); +#ifdef CONFIG_IRQ_STACKS + if (on_thread_stack()) { + ulong *sp = per_cpu(irq_stack_ptr, smp_processor_id()) + + IRQ_STACK_SIZE/sizeof(ulong); + __asm__ __volatile( + "addi sp, sp, -"RISCV_SZPTR "\n" + REG_S" ra, (sp) \n" + "addi sp, sp, -"RISCV_SZPTR "\n" + REG_S" s0, (sp) \n" + "addi s0, sp, 2*"RISCV_SZPTR "\n" + "move sp, %[sp] \n" + "move a0, %[regs] \n" + "call handle_riscv_irq \n" + "addi sp, s0, -2*"RISCV_SZPTR"\n" + REG_L" s0, (sp) \n" + "addi sp, sp, "RISCV_SZPTR "\n" + REG_L" ra, (sp) \n" + "addi sp, sp, "RISCV_SZPTR "\n" + : + : [sp] "r" (sp), [regs] "r" (regs) + : "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", + "t0", "t1", "t2", "t3", "t4", "t5", "t6", + "memory"); + } else +#endif + handle_riscv_irq(regs); irqentry_exit(regs, state); } From patchwork Wed Jun 14 01:30:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 107648 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp937844vqr; Tue, 13 Jun 2023 18:44:22 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4Z+hqcLzVcDHkO8EY32YQV8D1/C5IkTLCwv4Q4RofPvhtNAb1S5BiRJdzHpBCvRw8MlO4Z X-Received: by 2002:a17:903:230f:b0:1b3:dc9f:2a71 with SMTP id d15-20020a170903230f00b001b3dc9f2a71mr5492152plh.41.1686707061850; Tue, 13 Jun 2023 18:44:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686707061; cv=none; d=google.com; s=arc-20160816; b=R6R6RmxSi/dHwn69epCF5WzyMmhINZ3wGSjM7CF1qTWIpz7NpiKQ0/xb8W71+Zq2u6 e/NdRxOR7CNZ56VEQszlojO6Fk/EGbAUqRsvgKYADgc6m/BFc6IdKxgEOLwo3VqXN3p1 j1uwoDvecqwJCkwiYD8qLpZ8z6rlnmgH2efaYLs/WLaUGMZWFym2sWxfb8OYoFO0FleR 9dzrFJ7kCDJUuL/8PbtCAR52fQlL2iJsmqPRC7pU0GQe7WCsl1zG/xUDETg2z2oQ2jaV URYxCgfZhYwW/vc+3O3W1tB0ebhA4OoD0IbNTMzBHT9rwIuINVI03gXGekuU/pZJk6ML aQLQ== ARC-Message-Signature: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id x11-20020a170902820b00b001b3d822f131si3689118pln.239.2023.06.13.18.44.08; Tue, 13 Jun 2023 18:44:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=DItFaqVw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242127AbjFNBau (ORCPT + 99 others); Tue, 13 Jun 2023 21:30:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43554 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242103AbjFNBak (ORCPT ); Tue, 13 Jun 2023 21:30:40 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CCB711BFD; Tue, 13 Jun 2023 18:30:31 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 54DC661B47; Wed, 14 Jun 2023 01:30:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4F1C7C433C8; Wed, 14 Jun 2023 01:30:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1686706230; bh=iT82mDfcbsJU8gzbcrM/NjkddpYqzVIJB0ER0mXt9RQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DItFaqVwyVZfghto0Bh8xCeovRtD/Z0suxiTAWh05dXsyaR2dSLivgDymyJm9TiNX i2qiqsszBI+qmJYpHYnRYL+bBiXqqgq9uOyLlxFsqo3OmutVy3syO7RjjX+GPsX9V+ Tr36lIgYuP1sHknpDuBl52E8M63WcYOUT2za6yqxEYoKmC0v3T7jUvPqYWzDtMoIFC 7aLmq22dOSit3DBZMCcKalCkeE+4vRfqo+8bjjbl+x5ujIbvH27HHGu3rsVCEQ2aHL I3QlA5dHTsPv2lQczF4tuWYQ3MPW1lAxOgAkWC9pATWeSPNQvObSVv7kJP4GxHf/df sYPlZjGpYsU1w== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, bjorn@kernel.org, cleger@rivosinc.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren Subject: [PATCH -next V13 2/3] riscv: stack: Support HAVE_SOFTIRQ_ON_OWN_STACK Date: Tue, 13 Jun 2023 21:30:17 -0400 Message-Id: <20230614013018.2168426-3-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230614013018.2168426-1-guoren@kernel.org> References: <20230614013018.2168426-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768640544329390875?= X-GMAIL-MSGID: =?utf-8?q?1768640544329390875?= From: Guo Ren Add the HAVE_SOFTIRQ_ON_OWN_STACK feature for the IRQ_STACKS config, and the irq and softirq use the same irq_stack of percpu. Tested-by: Jisheng Zhang Signed-off-by: Guo Ren Signed-off-by: Guo Ren --- arch/riscv/Kconfig | 6 ++++-- arch/riscv/kernel/irq.c | 35 +++++++++++++++++++++++++++++++++++ 2 files changed, 39 insertions(+), 2 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index a8368fe7be14..f515cb101c19 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -591,11 +591,13 @@ config FPU If you don't know what to do here, say Y. config IRQ_STACKS - bool "Independent irq stacks" if EXPERT + bool "Independent irq & softirq stacks" if EXPERT default y select HAVE_IRQ_EXIT_ON_IRQ_STACK + select HAVE_SOFTIRQ_ON_OWN_STACK help - Add independent irq stacks for percpu to prevent kernel stack overflows. + Add independent irq & softirq stacks for percpu to prevent kernel stack + overflows. We may save some memory footprint by disabling IRQ_STACKS. endmenu # "Platform type" diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c index a1dcf8e43b3c..d0577cc6a081 100644 --- a/arch/riscv/kernel/irq.c +++ b/arch/riscv/kernel/irq.c @@ -11,6 +11,9 @@ #include #include #include +#include +#include +#include static struct fwnode_handle *(*__get_intc_node)(void); @@ -56,6 +59,38 @@ static void init_irq_stacks(void) per_cpu(irq_stack_ptr, cpu) = per_cpu(irq_stack, cpu); } #endif /* CONFIG_VMAP_STACK */ + +#ifdef CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK +void do_softirq_own_stack(void) +{ +#ifdef CONFIG_IRQ_STACKS + if (on_thread_stack()) { + ulong *sp = per_cpu(irq_stack_ptr, smp_processor_id()) + + IRQ_STACK_SIZE/sizeof(ulong); + __asm__ __volatile( + "addi sp, sp, -"RISCV_SZPTR "\n" + REG_S" ra, (sp) \n" + "addi sp, sp, -"RISCV_SZPTR "\n" + REG_S" s0, (sp) \n" + "addi s0, sp, 2*"RISCV_SZPTR "\n" + "move sp, %[sp] \n" + "call __do_softirq \n" + "addi sp, s0, -2*"RISCV_SZPTR"\n" + REG_L" s0, (sp) \n" + "addi sp, sp, "RISCV_SZPTR "\n" + REG_L" ra, (sp) \n" + "addi sp, sp, "RISCV_SZPTR "\n" + : + : [sp] "r" (sp) + : "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", + "t0", "t1", "t2", "t3", "t4", "t5", "t6", + "memory"); + } else +#endif + __do_softirq(); +} +#endif /* CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK */ + #else static void init_irq_stacks(void) {} #endif /* CONFIG_IRQ_STACKS */ From patchwork Wed Jun 14 01:30:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 107645 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp934795vqr; Tue, 13 Jun 2023 18:35:54 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6iH3OOxsnvy3Lm9PGx01ZSG5rjIxcOQWZXfFuYSqrC3teQk2fMXXwrA1XYp3SX+tRwhccG X-Received: by 2002:a19:5f58:0:b0:4f6:5198:652c with SMTP id a24-20020a195f58000000b004f65198652cmr6275594lfj.62.1686706554047; Tue, 13 Jun 2023 18:35:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686706554; cv=none; d=google.com; s=arc-20160816; b=i5THMffDL3/IWFWA7b7U9rnHcBs1JZYm/H/7GNCKOYWRh/kohVLe2hS+GaaN9tMBrz 8KsVSFcEJcbsEQbKsL8JYN5joQT6308EO5sAGV70yXDU8h/DbeizO5lrtOTcv8+6e+Ee vklWuoNaqgXzyuIwrG6YmF9tnAL8L8dF8tqgbAKa8z8oBuTRjGiSKuyrnZ4cqHtk1pTO Ss8mzQerODvD63LL3+5Qiatyzob/9IlUz13N6gtJ/SGojc7yJ7R4SzH641ub/M8cvlyf EhouquKNKAwaHE6sAl3P4XnRY+wzIbKRjzIqNwAlWGrBeTas4tXwU7QDJS2z3JsnF68u W+Pw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=2OqHWN7VYyEU1XJbcIRl4KRmoqqzPlby9un+WPE27/s=; b=ob5TtaA+vpLK4W3RfPUU/axuf/96YIkt619hApbzcrXRKkKm6N+41pMYh1AicYaQxg C0CkmRC86xwADpdyRaEIbS69vixCsfuez2Mxue5Ilzyc8G4je/K9gVOuO590NVM4uXSN s27dRkituZ6iHi6C5BKE3dSokQT0lx+1ule0aSDi7Nz/8mXvdLOew9W5TaWLemx9ljZ4 XmM2T+eE5fHdeYf3/rBFFDQr7SU/g03YFG151BWI0x5mDQdDbL5QYxzqawrCojBhePzs Erv+WOt+Rwrmc66CUJd5hd91xrojPqAjZ3Y/xX0liAQHEkgW0+521KQ5PRZDBmIjmOxr i9lA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="UZXQlRD/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x2-20020aa7d382000000b00516a0522712si8451901edq.438.2023.06.13.18.35.29; Tue, 13 Jun 2023 18:35:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="UZXQlRD/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242103AbjFNBbD (ORCPT + 99 others); Tue, 13 Jun 2023 21:31:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43638 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242115AbjFNBas (ORCPT ); Tue, 13 Jun 2023 21:30:48 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C34C71FCE; Tue, 13 Jun 2023 18:30:36 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id B4E7962F37; Wed, 14 Jun 2023 01:30:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3C855C433CC; Wed, 14 Jun 2023 01:30:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1686706234; bh=qsjRxtxZYf2OUYpf9/BMTkMpzMYIpbCMO3E2fwLXlKI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UZXQlRD/QfHOQjSClgU9X1RRPI3A8OzbdviJ5/Z+3PONCuyh0R2LRMdCgOZzjO8vD OxzFI4PFDIfGvxIKSWQ8/3JIKD08Lr7S5FEaFWAuxre5I+cBxKhjslIAXNu/A0AzuO urgNX6dHtj89ouVC5T+hSvjw7+H34cHza8T2mTQmrP/CzXRRJtOZ6v2mKRnowwhuXT 3zAClr6i/4hOWpF4nBht7oJpHrY57kHYDXRQWl93ZEiztO8TXgLiRUDmq5jeHCa6Nb t9W8rn6fa1SsAZBAjzEemGqUsx5wfbu1cPWUGpBT5das0EdtK28eQK2jKOHpLjaSj9 gHSMHt+kB75FQ== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, bjorn@kernel.org, cleger@rivosinc.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren Subject: [PATCH -next V13 3/3] riscv: stack: Add config of thread stack size Date: Tue, 13 Jun 2023 21:30:18 -0400 Message-Id: <20230614013018.2168426-4-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230614013018.2168426-1-guoren@kernel.org> References: <20230614013018.2168426-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768640011567525401?= X-GMAIL-MSGID: =?utf-8?q?1768640011567525401?= From: Guo Ren The commit 0cac21b02ba5 ("riscv: use 16KB kernel stack on 64-bit") increases the thread size mandatory, but some scenarios, such as D1 with a small memory footprint, would suffer from that. After independent irq stack support, let's give users a choice to determine their custom stack size. Link: https://lore.kernel.org/linux-riscv/5f6e6c39-b846-4392-b468-02202404de28@www.fastmail.com/ Suggested-by: Arnd Bergmann Tested-by: Jisheng Zhang Signed-off-by: Guo Ren Signed-off-by: Guo Ren --- arch/riscv/Kconfig | 10 ++++++++++ arch/riscv/include/asm/thread_info.h | 12 +----------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index f515cb101c19..0599bba13654 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -599,6 +599,16 @@ config IRQ_STACKS Add independent irq & softirq stacks for percpu to prevent kernel stack overflows. We may save some memory footprint by disabling IRQ_STACKS. +config THREAD_SIZE_ORDER + int "Kernel stack size (in power-of-two numbers of page size)" if VMAP_STACK && EXPERT + range 0 4 + default 1 if 32BIT && !KASAN + default 3 if 64BIT && KASAN + default 2 + help + Specify the Pages of thread stack size (from 4KB to 64KB), which also + affects irq stack size, which is equal to thread stack size. + endmenu # "Platform type" menu "Kernel features" diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h index 2f32875276b0..1833beb00489 100644 --- a/arch/riscv/include/asm/thread_info.h +++ b/arch/riscv/include/asm/thread_info.h @@ -11,18 +11,8 @@ #include #include -#ifdef CONFIG_KASAN -#define KASAN_STACK_ORDER 1 -#else -#define KASAN_STACK_ORDER 0 -#endif - /* thread information allocation */ -#ifdef CONFIG_64BIT -#define THREAD_SIZE_ORDER (2 + KASAN_STACK_ORDER) -#else -#define THREAD_SIZE_ORDER (1 + KASAN_STACK_ORDER) -#endif +#define THREAD_SIZE_ORDER CONFIG_THREAD_SIZE_ORDER #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) /*